1 files changed, 38 insertions, 62 deletions
diff --git a/arch/m68k/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c
index 9cd13b4ce42b..fddfdccae63b 100644
--- a/arch/m68k/platform/coldfire/clk.c
+++ b/arch/m68k/platform/coldfire/clk.c
@@ -19,37 +19,58 @@
 #include <asm/mcfsim.h>
 #include <asm/mcfclk.h>
-/***************************************************************************/
+static DEFINE_SPINLOCK(clk_lock);
-#ifndef MCFPM_PPMCR0
-struct clk *clk_get(struct device *dev, const char *id)
+#ifdef MCFPM_PPMCR0
+/*
+ *      For more advanced ColdFire parts that have clocks that can be enabled
+ *      we supply enable/disable functions. These must properly define their
+ *      clocks in their platform specific code.
+ */
+void __clk_init_enabled(struct clk *clk)
 {
-        return NULL;
+        clk->enabled = 1;
+        clk->clk_ops->enable(clk);
 }
-EXPORT_SYMBOL(clk_get);
-int clk_enable(struct clk *clk)
+void __clk_init_disabled(struct clk *clk)
 {
-        return 0;
+        clk->enabled = 0;
+        clk->clk_ops->disable(clk);
 }
-EXPORT_SYMBOL(clk_enable);
-void clk_disable(struct clk *clk)
+static void __clk_enable0(struct clk *clk)
 {
+        __raw_writeb(clk->slot, MCFPM_PPMCR0);
 }
-EXPORT_SYMBOL(clk_disable);
-void clk_put(struct clk *clk)
+static void __clk_disable0(struct clk *clk)
+{
+        __raw_writeb(clk->slot, MCFPM_PPMSR0);
+}
+struct clk_ops clk_ops0 = {
+        .enable         = __clk_enable0,
+        .disable        = __clk_disable0,
+};
+#ifdef MCFPM_PPMCR1
+static void __clk_enable1(struct clk *clk)
 {
+        __raw_writeb(clk->slot, MCFPM_PPMCR1);
 }
-EXPORT_SYMBOL(clk_put);
-unsigned long clk_get_rate(struct clk *clk)
+static void __clk_disable1(struct clk *clk)
 {
-        return MCF_CLK;
+        __raw_writeb(clk->slot, MCFPM_PPMSR1);
 }
-EXPORT_SYMBOL(clk_get_rate);
-#else
+struct clk_ops clk_ops1 = {
-static DEFINE_SPINLOCK(clk_lock);
+        .enable         = __clk_enable1,
+        .disable        = __clk_disable1,
+};
+#endif /* MCFPM_PPMCR1 */
+#endif /* MCFPM_PPMCR0 */
 struct clk *clk_get(struct device *dev, const char *id)
 {
@@ -101,48 +122,3 @@ unsigned long clk_get_rate(struct clk *clk)
 EXPORT_SYMBOL(clk_get_rate);
 /***************************************************************************/
-void __clk_init_enabled(struct clk *clk)
-{
-        clk->enabled = 1;
-        clk->clk_ops->enable(clk);
-}
-void __clk_init_disabled(struct clk *clk)
-{
-        clk->enabled = 0;
-        clk->clk_ops->disable(clk);
-}
-static void __clk_enable0(struct clk *clk)
-{
-        __raw_writeb(clk->slot, MCFPM_PPMCR0);
-}
-static void __clk_disable0(struct clk *clk)
-{
-        __raw_writeb(clk->slot, MCFPM_PPMSR0);
-}
-struct clk_ops clk_ops0 = {
-        .enable         = __clk_enable0,
-        .disable        = __clk_disable0,
-};
-#ifdef MCFPM_PPMCR1
-static void __clk_enable1(struct clk *clk)
-{
-        __raw_writeb(clk->slot, MCFPM_PPMCR1);
-}
-static void __clk_disable1(struct clk *clk)
-{
-        __raw_writeb(clk->slot, MCFPM_PPMSR1);
-}
-struct clk_ops clk_ops1 = {
-        .enable         = __clk_enable1,
-        .disable        = __clk_disable1,
-};
-#endif /* MCFPM_PPMCR1 */
-#endif /* MCFPM_PPMCR0 */

diff --git a/arch/m68k/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c index 9cd13b4ce42b..fddfdccae63b 100644 --- a/arch/m68k/platform/coldfire/clk.c +++ b/arch/m68k/platform/coldfire/clk.c
@@ -19,37 +19,58 @@
19	#include <asm/mcfsim.h>	19	#include <asm/mcfsim.h>
20	#include <asm/mcfclk.h>	20	#include <asm/mcfclk.h>
21		21
22	/***************************************************************************/	22	static DEFINE_SPINLOCK(clk_lock);
23	#ifndef MCFPM_PPMCR0	23
24	struct clk clk_get(struct device dev, const char *id)	24	#ifdef MCFPM_PPMCR0
		25	/*
		26	* For more advanced ColdFire parts that have clocks that can be enabled
		27	* we supply enable/disable functions. These must properly define their
		28	* clocks in their platform specific code.
		29	*/
		30	void __clk_init_enabled(struct clk *clk)
25	{	31	{
26	return NULL;	32	clk->enabled = 1;
		33	clk->clk_ops->enable(clk);
27	}	34	}
28	EXPORT_SYMBOL(clk_get);
29		35
30	int clk_enable(struct clk *clk)	36	void __clk_init_disabled(struct clk *clk)
31	{	37	{
32	return 0;	38	clk->enabled = 0;
		39	clk->clk_ops->disable(clk);
33	}	40	}
34	EXPORT_SYMBOL(clk_enable);
35		41
36	void clk_disable(struct clk *clk)	42	static void __clk_enable0(struct clk *clk)
37	{	43	{
		44	__raw_writeb(clk->slot, MCFPM_PPMCR0);
38	}	45	}
39	EXPORT_SYMBOL(clk_disable);
40		46
41	void clk_put(struct clk *clk)	47	static void __clk_disable0(struct clk *clk)
		48	{
		49	__raw_writeb(clk->slot, MCFPM_PPMSR0);
		50	}
		51
		52	struct clk_ops clk_ops0 = {
		53	.enable = __clk_enable0,
		54	.disable = __clk_disable0,
		55	};
		56
		57	#ifdef MCFPM_PPMCR1
		58	static void __clk_enable1(struct clk *clk)
42	{	59	{
		60	__raw_writeb(clk->slot, MCFPM_PPMCR1);
43	}	61	}
44	EXPORT_SYMBOL(clk_put);
45		62
46	unsigned long clk_get_rate(struct clk *clk)	63	static void __clk_disable1(struct clk *clk)
47	{	64	{
48	return MCF_CLK;	65	__raw_writeb(clk->slot, MCFPM_PPMSR1);
49	}	66	}
50	EXPORT_SYMBOL(clk_get_rate);	67
51	#else	68	struct clk_ops clk_ops1 = {
52	static DEFINE_SPINLOCK(clk_lock);	69	.enable = __clk_enable1,
		70	.disable = __clk_disable1,
		71	};
		72	#endif /* MCFPM_PPMCR1 */
		73	#endif /* MCFPM_PPMCR0 */
53		74
54	struct clk clk_get(struct device dev, const char *id)	75	struct clk clk_get(struct device dev, const char *id)
55	{	76	{
@@ -101,48 +122,3 @@ unsigned long clk_get_rate(struct clk *clk)
101	EXPORT_SYMBOL(clk_get_rate);	122	EXPORT_SYMBOL(clk_get_rate);
102		123
103	/***************************************************************************/	124	/***************************************************************************/
104
105	void __clk_init_enabled(struct clk *clk)
106	{
107	clk->enabled = 1;
108	clk->clk_ops->enable(clk);
109	}
110
111	void __clk_init_disabled(struct clk *clk)
112	{
113	clk->enabled = 0;
114	clk->clk_ops->disable(clk);
115	}
116
117	static void __clk_enable0(struct clk *clk)
118	{
119	__raw_writeb(clk->slot, MCFPM_PPMCR0);
120	}
121
122	static void __clk_disable0(struct clk *clk)
123	{
124	__raw_writeb(clk->slot, MCFPM_PPMSR0);
125	}
126
127	struct clk_ops clk_ops0 = {
128	.enable = __clk_enable0,
129	.disable = __clk_disable0,
130	};
131
132	#ifdef MCFPM_PPMCR1
133	static void __clk_enable1(struct clk *clk)
134	{
135	__raw_writeb(clk->slot, MCFPM_PPMCR1);
136	}
137
138	static void __clk_disable1(struct clk *clk)
139	{
140	__raw_writeb(clk->slot, MCFPM_PPMSR1);
141	}
142
143	struct clk_ops clk_ops1 = {
144	.enable = __clk_enable1,
145	.disable = __clk_disable1,
146	};
147	#endif /* MCFPM_PPMCR1 */
148	#endif /* MCFPM_PPMCR0 */