diff options
| -rw-r--r-- | drivers/clk/qcom/gcc-msm8998.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index 1b779396e04f..b618bbfa9a7f 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c | |||
| @@ -1189,6 +1189,7 @@ static struct clk_branch gcc_aggre1_ufs_axi_clk = { | |||
| 1189 | "ufs_axi_clk_src", | 1189 | "ufs_axi_clk_src", |
| 1190 | }, | 1190 | }, |
| 1191 | .num_parents = 1, | 1191 | .num_parents = 1, |
| 1192 | .flags = CLK_SET_RATE_PARENT, | ||
| 1192 | .ops = &clk_branch2_ops, | 1193 | .ops = &clk_branch2_ops, |
| 1193 | }, | 1194 | }, |
| 1194 | }, | 1195 | }, |
| @@ -1206,6 +1207,7 @@ static struct clk_branch gcc_aggre1_usb3_axi_clk = { | |||
| 1206 | "usb30_master_clk_src", | 1207 | "usb30_master_clk_src", |
| 1207 | }, | 1208 | }, |
| 1208 | .num_parents = 1, | 1209 | .num_parents = 1, |
| 1210 | .flags = CLK_SET_RATE_PARENT, | ||
| 1209 | .ops = &clk_branch2_ops, | 1211 | .ops = &clk_branch2_ops, |
| 1210 | }, | 1212 | }, |
| 1211 | }, | 1213 | }, |
| @@ -1288,6 +1290,7 @@ static struct clk_branch gcc_blsp1_qup1_i2c_apps_clk = { | |||
| 1288 | "blsp1_qup1_i2c_apps_clk_src", | 1290 | "blsp1_qup1_i2c_apps_clk_src", |
| 1289 | }, | 1291 | }, |
| 1290 | .num_parents = 1, | 1292 | .num_parents = 1, |
| 1293 | .flags = CLK_SET_RATE_PARENT, | ||
| 1291 | .ops = &clk_branch2_ops, | 1294 | .ops = &clk_branch2_ops, |
| 1292 | }, | 1295 | }, |
| 1293 | }, | 1296 | }, |
| @@ -1305,6 +1308,7 @@ static struct clk_branch gcc_blsp1_qup1_spi_apps_clk = { | |||
| 1305 | "blsp1_qup1_spi_apps_clk_src", | 1308 | "blsp1_qup1_spi_apps_clk_src", |
| 1306 | }, | 1309 | }, |
| 1307 | .num_parents = 1, | 1310 | .num_parents = 1, |
| 1311 | .flags = CLK_SET_RATE_PARENT, | ||
| 1308 | .ops = &clk_branch2_ops, | 1312 | .ops = &clk_branch2_ops, |
| 1309 | }, | 1313 | }, |
| 1310 | }, | 1314 | }, |
| @@ -1322,6 +1326,7 @@ static struct clk_branch gcc_blsp1_qup2_i2c_apps_clk = { | |||
| 1322 | "blsp1_qup2_i2c_apps_clk_src", | 1326 | "blsp1_qup2_i2c_apps_clk_src", |
| 1323 | }, | 1327 | }, |
| 1324 | .num_parents = 1, | 1328 | .num_parents = 1, |
| 1329 | .flags = CLK_SET_RATE_PARENT, | ||
| 1325 | .ops = &clk_branch2_ops, | 1330 | .ops = &clk_branch2_ops, |
| 1326 | }, | 1331 | }, |
| 1327 | }, | 1332 | }, |
| @@ -1339,6 +1344,7 @@ static struct clk_branch gcc_blsp1_qup2_spi_apps_clk = { | |||
| 1339 | "blsp1_qup2_spi_apps_clk_src", | 1344 | "blsp1_qup2_spi_apps_clk_src", |
| 1340 | }, | 1345 | }, |
| 1341 | .num_parents = 1, | 1346 | .num_parents = 1, |
| 1347 | .flags = CLK_SET_RATE_PARENT, | ||
| 1342 | .ops = &clk_branch2_ops, | 1348 | .ops = &clk_branch2_ops, |
| 1343 | }, | 1349 | }, |
| 1344 | }, | 1350 | }, |
| @@ -1356,6 +1362,7 @@ static struct clk_branch gcc_blsp1_qup3_i2c_apps_clk = { | |||
| 1356 | "blsp1_qup3_i2c_apps_clk_src", | 1362 | "blsp1_qup3_i2c_apps_clk_src", |
| 1357 | }, | 1363 | }, |
| 1358 | .num_parents = 1, | 1364 | .num_parents = 1, |
| 1365 | .flags = CLK_SET_RATE_PARENT, | ||
| 1359 | .ops = &clk_branch2_ops, | 1366 | .ops = &clk_branch2_ops, |
| 1360 | }, | 1367 | }, |
| 1361 | }, | 1368 | }, |
| @@ -1373,6 +1380,7 @@ static struct clk_branch gcc_blsp1_qup3_spi_apps_clk = { | |||
| 1373 | "blsp1_qup3_spi_apps_clk_src", | 1380 | "blsp1_qup3_spi_apps_clk_src", |
| 1374 | }, | 1381 | }, |
| 1375 | .num_parents = 1, | 1382 | .num_parents = 1, |
| 1383 | .flags = CLK_SET_RATE_PARENT, | ||
| 1376 | .ops = &clk_branch2_ops, | 1384 | .ops = &clk_branch2_ops, |
| 1377 | }, | 1385 | }, |
| 1378 | }, | 1386 | }, |
| @@ -1390,6 +1398,7 @@ static struct clk_branch gcc_blsp1_qup4_i2c_apps_clk = { | |||
| 1390 | "blsp1_qup4_i2c_apps_clk_src", | 1398 | "blsp1_qup4_i2c_apps_clk_src", |
| 1391 | }, | 1399 | }, |
| 1392 | .num_parents = 1, | 1400 | .num_parents = 1, |
| 1401 | .flags = CLK_SET_RATE_PARENT, | ||
| 1393 | .ops = &clk_branch2_ops, | 1402 | .ops = &clk_branch2_ops, |
| 1394 | }, | 1403 | }, |
| 1395 | }, | 1404 | }, |
| @@ -1407,6 +1416,7 @@ static struct clk_branch gcc_blsp1_qup4_spi_apps_clk = { | |||
| 1407 | "blsp1_qup4_spi_apps_clk_src", | 1416 | "blsp1_qup4_spi_apps_clk_src", |
| 1408 | }, | 1417 | }, |
| 1409 | .num_parents = 1, | 1418 | .num_parents = 1, |
| 1419 | .flags = CLK_SET_RATE_PARENT, | ||
| 1410 | .ops = &clk_branch2_ops, | 1420 | .ops = &clk_branch2_ops, |
| 1411 | }, | 1421 | }, |
| 1412 | }, | 1422 | }, |
| @@ -1424,6 +1434,7 @@ static struct clk_branch gcc_blsp1_qup5_i2c_apps_clk = { | |||
| 1424 | "blsp1_qup5_i2c_apps_clk_src", | 1434 | "blsp1_qup5_i2c_apps_clk_src", |
| 1425 | }, | 1435 | }, |
| 1426 | .num_parents = 1, | 1436 | .num_parents = 1, |
| 1437 | .flags = CLK_SET_RATE_PARENT, | ||
| 1427 | .ops = &clk_branch2_ops, | 1438 | .ops = &clk_branch2_ops, |
| 1428 | }, | 1439 | }, |
| 1429 | }, | 1440 | }, |
| @@ -1441,6 +1452,7 @@ static struct clk_branch gcc_blsp1_qup5_spi_apps_clk = { | |||
| 1441 | "blsp1_qup5_spi_apps_clk_src", | 1452 | "blsp1_qup5_spi_apps_clk_src", |
| 1442 | }, | 1453 | }, |
| 1443 | .num_parents = 1, | 1454 | .num_parents = 1, |
| 1455 | .flags = CLK_SET_RATE_PARENT, | ||
| 1444 | .ops = &clk_branch2_ops, | 1456 | .ops = &clk_branch2_ops, |
| 1445 | }, | 1457 | }, |
| 1446 | }, | 1458 | }, |
| @@ -1458,6 +1470,7 @@ static struct clk_branch gcc_blsp1_qup6_i2c_apps_clk = { | |||
| 1458 | "blsp1_qup6_i2c_apps_clk_src", | 1470 | "blsp1_qup6_i2c_apps_clk_src", |
| 1459 | }, | 1471 | }, |
| 1460 | .num_parents = 1, | 1472 | .num_parents = 1, |
| 1473 | .flags = CLK_SET_RATE_PARENT, | ||
| 1461 | .ops = &clk_branch2_ops, | 1474 | .ops = &clk_branch2_ops, |
| 1462 | }, | 1475 | }, |
| 1463 | }, | 1476 | }, |
| @@ -1475,6 +1488,7 @@ static struct clk_branch gcc_blsp1_qup6_spi_apps_clk = { | |||
| 1475 | "blsp1_qup6_spi_apps_clk_src", | 1488 | "blsp1_qup6_spi_apps_clk_src", |
| 1476 | }, | 1489 | }, |
| 1477 | .num_parents = 1, | 1490 | .num_parents = 1, |
| 1491 | .flags = CLK_SET_RATE_PARENT, | ||
| 1478 | .ops = &clk_branch2_ops, | 1492 | .ops = &clk_branch2_ops, |
| 1479 | }, | 1493 | }, |
| 1480 | }, | 1494 | }, |
| @@ -1505,6 +1519,7 @@ static struct clk_branch gcc_blsp1_uart1_apps_clk = { | |||
| 1505 | "blsp1_uart1_apps_clk_src", | 1519 | "blsp1_uart1_apps_clk_src", |
| 1506 | }, | 1520 | }, |
| 1507 | .num_parents = 1, | 1521 | .num_parents = 1, |
| 1522 | .flags = CLK_SET_RATE_PARENT, | ||
| 1508 | .ops = &clk_branch2_ops, | 1523 | .ops = &clk_branch2_ops, |
| 1509 | }, | 1524 | }, |
| 1510 | }, | 1525 | }, |
| @@ -1522,6 +1537,7 @@ static struct clk_branch gcc_blsp1_uart2_apps_clk = { | |||
| 1522 | "blsp1_uart2_apps_clk_src", | 1537 | "blsp1_uart2_apps_clk_src", |
| 1523 | }, | 1538 | }, |
| 1524 | .num_parents = 1, | 1539 | .num_parents = 1, |
| 1540 | .flags = CLK_SET_RATE_PARENT, | ||
| 1525 | .ops = &clk_branch2_ops, | 1541 | .ops = &clk_branch2_ops, |
| 1526 | }, | 1542 | }, |
| 1527 | }, | 1543 | }, |
| @@ -1539,6 +1555,7 @@ static struct clk_branch gcc_blsp1_uart3_apps_clk = { | |||
| 1539 | "blsp1_uart3_apps_clk_src", | 1555 | "blsp1_uart3_apps_clk_src", |
| 1540 | }, | 1556 | }, |
| 1541 | .num_parents = 1, | 1557 | .num_parents = 1, |
| 1558 | .flags = CLK_SET_RATE_PARENT, | ||
| 1542 | .ops = &clk_branch2_ops, | 1559 | .ops = &clk_branch2_ops, |
| 1543 | }, | 1560 | }, |
| 1544 | }, | 1561 | }, |
| @@ -1569,6 +1586,7 @@ static struct clk_branch gcc_blsp2_qup1_i2c_apps_clk = { | |||
| 1569 | "blsp2_qup1_i2c_apps_clk_src", | 1586 | "blsp2_qup1_i2c_apps_clk_src", |
| 1570 | }, | 1587 | }, |
| 1571 | .num_parents = 1, | 1588 | .num_parents = 1, |
| 1589 | .flags = CLK_SET_RATE_PARENT, | ||
| 1572 | .ops = &clk_branch2_ops, | 1590 | .ops = &clk_branch2_ops, |
| 1573 | }, | 1591 | }, |
| 1574 | }, | 1592 | }, |
| @@ -1586,6 +1604,7 @@ static struct clk_branch gcc_blsp2_qup1_spi_apps_clk = { | |||
| 1586 | "blsp2_qup1_spi_apps_clk_src", | 1604 | "blsp2_qup1_spi_apps_clk_src", |
| 1587 | }, | 1605 | }, |
| 1588 | .num_parents = 1, | 1606 | .num_parents = 1, |
| 1607 | .flags = CLK_SET_RATE_PARENT, | ||
| 1589 | .ops = &clk_branch2_ops, | 1608 | .ops = &clk_branch2_ops, |
| 1590 | }, | 1609 | }, |
| 1591 | }, | 1610 | }, |
| @@ -1603,6 +1622,7 @@ static struct clk_branch gcc_blsp2_qup2_i2c_apps_clk = { | |||
| 1603 | "blsp2_qup2_i2c_apps_clk_src", | 1622 | "blsp2_qup2_i2c_apps_clk_src", |
| 1604 | }, | 1623 | }, |
| 1605 | .num_parents = 1, | 1624 | .num_parents = 1, |
| 1625 | .flags = CLK_SET_RATE_PARENT, | ||
| 1606 | .ops = &clk_branch2_ops, | 1626 | .ops = &clk_branch2_ops, |
| 1607 | }, | 1627 | }, |
| 1608 | }, | 1628 | }, |
| @@ -1620,6 +1640,7 @@ static struct clk_branch gcc_blsp2_qup2_spi_apps_clk = { | |||
| 1620 | "blsp2_qup2_spi_apps_clk_src", | 1640 | "blsp2_qup2_spi_apps_clk_src", |
| 1621 | }, | 1641 | }, |
| 1622 | .num_parents = 1, | 1642 | .num_parents = 1, |
| 1643 | .flags = CLK_SET_RATE_PARENT, | ||
| 1623 | .ops = &clk_branch2_ops, | 1644 | .ops = &clk_branch2_ops, |
| 1624 | }, | 1645 | }, |
| 1625 | }, | 1646 | }, |
| @@ -1637,6 +1658,7 @@ static struct clk_branch gcc_blsp2_qup3_i2c_apps_clk = { | |||
| 1637 | "blsp2_qup3_i2c_apps_clk_src", | 1658 | "blsp2_qup3_i2c_apps_clk_src", |
| 1638 | }, | 1659 | }, |
| 1639 | .num_parents = 1, | 1660 | .num_parents = 1, |
| 1661 | .flags = CLK_SET_RATE_PARENT, | ||
| 1640 | .ops = &clk_branch2_ops, | 1662 | .ops = &clk_branch2_ops, |
| 1641 | }, | 1663 | }, |
| 1642 | }, | 1664 | }, |
| @@ -1654,6 +1676,7 @@ static struct clk_branch gcc_blsp2_qup3_spi_apps_clk = { | |||
| 1654 | "blsp2_qup3_spi_apps_clk_src", | 1676 | "blsp2_qup3_spi_apps_clk_src", |
| 1655 | }, | 1677 | }, |
| 1656 | .num_parents = 1, | 1678 | .num_parents = 1, |
| 1679 | .flags = CLK_SET_RATE_PARENT, | ||
| 1657 | .ops = &clk_branch2_ops, | 1680 | .ops = &clk_branch2_ops, |
| 1658 | }, | 1681 | }, |
| 1659 | }, | 1682 | }, |
| @@ -1671,6 +1694,7 @@ static struct clk_branch gcc_blsp2_qup4_i2c_apps_clk = { | |||
| 1671 | "blsp2_qup4_i2c_apps_clk_src", | 1694 | "blsp2_qup4_i2c_apps_clk_src", |
| 1672 | }, | 1695 | }, |
| 1673 | .num_parents = 1, | 1696 | .num_parents = 1, |
| 1697 | .flags = CLK_SET_RATE_PARENT, | ||
| 1674 | .ops = &clk_branch2_ops, | 1698 | .ops = &clk_branch2_ops, |
| 1675 | }, | 1699 | }, |
| 1676 | }, | 1700 | }, |
| @@ -1688,6 +1712,7 @@ static struct clk_branch gcc_blsp2_qup4_spi_apps_clk = { | |||
| 1688 | "blsp2_qup4_spi_apps_clk_src", | 1712 | "blsp2_qup4_spi_apps_clk_src", |
| 1689 | }, | 1713 | }, |
| 1690 | .num_parents = 1, | 1714 | .num_parents = 1, |
| 1715 | .flags = CLK_SET_RATE_PARENT, | ||
| 1691 | .ops = &clk_branch2_ops, | 1716 | .ops = &clk_branch2_ops, |
| 1692 | }, | 1717 | }, |
| 1693 | }, | 1718 | }, |
| @@ -1705,6 +1730,7 @@ static struct clk_branch gcc_blsp2_qup5_i2c_apps_clk = { | |||
| 1705 | "blsp2_qup5_i2c_apps_clk_src", | 1730 | "blsp2_qup5_i2c_apps_clk_src", |
| 1706 | }, | 1731 | }, |
| 1707 | .num_parents = 1, | 1732 | .num_parents = 1, |
| 1733 | .flags = CLK_SET_RATE_PARENT, | ||
| 1708 | .ops = &clk_branch2_ops, | 1734 | .ops = &clk_branch2_ops, |
| 1709 | }, | 1735 | }, |
| 1710 | }, | 1736 | }, |
| @@ -1722,6 +1748,7 @@ static struct clk_branch gcc_blsp2_qup5_spi_apps_clk = { | |||
| 1722 | "blsp2_qup5_spi_apps_clk_src", | 1748 | "blsp2_qup5_spi_apps_clk_src", |
| 1723 | }, | 1749 | }, |
| 1724 | .num_parents = 1, | 1750 | .num_parents = 1, |
| 1751 | .flags = CLK_SET_RATE_PARENT, | ||
| 1725 | .ops = &clk_branch2_ops, | 1752 | .ops = &clk_branch2_ops, |
| 1726 | }, | 1753 | }, |
| 1727 | }, | 1754 | }, |
| @@ -1739,6 +1766,7 @@ static struct clk_branch gcc_blsp2_qup6_i2c_apps_clk = { | |||
| 1739 | "blsp2_qup6_i2c_apps_clk_src", | 1766 | "blsp2_qup6_i2c_apps_clk_src", |
| 1740 | }, | 1767 | }, |
| 1741 | .num_parents = 1, | 1768 | .num_parents = 1, |
| 1769 | .flags = CLK_SET_RATE_PARENT, | ||
| 1742 | .ops = &clk_branch2_ops, | 1770 | .ops = &clk_branch2_ops, |
| 1743 | }, | 1771 | }, |
| 1744 | }, | 1772 | }, |
| @@ -1756,6 +1784,7 @@ static struct clk_branch gcc_blsp2_qup6_spi_apps_clk = { | |||
| 1756 | "blsp2_qup6_spi_apps_clk_src", | 1784 | "blsp2_qup6_spi_apps_clk_src", |
| 1757 | }, | 1785 | }, |
| 1758 | .num_parents = 1, | 1786 | .num_parents = 1, |
| 1787 | .flags = CLK_SET_RATE_PARENT, | ||
| 1759 | .ops = &clk_branch2_ops, | 1788 | .ops = &clk_branch2_ops, |
| 1760 | }, | 1789 | }, |
| 1761 | }, | 1790 | }, |
| @@ -1786,6 +1815,7 @@ static struct clk_branch gcc_blsp2_uart1_apps_clk = { | |||
| 1786 | "blsp2_uart1_apps_clk_src", | 1815 | "blsp2_uart1_apps_clk_src", |
| 1787 | }, | 1816 | }, |
| 1788 | .num_parents = 1, | 1817 | .num_parents = 1, |
| 1818 | .flags = CLK_SET_RATE_PARENT, | ||
| 1789 | .ops = &clk_branch2_ops, | 1819 | .ops = &clk_branch2_ops, |
| 1790 | }, | 1820 | }, |
| 1791 | }, | 1821 | }, |
| @@ -1803,6 +1833,7 @@ static struct clk_branch gcc_blsp2_uart2_apps_clk = { | |||
| 1803 | "blsp2_uart2_apps_clk_src", | 1833 | "blsp2_uart2_apps_clk_src", |
| 1804 | }, | 1834 | }, |
| 1805 | .num_parents = 1, | 1835 | .num_parents = 1, |
| 1836 | .flags = CLK_SET_RATE_PARENT, | ||
| 1806 | .ops = &clk_branch2_ops, | 1837 | .ops = &clk_branch2_ops, |
| 1807 | }, | 1838 | }, |
| 1808 | }, | 1839 | }, |
| @@ -1820,6 +1851,7 @@ static struct clk_branch gcc_blsp2_uart3_apps_clk = { | |||
| 1820 | "blsp2_uart3_apps_clk_src", | 1851 | "blsp2_uart3_apps_clk_src", |
| 1821 | }, | 1852 | }, |
| 1822 | .num_parents = 1, | 1853 | .num_parents = 1, |
| 1854 | .flags = CLK_SET_RATE_PARENT, | ||
| 1823 | .ops = &clk_branch2_ops, | 1855 | .ops = &clk_branch2_ops, |
| 1824 | }, | 1856 | }, |
| 1825 | }, | 1857 | }, |
| @@ -1837,6 +1869,7 @@ static struct clk_branch gcc_cfg_noc_usb3_axi_clk = { | |||
| 1837 | "usb30_master_clk_src", | 1869 | "usb30_master_clk_src", |
| 1838 | }, | 1870 | }, |
| 1839 | .num_parents = 1, | 1871 | .num_parents = 1, |
| 1872 | .flags = CLK_SET_RATE_PARENT, | ||
| 1840 | .ops = &clk_branch2_ops, | 1873 | .ops = &clk_branch2_ops, |
| 1841 | }, | 1874 | }, |
| 1842 | }, | 1875 | }, |
| @@ -1854,6 +1887,7 @@ static struct clk_branch gcc_gp1_clk = { | |||
| 1854 | "gp1_clk_src", | 1887 | "gp1_clk_src", |
| 1855 | }, | 1888 | }, |
| 1856 | .num_parents = 1, | 1889 | .num_parents = 1, |
| 1890 | .flags = CLK_SET_RATE_PARENT, | ||
| 1857 | .ops = &clk_branch2_ops, | 1891 | .ops = &clk_branch2_ops, |
| 1858 | }, | 1892 | }, |
| 1859 | }, | 1893 | }, |
| @@ -1871,6 +1905,7 @@ static struct clk_branch gcc_gp2_clk = { | |||
| 1871 | "gp2_clk_src", | 1905 | "gp2_clk_src", |
| 1872 | }, | 1906 | }, |
| 1873 | .num_parents = 1, | 1907 | .num_parents = 1, |
| 1908 | .flags = CLK_SET_RATE_PARENT, | ||
| 1874 | .ops = &clk_branch2_ops, | 1909 | .ops = &clk_branch2_ops, |
| 1875 | }, | 1910 | }, |
| 1876 | }, | 1911 | }, |
| @@ -1888,6 +1923,7 @@ static struct clk_branch gcc_gp3_clk = { | |||
| 1888 | "gp3_clk_src", | 1923 | "gp3_clk_src", |
| 1889 | }, | 1924 | }, |
| 1890 | .num_parents = 1, | 1925 | .num_parents = 1, |
| 1926 | .flags = CLK_SET_RATE_PARENT, | ||
| 1891 | .ops = &clk_branch2_ops, | 1927 | .ops = &clk_branch2_ops, |
| 1892 | }, | 1928 | }, |
| 1893 | }, | 1929 | }, |
| @@ -1957,6 +1993,7 @@ static struct clk_branch gcc_hmss_ahb_clk = { | |||
| 1957 | "hmss_ahb_clk_src", | 1993 | "hmss_ahb_clk_src", |
| 1958 | }, | 1994 | }, |
| 1959 | .num_parents = 1, | 1995 | .num_parents = 1, |
| 1996 | .flags = CLK_SET_RATE_PARENT, | ||
| 1960 | .ops = &clk_branch2_ops, | 1997 | .ops = &clk_branch2_ops, |
| 1961 | }, | 1998 | }, |
| 1962 | }, | 1999 | }, |
| @@ -1987,6 +2024,7 @@ static struct clk_branch gcc_hmss_rbcpr_clk = { | |||
| 1987 | "hmss_rbcpr_clk_src", | 2024 | "hmss_rbcpr_clk_src", |
| 1988 | }, | 2025 | }, |
| 1989 | .num_parents = 1, | 2026 | .num_parents = 1, |
| 2027 | .flags = CLK_SET_RATE_PARENT, | ||
| 1990 | .ops = &clk_branch2_ops, | 2028 | .ops = &clk_branch2_ops, |
| 1991 | }, | 2029 | }, |
| 1992 | }, | 2030 | }, |
| @@ -2088,6 +2126,7 @@ static struct clk_branch gcc_pcie_0_aux_clk = { | |||
| 2088 | "pcie_aux_clk_src", | 2126 | "pcie_aux_clk_src", |
| 2089 | }, | 2127 | }, |
| 2090 | .num_parents = 1, | 2128 | .num_parents = 1, |
| 2129 | .flags = CLK_SET_RATE_PARENT, | ||
| 2091 | .ops = &clk_branch2_ops, | 2130 | .ops = &clk_branch2_ops, |
| 2092 | }, | 2131 | }, |
| 2093 | }, | 2132 | }, |
| @@ -2157,6 +2196,7 @@ static struct clk_branch gcc_pcie_phy_aux_clk = { | |||
| 2157 | "pcie_aux_clk_src", | 2196 | "pcie_aux_clk_src", |
| 2158 | }, | 2197 | }, |
| 2159 | .num_parents = 1, | 2198 | .num_parents = 1, |
| 2199 | .flags = CLK_SET_RATE_PARENT, | ||
| 2160 | .ops = &clk_branch2_ops, | 2200 | .ops = &clk_branch2_ops, |
| 2161 | }, | 2201 | }, |
| 2162 | }, | 2202 | }, |
| @@ -2174,6 +2214,7 @@ static struct clk_branch gcc_pdm2_clk = { | |||
| 2174 | "pdm2_clk_src", | 2214 | "pdm2_clk_src", |
| 2175 | }, | 2215 | }, |
| 2176 | .num_parents = 1, | 2216 | .num_parents = 1, |
| 2217 | .flags = CLK_SET_RATE_PARENT, | ||
| 2177 | .ops = &clk_branch2_ops, | 2218 | .ops = &clk_branch2_ops, |
| 2178 | }, | 2219 | }, |
| 2179 | }, | 2220 | }, |
| @@ -2243,6 +2284,7 @@ static struct clk_branch gcc_sdcc2_apps_clk = { | |||
| 2243 | "sdcc2_apps_clk_src", | 2284 | "sdcc2_apps_clk_src", |
| 2244 | }, | 2285 | }, |
| 2245 | .num_parents = 1, | 2286 | .num_parents = 1, |
| 2287 | .flags = CLK_SET_RATE_PARENT, | ||
| 2246 | .ops = &clk_branch2_ops, | 2288 | .ops = &clk_branch2_ops, |
| 2247 | }, | 2289 | }, |
| 2248 | }, | 2290 | }, |
| @@ -2273,6 +2315,7 @@ static struct clk_branch gcc_sdcc4_apps_clk = { | |||
| 2273 | "sdcc4_apps_clk_src", | 2315 | "sdcc4_apps_clk_src", |
| 2274 | }, | 2316 | }, |
| 2275 | .num_parents = 1, | 2317 | .num_parents = 1, |
| 2318 | .flags = CLK_SET_RATE_PARENT, | ||
| 2276 | .ops = &clk_branch2_ops, | 2319 | .ops = &clk_branch2_ops, |
| 2277 | }, | 2320 | }, |
| 2278 | }, | 2321 | }, |
| @@ -2316,6 +2359,7 @@ static struct clk_branch gcc_tsif_ref_clk = { | |||
| 2316 | "tsif_ref_clk_src", | 2359 | "tsif_ref_clk_src", |
| 2317 | }, | 2360 | }, |
| 2318 | .num_parents = 1, | 2361 | .num_parents = 1, |
| 2362 | .flags = CLK_SET_RATE_PARENT, | ||
| 2319 | .ops = &clk_branch2_ops, | 2363 | .ops = &clk_branch2_ops, |
| 2320 | }, | 2364 | }, |
| 2321 | }, | 2365 | }, |
| @@ -2346,6 +2390,7 @@ static struct clk_branch gcc_ufs_axi_clk = { | |||
| 2346 | "ufs_axi_clk_src", | 2390 | "ufs_axi_clk_src", |
| 2347 | }, | 2391 | }, |
| 2348 | .num_parents = 1, | 2392 | .num_parents = 1, |
| 2393 | .flags = CLK_SET_RATE_PARENT, | ||
| 2349 | .ops = &clk_branch2_ops, | 2394 | .ops = &clk_branch2_ops, |
| 2350 | }, | 2395 | }, |
| 2351 | }, | 2396 | }, |
| @@ -2441,6 +2486,7 @@ static struct clk_branch gcc_usb30_master_clk = { | |||
| 2441 | "usb30_master_clk_src", | 2486 | "usb30_master_clk_src", |
| 2442 | }, | 2487 | }, |
| 2443 | .num_parents = 1, | 2488 | .num_parents = 1, |
| 2489 | .flags = CLK_SET_RATE_PARENT, | ||
| 2444 | .ops = &clk_branch2_ops, | 2490 | .ops = &clk_branch2_ops, |
| 2445 | }, | 2491 | }, |
| 2446 | }, | 2492 | }, |
| @@ -2458,6 +2504,7 @@ static struct clk_branch gcc_usb30_mock_utmi_clk = { | |||
| 2458 | "usb30_mock_utmi_clk_src", | 2504 | "usb30_mock_utmi_clk_src", |
| 2459 | }, | 2505 | }, |
| 2460 | .num_parents = 1, | 2506 | .num_parents = 1, |
| 2507 | .flags = CLK_SET_RATE_PARENT, | ||
| 2461 | .ops = &clk_branch2_ops, | 2508 | .ops = &clk_branch2_ops, |
| 2462 | }, | 2509 | }, |
| 2463 | }, | 2510 | }, |
| @@ -2488,6 +2535,7 @@ static struct clk_branch gcc_usb3_phy_aux_clk = { | |||
| 2488 | "usb3_phy_aux_clk_src", | 2535 | "usb3_phy_aux_clk_src", |
| 2489 | }, | 2536 | }, |
| 2490 | .num_parents = 1, | 2537 | .num_parents = 1, |
| 2538 | .flags = CLK_SET_RATE_PARENT, | ||
| 2491 | .ops = &clk_branch2_ops, | 2539 | .ops = &clk_branch2_ops, |
| 2492 | }, | 2540 | }, |
| 2493 | }, | 2541 | }, |