diff options
-rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index 7d5fb9d3fa64..dd38b6835528 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c | |||
@@ -725,6 +725,17 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder, | |||
725 | struct intel_crtc_state *pipe_config); | 725 | struct intel_crtc_state *pipe_config); |
726 | static void intel_dsi_unprepare(struct intel_encoder *encoder); | 726 | static void intel_dsi_unprepare(struct intel_encoder *encoder); |
727 | 727 | ||
728 | static void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec) | ||
729 | { | ||
730 | struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); | ||
731 | |||
732 | /* For v3 VBTs in vid-mode the delays are part of the VBT sequences */ | ||
733 | if (is_vid_mode(intel_dsi) && dev_priv->vbt.dsi.seq_version >= 3) | ||
734 | return; | ||
735 | |||
736 | msleep(msec); | ||
737 | } | ||
738 | |||
728 | /* | 739 | /* |
729 | * Panel enable/disable sequences from the VBT spec. | 740 | * Panel enable/disable sequences from the VBT spec. |
730 | * | 741 | * |
@@ -806,7 +817,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, | |||
806 | if (intel_dsi->gpio_panel) | 817 | if (intel_dsi->gpio_panel) |
807 | gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1); | 818 | gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1); |
808 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON); | 819 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON); |
809 | msleep(intel_dsi->panel_on_delay); | 820 | intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay); |
810 | 821 | ||
811 | /* Deassert reset */ | 822 | /* Deassert reset */ |
812 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); | 823 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET); |
@@ -828,7 +839,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder, | |||
828 | msleep(20); /* XXX */ | 839 | msleep(20); /* XXX */ |
829 | for_each_dsi_port(port, intel_dsi->ports) | 840 | for_each_dsi_port(port, intel_dsi->ports) |
830 | dpi_send_cmd(intel_dsi, TURN_ON, false, port); | 841 | dpi_send_cmd(intel_dsi, TURN_ON, false, port); |
831 | msleep(100); | 842 | intel_dsi_msleep(intel_dsi, 100); |
832 | 843 | ||
833 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON); | 844 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON); |
834 | 845 | ||
@@ -955,7 +966,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder, | |||
955 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET); | 966 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET); |
956 | 967 | ||
957 | /* Power off, try both CRC pmic gpio and VBT */ | 968 | /* Power off, try both CRC pmic gpio and VBT */ |
958 | msleep(intel_dsi->panel_off_delay); | 969 | intel_dsi_msleep(intel_dsi, intel_dsi->panel_off_delay); |
959 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_OFF); | 970 | intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_OFF); |
960 | if (intel_dsi->gpio_panel) | 971 | if (intel_dsi->gpio_panel) |
961 | gpiod_set_value_cansleep(intel_dsi->gpio_panel, 0); | 972 | gpiod_set_value_cansleep(intel_dsi->gpio_panel, 0); |
@@ -964,7 +975,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder, | |||
964 | * FIXME As we do with eDP, just make a note of the time here | 975 | * FIXME As we do with eDP, just make a note of the time here |
965 | * and perform the wait before the next panel power on. | 976 | * and perform the wait before the next panel power on. |
966 | */ | 977 | */ |
967 | msleep(intel_dsi->panel_pwr_cycle_delay); | 978 | intel_dsi_msleep(intel_dsi, intel_dsi->panel_pwr_cycle_delay); |
968 | } | 979 | } |
969 | 980 | ||
970 | static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, | 981 | static bool intel_dsi_get_hw_state(struct intel_encoder *encoder, |