diff options
| -rw-r--r-- | Documentation/devicetree/bindings/reset/uniphier-reset.txt | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/Documentation/devicetree/bindings/reset/uniphier-reset.txt b/Documentation/devicetree/bindings/reset/uniphier-reset.txt index 101743dda223..f63c511a9de8 100644 --- a/Documentation/devicetree/bindings/reset/uniphier-reset.txt +++ b/Documentation/devicetree/bindings/reset/uniphier-reset.txt | |||
| @@ -120,27 +120,27 @@ Example: | |||
| 120 | }; | 120 | }; |
| 121 | 121 | ||
| 122 | 122 | ||
| 123 | USB3 core reset | 123 | Peripheral core reset in glue layer |
| 124 | --------------- | 124 | ----------------------------------- |
| 125 | 125 | ||
| 126 | USB3 core reset belongs to USB3 glue layer. Before using the core reset, | 126 | Some peripheral core reset belongs to its own glue layer. Before using |
| 127 | it is necessary to control the clocks and resets to enable this layer. | 127 | this core reset, it is necessary to control the clocks and resets to enable |
| 128 | These clocks and resets should be described in each property. | 128 | this layer. These clocks and resets should be described in each property. |
| 129 | 129 | ||
| 130 | Required properties: | 130 | Required properties: |
| 131 | - compatible: Should be | 131 | - compatible: Should be |
| 132 | "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC | 132 | "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC USB3 |
| 133 | "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC | 133 | "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC USB3 |
| 134 | "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC | 134 | "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC USB3 |
| 135 | "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC | 135 | "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC USB3 |
| 136 | - #reset-cells: Should be 1. | 136 | - #reset-cells: Should be 1. |
| 137 | - reg: Specifies offset and length of the register set for the device. | 137 | - reg: Specifies offset and length of the register set for the device. |
| 138 | - clocks: A list of phandles to the clock gate for USB3 glue layer. | 138 | - clocks: A list of phandles to the clock gate for the glue layer. |
| 139 | According to the clock-names, appropriate clocks are required. | 139 | According to the clock-names, appropriate clocks are required. |
| 140 | - clock-names: Should contain | 140 | - clock-names: Should contain |
| 141 | "gio", "link" - for Pro4 SoC | 141 | "gio", "link" - for Pro4 SoC |
| 142 | "link" - for others | 142 | "link" - for others |
| 143 | - resets: A list of phandles to the reset control for USB3 glue layer. | 143 | - resets: A list of phandles to the reset control for the glue layer. |
| 144 | According to the reset-names, appropriate resets are required. | 144 | According to the reset-names, appropriate resets are required. |
| 145 | - reset-names: Should contain | 145 | - reset-names: Should contain |
| 146 | "gio", "link" - for Pro4 SoC | 146 | "gio", "link" - for Pro4 SoC |
