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-rw-r--r--arch/arm/boot/dts/alpine.dtsi20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi
index d0eefc3b886c..731df7a8c4e6 100644
--- a/arch/arm/boot/dts/alpine.dtsi
+++ b/arch/arm/boot/dts/alpine.dtsi
@@ -41,28 +41,28 @@
41 compatible = "arm,cortex-a15"; 41 compatible = "arm,cortex-a15";
42 device_type = "cpu"; 42 device_type = "cpu";
43 reg = <0>; 43 reg = <0>;
44 clock-frequency = <0>; /* Filled by loader */ 44 clock-frequency = <1700000000>;
45 }; 45 };
46 46
47 cpu@1 { 47 cpu@1 {
48 compatible = "arm,cortex-a15"; 48 compatible = "arm,cortex-a15";
49 device_type = "cpu"; 49 device_type = "cpu";
50 reg = <1>; 50 reg = <1>;
51 clock-frequency = <0>; /* Filled by loader */ 51 clock-frequency = <1700000000>;
52 }; 52 };
53 53
54 cpu@2 { 54 cpu@2 {
55 compatible = "arm,cortex-a15"; 55 compatible = "arm,cortex-a15";
56 device_type = "cpu"; 56 device_type = "cpu";
57 reg = <2>; 57 reg = <2>;
58 clock-frequency = <0>; /* Filled by loader */ 58 clock-frequency = <1700000000>;
59 }; 59 };
60 60
61 cpu@3 { 61 cpu@3 {
62 compatible = "arm,cortex-a15"; 62 compatible = "arm,cortex-a15";
63 device_type = "cpu"; 63 device_type = "cpu";
64 reg = <3>; 64 reg = <3>;
65 clock-frequency = <0>; /* Filled by loader */ 65 clock-frequency = <1700000000>;
66 }; 66 };
67 }; 67 };
68 68
@@ -81,7 +81,7 @@
81 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 81 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
82 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 82 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
83 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 83 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
84 clock-frequency = <0>; /* Filled by loader */ 84 clock-frequency = <50000000>;
85 }; 85 };
86 86
87 /* Interrupt Controller */ 87 /* Interrupt Controller */
@@ -120,26 +120,26 @@
120 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 120 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
121 }; 121 };
122 122
123 uart0:uart@fd883000 { 123 uart0: uart@fd883000 {
124 compatible = "ns16550a"; 124 compatible = "ns16550a";
125 reg = <0x0 0xfd883000 0x0 0x1000>; 125 reg = <0x0 0xfd883000 0x0 0x1000>;
126 clock-frequency = <0>; /* Filled by loader */ 126 clock-frequency = <375000000>;
127 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 127 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
128 reg-shift = <2>; 128 reg-shift = <2>;
129 reg-io-width = <4>; 129 reg-io-width = <4>;
130 }; 130 };
131 131
132 uart1:uart@0xfd884000 { 132 uart1: uart@fd884000 {
133 compatible = "ns16550a"; 133 compatible = "ns16550a";
134 reg = <0x0 0xfd884000 0x0 0x1000>; 134 reg = <0x0 0xfd884000 0x0 0x1000>;
135 clock-frequency = <0>; /* Filled by loader */ 135 clock-frequency = <375000000>;
136 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 136 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
137 reg-shift = <2>; 137 reg-shift = <2>;
138 reg-io-width = <4>; 138 reg-io-width = <4>;
139 }; 139 };
140 140
141 /* Internal PCIe Controller */ 141 /* Internal PCIe Controller */
142 pcie-internal@0xfbc00000 { 142 pcie@fbc00000 {
143 compatible = "pci-host-ecam-generic"; 143 compatible = "pci-host-ecam-generic";
144 device_type = "pci"; 144 device_type = "pci";
145 #size-cells = <2>; 145 #size-cells = <2>;