diff options
-rw-r--r-- | drivers/gpu/drm/i915/gvt/handlers.c | 21 |
1 files changed, 5 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 812f411d1c7d..c24341f174d3 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c | |||
@@ -1429,18 +1429,7 @@ static int skl_lcpll_write(struct intel_vgpu *vgpu, unsigned int offset, | |||
1429 | return 0; | 1429 | return 0; |
1430 | } | 1430 | } |
1431 | 1431 | ||
1432 | static int ring_timestamp_mmio_read(struct intel_vgpu *vgpu, | 1432 | static int mmio_read_from_hw(struct intel_vgpu *vgpu, |
1433 | unsigned int offset, void *p_data, unsigned int bytes) | ||
1434 | { | ||
1435 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; | ||
1436 | |||
1437 | mmio_hw_access_pre(dev_priv); | ||
1438 | vgpu_vreg(vgpu, offset) = I915_READ(_MMIO(offset)); | ||
1439 | mmio_hw_access_post(dev_priv); | ||
1440 | return intel_vgpu_default_mmio_read(vgpu, offset, p_data, bytes); | ||
1441 | } | ||
1442 | |||
1443 | static int instdone_mmio_read(struct intel_vgpu *vgpu, | ||
1444 | unsigned int offset, void *p_data, unsigned int bytes) | 1433 | unsigned int offset, void *p_data, unsigned int bytes) |
1445 | { | 1434 | { |
1446 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; | 1435 | struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv; |
@@ -1637,9 +1626,9 @@ static int init_generic_mmio_info(struct intel_gvt *gvt) | |||
1637 | #undef RING_REG | 1626 | #undef RING_REG |
1638 | 1627 | ||
1639 | #define RING_REG(base) (base + 0x6c) | 1628 | #define RING_REG(base) (base + 0x6c) |
1640 | MMIO_RING_DFH(RING_REG, D_ALL, 0, instdone_mmio_read, NULL); | 1629 | MMIO_RING_DFH(RING_REG, D_ALL, 0, mmio_read_from_hw, NULL); |
1641 | #undef RING_REG | 1630 | #undef RING_REG |
1642 | MMIO_DH(GEN7_SC_INSTDONE, D_BDW_PLUS, instdone_mmio_read, NULL); | 1631 | MMIO_DH(GEN7_SC_INSTDONE, D_BDW_PLUS, mmio_read_from_hw, NULL); |
1643 | 1632 | ||
1644 | MMIO_GM_RDR(0x2148, D_ALL, NULL, NULL); | 1633 | MMIO_GM_RDR(0x2148, D_ALL, NULL, NULL); |
1645 | MMIO_GM_RDR(CCID, D_ALL, NULL, NULL); | 1634 | MMIO_GM_RDR(CCID, D_ALL, NULL, NULL); |
@@ -1663,9 +1652,9 @@ static int init_generic_mmio_info(struct intel_gvt *gvt) | |||
1663 | MMIO_RING_DFH(RING_INSTPM, D_ALL, F_MODE_MASK | F_CMD_ACCESS, | 1652 | MMIO_RING_DFH(RING_INSTPM, D_ALL, F_MODE_MASK | F_CMD_ACCESS, |
1664 | NULL, NULL); | 1653 | NULL, NULL); |
1665 | MMIO_RING_DFH(RING_TIMESTAMP, D_ALL, F_CMD_ACCESS, | 1654 | MMIO_RING_DFH(RING_TIMESTAMP, D_ALL, F_CMD_ACCESS, |
1666 | ring_timestamp_mmio_read, NULL); | 1655 | mmio_read_from_hw, NULL); |
1667 | MMIO_RING_DFH(RING_TIMESTAMP_UDW, D_ALL, F_CMD_ACCESS, | 1656 | MMIO_RING_DFH(RING_TIMESTAMP_UDW, D_ALL, F_CMD_ACCESS, |
1668 | ring_timestamp_mmio_read, NULL); | 1657 | mmio_read_from_hw, NULL); |
1669 | 1658 | ||
1670 | MMIO_DFH(GEN7_GT_MODE, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); | 1659 | MMIO_DFH(GEN7_GT_MODE, D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); |
1671 | MMIO_DFH(CACHE_MODE_0_GEN7, D_ALL, F_MODE_MASK | F_CMD_ACCESS, | 1660 | MMIO_DFH(CACHE_MODE_0_GEN7, D_ALL, F_MODE_MASK | F_CMD_ACCESS, |