3 files changed, 127 insertions, 6 deletions

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
index 2459d133f1be..f50b19447de6 100644
--- a/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
+++ b/arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts
@@ -161,7 +161,7 @@
         };
 
         at24@50 {
-                compatible = "at24,24c01";
+                compatible = "atmel,24c01";
                 pagesize = <8>;
                 reg = <0x50>;
         };
@@ -213,7 +213,7 @@
                         #size-cells = <0>;
                         reg = <6>;
                         eeprom@51 {
-                                compatible = "at,24c01";
+                                compatible = "atmel,24c01";
                                 pagesize = <8>;
                                 reg = <0x51>;
                         };
@@ -224,7 +224,7 @@
                         #size-cells = <0>;
                         reg = <7>;
                         eeprom@51 {
-                                compatible = "at,24c01";
+                                compatible = "atmel,24c01";
                                 pagesize = <8>;
                                 reg = <0x51>;
                         };
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
index c89d0c307f8d..e6b059378dc0 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
@@ -17,6 +17,7 @@
 /dts-v1/;
 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/stratix10-clock.h>
 
 / {
         compatible = "altr,socfpga-stratix10";
@@ -92,9 +93,32 @@
                 interrupt-parent = <&intc>;
                 ranges = <0 0 0 0xffffffff>;
 
-                clkmgr@ffd1000 {
-                        compatible = "altr,clk-mgr";
+                clkmgr: clock-controller@ffd10000 {
+                        compatible = "intel,stratix10-clkmgr";
                         reg = <0xffd10000 0x1000>;
+                        #clock-cells = <1>;
+                };
+
+                clocks {
+                        cb_intosc_hs_div2_clk: cb-intosc-hs-div2-clk {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                        };
+
+                        cb_intosc_ls_clk: cb-intosc-ls-clk {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                        };
+
+                        f2s_free_clk: f2s-free-clk {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                        };
+
+                        osc1: osc1 {
+                                #clock-cells = <0>;
+                                compatible = "fixed-clock";
+                        };
                 };
 
                 gmac0: ethernet@ff800000 {
@@ -105,6 +129,8 @@
                         mac-address = [00 00 00 00 00 00];
                         resets = <&rst EMAC0_RESET>;
                         reset-names = "stmmaceth";
+                        clocks = <&clkmgr STRATIX10_EMAC0_CLK>;
+                        clock-names = "stmmaceth";
                         status = "disabled";
                 };
 
@@ -116,6 +142,8 @@
                         mac-address = [00 00 00 00 00 00];
                         resets = <&rst EMAC1_RESET>;
                         reset-names = "stmmaceth";
+                        clocks = <&clkmgr STRATIX10_EMAC1_CLK>;
+                        clock-names = "stmmaceth";
                         status = "disabled";
                 };
 
@@ -127,6 +155,8 @@
                         mac-address = [00 00 00 00 00 00];
                         resets = <&rst EMAC2_RESET>;
                         reset-names = "stmmaceth";
+                        clocks = <&clkmgr STRATIX10_EMAC2_CLK>;
+                        clock-names = "stmmaceth";
                         status = "disabled";
                 };
 
@@ -177,6 +207,7 @@
                         reg = <0xffc02800 0x100>;
                         interrupts = <0 103 4>;
                         resets = <&rst I2C0_RESET>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                         status = "disabled";
                 };
 
@@ -187,6 +218,7 @@
                         reg = <0xffc02900 0x100>;
                         interrupts = <0 104 4>;
                         resets = <&rst I2C1_RESET>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                         status = "disabled";
                 };
 
@@ -197,6 +229,7 @@
                         reg = <0xffc02a00 0x100>;
                         interrupts = <0 105 4>;
                         resets = <&rst I2C2_RESET>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                         status = "disabled";
                 };
 
@@ -207,6 +240,7 @@
                         reg = <0xffc02b00 0x100>;
                         interrupts = <0 106 4>;
                         resets = <&rst I2C3_RESET>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                         status = "disabled";
                 };
 
@@ -217,6 +251,7 @@
                         reg = <0xffc02c00 0x100>;
                         interrupts = <0 107 4>;
                         resets = <&rst I2C4_RESET>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                         status = "disabled";
                 };
 
@@ -229,6 +264,9 @@
                         fifo-depth = <0x400>;
                         resets = <&rst SDMMC_RESET>;
                         reset-names = "reset";
+                        clocks = <&clkmgr STRATIX10_L4_MP_CLK>,
+                                 <&clkmgr STRATIX10_SDMMC_CLK>;
+                        clock-names = "biu", "ciu";
                         status = "disabled";
                 };
 
@@ -237,6 +275,25 @@
                         reg = <0xffe00000 0x100000>;
                 };
 
+                pdma: pdma@ffda0000 {
+                        compatible = "arm,pl330", "arm,primecell";
+                        reg = <0xffda0000 0x1000>;
+                        interrupts = <0 81 4>,
+                                     <0 82 4>,
+                                     <0 83 4>,
+                                     <0 84 4>,
+                                     <0 85 4>,
+                                     <0 86 4>,
+                                     <0 87 4>,
+                                     <0 88 4>,
+                                     <0 89 4>;
+                        #dma-cells = <1>;
+                        #dma-channels = <8>;
+                        #dma-requests = <32>;
+                        clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>;
+                        clock-names = "apb_pclk";
+                };
+
                 rst: rstmgr@ffd11000 {
                         #reset-cells = <1>;
                         compatible = "altr,rst-mgr";
@@ -288,24 +345,32 @@
                         compatible = "snps,dw-apb-timer";
                         interrupts = <0 113 4>;
                         reg = <0xffc03000 0x100>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
+                        clock-names = "timer";
                 };
 
                 timer1: timer1@ffc03100 {
                         compatible = "snps,dw-apb-timer";
                         interrupts = <0 114 4>;
                         reg = <0xffc03100 0x100>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
+                        clock-names = "timer";
                 };
 
                 timer2: timer2@ffd00000 {
                         compatible = "snps,dw-apb-timer";
                         interrupts = <0 115 4>;
                         reg = <0xffd00000 0x100>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
+                        clock-names = "timer";
                 };
 
                 timer3: timer3@ffd00100 {
                         compatible = "snps,dw-apb-timer";
                         interrupts = <0 116 4>;
                         reg = <0xffd00100 0x100>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
+                        clock-names = "timer";
                 };
 
                 uart0: serial0@ffc02000 {
@@ -315,6 +380,7 @@
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         resets = <&rst UART0_RESET>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                         status = "disabled";
                 };
 
@@ -325,6 +391,7 @@
                         reg-shift = <2>;
                         reg-io-width = <4>;
                         resets = <&rst UART1_RESET>;
+                        clocks = <&clkmgr STRATIX10_L4_SP_CLK>;
                         status = "disabled";
                 };
 
@@ -387,5 +454,17 @@
                         resets = <&rst WATCHDOG3_RESET>;
                         status = "disabled";
                 };
+
+                eccmgr {
+                        compatible = "altr,socfpga-s10-ecc-manager";
+                        interrupts = <0 15 4>, <0 95 4>;
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+
+                        sdramedac {
+                                compatible = "altr,sdram-edac-s10";
+                                interrupts = <16 4>, <48 4>;
+                        };
+                };
         };
 };
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
index eaf13fe29287..f9b1ef12db48 100644
--- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
+++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
@@ -50,6 +50,21 @@
                 /* We expect the bootloader to fill in the reg */
                 reg = <0 0 0 0>;
         };
+
+        ref_033v: 033-v-ref {
+                compatible = "regulator-fixed";
+                regulator-name = "0.33V";
+                regulator-min-microvolt = <330000>;
+                regulator-max-microvolt = <330000>;
+        };
+
+        soc {
+                clocks {
+                        osc1 {
+                                clock-frequency = <25000000>;
+                        };
+                };
+        };
 };
 
 &gpio1 {
@@ -79,7 +94,7 @@
                         rxd2-skew-ps = <420>; /* 0ps */
                         rxd3-skew-ps = <420>; /* 0ps */
                         txen-skew-ps = <0>; /* -420ps */
-                        txc-skew-ps = <1860>; /* 960ps */
+                        txc-skew-ps = <900>; /* 0ps */
                         rxdv-skew-ps = <420>; /* 0ps */
                         rxc-skew-ps = <1680>; /* 780ps */
                 };
@@ -105,3 +120,30 @@
 &watchdog0 {
         status = "okay";
 };
+
+&i2c1 {
+        status = "okay";
+        clock-frequency = <100000>;
+
+        adc@14 {
+                compatible = "lltc,ltc2497";
+                reg = <0x14>;
+                vref-supply = <&ref_033v>;
+        };
+
+        temp@4c {
+                compatible = "maxim,max1619";
+                reg = <0x4c>;
+        };
+
+        eeprom@51 {
+                compatible = "atmel,24c32";
+                reg = <0x51>;
+                pagesize = <32>;
+        };
+
+        rtc@68 {
+                compatible = "dallas,ds1339";
+                reg = <0x68>;
+        };
+};