8 files changed, 322 insertions, 86 deletions

diff --git a/Documentation/devicetree/bindings/watchdog/marvel.txt b/Documentation/devicetree/bindings/watchdog/marvel.txt
index 5dc8d30061ce..de11eb4c121f 100644
--- a/Documentation/devicetree/bindings/watchdog/marvel.txt
+++ b/Documentation/devicetree/bindings/watchdog/marvel.txt
@@ -3,17 +3,24 @@
 Required Properties:
 
 - Compatibility : "marvell,orion-wdt"
-- reg           : Address of the timer registers
+                  "marvell,armada-370-wdt"
+                  "marvell,armada-xp-wdt"
+
+- reg           : Should contain two entries: first one with the
+                  timer control address, second one with the
+                  rstout enable address.
 
 Optional properties:
 
+- interrupts    : Contains the IRQ for watchdog expiration
 - timeout-sec   : Contains the watchdog timeout in seconds
 
 Example:
 
         wdt@20300 {
                 compatible = "marvell,orion-wdt";
-                reg = <0x20300 0x28>;
+                reg = <0x20300 0x28>, <0x20108 0x4>;
+                interrupts = <3>;
                 timeout-sec = <10>;
                 status = "okay";
         };
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 5362df3df89f..f4a5b34489b7 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -21,6 +21,7 @@
 #define  CPU_CTRL_PCIE1_LINK    0x00000008
 
 #define RSTOUTn_MASK            (BRIDGE_VIRT_BASE + 0x0108)
+#define RSTOUTn_MASK_PHYS       (BRIDGE_PHYS_BASE + 0x0108)
 #define  SOFT_RESET_OUT_EN      0x00000004
 
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 8b9d1c9ff199..60f64218d6a6 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -21,6 +21,7 @@
 #define CPU_RESET               0x00000002
 
 #define RSTOUTn_MASK            (BRIDGE_VIRT_BASE + 0x0108)
+#define RSTOUTn_MASK_PHYS       (BRIDGE_PHYS_BASE + 0x0108)
 #define SOFT_RESET_OUT_EN       0x00000004
 
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index 5f03484584d4..e20d6da234a6 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -15,6 +15,7 @@
 #define L2_WRITETHROUGH         0x00020000
 
 #define RSTOUTn_MASK            (BRIDGE_VIRT_BASE + 0x0108)
+#define RSTOUTn_MASK_PHYS       (BRIDGE_PHYS_BASE + 0x0108)
 #define SOFT_RESET_OUT_EN       0x00000004
 
 #define SYSTEM_SOFT_RESET       (BRIDGE_VIRT_BASE + 0x010c)
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index f727d03f1688..5766e3fbff69 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -18,6 +18,7 @@
 #define CPU_CTRL                (ORION5X_BRIDGE_VIRT_BASE + 0x104)
 
 #define RSTOUTn_MASK            (ORION5X_BRIDGE_VIRT_BASE + 0x108)
+#define RSTOUTn_MASK_PHYS       (ORION5X_BRIDGE_PHYS_BASE + 0x108)
 
 #define CPU_SOFT_RESET          (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
 
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 830ff07f3385..3ec6e8e8d368 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -595,14 +595,16 @@ void __init orion_spi_1_init(unsigned long mapbase)
 /*****************************************************************************
  * Watchdog
  ****************************************************************************/
-static struct resource orion_wdt_resource =
-                DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
+static struct resource orion_wdt_resource[] = {
+                DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04),
+                DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04),
+};
 
 static struct platform_device orion_wdt_device = {
         .name           = "orion_wdt",
         .id             = -1,
-        .num_resources  = 1,
-        .resource       = &orion_wdt_resource,
+        .num_resources  = ARRAY_SIZE(orion_wdt_resource),
+        .resource       = orion_wdt_resource,
 };
 
 void __init orion_wdt_init(void)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 79d25894343a..f1ff408c4b17 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -292,7 +292,7 @@ config DAVINCI_WATCHDOG
 
 config ORION_WATCHDOG
         tristate "Orion watchdog"
-        depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_DOVE
+        depends on ARCH_ORION5X || ARCH_KIRKWOOD || ARCH_DOVE || ARCH_MVEBU
         select WATCHDOG_CORE
         help
           Say Y here if to include support for the watchdog timer
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index f7722a424676..15321aa0bb94 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -19,101 +19,204 @@
 #include <linux/platform_device.h>
 #include <linux/watchdog.h>
 #include <linux/init.h>
+#include <linux/interrupt.h>
 #include <linux/io.h>
-#include <linux/spinlock.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/of.h>
-#include <mach/bridge-regs.h>
+#include <linux/of_device.h>
+
+/* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
+#define ORION_RSTOUT_MASK_OFFSET        0x20108
+
+/* Internal registers can be configured at any 1 MiB aligned address */
+#define INTERNAL_REGS_MASK              ~(SZ_1M - 1)
 
 /*
  * Watchdog timer block registers.
  */
 #define TIMER_CTRL              0x0000
-#define WDT_EN                  0x0010
-#define WDT_VAL                 0x0024
+#define TIMER_A370_STATUS       0x04
 
 #define WDT_MAX_CYCLE_COUNT     0xffffffff
-#define WDT_IN_USE              0
-#define WDT_OK_TO_CLOSE         1
 
-#define WDT_RESET_OUT_EN        BIT(1)
-#define WDT_INT_REQ             BIT(3)
+#define WDT_A370_RATIO_MASK(v)  ((v) << 16)
+#define WDT_A370_RATIO_SHIFT    5
+#define WDT_A370_RATIO          (1 << WDT_A370_RATIO_SHIFT)
+
+#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
+#define WDT_A370_EXPIRED        BIT(31)
 
 static bool nowayout = WATCHDOG_NOWAYOUT;
 static int heartbeat = -1;              /* module parameter (seconds) */
-static unsigned int wdt_max_duration;   /* (seconds) */
-static struct clk *clk;
-static unsigned int wdt_tclk;
-static void __iomem *wdt_reg;
-static DEFINE_SPINLOCK(wdt_lock);
 
-static int orion_wdt_ping(struct watchdog_device *wdt_dev)
+struct orion_watchdog;
+
+struct orion_watchdog_data {
+        int wdt_counter_offset;
+        int wdt_enable_bit;
+        int rstout_enable_bit;
+        int (*clock_init)(struct platform_device *,
+                          struct orion_watchdog *);
+        int (*start)(struct watchdog_device *);
+};
+
+struct orion_watchdog {
+        struct watchdog_device wdt;
+        void __iomem *reg;
+        void __iomem *rstout;
+        unsigned long clk_rate;
+        struct clk *clk;
+        const struct orion_watchdog_data *data;
+};
+
+static int orion_wdt_clock_init(struct platform_device *pdev,
+                                struct orion_watchdog *dev)
 {
-        spin_lock(&wdt_lock);
+        int ret;
 
-        /* Reload watchdog duration */
-        writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL);
+        dev->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(dev->clk))
+                return PTR_ERR(dev->clk);
+        ret = clk_prepare_enable(dev->clk);
+        if (ret) {
+                clk_put(dev->clk);
+                return ret;
+        }
 
-        spin_unlock(&wdt_lock);
+        dev->clk_rate = clk_get_rate(dev->clk);
         return 0;
 }
 
-static int orion_wdt_start(struct watchdog_device *wdt_dev)
+static int armada370_wdt_clock_init(struct platform_device *pdev,
+                                    struct orion_watchdog *dev)
 {
-        u32 reg;
+        int ret;
 
-        spin_lock(&wdt_lock);
+        dev->clk = clk_get(&pdev->dev, NULL);
+        if (IS_ERR(dev->clk))
+                return PTR_ERR(dev->clk);
+        ret = clk_prepare_enable(dev->clk);
+        if (ret) {
+                clk_put(dev->clk);
+                return ret;
+        }
+
+        /* Setup watchdog input clock */
+        atomic_io_modify(dev->reg + TIMER_CTRL,
+                        WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
+                        WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
+
+        dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
+        return 0;
+}
+
+static int armadaxp_wdt_clock_init(struct platform_device *pdev,
+                                   struct orion_watchdog *dev)
+{
+        int ret;
+
+        dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
+        if (IS_ERR(dev->clk))
+                return PTR_ERR(dev->clk);
+        ret = clk_prepare_enable(dev->clk);
+        if (ret) {
+                clk_put(dev->clk);
+                return ret;
+        }
+
+        /* Enable the fixed watchdog clock input */
+        atomic_io_modify(dev->reg + TIMER_CTRL,
+                         WDT_AXP_FIXED_ENABLE_BIT,
+                         WDT_AXP_FIXED_ENABLE_BIT);
+
+        dev->clk_rate = clk_get_rate(dev->clk);
+        return 0;
+}
+
+static int orion_wdt_ping(struct watchdog_device *wdt_dev)
+{
+        struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+        /* Reload watchdog duration */
+        writel(dev->clk_rate * wdt_dev->timeout,
+               dev->reg + dev->data->wdt_counter_offset);
+        return 0;
+}
+
+static int armada370_start(struct watchdog_device *wdt_dev)
+{
+        struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
 
         /* Set watchdog duration */
-        writel(wdt_tclk * wdt_dev->timeout, wdt_reg + WDT_VAL);
+        writel(dev->clk_rate * wdt_dev->timeout,
+               dev->reg + dev->data->wdt_counter_offset);
 
-        /* Clear watchdog timer interrupt */
-        writel(~WDT_INT_REQ, BRIDGE_CAUSE);
+        /* Clear the watchdog expiration bit */
+        atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
 
         /* Enable watchdog timer */
-        reg = readl(wdt_reg + TIMER_CTRL);
-        reg |= WDT_EN;
-        writel(reg, wdt_reg + TIMER_CTRL);
+        atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
+                                                dev->data->wdt_enable_bit);
+
+        atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
+                                      dev->data->rstout_enable_bit);
+        return 0;
+}
+
+static int orion_start(struct watchdog_device *wdt_dev)
+{
+        struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
+        /* Set watchdog duration */
+        writel(dev->clk_rate * wdt_dev->timeout,
+               dev->reg + dev->data->wdt_counter_offset);
+
+        /* Enable watchdog timer */
+        atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
+                                                dev->data->wdt_enable_bit);
 
         /* Enable reset on watchdog */
-        reg = readl(RSTOUTn_MASK);
-        reg |= WDT_RESET_OUT_EN;
-        writel(reg, RSTOUTn_MASK);
+        atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
+                                      dev->data->rstout_enable_bit);
 
-        spin_unlock(&wdt_lock);
         return 0;
 }
 
-static int orion_wdt_stop(struct watchdog_device *wdt_dev)
+static int orion_wdt_start(struct watchdog_device *wdt_dev)
 {
-        u32 reg;
+        struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
 
-        spin_lock(&wdt_lock);
+        /* There are some per-SoC quirks to handle */
+        return dev->data->start(wdt_dev);
+}
+
+static int orion_wdt_stop(struct watchdog_device *wdt_dev)
+{
+        struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
 
         /* Disable reset on watchdog */
-        reg = readl(RSTOUTn_MASK);
-        reg &= ~WDT_RESET_OUT_EN;
-        writel(reg, RSTOUTn_MASK);
+        atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0);
 
         /* Disable watchdog timer */
-        reg = readl(wdt_reg + TIMER_CTRL);
-        reg &= ~WDT_EN;
-        writel(reg, wdt_reg + TIMER_CTRL);
+        atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
 
-        spin_unlock(&wdt_lock);
         return 0;
 }
 
-static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
+static int orion_wdt_enabled(struct orion_watchdog *dev)
 {
-        unsigned int time_left;
+        bool enabled, running;
+
+        enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
+        running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
 
-        spin_lock(&wdt_lock);
-        time_left = readl(wdt_reg + WDT_VAL) / wdt_tclk;
-        spin_unlock(&wdt_lock);
+        return enabled && running;
+}
 
-        return time_left;
+static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
+{
+        struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+        return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
 }
 
 static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
@@ -137,68 +240,188 @@ static const struct watchdog_ops orion_wdt_ops = {
         .get_timeleft = orion_wdt_get_timeleft,
 };
 
-static struct watchdog_device orion_wdt = {
-        .info = &orion_wdt_info,
-        .ops = &orion_wdt_ops,
-        .min_timeout = 1,
+static irqreturn_t orion_wdt_irq(int irq, void *devid)
+{
+        panic("Watchdog Timeout");
+        return IRQ_HANDLED;
+}
+
+/*
+ * The original devicetree binding for this driver specified only
+ * one memory resource, so in order to keep DT backwards compatibility
+ * we try to fallback to a hardcoded register address, if the resource
+ * is missing from the devicetree.
+ */
+static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev,
+                                              phys_addr_t internal_regs)
+{
+        struct resource *res;
+        phys_addr_t rstout;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+        if (res)
+                return devm_ioremap(&pdev->dev, res->start,
+                                    resource_size(res));
+
+        /* This workaround works only for "orion-wdt", DT-enabled */
+        if (!of_device_is_compatible(pdev->dev.of_node, "marvell,orion-wdt"))
+                return NULL;
+
+        rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;
+
+        WARN(1, FW_BUG "falling back to harcoded RSTOUT reg 0x%x\n", rstout);
+        return devm_ioremap(&pdev->dev, rstout, 0x4);
+}
+
+static const struct orion_watchdog_data orion_data = {
+        .rstout_enable_bit = BIT(1),
+        .wdt_enable_bit = BIT(4),
+        .wdt_counter_offset = 0x24,
+        .clock_init = orion_wdt_clock_init,
+        .start = orion_start,
+};
+
+static const struct orion_watchdog_data armada370_data = {
+        .rstout_enable_bit = BIT(8),
+        .wdt_enable_bit = BIT(8),
+        .wdt_counter_offset = 0x34,
+        .clock_init = armada370_wdt_clock_init,
+        .start = armada370_start,
 };
 
+static const struct orion_watchdog_data armadaxp_data = {
+        .rstout_enable_bit = BIT(8),
+        .wdt_enable_bit = BIT(8),
+        .wdt_counter_offset = 0x34,
+        .clock_init = armadaxp_wdt_clock_init,
+        .start = armada370_start,
+};
+
+static const struct of_device_id orion_wdt_of_match_table[] = {
+        {
+                .compatible = "marvell,orion-wdt",
+                .data = &orion_data,
+        },
+        {
+                .compatible = "marvell,armada-370-wdt",
+                .data = &armada370_data,
+        },
+        {
+                .compatible = "marvell,armada-xp-wdt",
+                .data = &armadaxp_data,
+        },
+        {},
+};
+MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
+
 static int orion_wdt_probe(struct platform_device *pdev)
 {
+        struct orion_watchdog *dev;
+        const struct of_device_id *match;
+        unsigned int wdt_max_duration;  /* (seconds) */
         struct resource *res;
-        int ret;
+        int ret, irq;
 
-        clk = devm_clk_get(&pdev->dev, NULL);
-        if (IS_ERR(clk)) {
-                dev_err(&pdev->dev, "Orion Watchdog missing clock\n");
-                return -ENODEV;
-        }
-        clk_prepare_enable(clk);
-        wdt_tclk = clk_get_rate(clk);
+        dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),
+                           GFP_KERNEL);
+        if (!dev)
+                return -ENOMEM;
+
+        match = of_match_device(orion_wdt_of_match_table, &pdev->dev);
+        if (!match)
+                /* Default legacy match */
+                match = &orion_wdt_of_match_table[0];
+
+        dev->wdt.info = &orion_wdt_info;
+        dev->wdt.ops = &orion_wdt_ops;
+        dev->wdt.min_timeout = 1;
+        dev->data = match->data;
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (!res)
                 return -ENODEV;
-        wdt_reg = devm_ioremap(&pdev->dev, res->start, resource_size(res));
-        if (!wdt_reg)
-                return -ENOMEM;
 
-        wdt_max_duration = WDT_MAX_CYCLE_COUNT / wdt_tclk;
+        dev->reg = devm_ioremap(&pdev->dev, res->start,
+                               resource_size(res));
+        if (!dev->reg)
+                return -ENOMEM;
 
-        orion_wdt.timeout = wdt_max_duration;
-        orion_wdt.max_timeout = wdt_max_duration;
-        watchdog_init_timeout(&orion_wdt, heartbeat, &pdev->dev);
+        dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
+                                                     INTERNAL_REGS_MASK);
+        if (!dev->rstout)
+                return -ENODEV;
 
-        watchdog_set_nowayout(&orion_wdt, nowayout);
-        ret = watchdog_register_device(&orion_wdt);
+        ret = dev->data->clock_init(pdev, dev);
         if (ret) {
-                clk_disable_unprepare(clk);
+                dev_err(&pdev->dev, "cannot initialize clock\n");
                 return ret;
         }
 
+        wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate;
+
+        dev->wdt.timeout = wdt_max_duration;
+        dev->wdt.max_timeout = wdt_max_duration;
+        watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev);
+
+        platform_set_drvdata(pdev, &dev->wdt);
+        watchdog_set_drvdata(&dev->wdt, dev);
+
+        /*
+         * Let's make sure the watchdog is fully stopped, unless it's
+         * explicitly enabled. This may be the case if the module was
+         * removed and re-insterted, or if the bootloader explicitly
+         * set a running watchdog before booting the kernel.
+         */
+        if (!orion_wdt_enabled(dev))
+                orion_wdt_stop(&dev->wdt);
+
+        /* Request the IRQ only after the watchdog is disabled */
+        irq = platform_get_irq(pdev, 0);
+        if (irq > 0) {
+                /*
+                 * Not all supported platforms specify an interrupt for the
+                 * watchdog, so let's make it optional.
+                 */
+                ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
+                                       pdev->name, dev);
+                if (ret < 0) {
+                        dev_err(&pdev->dev, "failed to request IRQ\n");
+                        goto disable_clk;
+                }
+        }
+
+        watchdog_set_nowayout(&dev->wdt, nowayout);
+        ret = watchdog_register_device(&dev->wdt);
+        if (ret)
+                goto disable_clk;
+
         pr_info("Initial timeout %d sec%s\n",
-                orion_wdt.timeout, nowayout ? ", nowayout" : "");
+                dev->wdt.timeout, nowayout ? ", nowayout" : "");
         return 0;
+
+disable_clk:
+        clk_disable_unprepare(dev->clk);
+        clk_put(dev->clk);
+        return ret;
 }
 
 static int orion_wdt_remove(struct platform_device *pdev)
 {
-        watchdog_unregister_device(&orion_wdt);
-        clk_disable_unprepare(clk);
+        struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
+        struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
+
+        watchdog_unregister_device(wdt_dev);
+        clk_disable_unprepare(dev->clk);
+        clk_put(dev->clk);
         return 0;
 }
 
 static void orion_wdt_shutdown(struct platform_device *pdev)
 {
-        orion_wdt_stop(&orion_wdt);
+        struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
+        orion_wdt_stop(wdt_dev);
 }
 
-static const struct of_device_id orion_wdt_of_match_table[] = {
-        { .compatible = "marvell,orion-wdt", },
-        {},
-};
-MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
-
 static struct platform_driver orion_wdt_driver = {
         .probe          = orion_wdt_probe,
         .remove         = orion_wdt_remove,