diff options
-rw-r--r-- | drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos7_drm_decon.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_drv.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimd.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_plane.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_vidi.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 20 |
7 files changed, 40 insertions, 65 deletions
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index 83fbf387f4d8..a4ea09665b83 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c | |||
@@ -219,17 +219,13 @@ static void decon_shadow_protect_win(struct decon_context *ctx, int win, | |||
219 | writel(val, ctx->addr + DECON_SHADOWCON); | 219 | writel(val, ctx->addr + DECON_SHADOWCON); |
220 | } | 220 | } |
221 | 221 | ||
222 | static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 222 | static void decon_update_plane(struct exynos_drm_crtc *crtc, |
223 | struct exynos_drm_plane *plane) | ||
223 | { | 224 | { |
224 | struct decon_context *ctx = crtc->ctx; | 225 | struct decon_context *ctx = crtc->ctx; |
225 | struct exynos_drm_plane *plane; | 226 | unsigned int win = plane->zpos; |
226 | u32 val; | 227 | u32 val; |
227 | 228 | ||
228 | if (win < 0 || win >= WINDOWS_NR) | ||
229 | return; | ||
230 | |||
231 | plane = &ctx->planes[win]; | ||
232 | |||
233 | if (ctx->suspended) | 229 | if (ctx->suspended) |
234 | return; | 230 | return; |
235 | 231 | ||
@@ -277,17 +273,13 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | |||
277 | atomic_set(&ctx->win_updated, 1); | 273 | atomic_set(&ctx->win_updated, 1); |
278 | } | 274 | } |
279 | 275 | ||
280 | static void decon_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 276 | static void decon_disable_plane(struct exynos_drm_crtc *crtc, |
277 | struct exynos_drm_plane *plane) | ||
281 | { | 278 | { |
282 | struct decon_context *ctx = crtc->ctx; | 279 | struct decon_context *ctx = crtc->ctx; |
283 | struct exynos_drm_plane *plane; | 280 | unsigned int win = plane->zpos; |
284 | u32 val; | 281 | u32 val; |
285 | 282 | ||
286 | if (win < 0 || win >= WINDOWS_NR) | ||
287 | return; | ||
288 | |||
289 | plane = &ctx->planes[win]; | ||
290 | |||
291 | if (ctx->suspended) | 283 | if (ctx->suspended) |
292 | return; | 284 | return; |
293 | 285 | ||
@@ -378,7 +370,7 @@ static void decon_disable(struct exynos_drm_crtc *crtc) | |||
378 | * a destroyed buffer later. | 370 | * a destroyed buffer later. |
379 | */ | 371 | */ |
380 | for (i = 0; i < WINDOWS_NR; i++) | 372 | for (i = 0; i < WINDOWS_NR; i++) |
381 | decon_disable_plane(crtc, i); | 373 | decon_disable_plane(crtc, &ctx->planes[i]); |
382 | 374 | ||
383 | decon_swreset(ctx); | 375 | decon_swreset(ctx); |
384 | 376 | ||
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c index 31210bef3ece..0bb393867da4 100644 --- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c | |||
@@ -383,24 +383,20 @@ static void decon_shadow_protect_win(struct decon_context *ctx, | |||
383 | writel(val, ctx->regs + SHADOWCON); | 383 | writel(val, ctx->regs + SHADOWCON); |
384 | } | 384 | } |
385 | 385 | ||
386 | static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 386 | static void decon_update_plane(struct exynos_drm_crtc *crtc, |
387 | struct exynos_drm_plane *plane) | ||
387 | { | 388 | { |
388 | struct decon_context *ctx = crtc->ctx; | 389 | struct decon_context *ctx = crtc->ctx; |
389 | struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; | 390 | struct drm_display_mode *mode = &crtc->base.state->adjusted_mode; |
390 | struct exynos_drm_plane *plane; | ||
391 | int padding; | 391 | int padding; |
392 | unsigned long val, alpha; | 392 | unsigned long val, alpha; |
393 | unsigned int last_x; | 393 | unsigned int last_x; |
394 | unsigned int last_y; | 394 | unsigned int last_y; |
395 | unsigned int win = plane->zpos; | ||
395 | 396 | ||
396 | if (ctx->suspended) | 397 | if (ctx->suspended) |
397 | return; | 398 | return; |
398 | 399 | ||
399 | if (win < 0 || win >= WINDOWS_NR) | ||
400 | return; | ||
401 | |||
402 | plane = &ctx->planes[win]; | ||
403 | |||
404 | /* | 400 | /* |
405 | * SHADOWCON/PRTCON register is used for enabling timing. | 401 | * SHADOWCON/PRTCON register is used for enabling timing. |
406 | * | 402 | * |
@@ -493,17 +489,13 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | |||
493 | writel(val, ctx->regs + DECON_UPDATE); | 489 | writel(val, ctx->regs + DECON_UPDATE); |
494 | } | 490 | } |
495 | 491 | ||
496 | static void decon_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 492 | static void decon_disable_plane(struct exynos_drm_crtc *crtc, |
493 | struct exynos_drm_plane *plane) | ||
497 | { | 494 | { |
498 | struct decon_context *ctx = crtc->ctx; | 495 | struct decon_context *ctx = crtc->ctx; |
499 | struct exynos_drm_plane *plane; | 496 | unsigned int win = plane->zpos; |
500 | u32 val; | 497 | u32 val; |
501 | 498 | ||
502 | if (win < 0 || win >= WINDOWS_NR) | ||
503 | return; | ||
504 | |||
505 | plane = &ctx->planes[win]; | ||
506 | |||
507 | if (ctx->suspended) | 499 | if (ctx->suspended) |
508 | return; | 500 | return; |
509 | 501 | ||
@@ -599,7 +591,7 @@ static void decon_disable(struct exynos_drm_crtc *crtc) | |||
599 | * a destroyed buffer later. | 591 | * a destroyed buffer later. |
600 | */ | 592 | */ |
601 | for (i = 0; i < WINDOWS_NR; i++) | 593 | for (i = 0; i < WINDOWS_NR; i++) |
602 | decon_disable_plane(crtc, i); | 594 | decon_disable_plane(crtc, &ctx->planes[i]); |
603 | 595 | ||
604 | clk_disable_unprepare(ctx->vclk); | 596 | clk_disable_unprepare(ctx->vclk); |
605 | clk_disable_unprepare(ctx->eclk); | 597 | clk_disable_unprepare(ctx->eclk); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index ac7eb317cc88..18d04d0e7364 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h | |||
@@ -173,8 +173,10 @@ struct exynos_drm_crtc_ops { | |||
173 | int (*enable_vblank)(struct exynos_drm_crtc *crtc); | 173 | int (*enable_vblank)(struct exynos_drm_crtc *crtc); |
174 | void (*disable_vblank)(struct exynos_drm_crtc *crtc); | 174 | void (*disable_vblank)(struct exynos_drm_crtc *crtc); |
175 | void (*wait_for_vblank)(struct exynos_drm_crtc *crtc); | 175 | void (*wait_for_vblank)(struct exynos_drm_crtc *crtc); |
176 | void (*update_plane)(struct exynos_drm_crtc *crtc, unsigned int zpos); | 176 | void (*update_plane)(struct exynos_drm_crtc *crtc, |
177 | void (*disable_plane)(struct exynos_drm_crtc *crtc, unsigned int zpos); | 177 | struct exynos_drm_plane *plane); |
178 | void (*disable_plane)(struct exynos_drm_crtc *crtc, | ||
179 | struct exynos_drm_plane *plane); | ||
178 | void (*te_handler)(struct exynos_drm_crtc *crtc); | 180 | void (*te_handler)(struct exynos_drm_crtc *crtc); |
179 | void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable); | 181 | void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable); |
180 | }; | 182 | }; |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 81bc34253510..2527997c4f24 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c | |||
@@ -607,22 +607,18 @@ static void fimd_shadow_protect_win(struct fimd_context *ctx, | |||
607 | writel(val, ctx->regs + reg); | 607 | writel(val, ctx->regs + reg); |
608 | } | 608 | } |
609 | 609 | ||
610 | static void fimd_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 610 | static void fimd_update_plane(struct exynos_drm_crtc *crtc, |
611 | struct exynos_drm_plane *plane) | ||
611 | { | 612 | { |
612 | struct fimd_context *ctx = crtc->ctx; | 613 | struct fimd_context *ctx = crtc->ctx; |
613 | struct exynos_drm_plane *plane; | ||
614 | dma_addr_t dma_addr; | 614 | dma_addr_t dma_addr; |
615 | unsigned long val, size, offset; | 615 | unsigned long val, size, offset; |
616 | unsigned int last_x, last_y, buf_offsize, line_size; | 616 | unsigned int last_x, last_y, buf_offsize, line_size; |
617 | unsigned int win = plane->zpos; | ||
617 | 618 | ||
618 | if (ctx->suspended) | 619 | if (ctx->suspended) |
619 | return; | 620 | return; |
620 | 621 | ||
621 | if (win < 0 || win >= WINDOWS_NR) | ||
622 | return; | ||
623 | |||
624 | plane = &ctx->planes[win]; | ||
625 | |||
626 | /* | 622 | /* |
627 | * SHADOWCON/PRTCON register is used for enabling timing. | 623 | * SHADOWCON/PRTCON register is used for enabling timing. |
628 | * | 624 | * |
@@ -715,15 +711,11 @@ static void fimd_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | |||
715 | atomic_set(&ctx->win_updated, 1); | 711 | atomic_set(&ctx->win_updated, 1); |
716 | } | 712 | } |
717 | 713 | ||
718 | static void fimd_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 714 | static void fimd_disable_plane(struct exynos_drm_crtc *crtc, |
715 | struct exynos_drm_plane *plane) | ||
719 | { | 716 | { |
720 | struct fimd_context *ctx = crtc->ctx; | 717 | struct fimd_context *ctx = crtc->ctx; |
721 | struct exynos_drm_plane *plane; | 718 | unsigned int win = plane->zpos; |
722 | |||
723 | if (win < 0 || win >= WINDOWS_NR) | ||
724 | return; | ||
725 | |||
726 | plane = &ctx->planes[win]; | ||
727 | 719 | ||
728 | if (ctx->suspended) | 720 | if (ctx->suspended) |
729 | return; | 721 | return; |
@@ -785,7 +777,7 @@ static void fimd_disable(struct exynos_drm_crtc *crtc) | |||
785 | * a destroyed buffer later. | 777 | * a destroyed buffer later. |
786 | */ | 778 | */ |
787 | for (i = 0; i < WINDOWS_NR; i++) | 779 | for (i = 0; i < WINDOWS_NR; i++) |
788 | fimd_disable_plane(crtc, i); | 780 | fimd_disable_plane(crtc, &ctx->planes[i]); |
789 | 781 | ||
790 | fimd_enable_vblank(crtc); | 782 | fimd_enable_vblank(crtc); |
791 | fimd_wait_for_vblank(crtc); | 783 | fimd_wait_for_vblank(crtc); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c index eb9eec944326..b5aa5b75d82b 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_plane.c +++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c | |||
@@ -180,7 +180,7 @@ static void exynos_plane_atomic_update(struct drm_plane *plane, | |||
180 | state->src_w >> 16, state->src_h >> 16); | 180 | state->src_w >> 16, state->src_h >> 16); |
181 | 181 | ||
182 | if (exynos_crtc->ops->update_plane) | 182 | if (exynos_crtc->ops->update_plane) |
183 | exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane->zpos); | 183 | exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane); |
184 | } | 184 | } |
185 | 185 | ||
186 | static void exynos_plane_atomic_disable(struct drm_plane *plane, | 186 | static void exynos_plane_atomic_disable(struct drm_plane *plane, |
@@ -194,7 +194,7 @@ static void exynos_plane_atomic_disable(struct drm_plane *plane, | |||
194 | 194 | ||
195 | if (exynos_crtc->ops->disable_plane) | 195 | if (exynos_crtc->ops->disable_plane) |
196 | exynos_crtc->ops->disable_plane(exynos_crtc, | 196 | exynos_crtc->ops->disable_plane(exynos_crtc, |
197 | exynos_plane->zpos); | 197 | exynos_plane); |
198 | } | 198 | } |
199 | 199 | ||
200 | static const struct drm_plane_helper_funcs plane_helper_funcs = { | 200 | static const struct drm_plane_helper_funcs plane_helper_funcs = { |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c index 59d85ef04650..ade59eeb8554 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c | |||
@@ -118,19 +118,14 @@ static void vidi_disable_vblank(struct exynos_drm_crtc *crtc) | |||
118 | ctx->vblank_on = false; | 118 | ctx->vblank_on = false; |
119 | } | 119 | } |
120 | 120 | ||
121 | static void vidi_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 121 | static void vidi_update_plane(struct exynos_drm_crtc *crtc, |
122 | struct exynos_drm_plane *plane) | ||
122 | { | 123 | { |
123 | struct vidi_context *ctx = crtc->ctx; | 124 | struct vidi_context *ctx = crtc->ctx; |
124 | struct exynos_drm_plane *plane; | ||
125 | 125 | ||
126 | if (ctx->suspended) | 126 | if (ctx->suspended) |
127 | return; | 127 | return; |
128 | 128 | ||
129 | if (win < 0 || win >= WINDOWS_NR) | ||
130 | return; | ||
131 | |||
132 | plane = &ctx->planes[win]; | ||
133 | |||
134 | DRM_DEBUG_KMS("dma_addr = %pad\n", plane->dma_addr); | 129 | DRM_DEBUG_KMS("dma_addr = %pad\n", plane->dma_addr); |
135 | 130 | ||
136 | if (ctx->vblank_on) | 131 | if (ctx->vblank_on) |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 72bdded845f4..9275d3af385f 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -927,28 +927,30 @@ static void mixer_disable_vblank(struct exynos_drm_crtc *crtc) | |||
927 | mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC); | 927 | mixer_reg_writemask(res, MXR_INT_EN, 0, MXR_INT_EN_VSYNC); |
928 | } | 928 | } |
929 | 929 | ||
930 | static void mixer_update_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 930 | static void mixer_update_plane(struct exynos_drm_crtc *crtc, |
931 | struct exynos_drm_plane *plane) | ||
931 | { | 932 | { |
932 | struct mixer_context *mixer_ctx = crtc->ctx; | 933 | struct mixer_context *mixer_ctx = crtc->ctx; |
933 | 934 | ||
934 | DRM_DEBUG_KMS("win: %d\n", win); | 935 | DRM_DEBUG_KMS("win: %d\n", plane->zpos); |
935 | 936 | ||
936 | if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) | 937 | if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) |
937 | return; | 938 | return; |
938 | 939 | ||
939 | if (win > 1 && mixer_ctx->vp_enabled) | 940 | if (plane->zpos > 1 && mixer_ctx->vp_enabled) |
940 | vp_video_buffer(mixer_ctx, win); | 941 | vp_video_buffer(mixer_ctx, plane->zpos); |
941 | else | 942 | else |
942 | mixer_graph_buffer(mixer_ctx, win); | 943 | mixer_graph_buffer(mixer_ctx, plane->zpos); |
943 | } | 944 | } |
944 | 945 | ||
945 | static void mixer_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win) | 946 | static void mixer_disable_plane(struct exynos_drm_crtc *crtc, |
947 | struct exynos_drm_plane *plane) | ||
946 | { | 948 | { |
947 | struct mixer_context *mixer_ctx = crtc->ctx; | 949 | struct mixer_context *mixer_ctx = crtc->ctx; |
948 | struct mixer_resources *res = &mixer_ctx->mixer_res; | 950 | struct mixer_resources *res = &mixer_ctx->mixer_res; |
949 | unsigned long flags; | 951 | unsigned long flags; |
950 | 952 | ||
951 | DRM_DEBUG_KMS("win: %d\n", win); | 953 | DRM_DEBUG_KMS("win: %d\n", plane->zpos); |
952 | 954 | ||
953 | if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) | 955 | if (!test_bit(MXR_BIT_POWERED, &mixer_ctx->flags)) |
954 | return; | 956 | return; |
@@ -956,7 +958,7 @@ static void mixer_disable_plane(struct exynos_drm_crtc *crtc, unsigned int win) | |||
956 | spin_lock_irqsave(&res->reg_slock, flags); | 958 | spin_lock_irqsave(&res->reg_slock, flags); |
957 | mixer_vsync_set_update(mixer_ctx, false); | 959 | mixer_vsync_set_update(mixer_ctx, false); |
958 | 960 | ||
959 | mixer_cfg_layer(mixer_ctx, win, false); | 961 | mixer_cfg_layer(mixer_ctx, plane->zpos, false); |
960 | 962 | ||
961 | mixer_vsync_set_update(mixer_ctx, true); | 963 | mixer_vsync_set_update(mixer_ctx, true); |
962 | spin_unlock_irqrestore(&res->reg_slock, flags); | 964 | spin_unlock_irqrestore(&res->reg_slock, flags); |
@@ -1053,7 +1055,7 @@ static void mixer_disable(struct exynos_drm_crtc *crtc) | |||
1053 | mixer_regs_dump(ctx); | 1055 | mixer_regs_dump(ctx); |
1054 | 1056 | ||
1055 | for (i = 0; i < MIXER_WIN_NR; i++) | 1057 | for (i = 0; i < MIXER_WIN_NR; i++) |
1056 | mixer_disable_plane(crtc, i); | 1058 | mixer_disable_plane(crtc, &ctx->planes[i]); |
1057 | 1059 | ||
1058 | clear_bit(MXR_BIT_POWERED, &ctx->flags); | 1060 | clear_bit(MXR_BIT_POWERED, &ctx->flags); |
1059 | 1061 | ||