diff options
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 8 |
2 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 39bdbf9688e4..0b522d3f529d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
| @@ -5242,12 +5242,16 @@ enum skl_disp_power_wells { | |||
| 5242 | /* GEN7 chicken */ | 5242 | /* GEN7 chicken */ |
| 5243 | #define GEN7_COMMON_SLICE_CHICKEN1 0x7010 | 5243 | #define GEN7_COMMON_SLICE_CHICKEN1 0x7010 |
| 5244 | # define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26)) | 5244 | # define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26)) |
| 5245 | # define GEN9_RHWO_OPTIMIZATION_DISABLE (1<<14) | ||
| 5245 | #define COMMON_SLICE_CHICKEN2 0x7014 | 5246 | #define COMMON_SLICE_CHICKEN2 0x7014 |
| 5246 | # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0) | 5247 | # define GEN8_CSC2_SBE_VUE_CACHE_CONSERVATIVE (1<<0) |
| 5247 | 5248 | ||
| 5248 | #define HIZ_CHICKEN 0x7018 | 5249 | #define HIZ_CHICKEN 0x7018 |
| 5249 | # define CHV_HZ_8X8_MODE_IN_1X (1<<15) | 5250 | # define CHV_HZ_8X8_MODE_IN_1X (1<<15) |
| 5250 | 5251 | ||
| 5252 | #define GEN9_SLICE_COMMON_ECO_CHICKEN0 0x7308 | ||
| 5253 | #define DISABLE_PIXEL_MASK_CAMMING (1<<14) | ||
| 5254 | |||
| 5251 | #define GEN7_L3SQCREG1 0xB010 | 5255 | #define GEN7_L3SQCREG1 0xB010 |
| 5252 | #define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000 | 5256 | #define VLV_B0_WA_L3SQCREG1_VALUE 0x00D30000 |
| 5253 | 5257 | ||
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index dde0bec7aefd..e9a85a575a1c 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
| @@ -968,6 +968,14 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) | |||
| 968 | ~GEN9_DG_MIRROR_FIX_ENABLE); | 968 | ~GEN9_DG_MIRROR_FIX_ENABLE); |
| 969 | } | 969 | } |
| 970 | 970 | ||
| 971 | if (IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) { | ||
| 972 | /* WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken:skl */ | ||
| 973 | WA_SET_BIT_MASKED(GEN7_COMMON_SLICE_CHICKEN1, | ||
| 974 | GEN9_RHWO_OPTIMIZATION_DISABLE); | ||
| 975 | WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN0, | ||
| 976 | DISABLE_PIXEL_MASK_CAMMING); | ||
| 977 | } | ||
| 978 | |||
| 971 | if (INTEL_REVID(dev) >= SKL_REVID_C0) { | 979 | if (INTEL_REVID(dev) >= SKL_REVID_C0) { |
| 972 | /* WaEnableYV12BugFixInHalfSliceChicken7:skl */ | 980 | /* WaEnableYV12BugFixInHalfSliceChicken7:skl */ |
| 973 | WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7, | 981 | WA_SET_BIT_MASKED(GEN9_HALF_SLICE_CHICKEN7, |
