diff options
-rw-r--r-- | arch/arm/boot/dts/r8a7793.dtsi | 54 |
1 files changed, 36 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi index 07af584915c6..45dba1c79a43 100644 --- a/arch/arm/boot/dts/r8a7793.dtsi +++ b/arch/arm/boot/dts/r8a7793.dtsi | |||
@@ -600,8 +600,9 @@ | |||
600 | "renesas,scif"; | 600 | "renesas,scif"; |
601 | reg = <0 0xe6e60000 0 64>; | 601 | reg = <0 0xe6e60000 0 64>; |
602 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; | 602 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
603 | clocks = <&mstp7_clks R8A7793_CLK_SCIF0>; | 603 | clocks = <&mstp7_clks R8A7793_CLK_SCIF0>, <&zs_clk>, |
604 | clock-names = "fck"; | 604 | <&scif_clk>; |
605 | clock-names = "fck", "brg_int", "scif_clk"; | ||
605 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>; | 606 | dmas = <&dmac0 0x29>, <&dmac0 0x2a>; |
606 | dma-names = "tx", "rx"; | 607 | dma-names = "tx", "rx"; |
607 | power-domains = <&cpg_clocks>; | 608 | power-domains = <&cpg_clocks>; |
@@ -613,8 +614,9 @@ | |||
613 | "renesas,scif"; | 614 | "renesas,scif"; |
614 | reg = <0 0xe6e68000 0 64>; | 615 | reg = <0 0xe6e68000 0 64>; |
615 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | 616 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
616 | clocks = <&mstp7_clks R8A7793_CLK_SCIF1>; | 617 | clocks = <&mstp7_clks R8A7793_CLK_SCIF1>, <&zs_clk>, |
617 | clock-names = "fck"; | 618 | <&scif_clk>; |
619 | clock-names = "fck", "brg_int", "scif_clk"; | ||
618 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; | 620 | dmas = <&dmac0 0x2d>, <&dmac0 0x2e>; |
619 | dma-names = "tx", "rx"; | 621 | dma-names = "tx", "rx"; |
620 | power-domains = <&cpg_clocks>; | 622 | power-domains = <&cpg_clocks>; |
@@ -626,8 +628,9 @@ | |||
626 | "renesas,scif"; | 628 | "renesas,scif"; |
627 | reg = <0 0xe6e58000 0 64>; | 629 | reg = <0 0xe6e58000 0 64>; |
628 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; | 630 | interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; |
629 | clocks = <&mstp7_clks R8A7793_CLK_SCIF2>; | 631 | clocks = <&mstp7_clks R8A7793_CLK_SCIF2>, <&zs_clk>, |
630 | clock-names = "fck"; | 632 | <&scif_clk>; |
633 | clock-names = "fck", "brg_int", "scif_clk"; | ||
631 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; | 634 | dmas = <&dmac0 0x2b>, <&dmac0 0x2c>; |
632 | dma-names = "tx", "rx"; | 635 | dma-names = "tx", "rx"; |
633 | power-domains = <&cpg_clocks>; | 636 | power-domains = <&cpg_clocks>; |
@@ -639,8 +642,9 @@ | |||
639 | "renesas,scif"; | 642 | "renesas,scif"; |
640 | reg = <0 0xe6ea8000 0 64>; | 643 | reg = <0 0xe6ea8000 0 64>; |
641 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | 644 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
642 | clocks = <&mstp7_clks R8A7793_CLK_SCIF3>; | 645 | clocks = <&mstp7_clks R8A7793_CLK_SCIF3>, <&zs_clk>, |
643 | clock-names = "fck"; | 646 | <&scif_clk>; |
647 | clock-names = "fck", "brg_int", "scif_clk"; | ||
644 | dmas = <&dmac0 0x2f>, <&dmac0 0x30>; | 648 | dmas = <&dmac0 0x2f>, <&dmac0 0x30>; |
645 | dma-names = "tx", "rx"; | 649 | dma-names = "tx", "rx"; |
646 | power-domains = <&cpg_clocks>; | 650 | power-domains = <&cpg_clocks>; |
@@ -652,8 +656,9 @@ | |||
652 | "renesas,scif"; | 656 | "renesas,scif"; |
653 | reg = <0 0xe6ee0000 0 64>; | 657 | reg = <0 0xe6ee0000 0 64>; |
654 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | 658 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; |
655 | clocks = <&mstp7_clks R8A7793_CLK_SCIF4>; | 659 | clocks = <&mstp7_clks R8A7793_CLK_SCIF4>, <&zs_clk>, |
656 | clock-names = "fck"; | 660 | <&scif_clk>; |
661 | clock-names = "fck", "brg_int", "scif_clk"; | ||
657 | dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; | 662 | dmas = <&dmac0 0xfb>, <&dmac0 0xfc>; |
658 | dma-names = "tx", "rx"; | 663 | dma-names = "tx", "rx"; |
659 | power-domains = <&cpg_clocks>; | 664 | power-domains = <&cpg_clocks>; |
@@ -665,8 +670,9 @@ | |||
665 | "renesas,scif"; | 670 | "renesas,scif"; |
666 | reg = <0 0xe6ee8000 0 64>; | 671 | reg = <0 0xe6ee8000 0 64>; |
667 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | 672 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
668 | clocks = <&mstp7_clks R8A7793_CLK_SCIF5>; | 673 | clocks = <&mstp7_clks R8A7793_CLK_SCIF5>, <&zs_clk>, |
669 | clock-names = "fck"; | 674 | <&scif_clk>; |
675 | clock-names = "fck", "brg_int", "scif_clk"; | ||
670 | dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; | 676 | dmas = <&dmac0 0xfd>, <&dmac0 0xfe>; |
671 | dma-names = "tx", "rx"; | 677 | dma-names = "tx", "rx"; |
672 | power-domains = <&cpg_clocks>; | 678 | power-domains = <&cpg_clocks>; |
@@ -678,8 +684,9 @@ | |||
678 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | 684 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
679 | reg = <0 0xe62c0000 0 96>; | 685 | reg = <0 0xe62c0000 0 96>; |
680 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; | 686 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
681 | clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>; | 687 | clocks = <&mstp7_clks R8A7793_CLK_HSCIF0>, <&zs_clk>, |
682 | clock-names = "fck"; | 688 | <&scif_clk>; |
689 | clock-names = "fck", "brg_int", "scif_clk"; | ||
683 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>; | 690 | dmas = <&dmac0 0x39>, <&dmac0 0x3a>; |
684 | dma-names = "tx", "rx"; | 691 | dma-names = "tx", "rx"; |
685 | power-domains = <&cpg_clocks>; | 692 | power-domains = <&cpg_clocks>; |
@@ -691,8 +698,9 @@ | |||
691 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | 698 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
692 | reg = <0 0xe62c8000 0 96>; | 699 | reg = <0 0xe62c8000 0 96>; |
693 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; | 700 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
694 | clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>; | 701 | clocks = <&mstp7_clks R8A7793_CLK_HSCIF1>, <&zs_clk>, |
695 | clock-names = "fck"; | 702 | <&scif_clk>; |
703 | clock-names = "fck", "brg_int", "scif_clk"; | ||
696 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; | 704 | dmas = <&dmac0 0x4d>, <&dmac0 0x4e>; |
697 | dma-names = "tx", "rx"; | 705 | dma-names = "tx", "rx"; |
698 | power-domains = <&cpg_clocks>; | 706 | power-domains = <&cpg_clocks>; |
@@ -704,8 +712,9 @@ | |||
704 | "renesas,rcar-gen2-hscif", "renesas,hscif"; | 712 | "renesas,rcar-gen2-hscif", "renesas,hscif"; |
705 | reg = <0 0xe62d0000 0 96>; | 713 | reg = <0 0xe62d0000 0 96>; |
706 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | 714 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
707 | clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>; | 715 | clocks = <&mstp7_clks R8A7793_CLK_HSCIF2>, <&zs_clk>, |
708 | clock-names = "fck"; | 716 | <&scif_clk>; |
717 | clock-names = "fck", "brg_int", "scif_clk"; | ||
709 | dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; | 718 | dmas = <&dmac0 0x3b>, <&dmac0 0x3c>; |
710 | dma-names = "tx", "rx"; | 719 | dma-names = "tx", "rx"; |
711 | power-domains = <&cpg_clocks>; | 720 | power-domains = <&cpg_clocks>; |
@@ -805,6 +814,15 @@ | |||
805 | clock-output-names = "audio_clk_c"; | 814 | clock-output-names = "audio_clk_c"; |
806 | }; | 815 | }; |
807 | 816 | ||
817 | /* External SCIF clock */ | ||
818 | scif_clk: scif { | ||
819 | compatible = "fixed-clock"; | ||
820 | #clock-cells = <0>; | ||
821 | /* This value must be overridden by the board. */ | ||
822 | clock-frequency = <0>; | ||
823 | status = "disabled"; | ||
824 | }; | ||
825 | |||
808 | /* Special CPG clocks */ | 826 | /* Special CPG clocks */ |
809 | cpg_clocks: cpg_clocks@e6150000 { | 827 | cpg_clocks: cpg_clocks@e6150000 { |
810 | compatible = "renesas,r8a7793-cpg-clocks", | 828 | compatible = "renesas,r8a7793-cpg-clocks", |