diff options
| -rw-r--r-- | arch/arc/include/asm/irqflags-arcv2.h | 6 | ||||
| -rw-r--r-- | arch/arc/kernel/intc-arcv2.c | 10 |
2 files changed, 7 insertions, 9 deletions
diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h index e880dfa3fcd3..a64c447b0337 100644 --- a/arch/arc/include/asm/irqflags-arcv2.h +++ b/arch/arc/include/asm/irqflags-arcv2.h | |||
| @@ -38,10 +38,10 @@ | |||
| 38 | #define AUX_IRQ_ACT_BIT_U 31 | 38 | #define AUX_IRQ_ACT_BIT_U 31 |
| 39 | 39 | ||
| 40 | /* | 40 | /* |
| 41 | * User space should be interruptable even by lowest prio interrupt | 41 | * Hardware supports 16 priorities (0 highest, 15 lowest) |
| 42 | * Safe even if actual interrupt priorities is fewer or even one | 42 | * Linux by default runs at 1, priority 0 reserved for NMI style interrupts |
| 43 | */ | 43 | */ |
| 44 | #define ARCV2_IRQ_DEF_PRIO 15 | 44 | #define ARCV2_IRQ_DEF_PRIO 1 |
| 45 | 45 | ||
| 46 | /* seed value for status register */ | 46 | /* seed value for status register */ |
| 47 | #define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \ | 47 | #define ISA_INIT_STATUS_BITS (STATUS_IE_MASK | STATUS_AD_MASK | \ |
diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c index 62b59409a5d9..994dca7014db 100644 --- a/arch/arc/kernel/intc-arcv2.c +++ b/arch/arc/kernel/intc-arcv2.c | |||
| @@ -14,8 +14,6 @@ | |||
| 14 | #include <linux/irqchip.h> | 14 | #include <linux/irqchip.h> |
| 15 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
| 16 | 16 | ||
| 17 | static int irq_prio; | ||
| 18 | |||
| 19 | /* | 17 | /* |
| 20 | * Early Hardware specific Interrupt setup | 18 | * Early Hardware specific Interrupt setup |
| 21 | * -Called very early (start_kernel -> setup_arch -> setup_processor) | 19 | * -Called very early (start_kernel -> setup_arch -> setup_processor) |
| @@ -24,7 +22,7 @@ static int irq_prio; | |||
| 24 | */ | 22 | */ |
| 25 | void arc_init_IRQ(void) | 23 | void arc_init_IRQ(void) |
| 26 | { | 24 | { |
| 27 | unsigned int tmp; | 25 | unsigned int tmp, irq_prio; |
| 28 | 26 | ||
| 29 | struct irq_build { | 27 | struct irq_build { |
| 30 | #ifdef CONFIG_CPU_BIG_ENDIAN | 28 | #ifdef CONFIG_CPU_BIG_ENDIAN |
| @@ -67,12 +65,12 @@ void arc_init_IRQ(void) | |||
| 67 | 65 | ||
| 68 | irq_prio = irq_bcr.prio; /* Encoded as N-1 for N levels */ | 66 | irq_prio = irq_bcr.prio; /* Encoded as N-1 for N levels */ |
| 69 | pr_info("archs-intc\t: %d priority levels (default %d)%s\n", | 67 | pr_info("archs-intc\t: %d priority levels (default %d)%s\n", |
| 70 | irq_prio + 1, irq_prio, | 68 | irq_prio + 1, ARCV2_IRQ_DEF_PRIO, |
| 71 | irq_bcr.firq ? " FIRQ (not used)":""); | 69 | irq_bcr.firq ? " FIRQ (not used)":""); |
| 72 | 70 | ||
| 73 | /* setup status32, don't enable intr yet as kernel doesn't want */ | 71 | /* setup status32, don't enable intr yet as kernel doesn't want */ |
| 74 | tmp = read_aux_reg(0xa); | 72 | tmp = read_aux_reg(0xa); |
| 75 | tmp |= STATUS_AD_MASK | (irq_prio << 1); | 73 | tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1); |
| 76 | tmp &= ~STATUS_IE_MASK; | 74 | tmp &= ~STATUS_IE_MASK; |
| 77 | asm volatile("kflag %0 \n"::"r"(tmp)); | 75 | asm volatile("kflag %0 \n"::"r"(tmp)); |
| 78 | } | 76 | } |
| @@ -93,7 +91,7 @@ void arcv2_irq_enable(struct irq_data *data) | |||
| 93 | { | 91 | { |
| 94 | /* set default priority */ | 92 | /* set default priority */ |
| 95 | write_aux_reg(AUX_IRQ_SELECT, data->irq); | 93 | write_aux_reg(AUX_IRQ_SELECT, data->irq); |
| 96 | write_aux_reg(AUX_IRQ_PRIORITY, irq_prio); | 94 | write_aux_reg(AUX_IRQ_PRIORITY, ARCV2_IRQ_DEF_PRIO); |
| 97 | 95 | ||
| 98 | /* | 96 | /* |
| 99 | * hw auto enables (linux unmask) all by default | 97 | * hw auto enables (linux unmask) all by default |
