2 files changed, 18 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.txt b/Documentation/devicetree/bindings/net/ti,dp83867.txt
index afe9630a5e7d..02c4353b5cf2 100644
--- a/Documentation/devicetree/bindings/net/ti,dp83867.txt
+++ b/Documentation/devicetree/bindings/net/ti,dp83867.txt
@@ -18,6 +18,13 @@ Optional property:
         - ti,max-output-impedance - MAC Interface Impedance control to set
                                     the programmable output impedance to
                                     maximum value (70 ohms).
+        - ti,dp83867-rxctrl-strap-quirk - This denotes the fact that the
+                                    board has RX_DV/RX_CTRL pin strapped in
+                                    mode 1 or 2. To ensure PHY operation,
+                                    there are specific actions that
+                                    software needs to take when this pin is
+                                    strapped in these modes. See data manual
+                                    for details.
 
 Note: ti,min-output-impedance and ti,max-output-impedance are mutually
       exclusive. When both properties are present ti,max-output-impedance
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index b57f20e552ba..c1ab976cc800 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -91,6 +91,7 @@ struct dp83867_private {
         int fifo_depth;
         int io_impedance;
         int port_mirroring;
+        bool rxctrl_strap_quirk;
 };
 
 static int dp83867_ack_interrupt(struct phy_device *phydev)
@@ -164,6 +165,9 @@ static int dp83867_of_init(struct phy_device *phydev)
         else if (of_property_read_bool(of_node, "ti,min-output-impedance"))
                 dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN;
 
+        dp83867->rxctrl_strap_quirk = of_property_read_bool(of_node,
+                                        "ti,dp83867-rxctrl-strap-quirk");
+
         ret = of_property_read_u32(of_node, "ti,rx-internal-delay",
                                    &dp83867->rx_id_delay);
         if (ret &&
@@ -214,6 +218,13 @@ static int dp83867_config_init(struct phy_device *phydev)
                 dp83867 = (struct dp83867_private *)phydev->priv;
         }
 
+        /* RX_DV/RX_CTRL strapped in mode 1 or mode 2 workaround */
+        if (dp83867->rxctrl_strap_quirk) {
+                val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4);
+                val &= ~BIT(7);
+                phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val);
+        }
+
         if (phy_interface_is_rgmii(phydev)) {
                 val = phy_read(phydev, MII_DP83867_PHYCTRL);
                 if (val < 0)