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-rw-r--r--arch/mips/include/asm/page.h38
1 files changed, 28 insertions, 10 deletions
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 74cb004c2868..ea0cd9773914 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -162,16 +162,34 @@ typedef struct { unsigned long pgprot; } pgprot_t;
162/* 162/*
163 * __pa()/__va() should be used only during mem init. 163 * __pa()/__va() should be used only during mem init.
164 */ 164 */
165#ifdef CONFIG_64BIT 165static inline unsigned long ___pa(unsigned long x)
166#define __pa(x) \ 166{
167({ \ 167 if (config_enabled(CONFIG_64BIT)) {
168 unsigned long __x = (unsigned long)(x); \ 168 /*
169 __x < CKSEG0 ? XPHYSADDR(__x) : CPHYSADDR(__x); \ 169 * For MIPS64 the virtual address may either be in one of
170}) 170 * the compatibility segements ckseg0 or ckseg1, or it may
171#else 171 * be in xkphys.
172#define __pa(x) \ 172 */
173 ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET) 173 return x < CKSEG0 ? XPHYSADDR(x) : CPHYSADDR(x);
174#endif 174 }
175
176 if (!config_enabled(CONFIG_EVA)) {
177 /*
178 * We're using the standard MIPS32 legacy memory map, ie.
179 * the address x is going to be in kseg0 or kseg1. We can
180 * handle either case by masking out the desired bits using
181 * CPHYSADDR.
182 */
183 return CPHYSADDR(x);
184 }
185
186 /*
187 * EVA is in use so the memory map could be anything, making it not
188 * safe to just mask out bits.
189 */
190 return x - PAGE_OFFSET + PHYS_OFFSET;
191}
192#define __pa(x) ___pa((unsigned long)(x))
175#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET)) 193#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
176#include <asm/io.h> 194#include <asm/io.h>
177 195