diff options
| -rw-r--r-- | arch/arm/net/bpf_jit_32.c | 77 |
1 files changed, 0 insertions, 77 deletions
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c index b5030e1a41d8..82689b999257 100644 --- a/arch/arm/net/bpf_jit_32.c +++ b/arch/arm/net/bpf_jit_32.c | |||
| @@ -1452,83 +1452,6 @@ exit: | |||
| 1452 | emit(ARM_LDR_I(rn, ARM_SP, STACK_VAR(src_lo)), ctx); | 1452 | emit(ARM_LDR_I(rn, ARM_SP, STACK_VAR(src_lo)), ctx); |
| 1453 | emit_ldx_r(dst, rn, dstk, off, ctx, BPF_SIZE(code)); | 1453 | emit_ldx_r(dst, rn, dstk, off, ctx, BPF_SIZE(code)); |
| 1454 | break; | 1454 | break; |
| 1455 | /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + imm)) */ | ||
| 1456 | case BPF_LD | BPF_ABS | BPF_W: | ||
| 1457 | case BPF_LD | BPF_ABS | BPF_H: | ||
| 1458 | case BPF_LD | BPF_ABS | BPF_B: | ||
| 1459 | /* R0 = ntohx(*(size *)(((struct sk_buff *)R6)->data + src + imm)) */ | ||
| 1460 | case BPF_LD | BPF_IND | BPF_W: | ||
| 1461 | case BPF_LD | BPF_IND | BPF_H: | ||
| 1462 | case BPF_LD | BPF_IND | BPF_B: | ||
| 1463 | { | ||
| 1464 | const u8 r4 = bpf2a32[BPF_REG_6][1]; /* r4 = ptr to sk_buff */ | ||
| 1465 | const u8 r0 = bpf2a32[BPF_REG_0][1]; /*r0: struct sk_buff *skb*/ | ||
| 1466 | /* rtn value */ | ||
| 1467 | const u8 r1 = bpf2a32[BPF_REG_0][0]; /* r1: int k */ | ||
| 1468 | const u8 r2 = bpf2a32[BPF_REG_1][1]; /* r2: unsigned int size */ | ||
| 1469 | const u8 r3 = bpf2a32[BPF_REG_1][0]; /* r3: void *buffer */ | ||
| 1470 | const u8 r6 = bpf2a32[TMP_REG_1][1]; /* r6: void *(*func)(..) */ | ||
| 1471 | int size; | ||
| 1472 | |||
| 1473 | /* Setting up first argument */ | ||
| 1474 | emit(ARM_MOV_R(r0, r4), ctx); | ||
| 1475 | |||
| 1476 | /* Setting up second argument */ | ||
| 1477 | emit_a32_mov_i(r1, imm, false, ctx); | ||
| 1478 | if (BPF_MODE(code) == BPF_IND) | ||
| 1479 | emit_a32_alu_r(r1, src_lo, false, sstk, ctx, | ||
| 1480 | false, false, BPF_ADD); | ||
| 1481 | |||
| 1482 | /* Setting up third argument */ | ||
| 1483 | switch (BPF_SIZE(code)) { | ||
| 1484 | case BPF_W: | ||
| 1485 | size = 4; | ||
| 1486 | break; | ||
| 1487 | case BPF_H: | ||
| 1488 | size = 2; | ||
| 1489 | break; | ||
| 1490 | case BPF_B: | ||
| 1491 | size = 1; | ||
| 1492 | break; | ||
| 1493 | default: | ||
| 1494 | return -EINVAL; | ||
| 1495 | } | ||
| 1496 | emit_a32_mov_i(r2, size, false, ctx); | ||
| 1497 | |||
| 1498 | /* Setting up fourth argument */ | ||
| 1499 | emit(ARM_ADD_I(r3, ARM_SP, imm8m(SKB_BUFFER)), ctx); | ||
| 1500 | |||
| 1501 | /* Setting up function pointer to call */ | ||
| 1502 | emit_a32_mov_i(r6, (unsigned int)bpf_load_pointer, false, ctx); | ||
| 1503 | emit_blx_r(r6, ctx); | ||
| 1504 | |||
| 1505 | emit(ARM_EOR_R(r1, r1, r1), ctx); | ||
| 1506 | /* Check if return address is NULL or not. | ||
| 1507 | * if NULL then jump to epilogue | ||
| 1508 | * else continue to load the value from retn address | ||
| 1509 | */ | ||
| 1510 | emit(ARM_CMP_I(r0, 0), ctx); | ||
| 1511 | jmp_offset = epilogue_offset(ctx); | ||
| 1512 | check_imm24(jmp_offset); | ||
| 1513 | _emit(ARM_COND_EQ, ARM_B(jmp_offset), ctx); | ||
| 1514 | |||
| 1515 | /* Load value from the address */ | ||
| 1516 | switch (BPF_SIZE(code)) { | ||
| 1517 | case BPF_W: | ||
| 1518 | emit(ARM_LDR_I(r0, r0, 0), ctx); | ||
| 1519 | emit_rev32(r0, r0, ctx); | ||
| 1520 | break; | ||
| 1521 | case BPF_H: | ||
| 1522 | emit(ARM_LDRH_I(r0, r0, 0), ctx); | ||
| 1523 | emit_rev16(r0, r0, ctx); | ||
| 1524 | break; | ||
| 1525 | case BPF_B: | ||
| 1526 | emit(ARM_LDRB_I(r0, r0, 0), ctx); | ||
| 1527 | /* No need to reverse */ | ||
| 1528 | break; | ||
| 1529 | } | ||
| 1530 | break; | ||
| 1531 | } | ||
| 1532 | /* ST: *(size *)(dst + off) = imm */ | 1455 | /* ST: *(size *)(dst + off) = imm */ |
| 1533 | case BPF_ST | BPF_MEM | BPF_W: | 1456 | case BPF_ST | BPF_MEM | BPF_W: |
| 1534 | case BPF_ST | BPF_MEM | BPF_H: | 1457 | case BPF_ST | BPF_MEM | BPF_H: |
