3 files changed, 5 insertions, 4 deletions

diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
index 50a9a96720b9..aa8ea107524e 100644
--- a/drivers/gpu/drm/meson/meson_crtc.c
+++ b/drivers/gpu/drm/meson/meson_crtc.c
@@ -252,6 +252,8 @@ static void meson_g12a_crtc_enable_osd1(struct meson_drm *priv)
         writel_relaxed(priv->viu.osb_blend1_size,
                        priv->io_base +
                        _REG(VIU_OSD_BLEND_BLEND1_SIZE));
+        writel_bits_relaxed(3 << 8, 3 << 8,
+                            priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
 }
 
 static void meson_crtc_enable_vd1(struct meson_drm *priv)
diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
index b788280895c6..d90427b93a51 100644
--- a/drivers/gpu/drm/meson/meson_plane.c
+++ b/drivers/gpu/drm/meson/meson_plane.c
@@ -318,8 +318,8 @@ static void meson_plane_atomic_disable(struct drm_plane *plane,
 
         /* Disable OSD1 */
         if (meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu"))
-                writel_bits_relaxed(BIT(0) | BIT(21), 0,
-                        priv->io_base + _REG(VIU_OSD1_CTRL_STAT));
+                writel_bits_relaxed(3 << 8, 0,
+                                    priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
         else
                 writel_bits_relaxed(VPP_OSD1_POSTBLEND, 0,
                                     priv->io_base + _REG(VPP_MISC));
diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c
index 462c7cb3e1bd..4b2b3024d371 100644
--- a/drivers/gpu/drm/meson/meson_viu.c
+++ b/drivers/gpu/drm/meson/meson_viu.c
@@ -405,8 +405,7 @@ void meson_viu_init(struct meson_drm *priv)
                                 0 << 16 |
                                 1,
                                 priv->io_base + _REG(VIU_OSD_BLEND_CTRL));
-                writel_relaxed(3 << 8 |
-                                1 << 20,
+                writel_relaxed(1 << 20,
                                 priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));
                 writel_relaxed(1 << 20,
                                 priv->io_base + _REG(OSD2_BLEND_SRC_CTRL));