diff options
51 files changed, 298 insertions, 229 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c index f621ee115c98..5e771bc11b00 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c | |||
@@ -198,12 +198,16 @@ amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id) | |||
198 | result = idr_find(&fpriv->bo_list_handles, id); | 198 | result = idr_find(&fpriv->bo_list_handles, id); |
199 | 199 | ||
200 | if (result) { | 200 | if (result) { |
201 | if (kref_get_unless_zero(&result->refcount)) | 201 | if (kref_get_unless_zero(&result->refcount)) { |
202 | rcu_read_unlock(); | ||
202 | mutex_lock(&result->lock); | 203 | mutex_lock(&result->lock); |
203 | else | 204 | } else { |
205 | rcu_read_unlock(); | ||
204 | result = NULL; | 206 | result = NULL; |
207 | } | ||
208 | } else { | ||
209 | rcu_read_unlock(); | ||
205 | } | 210 | } |
206 | rcu_read_unlock(); | ||
207 | 211 | ||
208 | return result; | 212 | return result; |
209 | } | 213 | } |
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 3a0b69b09ed6..c9b9c88231aa 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | |||
@@ -1475,21 +1475,23 @@ static void gfx_v9_0_tiling_mode_table_init(struct amdgpu_device *adev) | |||
1475 | 1475 | ||
1476 | static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) | 1476 | static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) |
1477 | { | 1477 | { |
1478 | u32 data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); | 1478 | u32 data; |
1479 | 1479 | ||
1480 | if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) { | 1480 | if (instance == 0xffffffff) |
1481 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); | 1481 | data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_BROADCAST_WRITES, 1); |
1482 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); | 1482 | else |
1483 | } else if (se_num == 0xffffffff) { | 1483 | data = REG_SET_FIELD(0, GRBM_GFX_INDEX, INSTANCE_INDEX, instance); |
1484 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); | 1484 | |
1485 | if (se_num == 0xffffffff) | ||
1485 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); | 1486 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_BROADCAST_WRITES, 1); |
1486 | } else if (sh_num == 0xffffffff) { | 1487 | else |
1487 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); | ||
1488 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); | 1488 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); |
1489 | } else { | 1489 | |
1490 | if (sh_num == 0xffffffff) | ||
1491 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_BROADCAST_WRITES, 1); | ||
1492 | else | ||
1490 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); | 1493 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX, sh_num); |
1491 | data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); | 1494 | |
1492 | } | ||
1493 | WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); | 1495 | WREG32_SOC15(GC, 0, mmGRBM_GFX_INDEX, data); |
1494 | } | 1496 | } |
1495 | 1497 | ||
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index d6f097f44b6c..197174e562d2 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | |||
@@ -2128,15 +2128,9 @@ static int vega10_populate_avfs_parameters(struct pp_hwmgr *hwmgr) | |||
2128 | pp_table->AvfsGbCksOff.m2_shift = 12; | 2128 | pp_table->AvfsGbCksOff.m2_shift = 12; |
2129 | pp_table->AvfsGbCksOff.b_shift = 0; | 2129 | pp_table->AvfsGbCksOff.b_shift = 0; |
2130 | 2130 | ||
2131 | for (i = 0; i < dep_table->count; i++) { | 2131 | for (i = 0; i < dep_table->count; i++) |
2132 | if (dep_table->entries[i].sclk_offset == 0) | 2132 | pp_table->StaticVoltageOffsetVid[i] = |
2133 | pp_table->StaticVoltageOffsetVid[i] = 248; | 2133 | convert_to_vid((uint8_t)(dep_table->entries[i].sclk_offset)); |
2134 | else | ||
2135 | pp_table->StaticVoltageOffsetVid[i] = | ||
2136 | (uint8_t)(dep_table->entries[i].sclk_offset * | ||
2137 | VOLTAGE_VID_OFFSET_SCALE2 / | ||
2138 | VOLTAGE_VID_OFFSET_SCALE1); | ||
2139 | } | ||
2140 | 2134 | ||
2141 | if ((PPREGKEY_VEGA10QUADRATICEQUATION_DFLT != | 2135 | if ((PPREGKEY_VEGA10QUADRATICEQUATION_DFLT != |
2142 | data->disp_clk_quad_eqn_a) && | 2136 | data->disp_clk_quad_eqn_a) && |
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 213fb837e1c4..08af8d6b844b 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c | |||
@@ -544,7 +544,7 @@ void drm_dp_downstream_debug(struct seq_file *m, | |||
544 | DP_DETAILED_CAP_INFO_AVAILABLE; | 544 | DP_DETAILED_CAP_INFO_AVAILABLE; |
545 | int clk; | 545 | int clk; |
546 | int bpc; | 546 | int bpc; |
547 | char id[6]; | 547 | char id[7]; |
548 | int len; | 548 | int len; |
549 | uint8_t rev[2]; | 549 | uint8_t rev[2]; |
550 | int type = port_cap[0] & DP_DS_PORT_TYPE_MASK; | 550 | int type = port_cap[0] & DP_DS_PORT_TYPE_MASK; |
@@ -583,6 +583,7 @@ void drm_dp_downstream_debug(struct seq_file *m, | |||
583 | seq_puts(m, "\t\tType: N/A\n"); | 583 | seq_puts(m, "\t\tType: N/A\n"); |
584 | } | 584 | } |
585 | 585 | ||
586 | memset(id, 0, sizeof(id)); | ||
586 | drm_dp_downstream_id(aux, id); | 587 | drm_dp_downstream_id(aux, id); |
587 | seq_printf(m, "\t\tID: %s\n", id); | 588 | seq_printf(m, "\t\tID: %s\n", id); |
588 | 589 | ||
@@ -591,7 +592,7 @@ void drm_dp_downstream_debug(struct seq_file *m, | |||
591 | seq_printf(m, "\t\tHW: %d.%d\n", | 592 | seq_printf(m, "\t\tHW: %d.%d\n", |
592 | (rev[0] & 0xf0) >> 4, rev[0] & 0xf); | 593 | (rev[0] & 0xf0) >> 4, rev[0] & 0xf); |
593 | 594 | ||
594 | len = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, &rev, 2); | 595 | len = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, rev, 2); |
595 | if (len > 0) | 596 | if (len > 0) |
596 | seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]); | 597 | seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]); |
597 | 598 | ||
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig index 1d185347c64c..305dc3d4ff77 100644 --- a/drivers/gpu/drm/exynos/Kconfig +++ b/drivers/gpu/drm/exynos/Kconfig | |||
@@ -75,6 +75,7 @@ config DRM_EXYNOS_DP | |||
75 | config DRM_EXYNOS_HDMI | 75 | config DRM_EXYNOS_HDMI |
76 | bool "HDMI" | 76 | bool "HDMI" |
77 | depends on DRM_EXYNOS_MIXER || DRM_EXYNOS5433_DECON | 77 | depends on DRM_EXYNOS_MIXER || DRM_EXYNOS5433_DECON |
78 | select CEC_CORE if CEC_NOTIFIER | ||
78 | help | 79 | help |
79 | Choose this option if you want to use Exynos HDMI for DRM. | 80 | Choose this option if you want to use Exynos HDMI for DRM. |
80 | 81 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c index 35a8dfc93836..242bd50faa26 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.c +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c | |||
@@ -453,7 +453,6 @@ static int exynos_drm_platform_probe(struct platform_device *pdev) | |||
453 | struct component_match *match; | 453 | struct component_match *match; |
454 | 454 | ||
455 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | 455 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
456 | exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls); | ||
457 | 456 | ||
458 | match = exynos_drm_match_add(&pdev->dev); | 457 | match = exynos_drm_match_add(&pdev->dev); |
459 | if (IS_ERR(match)) | 458 | if (IS_ERR(match)) |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index a11b79596e2f..b6a46d9a016e 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c | |||
@@ -1651,8 +1651,6 @@ static int exynos_dsi_parse_dt(struct exynos_dsi *dsi) | |||
1651 | return ret; | 1651 | return ret; |
1652 | 1652 | ||
1653 | dsi->bridge_node = of_graph_get_remote_node(node, DSI_PORT_IN, 0); | 1653 | dsi->bridge_node = of_graph_get_remote_node(node, DSI_PORT_IN, 0); |
1654 | if (!dsi->bridge_node) | ||
1655 | return -EINVAL; | ||
1656 | 1654 | ||
1657 | return 0; | 1655 | return 0; |
1658 | } | 1656 | } |
@@ -1687,9 +1685,11 @@ static int exynos_dsi_bind(struct device *dev, struct device *master, | |||
1687 | return ret; | 1685 | return ret; |
1688 | } | 1686 | } |
1689 | 1687 | ||
1690 | bridge = of_drm_find_bridge(dsi->bridge_node); | 1688 | if (dsi->bridge_node) { |
1691 | if (bridge) | 1689 | bridge = of_drm_find_bridge(dsi->bridge_node); |
1692 | drm_bridge_attach(encoder, bridge, NULL); | 1690 | if (bridge) |
1691 | drm_bridge_attach(encoder, bridge, NULL); | ||
1692 | } | ||
1693 | 1693 | ||
1694 | return mipi_dsi_host_register(&dsi->dsi_host); | 1694 | return mipi_dsi_host_register(&dsi->dsi_host); |
1695 | } | 1695 | } |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_mic.c b/drivers/gpu/drm/exynos/exynos_drm_mic.c index e45720543a45..16bbee897e0d 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_mic.c +++ b/drivers/gpu/drm/exynos/exynos_drm_mic.c | |||
@@ -340,16 +340,10 @@ static int exynos_mic_bind(struct device *dev, struct device *master, | |||
340 | void *data) | 340 | void *data) |
341 | { | 341 | { |
342 | struct exynos_mic *mic = dev_get_drvdata(dev); | 342 | struct exynos_mic *mic = dev_get_drvdata(dev); |
343 | int ret; | ||
344 | 343 | ||
345 | mic->bridge.funcs = &mic_bridge_funcs; | ||
346 | mic->bridge.of_node = dev->of_node; | ||
347 | mic->bridge.driver_private = mic; | 344 | mic->bridge.driver_private = mic; |
348 | ret = drm_bridge_add(&mic->bridge); | ||
349 | if (ret) | ||
350 | DRM_ERROR("mic: Failed to add MIC to the global bridge list\n"); | ||
351 | 345 | ||
352 | return ret; | 346 | return 0; |
353 | } | 347 | } |
354 | 348 | ||
355 | static void exynos_mic_unbind(struct device *dev, struct device *master, | 349 | static void exynos_mic_unbind(struct device *dev, struct device *master, |
@@ -365,8 +359,6 @@ static void exynos_mic_unbind(struct device *dev, struct device *master, | |||
365 | 359 | ||
366 | already_disabled: | 360 | already_disabled: |
367 | mutex_unlock(&mic_mutex); | 361 | mutex_unlock(&mic_mutex); |
368 | |||
369 | drm_bridge_remove(&mic->bridge); | ||
370 | } | 362 | } |
371 | 363 | ||
372 | static const struct component_ops exynos_mic_component_ops = { | 364 | static const struct component_ops exynos_mic_component_ops = { |
@@ -461,6 +453,15 @@ static int exynos_mic_probe(struct platform_device *pdev) | |||
461 | 453 | ||
462 | platform_set_drvdata(pdev, mic); | 454 | platform_set_drvdata(pdev, mic); |
463 | 455 | ||
456 | mic->bridge.funcs = &mic_bridge_funcs; | ||
457 | mic->bridge.of_node = dev->of_node; | ||
458 | |||
459 | ret = drm_bridge_add(&mic->bridge); | ||
460 | if (ret) { | ||
461 | DRM_ERROR("mic: Failed to add MIC to the global bridge list\n"); | ||
462 | return ret; | ||
463 | } | ||
464 | |||
464 | pm_runtime_enable(dev); | 465 | pm_runtime_enable(dev); |
465 | 466 | ||
466 | ret = component_add(dev, &exynos_mic_component_ops); | 467 | ret = component_add(dev, &exynos_mic_component_ops); |
@@ -479,8 +480,13 @@ err: | |||
479 | 480 | ||
480 | static int exynos_mic_remove(struct platform_device *pdev) | 481 | static int exynos_mic_remove(struct platform_device *pdev) |
481 | { | 482 | { |
483 | struct exynos_mic *mic = platform_get_drvdata(pdev); | ||
484 | |||
482 | component_del(&pdev->dev, &exynos_mic_component_ops); | 485 | component_del(&pdev->dev, &exynos_mic_component_ops); |
483 | pm_runtime_disable(&pdev->dev); | 486 | pm_runtime_disable(&pdev->dev); |
487 | |||
488 | drm_bridge_remove(&mic->bridge); | ||
489 | |||
484 | return 0; | 490 | return 0; |
485 | } | 491 | } |
486 | 492 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c index 06bfbe400cf1..d3b69d66736f 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmi.c +++ b/drivers/gpu/drm/exynos/exynos_hdmi.c | |||
@@ -1501,8 +1501,6 @@ static void hdmi_disable(struct drm_encoder *encoder) | |||
1501 | */ | 1501 | */ |
1502 | cancel_delayed_work(&hdata->hotplug_work); | 1502 | cancel_delayed_work(&hdata->hotplug_work); |
1503 | cec_notifier_set_phys_addr(hdata->notifier, CEC_PHYS_ADDR_INVALID); | 1503 | cec_notifier_set_phys_addr(hdata->notifier, CEC_PHYS_ADDR_INVALID); |
1504 | |||
1505 | hdmiphy_disable(hdata); | ||
1506 | } | 1504 | } |
1507 | 1505 | ||
1508 | static const struct drm_encoder_helper_funcs exynos_hdmi_encoder_helper_funcs = { | 1506 | static const struct drm_encoder_helper_funcs exynos_hdmi_encoder_helper_funcs = { |
@@ -1676,7 +1674,7 @@ static int hdmi_resources_init(struct hdmi_context *hdata) | |||
1676 | return hdmi_bridge_init(hdata); | 1674 | return hdmi_bridge_init(hdata); |
1677 | } | 1675 | } |
1678 | 1676 | ||
1679 | static struct of_device_id hdmi_match_types[] = { | 1677 | static const struct of_device_id hdmi_match_types[] = { |
1680 | { | 1678 | { |
1681 | .compatible = "samsung,exynos4210-hdmi", | 1679 | .compatible = "samsung,exynos4210-hdmi", |
1682 | .data = &exynos4210_hdmi_driver_data, | 1680 | .data = &exynos4210_hdmi_driver_data, |
@@ -1934,8 +1932,7 @@ static int hdmi_remove(struct platform_device *pdev) | |||
1934 | return 0; | 1932 | return 0; |
1935 | } | 1933 | } |
1936 | 1934 | ||
1937 | #ifdef CONFIG_PM | 1935 | static int __maybe_unused exynos_hdmi_suspend(struct device *dev) |
1938 | static int exynos_hdmi_suspend(struct device *dev) | ||
1939 | { | 1936 | { |
1940 | struct hdmi_context *hdata = dev_get_drvdata(dev); | 1937 | struct hdmi_context *hdata = dev_get_drvdata(dev); |
1941 | 1938 | ||
@@ -1944,7 +1941,7 @@ static int exynos_hdmi_suspend(struct device *dev) | |||
1944 | return 0; | 1941 | return 0; |
1945 | } | 1942 | } |
1946 | 1943 | ||
1947 | static int exynos_hdmi_resume(struct device *dev) | 1944 | static int __maybe_unused exynos_hdmi_resume(struct device *dev) |
1948 | { | 1945 | { |
1949 | struct hdmi_context *hdata = dev_get_drvdata(dev); | 1946 | struct hdmi_context *hdata = dev_get_drvdata(dev); |
1950 | int ret; | 1947 | int ret; |
@@ -1955,7 +1952,6 @@ static int exynos_hdmi_resume(struct device *dev) | |||
1955 | 1952 | ||
1956 | return 0; | 1953 | return 0; |
1957 | } | 1954 | } |
1958 | #endif | ||
1959 | 1955 | ||
1960 | static const struct dev_pm_ops exynos_hdmi_pm_ops = { | 1956 | static const struct dev_pm_ops exynos_hdmi_pm_ops = { |
1961 | SET_RUNTIME_PM_OPS(exynos_hdmi_suspend, exynos_hdmi_resume, NULL) | 1957 | SET_RUNTIME_PM_OPS(exynos_hdmi_suspend, exynos_hdmi_resume, NULL) |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 6bed4f3ffcd6..a998a8dd783c 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -1094,28 +1094,28 @@ static const struct exynos_drm_crtc_ops mixer_crtc_ops = { | |||
1094 | .atomic_check = mixer_atomic_check, | 1094 | .atomic_check = mixer_atomic_check, |
1095 | }; | 1095 | }; |
1096 | 1096 | ||
1097 | static struct mixer_drv_data exynos5420_mxr_drv_data = { | 1097 | static const struct mixer_drv_data exynos5420_mxr_drv_data = { |
1098 | .version = MXR_VER_128_0_0_184, | 1098 | .version = MXR_VER_128_0_0_184, |
1099 | .is_vp_enabled = 0, | 1099 | .is_vp_enabled = 0, |
1100 | }; | 1100 | }; |
1101 | 1101 | ||
1102 | static struct mixer_drv_data exynos5250_mxr_drv_data = { | 1102 | static const struct mixer_drv_data exynos5250_mxr_drv_data = { |
1103 | .version = MXR_VER_16_0_33_0, | 1103 | .version = MXR_VER_16_0_33_0, |
1104 | .is_vp_enabled = 0, | 1104 | .is_vp_enabled = 0, |
1105 | }; | 1105 | }; |
1106 | 1106 | ||
1107 | static struct mixer_drv_data exynos4212_mxr_drv_data = { | 1107 | static const struct mixer_drv_data exynos4212_mxr_drv_data = { |
1108 | .version = MXR_VER_0_0_0_16, | 1108 | .version = MXR_VER_0_0_0_16, |
1109 | .is_vp_enabled = 1, | 1109 | .is_vp_enabled = 1, |
1110 | }; | 1110 | }; |
1111 | 1111 | ||
1112 | static struct mixer_drv_data exynos4210_mxr_drv_data = { | 1112 | static const struct mixer_drv_data exynos4210_mxr_drv_data = { |
1113 | .version = MXR_VER_0_0_0_16, | 1113 | .version = MXR_VER_0_0_0_16, |
1114 | .is_vp_enabled = 1, | 1114 | .is_vp_enabled = 1, |
1115 | .has_sclk = 1, | 1115 | .has_sclk = 1, |
1116 | }; | 1116 | }; |
1117 | 1117 | ||
1118 | static struct of_device_id mixer_match_types[] = { | 1118 | static const struct of_device_id mixer_match_types[] = { |
1119 | { | 1119 | { |
1120 | .compatible = "samsung,exynos4210-mixer", | 1120 | .compatible = "samsung,exynos4210-mixer", |
1121 | .data = &exynos4210_mxr_drv_data, | 1121 | .data = &exynos4210_mxr_drv_data, |
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c index 2deb05f618fb..7cb0818a13de 100644 --- a/drivers/gpu/drm/i915/gvt/display.c +++ b/drivers/gpu/drm/i915/gvt/display.c | |||
@@ -323,27 +323,27 @@ void intel_gvt_check_vblank_emulation(struct intel_gvt *gvt) | |||
323 | { | 323 | { |
324 | struct intel_gvt_irq *irq = &gvt->irq; | 324 | struct intel_gvt_irq *irq = &gvt->irq; |
325 | struct intel_vgpu *vgpu; | 325 | struct intel_vgpu *vgpu; |
326 | bool have_enabled_pipe = false; | ||
327 | int pipe, id; | 326 | int pipe, id; |
328 | 327 | ||
329 | if (WARN_ON(!mutex_is_locked(&gvt->lock))) | 328 | if (WARN_ON(!mutex_is_locked(&gvt->lock))) |
330 | return; | 329 | return; |
331 | 330 | ||
332 | hrtimer_cancel(&irq->vblank_timer.timer); | ||
333 | |||
334 | for_each_active_vgpu(gvt, vgpu, id) { | 331 | for_each_active_vgpu(gvt, vgpu, id) { |
335 | for (pipe = 0; pipe < I915_MAX_PIPES; pipe++) { | 332 | for (pipe = 0; pipe < I915_MAX_PIPES; pipe++) { |
336 | have_enabled_pipe = | 333 | if (pipe_is_enabled(vgpu, pipe)) |
337 | pipe_is_enabled(vgpu, pipe); | 334 | goto out; |
338 | if (have_enabled_pipe) | ||
339 | break; | ||
340 | } | 335 | } |
341 | } | 336 | } |
342 | 337 | ||
343 | if (have_enabled_pipe) | 338 | /* all the pipes are disabled */ |
344 | hrtimer_start(&irq->vblank_timer.timer, | 339 | hrtimer_cancel(&irq->vblank_timer.timer); |
345 | ktime_add_ns(ktime_get(), irq->vblank_timer.period), | 340 | return; |
346 | HRTIMER_MODE_ABS); | 341 | |
342 | out: | ||
343 | hrtimer_start(&irq->vblank_timer.timer, | ||
344 | ktime_add_ns(ktime_get(), irq->vblank_timer.period), | ||
345 | HRTIMER_MODE_ABS); | ||
346 | |||
347 | } | 347 | } |
348 | 348 | ||
349 | static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe) | 349 | static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe) |
diff --git a/drivers/gpu/drm/i915/i915_gem_clflush.c b/drivers/gpu/drm/i915/i915_gem_clflush.c index 152f16c11878..348b29a845c9 100644 --- a/drivers/gpu/drm/i915/i915_gem_clflush.c +++ b/drivers/gpu/drm/i915/i915_gem_clflush.c | |||
@@ -114,7 +114,7 @@ i915_clflush_notify(struct i915_sw_fence *fence, | |||
114 | return NOTIFY_DONE; | 114 | return NOTIFY_DONE; |
115 | } | 115 | } |
116 | 116 | ||
117 | void i915_gem_clflush_object(struct drm_i915_gem_object *obj, | 117 | bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, |
118 | unsigned int flags) | 118 | unsigned int flags) |
119 | { | 119 | { |
120 | struct clflush *clflush; | 120 | struct clflush *clflush; |
@@ -128,7 +128,7 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj, | |||
128 | */ | 128 | */ |
129 | if (!i915_gem_object_has_struct_page(obj)) { | 129 | if (!i915_gem_object_has_struct_page(obj)) { |
130 | obj->cache_dirty = false; | 130 | obj->cache_dirty = false; |
131 | return; | 131 | return false; |
132 | } | 132 | } |
133 | 133 | ||
134 | /* If the GPU is snooping the contents of the CPU cache, | 134 | /* If the GPU is snooping the contents of the CPU cache, |
@@ -140,7 +140,7 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj, | |||
140 | * tracking. | 140 | * tracking. |
141 | */ | 141 | */ |
142 | if (!(flags & I915_CLFLUSH_FORCE) && obj->cache_coherent) | 142 | if (!(flags & I915_CLFLUSH_FORCE) && obj->cache_coherent) |
143 | return; | 143 | return false; |
144 | 144 | ||
145 | trace_i915_gem_object_clflush(obj); | 145 | trace_i915_gem_object_clflush(obj); |
146 | 146 | ||
@@ -179,4 +179,5 @@ void i915_gem_clflush_object(struct drm_i915_gem_object *obj, | |||
179 | } | 179 | } |
180 | 180 | ||
181 | obj->cache_dirty = false; | 181 | obj->cache_dirty = false; |
182 | return true; | ||
182 | } | 183 | } |
diff --git a/drivers/gpu/drm/i915/i915_gem_clflush.h b/drivers/gpu/drm/i915/i915_gem_clflush.h index 2455a7820937..f390247561b3 100644 --- a/drivers/gpu/drm/i915/i915_gem_clflush.h +++ b/drivers/gpu/drm/i915/i915_gem_clflush.h | |||
@@ -28,7 +28,7 @@ | |||
28 | struct drm_i915_private; | 28 | struct drm_i915_private; |
29 | struct drm_i915_gem_object; | 29 | struct drm_i915_gem_object; |
30 | 30 | ||
31 | void i915_gem_clflush_object(struct drm_i915_gem_object *obj, | 31 | bool i915_gem_clflush_object(struct drm_i915_gem_object *obj, |
32 | unsigned int flags); | 32 | unsigned int flags); |
33 | #define I915_CLFLUSH_FORCE BIT(0) | 33 | #define I915_CLFLUSH_FORCE BIT(0) |
34 | #define I915_CLFLUSH_SYNC BIT(1) | 34 | #define I915_CLFLUSH_SYNC BIT(1) |
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 054b2e54cdaf..e9503f6d1100 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
@@ -560,9 +560,6 @@ static int eb_reserve_vma(const struct i915_execbuffer *eb, | |||
560 | eb->args->flags |= __EXEC_HAS_RELOC; | 560 | eb->args->flags |= __EXEC_HAS_RELOC; |
561 | } | 561 | } |
562 | 562 | ||
563 | entry->flags |= __EXEC_OBJECT_HAS_PIN; | ||
564 | GEM_BUG_ON(eb_vma_misplaced(entry, vma)); | ||
565 | |||
566 | if (unlikely(entry->flags & EXEC_OBJECT_NEEDS_FENCE)) { | 563 | if (unlikely(entry->flags & EXEC_OBJECT_NEEDS_FENCE)) { |
567 | err = i915_vma_get_fence(vma); | 564 | err = i915_vma_get_fence(vma); |
568 | if (unlikely(err)) { | 565 | if (unlikely(err)) { |
@@ -574,6 +571,9 @@ static int eb_reserve_vma(const struct i915_execbuffer *eb, | |||
574 | entry->flags |= __EXEC_OBJECT_HAS_FENCE; | 571 | entry->flags |= __EXEC_OBJECT_HAS_FENCE; |
575 | } | 572 | } |
576 | 573 | ||
574 | entry->flags |= __EXEC_OBJECT_HAS_PIN; | ||
575 | GEM_BUG_ON(eb_vma_misplaced(entry, vma)); | ||
576 | |||
577 | return 0; | 577 | return 0; |
578 | } | 578 | } |
579 | 579 | ||
@@ -1458,7 +1458,7 @@ static int eb_relocate_vma(struct i915_execbuffer *eb, struct i915_vma *vma) | |||
1458 | * to read. However, if the array is not writable the user loses | 1458 | * to read. However, if the array is not writable the user loses |
1459 | * the updated relocation values. | 1459 | * the updated relocation values. |
1460 | */ | 1460 | */ |
1461 | if (unlikely(!access_ok(VERIFY_READ, urelocs, remain*sizeof(urelocs)))) | 1461 | if (unlikely(!access_ok(VERIFY_READ, urelocs, remain*sizeof(*urelocs)))) |
1462 | return -EFAULT; | 1462 | return -EFAULT; |
1463 | 1463 | ||
1464 | do { | 1464 | do { |
@@ -1775,7 +1775,7 @@ out: | |||
1775 | } | 1775 | } |
1776 | } | 1776 | } |
1777 | 1777 | ||
1778 | return err ?: have_copy; | 1778 | return err; |
1779 | } | 1779 | } |
1780 | 1780 | ||
1781 | static int eb_relocate(struct i915_execbuffer *eb) | 1781 | static int eb_relocate(struct i915_execbuffer *eb) |
@@ -1825,7 +1825,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb) | |||
1825 | int err; | 1825 | int err; |
1826 | 1826 | ||
1827 | for (i = 0; i < count; i++) { | 1827 | for (i = 0; i < count; i++) { |
1828 | const struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; | 1828 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; |
1829 | struct i915_vma *vma = exec_to_vma(entry); | 1829 | struct i915_vma *vma = exec_to_vma(entry); |
1830 | struct drm_i915_gem_object *obj = vma->obj; | 1830 | struct drm_i915_gem_object *obj = vma->obj; |
1831 | 1831 | ||
@@ -1841,12 +1841,14 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb) | |||
1841 | eb->request->capture_list = capture; | 1841 | eb->request->capture_list = capture; |
1842 | } | 1842 | } |
1843 | 1843 | ||
1844 | if (unlikely(obj->cache_dirty && !obj->cache_coherent)) { | ||
1845 | if (i915_gem_clflush_object(obj, 0)) | ||
1846 | entry->flags &= ~EXEC_OBJECT_ASYNC; | ||
1847 | } | ||
1848 | |||
1844 | if (entry->flags & EXEC_OBJECT_ASYNC) | 1849 | if (entry->flags & EXEC_OBJECT_ASYNC) |
1845 | goto skip_flushes; | 1850 | goto skip_flushes; |
1846 | 1851 | ||
1847 | if (unlikely(obj->cache_dirty && !obj->cache_coherent)) | ||
1848 | i915_gem_clflush_object(obj, 0); | ||
1849 | |||
1850 | err = i915_gem_request_await_object | 1852 | err = i915_gem_request_await_object |
1851 | (eb->request, obj, entry->flags & EXEC_OBJECT_WRITE); | 1853 | (eb->request, obj, entry->flags & EXEC_OBJECT_WRITE); |
1852 | if (err) | 1854 | if (err) |
@@ -2209,7 +2211,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, | |||
2209 | goto err_unlock; | 2211 | goto err_unlock; |
2210 | 2212 | ||
2211 | err = eb_relocate(&eb); | 2213 | err = eb_relocate(&eb); |
2212 | if (err) | 2214 | if (err) { |
2213 | /* | 2215 | /* |
2214 | * If the user expects the execobject.offset and | 2216 | * If the user expects the execobject.offset and |
2215 | * reloc.presumed_offset to be an exact match, | 2217 | * reloc.presumed_offset to be an exact match, |
@@ -2218,8 +2220,8 @@ i915_gem_do_execbuffer(struct drm_device *dev, | |||
2218 | * relocation. | 2220 | * relocation. |
2219 | */ | 2221 | */ |
2220 | args->flags &= ~__EXEC_HAS_RELOC; | 2222 | args->flags &= ~__EXEC_HAS_RELOC; |
2221 | if (err < 0) | ||
2222 | goto err_vma; | 2223 | goto err_vma; |
2224 | } | ||
2223 | 2225 | ||
2224 | if (unlikely(eb.batch->exec_entry->flags & EXEC_OBJECT_WRITE)) { | 2226 | if (unlikely(eb.batch->exec_entry->flags & EXEC_OBJECT_WRITE)) { |
2225 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); | 2227 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); |
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h index 4a673fc1a432..20cf272c97b1 100644 --- a/drivers/gpu/drm/i915/i915_vma.h +++ b/drivers/gpu/drm/i915/i915_vma.h | |||
@@ -284,12 +284,12 @@ static inline void __i915_vma_pin(struct i915_vma *vma) | |||
284 | 284 | ||
285 | static inline void __i915_vma_unpin(struct i915_vma *vma) | 285 | static inline void __i915_vma_unpin(struct i915_vma *vma) |
286 | { | 286 | { |
287 | GEM_BUG_ON(!i915_vma_is_pinned(vma)); | ||
288 | vma->flags--; | 287 | vma->flags--; |
289 | } | 288 | } |
290 | 289 | ||
291 | static inline void i915_vma_unpin(struct i915_vma *vma) | 290 | static inline void i915_vma_unpin(struct i915_vma *vma) |
292 | { | 291 | { |
292 | GEM_BUG_ON(!i915_vma_is_pinned(vma)); | ||
293 | GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); | 293 | GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); |
294 | __i915_vma_unpin(vma); | 294 | __i915_vma_unpin(vma); |
295 | } | 295 | } |
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 80e96f1f49d2..9edeaaef77ad 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c | |||
@@ -1896,8 +1896,8 @@ static void cnl_ddi_vswing_sequence(struct intel_encoder *encoder, u32 level) | |||
1896 | val = I915_READ(CNL_PORT_TX_DW4_LN(port, ln)); | 1896 | val = I915_READ(CNL_PORT_TX_DW4_LN(port, ln)); |
1897 | val &= ~LOADGEN_SELECT; | 1897 | val &= ~LOADGEN_SELECT; |
1898 | 1898 | ||
1899 | if (((rate < 600000) && (width == 4) && (ln >= 1)) || | 1899 | if ((rate <= 600000 && width == 4 && ln >= 1) || |
1900 | ((rate < 600000) && (width < 4) && ((ln == 1) || (ln == 2)))) { | 1900 | (rate <= 600000 && width < 4 && (ln == 1 || ln == 2))) { |
1901 | val |= LOADGEN_SELECT; | 1901 | val |= LOADGEN_SELECT; |
1902 | } | 1902 | } |
1903 | I915_WRITE(CNL_PORT_TX_DW4_LN(port, ln), val); | 1903 | I915_WRITE(CNL_PORT_TX_DW4_LN(port, ln), val); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index dec9e58545a1..9471c88d449e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3427,26 +3427,6 @@ static void intel_complete_page_flips(struct drm_i915_private *dev_priv) | |||
3427 | intel_finish_page_flip_cs(dev_priv, crtc->pipe); | 3427 | intel_finish_page_flip_cs(dev_priv, crtc->pipe); |
3428 | } | 3428 | } |
3429 | 3429 | ||
3430 | static void intel_update_primary_planes(struct drm_device *dev) | ||
3431 | { | ||
3432 | struct drm_crtc *crtc; | ||
3433 | |||
3434 | for_each_crtc(dev, crtc) { | ||
3435 | struct intel_plane *plane = to_intel_plane(crtc->primary); | ||
3436 | struct intel_plane_state *plane_state = | ||
3437 | to_intel_plane_state(plane->base.state); | ||
3438 | |||
3439 | if (plane_state->base.visible) { | ||
3440 | trace_intel_update_plane(&plane->base, | ||
3441 | to_intel_crtc(crtc)); | ||
3442 | |||
3443 | plane->update_plane(plane, | ||
3444 | to_intel_crtc_state(crtc->state), | ||
3445 | plane_state); | ||
3446 | } | ||
3447 | } | ||
3448 | } | ||
3449 | |||
3450 | static int | 3430 | static int |
3451 | __intel_display_resume(struct drm_device *dev, | 3431 | __intel_display_resume(struct drm_device *dev, |
3452 | struct drm_atomic_state *state, | 3432 | struct drm_atomic_state *state, |
@@ -3499,6 +3479,12 @@ void intel_prepare_reset(struct drm_i915_private *dev_priv) | |||
3499 | struct drm_atomic_state *state; | 3479 | struct drm_atomic_state *state; |
3500 | int ret; | 3480 | int ret; |
3501 | 3481 | ||
3482 | |||
3483 | /* reset doesn't touch the display */ | ||
3484 | if (!i915.force_reset_modeset_test && | ||
3485 | !gpu_reset_clobbers_display(dev_priv)) | ||
3486 | return; | ||
3487 | |||
3502 | /* | 3488 | /* |
3503 | * Need mode_config.mutex so that we don't | 3489 | * Need mode_config.mutex so that we don't |
3504 | * trample ongoing ->detect() and whatnot. | 3490 | * trample ongoing ->detect() and whatnot. |
@@ -3512,12 +3498,6 @@ void intel_prepare_reset(struct drm_i915_private *dev_priv) | |||
3512 | 3498 | ||
3513 | drm_modeset_backoff(ctx); | 3499 | drm_modeset_backoff(ctx); |
3514 | } | 3500 | } |
3515 | |||
3516 | /* reset doesn't touch the display, but flips might get nuked anyway, */ | ||
3517 | if (!i915.force_reset_modeset_test && | ||
3518 | !gpu_reset_clobbers_display(dev_priv)) | ||
3519 | return; | ||
3520 | |||
3521 | /* | 3501 | /* |
3522 | * Disabling the crtcs gracefully seems nicer. Also the | 3502 | * Disabling the crtcs gracefully seems nicer. Also the |
3523 | * g33 docs say we should at least disable all the planes. | 3503 | * g33 docs say we should at least disable all the planes. |
@@ -3547,6 +3527,14 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) | |||
3547 | struct drm_atomic_state *state = dev_priv->modeset_restore_state; | 3527 | struct drm_atomic_state *state = dev_priv->modeset_restore_state; |
3548 | int ret; | 3528 | int ret; |
3549 | 3529 | ||
3530 | /* reset doesn't touch the display */ | ||
3531 | if (!i915.force_reset_modeset_test && | ||
3532 | !gpu_reset_clobbers_display(dev_priv)) | ||
3533 | return; | ||
3534 | |||
3535 | if (!state) | ||
3536 | goto unlock; | ||
3537 | |||
3550 | /* | 3538 | /* |
3551 | * Flips in the rings will be nuked by the reset, | 3539 | * Flips in the rings will be nuked by the reset, |
3552 | * so complete all pending flips so that user space | 3540 | * so complete all pending flips so that user space |
@@ -3558,22 +3546,10 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) | |||
3558 | 3546 | ||
3559 | /* reset doesn't touch the display */ | 3547 | /* reset doesn't touch the display */ |
3560 | if (!gpu_reset_clobbers_display(dev_priv)) { | 3548 | if (!gpu_reset_clobbers_display(dev_priv)) { |
3561 | if (!state) { | 3549 | /* for testing only restore the display */ |
3562 | /* | 3550 | ret = __intel_display_resume(dev, state, ctx); |
3563 | * Flips in the rings have been nuked by the reset, | ||
3564 | * so update the base address of all primary | ||
3565 | * planes to the the last fb to make sure we're | ||
3566 | * showing the correct fb after a reset. | ||
3567 | * | ||
3568 | * FIXME: Atomic will make this obsolete since we won't schedule | ||
3569 | * CS-based flips (which might get lost in gpu resets) any more. | ||
3570 | */ | ||
3571 | intel_update_primary_planes(dev); | ||
3572 | } else { | ||
3573 | ret = __intel_display_resume(dev, state, ctx); | ||
3574 | if (ret) | 3551 | if (ret) |
3575 | DRM_ERROR("Restoring old state failed with %i\n", ret); | 3552 | DRM_ERROR("Restoring old state failed with %i\n", ret); |
3576 | } | ||
3577 | } else { | 3553 | } else { |
3578 | /* | 3554 | /* |
3579 | * The display has been reset as well, | 3555 | * The display has been reset as well, |
@@ -3597,8 +3573,8 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) | |||
3597 | intel_hpd_init(dev_priv); | 3573 | intel_hpd_init(dev_priv); |
3598 | } | 3574 | } |
3599 | 3575 | ||
3600 | if (state) | 3576 | drm_atomic_state_put(state); |
3601 | drm_atomic_state_put(state); | 3577 | unlock: |
3602 | drm_modeset_drop_locks(ctx); | 3578 | drm_modeset_drop_locks(ctx); |
3603 | drm_modeset_acquire_fini(ctx); | 3579 | drm_modeset_acquire_fini(ctx); |
3604 | mutex_unlock(&dev->mode_config.mutex); | 3580 | mutex_unlock(&dev->mode_config.mutex); |
@@ -9117,6 +9093,13 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, | |||
9117 | u64 power_domain_mask; | 9093 | u64 power_domain_mask; |
9118 | bool active; | 9094 | bool active; |
9119 | 9095 | ||
9096 | if (INTEL_GEN(dev_priv) >= 9) { | ||
9097 | intel_crtc_init_scalers(crtc, pipe_config); | ||
9098 | |||
9099 | pipe_config->scaler_state.scaler_id = -1; | ||
9100 | pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX); | ||
9101 | } | ||
9102 | |||
9120 | power_domain = POWER_DOMAIN_PIPE(crtc->pipe); | 9103 | power_domain = POWER_DOMAIN_PIPE(crtc->pipe); |
9121 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) | 9104 | if (!intel_display_power_get_if_enabled(dev_priv, power_domain)) |
9122 | return false; | 9105 | return false; |
@@ -9145,13 +9128,6 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc, | |||
9145 | pipe_config->gamma_mode = | 9128 | pipe_config->gamma_mode = |
9146 | I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK; | 9129 | I915_READ(GAMMA_MODE(crtc->pipe)) & GAMMA_MODE_MODE_MASK; |
9147 | 9130 | ||
9148 | if (INTEL_GEN(dev_priv) >= 9) { | ||
9149 | intel_crtc_init_scalers(crtc, pipe_config); | ||
9150 | |||
9151 | pipe_config->scaler_state.scaler_id = -1; | ||
9152 | pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX); | ||
9153 | } | ||
9154 | |||
9155 | power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe); | 9131 | power_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe); |
9156 | if (intel_display_power_get_if_enabled(dev_priv, power_domain)) { | 9132 | if (intel_display_power_get_if_enabled(dev_priv, power_domain)) { |
9157 | power_domain_mask |= BIT_ULL(power_domain); | 9133 | power_domain_mask |= BIT_ULL(power_domain); |
@@ -9540,7 +9516,16 @@ static void i9xx_update_cursor(struct intel_plane *plane, | |||
9540 | * On some platforms writing CURCNTR first will also | 9516 | * On some platforms writing CURCNTR first will also |
9541 | * cause CURPOS to be armed by the CURBASE write. | 9517 | * cause CURPOS to be armed by the CURBASE write. |
9542 | * Without the CURCNTR write the CURPOS write would | 9518 | * Without the CURCNTR write the CURPOS write would |
9543 | * arm itself. | 9519 | * arm itself. Thus we always start the full update |
9520 | * with a CURCNTR write. | ||
9521 | * | ||
9522 | * On other platforms CURPOS always requires the | ||
9523 | * CURBASE write to arm the update. Additonally | ||
9524 | * a write to any of the cursor register will cancel | ||
9525 | * an already armed cursor update. Thus leaving out | ||
9526 | * the CURBASE write after CURPOS could lead to a | ||
9527 | * cursor that doesn't appear to move, or even change | ||
9528 | * shape. Thus we always write CURBASE. | ||
9544 | * | 9529 | * |
9545 | * CURCNTR and CUR_FBC_CTL are always | 9530 | * CURCNTR and CUR_FBC_CTL are always |
9546 | * armed by the CURBASE write only. | 9531 | * armed by the CURBASE write only. |
@@ -9559,6 +9544,7 @@ static void i9xx_update_cursor(struct intel_plane *plane, | |||
9559 | plane->cursor.cntl = cntl; | 9544 | plane->cursor.cntl = cntl; |
9560 | } else { | 9545 | } else { |
9561 | I915_WRITE_FW(CURPOS(pipe), pos); | 9546 | I915_WRITE_FW(CURPOS(pipe), pos); |
9547 | I915_WRITE_FW(CURBASE(pipe), base); | ||
9562 | } | 9548 | } |
9563 | 9549 | ||
9564 | POSTING_READ_FW(CURBASE(pipe)); | 9550 | POSTING_READ_FW(CURBASE(pipe)); |
diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c index 52d5b82790d9..c17ed0e62b67 100644 --- a/drivers/gpu/drm/i915/intel_gvt.c +++ b/drivers/gpu/drm/i915/intel_gvt.c | |||
@@ -45,7 +45,7 @@ static bool is_supported_device(struct drm_i915_private *dev_priv) | |||
45 | return true; | 45 | return true; |
46 | if (IS_SKYLAKE(dev_priv)) | 46 | if (IS_SKYLAKE(dev_priv)) |
47 | return true; | 47 | return true; |
48 | if (IS_KABYLAKE(dev_priv) && INTEL_DEVID(dev_priv) == 0x591D) | 48 | if (IS_KABYLAKE(dev_priv)) |
49 | return true; | 49 | return true; |
50 | return false; | 50 | return false; |
51 | } | 51 | } |
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 48ea0fca1f72..40b224b44d1b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -4463,8 +4463,8 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, | |||
4463 | if ((cpp * cstate->base.adjusted_mode.crtc_htotal / 512 < 1) && | 4463 | if ((cpp * cstate->base.adjusted_mode.crtc_htotal / 512 < 1) && |
4464 | (plane_bytes_per_line / 512 < 1)) | 4464 | (plane_bytes_per_line / 512 < 1)) |
4465 | selected_result = method2; | 4465 | selected_result = method2; |
4466 | else if ((ddb_allocation && ddb_allocation / | 4466 | else if (ddb_allocation >= |
4467 | fixed_16_16_to_u32_round_up(plane_blocks_per_line)) >= 1) | 4467 | fixed_16_16_to_u32_round_up(plane_blocks_per_line)) |
4468 | selected_result = min_fixed_16_16(method1, method2); | 4468 | selected_result = min_fixed_16_16(method1, method2); |
4469 | else if (latency >= linetime_us) | 4469 | else if (latency >= linetime_us) |
4470 | selected_result = min_fixed_16_16(method1, method2); | 4470 | selected_result = min_fixed_16_16(method1, method2); |
diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c index 627e2aa09766..8cdec455cf7d 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c | |||
@@ -206,7 +206,7 @@ struct drm_i915_private *mock_gem_device(void) | |||
206 | mkwrite_device_info(i915)->ring_mask = BIT(0); | 206 | mkwrite_device_info(i915)->ring_mask = BIT(0); |
207 | i915->engine[RCS] = mock_engine(i915, "mock"); | 207 | i915->engine[RCS] = mock_engine(i915, "mock"); |
208 | if (!i915->engine[RCS]) | 208 | if (!i915->engine[RCS]) |
209 | goto err_dependencies; | 209 | goto err_priorities; |
210 | 210 | ||
211 | i915->kernel_context = mock_context(i915, NULL); | 211 | i915->kernel_context = mock_context(i915, NULL); |
212 | if (!i915->kernel_context) | 212 | if (!i915->kernel_context) |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 147b22163f9f..dab78c660dd6 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
@@ -1158,8 +1158,6 @@ nouveau_connector_aux_xfer(struct drm_dp_aux *obj, struct drm_dp_aux_msg *msg) | |||
1158 | return -ENODEV; | 1158 | return -ENODEV; |
1159 | if (WARN_ON(msg->size > 16)) | 1159 | if (WARN_ON(msg->size > 16)) |
1160 | return -E2BIG; | 1160 | return -E2BIG; |
1161 | if (msg->size == 0) | ||
1162 | return msg->size; | ||
1163 | 1161 | ||
1164 | ret = nvkm_i2c_aux_acquire(aux); | 1162 | ret = nvkm_i2c_aux_acquire(aux); |
1165 | if (ret) | 1163 | if (ret) |
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 8d1df5678eaa..f362c9fa8b3b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c | |||
@@ -409,7 +409,6 @@ nouveau_display_fini(struct drm_device *dev, bool suspend) | |||
409 | struct nouveau_display *disp = nouveau_display(dev); | 409 | struct nouveau_display *disp = nouveau_display(dev); |
410 | struct nouveau_drm *drm = nouveau_drm(dev); | 410 | struct nouveau_drm *drm = nouveau_drm(dev); |
411 | struct drm_connector *connector; | 411 | struct drm_connector *connector; |
412 | struct drm_crtc *crtc; | ||
413 | 412 | ||
414 | if (!suspend) { | 413 | if (!suspend) { |
415 | if (drm_drv_uses_atomic_modeset(dev)) | 414 | if (drm_drv_uses_atomic_modeset(dev)) |
@@ -418,10 +417,6 @@ nouveau_display_fini(struct drm_device *dev, bool suspend) | |||
418 | drm_crtc_force_disable_all(dev); | 417 | drm_crtc_force_disable_all(dev); |
419 | } | 418 | } |
420 | 419 | ||
421 | /* Make sure that drm and hw vblank irqs get properly disabled. */ | ||
422 | drm_for_each_crtc(crtc, dev) | ||
423 | drm_crtc_vblank_off(crtc); | ||
424 | |||
425 | /* disable flip completion events */ | 420 | /* disable flip completion events */ |
426 | nvif_notify_put(&drm->flip); | 421 | nvif_notify_put(&drm->flip); |
427 | 422 | ||
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index e3132a2ce34d..2bc0dc985214 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c | |||
@@ -3674,15 +3674,24 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe) | |||
3674 | drm_mode_connector_attach_encoder(connector, encoder); | 3674 | drm_mode_connector_attach_encoder(connector, encoder); |
3675 | 3675 | ||
3676 | if (dcbe->type == DCB_OUTPUT_DP) { | 3676 | if (dcbe->type == DCB_OUTPUT_DP) { |
3677 | struct nv50_disp *disp = nv50_disp(encoder->dev); | ||
3677 | struct nvkm_i2c_aux *aux = | 3678 | struct nvkm_i2c_aux *aux = |
3678 | nvkm_i2c_aux_find(i2c, dcbe->i2c_index); | 3679 | nvkm_i2c_aux_find(i2c, dcbe->i2c_index); |
3679 | if (aux) { | 3680 | if (aux) { |
3680 | nv_encoder->i2c = &nv_connector->aux.ddc; | 3681 | if (disp->disp->oclass < GF110_DISP) { |
3682 | /* HW has no support for address-only | ||
3683 | * transactions, so we're required to | ||
3684 | * use custom I2C-over-AUX code. | ||
3685 | */ | ||
3686 | nv_encoder->i2c = &aux->i2c; | ||
3687 | } else { | ||
3688 | nv_encoder->i2c = &nv_connector->aux.ddc; | ||
3689 | } | ||
3681 | nv_encoder->aux = aux; | 3690 | nv_encoder->aux = aux; |
3682 | } | 3691 | } |
3683 | 3692 | ||
3684 | /*TODO: Use DP Info Table to check for support. */ | 3693 | /*TODO: Use DP Info Table to check for support. */ |
3685 | if (nv50_disp(encoder->dev)->disp->oclass >= GF110_DISP) { | 3694 | if (disp->disp->oclass >= GF110_DISP) { |
3686 | ret = nv50_mstm_new(nv_encoder, &nv_connector->aux, 16, | 3695 | ret = nv50_mstm_new(nv_encoder, &nv_connector->aux, 16, |
3687 | nv_connector->base.base.id, | 3696 | nv_connector->base.base.id, |
3688 | &nv_encoder->dp.mstm); | 3697 | &nv_encoder->dp.mstm); |
@@ -3931,6 +3940,8 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state) | |||
3931 | 3940 | ||
3932 | NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name, | 3941 | NV_ATOMIC(drm, "%s: clr %04x (set %04x)\n", crtc->name, |
3933 | asyh->clr.mask, asyh->set.mask); | 3942 | asyh->clr.mask, asyh->set.mask); |
3943 | if (crtc_state->active && !asyh->state.active) | ||
3944 | drm_crtc_vblank_off(crtc); | ||
3934 | 3945 | ||
3935 | if (asyh->clr.mask) { | 3946 | if (asyh->clr.mask) { |
3936 | nv50_head_flush_clr(head, asyh, atom->flush_disable); | 3947 | nv50_head_flush_clr(head, asyh, atom->flush_disable); |
@@ -4016,11 +4027,13 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state) | |||
4016 | nv50_head_flush_set(head, asyh); | 4027 | nv50_head_flush_set(head, asyh); |
4017 | interlock_core = 1; | 4028 | interlock_core = 1; |
4018 | } | 4029 | } |
4019 | } | ||
4020 | 4030 | ||
4021 | for_each_crtc_in_state(state, crtc, crtc_state, i) { | 4031 | if (asyh->state.active) { |
4022 | if (crtc->state->event) | 4032 | if (!crtc_state->active) |
4023 | drm_crtc_vblank_get(crtc); | 4033 | drm_crtc_vblank_on(crtc); |
4034 | if (asyh->state.event) | ||
4035 | drm_crtc_vblank_get(crtc); | ||
4036 | } | ||
4024 | } | 4037 | } |
4025 | 4038 | ||
4026 | /* Update plane(s). */ | 4039 | /* Update plane(s). */ |
@@ -4067,12 +4080,14 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state) | |||
4067 | if (crtc->state->event) { | 4080 | if (crtc->state->event) { |
4068 | unsigned long flags; | 4081 | unsigned long flags; |
4069 | /* Get correct count/ts if racing with vblank irq */ | 4082 | /* Get correct count/ts if racing with vblank irq */ |
4070 | drm_accurate_vblank_count(crtc); | 4083 | if (crtc->state->active) |
4084 | drm_accurate_vblank_count(crtc); | ||
4071 | spin_lock_irqsave(&crtc->dev->event_lock, flags); | 4085 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
4072 | drm_crtc_send_vblank_event(crtc, crtc->state->event); | 4086 | drm_crtc_send_vblank_event(crtc, crtc->state->event); |
4073 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); | 4087 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); |
4074 | crtc->state->event = NULL; | 4088 | crtc->state->event = NULL; |
4075 | drm_crtc_vblank_put(crtc); | 4089 | if (crtc->state->active) |
4090 | drm_crtc_vblank_put(crtc); | ||
4076 | } | 4091 | } |
4077 | } | 4092 | } |
4078 | 4093 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h index a24312fb0228..a1e8bf48b778 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h | |||
@@ -22,6 +22,7 @@ struct nvkm_ior { | |||
22 | unsigned proto_evo:4; | 22 | unsigned proto_evo:4; |
23 | enum nvkm_ior_proto { | 23 | enum nvkm_ior_proto { |
24 | CRT, | 24 | CRT, |
25 | TV, | ||
25 | TMDS, | 26 | TMDS, |
26 | LVDS, | 27 | LVDS, |
27 | DP, | 28 | DP, |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h index 19c635663399..6ea19466f436 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h | |||
@@ -22,7 +22,7 @@ struct nv50_disp { | |||
22 | u8 type[3]; | 22 | u8 type[3]; |
23 | } pior; | 23 | } pior; |
24 | 24 | ||
25 | struct nv50_disp_chan *chan[17]; | 25 | struct nv50_disp_chan *chan[21]; |
26 | }; | 26 | }; |
27 | 27 | ||
28 | void nv50_disp_super_1(struct nv50_disp *); | 28 | void nv50_disp_super_1(struct nv50_disp *); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c index 85aff85394ac..be9e7f8c3b23 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c | |||
@@ -62,6 +62,7 @@ nvkm_outp_xlat(struct nvkm_outp *outp, enum nvkm_ior_type *type) | |||
62 | case 0: | 62 | case 0: |
63 | switch (outp->info.type) { | 63 | switch (outp->info.type) { |
64 | case DCB_OUTPUT_ANALOG: *type = DAC; return CRT; | 64 | case DCB_OUTPUT_ANALOG: *type = DAC; return CRT; |
65 | case DCB_OUTPUT_TV : *type = DAC; return TV; | ||
65 | case DCB_OUTPUT_TMDS : *type = SOR; return TMDS; | 66 | case DCB_OUTPUT_TMDS : *type = SOR; return TMDS; |
66 | case DCB_OUTPUT_LVDS : *type = SOR; return LVDS; | 67 | case DCB_OUTPUT_LVDS : *type = SOR; return LVDS; |
67 | case DCB_OUTPUT_DP : *type = SOR; return DP; | 68 | case DCB_OUTPUT_DP : *type = SOR; return DP; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c index c794b2c2d21e..6d8f21290aa2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c | |||
@@ -129,7 +129,7 @@ gf100_bar_init(struct nvkm_bar *base) | |||
129 | 129 | ||
130 | if (bar->bar[0].mem) { | 130 | if (bar->bar[0].mem) { |
131 | addr = nvkm_memory_addr(bar->bar[0].mem) >> 12; | 131 | addr = nvkm_memory_addr(bar->bar[0].mem) >> 12; |
132 | nvkm_wr32(device, 0x001714, 0xc0000000 | addr); | 132 | nvkm_wr32(device, 0x001714, 0x80000000 | addr); |
133 | } | 133 | } |
134 | 134 | ||
135 | return 0; | 135 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/Kbuild b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/Kbuild index 48f01e40b8fc..b768e66a472b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/Kbuild | |||
@@ -25,6 +25,7 @@ nvkm-y += nvkm/subdev/i2c/bit.o | |||
25 | 25 | ||
26 | nvkm-y += nvkm/subdev/i2c/aux.o | 26 | nvkm-y += nvkm/subdev/i2c/aux.o |
27 | nvkm-y += nvkm/subdev/i2c/auxg94.o | 27 | nvkm-y += nvkm/subdev/i2c/auxg94.o |
28 | nvkm-y += nvkm/subdev/i2c/auxgf119.o | ||
28 | nvkm-y += nvkm/subdev/i2c/auxgm200.o | 29 | nvkm-y += nvkm/subdev/i2c/auxgm200.o |
29 | 30 | ||
30 | nvkm-y += nvkm/subdev/i2c/anx9805.o | 31 | nvkm-y += nvkm/subdev/i2c/anx9805.o |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c index d172e42dd228..4c1f547da463 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.c | |||
@@ -117,6 +117,10 @@ int | |||
117 | nvkm_i2c_aux_xfer(struct nvkm_i2c_aux *aux, bool retry, u8 type, | 117 | nvkm_i2c_aux_xfer(struct nvkm_i2c_aux *aux, bool retry, u8 type, |
118 | u32 addr, u8 *data, u8 *size) | 118 | u32 addr, u8 *data, u8 *size) |
119 | { | 119 | { |
120 | if (!*size && !aux->func->address_only) { | ||
121 | AUX_ERR(aux, "address-only transaction dropped"); | ||
122 | return -ENOSYS; | ||
123 | } | ||
120 | return aux->func->xfer(aux, retry, type, addr, data, size); | 124 | return aux->func->xfer(aux, retry, type, addr, data, size); |
121 | } | 125 | } |
122 | 126 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.h b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.h index 27a4a39c87f0..9587ab456d9e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/aux.h | |||
@@ -3,6 +3,7 @@ | |||
3 | #include "pad.h" | 3 | #include "pad.h" |
4 | 4 | ||
5 | struct nvkm_i2c_aux_func { | 5 | struct nvkm_i2c_aux_func { |
6 | bool address_only; | ||
6 | int (*xfer)(struct nvkm_i2c_aux *, bool retry, u8 type, | 7 | int (*xfer)(struct nvkm_i2c_aux *, bool retry, u8 type, |
7 | u32 addr, u8 *data, u8 *size); | 8 | u32 addr, u8 *data, u8 *size); |
8 | int (*lnk_ctl)(struct nvkm_i2c_aux *, int link_nr, int link_bw, | 9 | int (*lnk_ctl)(struct nvkm_i2c_aux *, int link_nr, int link_bw, |
@@ -17,7 +18,12 @@ void nvkm_i2c_aux_del(struct nvkm_i2c_aux **); | |||
17 | int nvkm_i2c_aux_xfer(struct nvkm_i2c_aux *, bool retry, u8 type, | 18 | int nvkm_i2c_aux_xfer(struct nvkm_i2c_aux *, bool retry, u8 type, |
18 | u32 addr, u8 *data, u8 *size); | 19 | u32 addr, u8 *data, u8 *size); |
19 | 20 | ||
21 | int g94_i2c_aux_new_(const struct nvkm_i2c_aux_func *, struct nvkm_i2c_pad *, | ||
22 | int, u8, struct nvkm_i2c_aux **); | ||
23 | |||
20 | int g94_i2c_aux_new(struct nvkm_i2c_pad *, int, u8, struct nvkm_i2c_aux **); | 24 | int g94_i2c_aux_new(struct nvkm_i2c_pad *, int, u8, struct nvkm_i2c_aux **); |
25 | int g94_i2c_aux_xfer(struct nvkm_i2c_aux *, bool, u8, u32, u8 *, u8 *); | ||
26 | int gf119_i2c_aux_new(struct nvkm_i2c_pad *, int, u8, struct nvkm_i2c_aux **); | ||
21 | int gm200_i2c_aux_new(struct nvkm_i2c_pad *, int, u8, struct nvkm_i2c_aux **); | 27 | int gm200_i2c_aux_new(struct nvkm_i2c_pad *, int, u8, struct nvkm_i2c_aux **); |
22 | 28 | ||
23 | #define AUX_MSG(b,l,f,a...) do { \ | 29 | #define AUX_MSG(b,l,f,a...) do { \ |
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c index ab8cb196c34e..c8ab1b5741a3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c | |||
@@ -72,7 +72,7 @@ g94_i2c_aux_init(struct g94_i2c_aux *aux) | |||
72 | return 0; | 72 | return 0; |
73 | } | 73 | } |
74 | 74 | ||
75 | static int | 75 | int |
76 | g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, | 76 | g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, |
77 | u8 type, u32 addr, u8 *data, u8 *size) | 77 | u8 type, u32 addr, u8 *data, u8 *size) |
78 | { | 78 | { |
@@ -105,9 +105,9 @@ g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, | |||
105 | } | 105 | } |
106 | 106 | ||
107 | ctrl = nvkm_rd32(device, 0x00e4e4 + base); | 107 | ctrl = nvkm_rd32(device, 0x00e4e4 + base); |
108 | ctrl &= ~0x0001f0ff; | 108 | ctrl &= ~0x0001f1ff; |
109 | ctrl |= type << 12; | 109 | ctrl |= type << 12; |
110 | ctrl |= *size - 1; | 110 | ctrl |= (*size ? (*size - 1) : 0x00000100); |
111 | nvkm_wr32(device, 0x00e4e0 + base, addr); | 111 | nvkm_wr32(device, 0x00e4e0 + base, addr); |
112 | 112 | ||
113 | /* (maybe) retry transaction a number of times on failure... */ | 113 | /* (maybe) retry transaction a number of times on failure... */ |
@@ -160,14 +160,10 @@ out: | |||
160 | return ret < 0 ? ret : (stat & 0x000f0000) >> 16; | 160 | return ret < 0 ? ret : (stat & 0x000f0000) >> 16; |
161 | } | 161 | } |
162 | 162 | ||
163 | static const struct nvkm_i2c_aux_func | ||
164 | g94_i2c_aux_func = { | ||
165 | .xfer = g94_i2c_aux_xfer, | ||
166 | }; | ||
167 | |||
168 | int | 163 | int |
169 | g94_i2c_aux_new(struct nvkm_i2c_pad *pad, int index, u8 drive, | 164 | g94_i2c_aux_new_(const struct nvkm_i2c_aux_func *func, |
170 | struct nvkm_i2c_aux **paux) | 165 | struct nvkm_i2c_pad *pad, int index, u8 drive, |
166 | struct nvkm_i2c_aux **paux) | ||
171 | { | 167 | { |
172 | struct g94_i2c_aux *aux; | 168 | struct g94_i2c_aux *aux; |
173 | 169 | ||
@@ -175,8 +171,20 @@ g94_i2c_aux_new(struct nvkm_i2c_pad *pad, int index, u8 drive, | |||
175 | return -ENOMEM; | 171 | return -ENOMEM; |
176 | *paux = &aux->base; | 172 | *paux = &aux->base; |
177 | 173 | ||
178 | nvkm_i2c_aux_ctor(&g94_i2c_aux_func, pad, index, &aux->base); | 174 | nvkm_i2c_aux_ctor(func, pad, index, &aux->base); |
179 | aux->ch = drive; | 175 | aux->ch = drive; |
180 | aux->base.intr = 1 << aux->ch; | 176 | aux->base.intr = 1 << aux->ch; |
181 | return 0; | 177 | return 0; |
182 | } | 178 | } |
179 | |||
180 | static const struct nvkm_i2c_aux_func | ||
181 | g94_i2c_aux = { | ||
182 | .xfer = g94_i2c_aux_xfer, | ||
183 | }; | ||
184 | |||
185 | int | ||
186 | g94_i2c_aux_new(struct nvkm_i2c_pad *pad, int index, u8 drive, | ||
187 | struct nvkm_i2c_aux **paux) | ||
188 | { | ||
189 | return g94_i2c_aux_new_(&g94_i2c_aux, pad, index, drive, paux); | ||
190 | } | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgf119.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgf119.c new file mode 100644 index 000000000000..dab40cd8fe3a --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgf119.c | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * Copyright 2017 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | #include "aux.h" | ||
23 | |||
24 | static const struct nvkm_i2c_aux_func | ||
25 | gf119_i2c_aux = { | ||
26 | .address_only = true, | ||
27 | .xfer = g94_i2c_aux_xfer, | ||
28 | }; | ||
29 | |||
30 | int | ||
31 | gf119_i2c_aux_new(struct nvkm_i2c_pad *pad, int index, u8 drive, | ||
32 | struct nvkm_i2c_aux **paux) | ||
33 | { | ||
34 | return g94_i2c_aux_new_(&gf119_i2c_aux, pad, index, drive, paux); | ||
35 | } | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c index ee091fa79628..7ef60895f43a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c | |||
@@ -105,9 +105,9 @@ gm200_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, | |||
105 | } | 105 | } |
106 | 106 | ||
107 | ctrl = nvkm_rd32(device, 0x00d954 + base); | 107 | ctrl = nvkm_rd32(device, 0x00d954 + base); |
108 | ctrl &= ~0x0001f0ff; | 108 | ctrl &= ~0x0001f1ff; |
109 | ctrl |= type << 12; | 109 | ctrl |= type << 12; |
110 | ctrl |= *size - 1; | 110 | ctrl |= (*size ? (*size - 1) : 0x00000100); |
111 | nvkm_wr32(device, 0x00d950 + base, addr); | 111 | nvkm_wr32(device, 0x00d950 + base, addr); |
112 | 112 | ||
113 | /* (maybe) retry transaction a number of times on failure... */ | 113 | /* (maybe) retry transaction a number of times on failure... */ |
@@ -162,6 +162,7 @@ out: | |||
162 | 162 | ||
163 | static const struct nvkm_i2c_aux_func | 163 | static const struct nvkm_i2c_aux_func |
164 | gm200_i2c_aux_func = { | 164 | gm200_i2c_aux_func = { |
165 | .address_only = true, | ||
165 | .xfer = gm200_i2c_aux_xfer, | 166 | .xfer = gm200_i2c_aux_xfer, |
166 | }; | 167 | }; |
167 | 168 | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgf119.c b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgf119.c index d53212f1aa52..3bc4d0310076 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padgf119.c | |||
@@ -28,7 +28,7 @@ | |||
28 | static const struct nvkm_i2c_pad_func | 28 | static const struct nvkm_i2c_pad_func |
29 | gf119_i2c_pad_s_func = { | 29 | gf119_i2c_pad_s_func = { |
30 | .bus_new_4 = gf119_i2c_bus_new, | 30 | .bus_new_4 = gf119_i2c_bus_new, |
31 | .aux_new_6 = g94_i2c_aux_new, | 31 | .aux_new_6 = gf119_i2c_aux_new, |
32 | .mode = g94_i2c_pad_mode, | 32 | .mode = g94_i2c_pad_mode, |
33 | }; | 33 | }; |
34 | 34 | ||
@@ -41,7 +41,7 @@ gf119_i2c_pad_s_new(struct nvkm_i2c *i2c, int id, struct nvkm_i2c_pad **ppad) | |||
41 | static const struct nvkm_i2c_pad_func | 41 | static const struct nvkm_i2c_pad_func |
42 | gf119_i2c_pad_x_func = { | 42 | gf119_i2c_pad_x_func = { |
43 | .bus_new_4 = gf119_i2c_bus_new, | 43 | .bus_new_4 = gf119_i2c_bus_new, |
44 | .aux_new_6 = g94_i2c_aux_new, | 44 | .aux_new_6 = gf119_i2c_aux_new, |
45 | }; | 45 | }; |
46 | 46 | ||
47 | int | 47 | int |
diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig index 50c41c0a50ef..dcc539ba85d6 100644 --- a/drivers/gpu/drm/rockchip/Kconfig +++ b/drivers/gpu/drm/rockchip/Kconfig | |||
@@ -5,6 +5,10 @@ config DRM_ROCKCHIP | |||
5 | select DRM_KMS_HELPER | 5 | select DRM_KMS_HELPER |
6 | select DRM_PANEL | 6 | select DRM_PANEL |
7 | select VIDEOMODE_HELPERS | 7 | select VIDEOMODE_HELPERS |
8 | select DRM_ANALOGIX_DP if ROCKCHIP_ANALOGIX_DP | ||
9 | select DRM_DW_HDMI if ROCKCHIP_DW_HDMI | ||
10 | select DRM_MIPI_DSI if ROCKCHIP_DW_MIPI_DSI | ||
11 | select SND_SOC_HDMI_CODEC if ROCKCHIP_CDN_DP && SND_SOC | ||
8 | help | 12 | help |
9 | Choose this option if you have a Rockchip soc chipset. | 13 | Choose this option if you have a Rockchip soc chipset. |
10 | This driver provides kernel mode setting and buffer | 14 | This driver provides kernel mode setting and buffer |
@@ -12,10 +16,10 @@ config DRM_ROCKCHIP | |||
12 | 2D or 3D acceleration; acceleration is performed by other | 16 | 2D or 3D acceleration; acceleration is performed by other |
13 | IP found on the SoC. | 17 | IP found on the SoC. |
14 | 18 | ||
19 | if DRM_ROCKCHIP | ||
20 | |||
15 | config ROCKCHIP_ANALOGIX_DP | 21 | config ROCKCHIP_ANALOGIX_DP |
16 | bool "Rockchip specific extensions for Analogix DP driver" | 22 | bool "Rockchip specific extensions for Analogix DP driver" |
17 | depends on DRM_ROCKCHIP | ||
18 | select DRM_ANALOGIX_DP | ||
19 | help | 23 | help |
20 | This selects support for Rockchip SoC specific extensions | 24 | This selects support for Rockchip SoC specific extensions |
21 | for the Analogix Core DP driver. If you want to enable DP | 25 | for the Analogix Core DP driver. If you want to enable DP |
@@ -23,9 +27,7 @@ config ROCKCHIP_ANALOGIX_DP | |||
23 | 27 | ||
24 | config ROCKCHIP_CDN_DP | 28 | config ROCKCHIP_CDN_DP |
25 | bool "Rockchip cdn DP" | 29 | bool "Rockchip cdn DP" |
26 | depends on DRM_ROCKCHIP | 30 | depends on EXTCON=y || (EXTCON=m && DRM_ROCKCHIP=m) |
27 | depends on EXTCON | ||
28 | select SND_SOC_HDMI_CODEC if SND_SOC | ||
29 | help | 31 | help |
30 | This selects support for Rockchip SoC specific extensions | 32 | This selects support for Rockchip SoC specific extensions |
31 | for the cdn DP driver. If you want to enable Dp on | 33 | for the cdn DP driver. If you want to enable Dp on |
@@ -34,8 +36,6 @@ config ROCKCHIP_CDN_DP | |||
34 | 36 | ||
35 | config ROCKCHIP_DW_HDMI | 37 | config ROCKCHIP_DW_HDMI |
36 | bool "Rockchip specific extensions for Synopsys DW HDMI" | 38 | bool "Rockchip specific extensions for Synopsys DW HDMI" |
37 | depends on DRM_ROCKCHIP | ||
38 | select DRM_DW_HDMI | ||
39 | help | 39 | help |
40 | This selects support for Rockchip SoC specific extensions | 40 | This selects support for Rockchip SoC specific extensions |
41 | for the Synopsys DesignWare HDMI driver. If you want to | 41 | for the Synopsys DesignWare HDMI driver. If you want to |
@@ -44,8 +44,6 @@ config ROCKCHIP_DW_HDMI | |||
44 | 44 | ||
45 | config ROCKCHIP_DW_MIPI_DSI | 45 | config ROCKCHIP_DW_MIPI_DSI |
46 | bool "Rockchip specific extensions for Synopsys DW MIPI DSI" | 46 | bool "Rockchip specific extensions for Synopsys DW MIPI DSI" |
47 | depends on DRM_ROCKCHIP | ||
48 | select DRM_MIPI_DSI | ||
49 | help | 47 | help |
50 | This selects support for Rockchip SoC specific extensions | 48 | This selects support for Rockchip SoC specific extensions |
51 | for the Synopsys DesignWare HDMI driver. If you want to | 49 | for the Synopsys DesignWare HDMI driver. If you want to |
@@ -54,8 +52,9 @@ config ROCKCHIP_DW_MIPI_DSI | |||
54 | 52 | ||
55 | config ROCKCHIP_INNO_HDMI | 53 | config ROCKCHIP_INNO_HDMI |
56 | bool "Rockchip specific extensions for Innosilicon HDMI" | 54 | bool "Rockchip specific extensions for Innosilicon HDMI" |
57 | depends on DRM_ROCKCHIP | ||
58 | help | 55 | help |
59 | This selects support for Rockchip SoC specific extensions | 56 | This selects support for Rockchip SoC specific extensions |
60 | for the Innosilicon HDMI driver. If you want to enable | 57 | for the Innosilicon HDMI driver. If you want to enable |
61 | HDMI on RK3036 based SoC, you should select this option. | 58 | HDMI on RK3036 based SoC, you should select this option. |
59 | |||
60 | endif | ||
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c index 35bf781e418e..c7056322211c 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c | |||
@@ -30,49 +30,49 @@ | |||
30 | #include <drm/ttm/ttm_placement.h> | 30 | #include <drm/ttm/ttm_placement.h> |
31 | #include <drm/ttm/ttm_page_alloc.h> | 31 | #include <drm/ttm/ttm_page_alloc.h> |
32 | 32 | ||
33 | static struct ttm_place vram_placement_flags = { | 33 | static const struct ttm_place vram_placement_flags = { |
34 | .fpfn = 0, | 34 | .fpfn = 0, |
35 | .lpfn = 0, | 35 | .lpfn = 0, |
36 | .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED | 36 | .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED |
37 | }; | 37 | }; |
38 | 38 | ||
39 | static struct ttm_place vram_ne_placement_flags = { | 39 | static const struct ttm_place vram_ne_placement_flags = { |
40 | .fpfn = 0, | 40 | .fpfn = 0, |
41 | .lpfn = 0, | 41 | .lpfn = 0, |
42 | .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT | 42 | .flags = TTM_PL_FLAG_VRAM | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT |
43 | }; | 43 | }; |
44 | 44 | ||
45 | static struct ttm_place sys_placement_flags = { | 45 | static const struct ttm_place sys_placement_flags = { |
46 | .fpfn = 0, | 46 | .fpfn = 0, |
47 | .lpfn = 0, | 47 | .lpfn = 0, |
48 | .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED | 48 | .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED |
49 | }; | 49 | }; |
50 | 50 | ||
51 | static struct ttm_place sys_ne_placement_flags = { | 51 | static const struct ttm_place sys_ne_placement_flags = { |
52 | .fpfn = 0, | 52 | .fpfn = 0, |
53 | .lpfn = 0, | 53 | .lpfn = 0, |
54 | .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT | 54 | .flags = TTM_PL_FLAG_SYSTEM | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT |
55 | }; | 55 | }; |
56 | 56 | ||
57 | static struct ttm_place gmr_placement_flags = { | 57 | static const struct ttm_place gmr_placement_flags = { |
58 | .fpfn = 0, | 58 | .fpfn = 0, |
59 | .lpfn = 0, | 59 | .lpfn = 0, |
60 | .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED | 60 | .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED |
61 | }; | 61 | }; |
62 | 62 | ||
63 | static struct ttm_place gmr_ne_placement_flags = { | 63 | static const struct ttm_place gmr_ne_placement_flags = { |
64 | .fpfn = 0, | 64 | .fpfn = 0, |
65 | .lpfn = 0, | 65 | .lpfn = 0, |
66 | .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT | 66 | .flags = VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT |
67 | }; | 67 | }; |
68 | 68 | ||
69 | static struct ttm_place mob_placement_flags = { | 69 | static const struct ttm_place mob_placement_flags = { |
70 | .fpfn = 0, | 70 | .fpfn = 0, |
71 | .lpfn = 0, | 71 | .lpfn = 0, |
72 | .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED | 72 | .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED |
73 | }; | 73 | }; |
74 | 74 | ||
75 | static struct ttm_place mob_ne_placement_flags = { | 75 | static const struct ttm_place mob_ne_placement_flags = { |
76 | .fpfn = 0, | 76 | .fpfn = 0, |
77 | .lpfn = 0, | 77 | .lpfn = 0, |
78 | .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT | 78 | .flags = VMW_PL_FLAG_MOB | TTM_PL_FLAG_CACHED | TTM_PL_FLAG_NO_EVICT |
@@ -85,7 +85,7 @@ struct ttm_placement vmw_vram_placement = { | |||
85 | .busy_placement = &vram_placement_flags | 85 | .busy_placement = &vram_placement_flags |
86 | }; | 86 | }; |
87 | 87 | ||
88 | static struct ttm_place vram_gmr_placement_flags[] = { | 88 | static const struct ttm_place vram_gmr_placement_flags[] = { |
89 | { | 89 | { |
90 | .fpfn = 0, | 90 | .fpfn = 0, |
91 | .lpfn = 0, | 91 | .lpfn = 0, |
@@ -97,7 +97,7 @@ static struct ttm_place vram_gmr_placement_flags[] = { | |||
97 | } | 97 | } |
98 | }; | 98 | }; |
99 | 99 | ||
100 | static struct ttm_place gmr_vram_placement_flags[] = { | 100 | static const struct ttm_place gmr_vram_placement_flags[] = { |
101 | { | 101 | { |
102 | .fpfn = 0, | 102 | .fpfn = 0, |
103 | .lpfn = 0, | 103 | .lpfn = 0, |
@@ -116,7 +116,7 @@ struct ttm_placement vmw_vram_gmr_placement = { | |||
116 | .busy_placement = &gmr_placement_flags | 116 | .busy_placement = &gmr_placement_flags |
117 | }; | 117 | }; |
118 | 118 | ||
119 | static struct ttm_place vram_gmr_ne_placement_flags[] = { | 119 | static const struct ttm_place vram_gmr_ne_placement_flags[] = { |
120 | { | 120 | { |
121 | .fpfn = 0, | 121 | .fpfn = 0, |
122 | .lpfn = 0, | 122 | .lpfn = 0, |
@@ -165,7 +165,7 @@ struct ttm_placement vmw_sys_ne_placement = { | |||
165 | .busy_placement = &sys_ne_placement_flags | 165 | .busy_placement = &sys_ne_placement_flags |
166 | }; | 166 | }; |
167 | 167 | ||
168 | static struct ttm_place evictable_placement_flags[] = { | 168 | static const struct ttm_place evictable_placement_flags[] = { |
169 | { | 169 | { |
170 | .fpfn = 0, | 170 | .fpfn = 0, |
171 | .lpfn = 0, | 171 | .lpfn = 0, |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c index 99a7f4ab7d97..86178796de6c 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c | |||
@@ -779,8 +779,8 @@ static int vmw_cmdbuf_space_pool(struct vmw_cmdbuf_man *man, | |||
779 | if (ret) | 779 | if (ret) |
780 | return ret; | 780 | return ret; |
781 | 781 | ||
782 | header->cb_header = dma_pool_alloc(man->headers, GFP_KERNEL, | 782 | header->cb_header = dma_pool_zalloc(man->headers, GFP_KERNEL, |
783 | &header->handle); | 783 | &header->handle); |
784 | if (!header->cb_header) { | 784 | if (!header->cb_header) { |
785 | ret = -ENOMEM; | 785 | ret = -ENOMEM; |
786 | goto out_no_cb_header; | 786 | goto out_no_cb_header; |
@@ -790,7 +790,6 @@ static int vmw_cmdbuf_space_pool(struct vmw_cmdbuf_man *man, | |||
790 | cb_hdr = header->cb_header; | 790 | cb_hdr = header->cb_header; |
791 | offset = header->node.start << PAGE_SHIFT; | 791 | offset = header->node.start << PAGE_SHIFT; |
792 | header->cmd = man->map + offset; | 792 | header->cmd = man->map + offset; |
793 | memset(cb_hdr, 0, sizeof(*cb_hdr)); | ||
794 | if (man->using_mob) { | 793 | if (man->using_mob) { |
795 | cb_hdr->flags = SVGA_CB_FLAG_MOB; | 794 | cb_hdr->flags = SVGA_CB_FLAG_MOB; |
796 | cb_hdr->ptr.mob.mobid = man->cmd_space->mem.start; | 795 | cb_hdr->ptr.mob.mobid = man->cmd_space->mem.start; |
@@ -827,8 +826,8 @@ static int vmw_cmdbuf_space_inline(struct vmw_cmdbuf_man *man, | |||
827 | if (WARN_ON_ONCE(size > VMW_CMDBUF_INLINE_SIZE)) | 826 | if (WARN_ON_ONCE(size > VMW_CMDBUF_INLINE_SIZE)) |
828 | return -ENOMEM; | 827 | return -ENOMEM; |
829 | 828 | ||
830 | dheader = dma_pool_alloc(man->dheaders, GFP_KERNEL, | 829 | dheader = dma_pool_zalloc(man->dheaders, GFP_KERNEL, |
831 | &header->handle); | 830 | &header->handle); |
832 | if (!dheader) | 831 | if (!dheader) |
833 | return -ENOMEM; | 832 | return -ENOMEM; |
834 | 833 | ||
@@ -837,7 +836,6 @@ static int vmw_cmdbuf_space_inline(struct vmw_cmdbuf_man *man, | |||
837 | cb_hdr = &dheader->cb_header; | 836 | cb_hdr = &dheader->cb_header; |
838 | header->cb_header = cb_hdr; | 837 | header->cb_header = cb_hdr; |
839 | header->cmd = dheader->cmd; | 838 | header->cmd = dheader->cmd; |
840 | memset(dheader, 0, sizeof(*dheader)); | ||
841 | cb_hdr->status = SVGA_CB_STATUS_NONE; | 839 | cb_hdr->status = SVGA_CB_STATUS_NONE; |
842 | cb_hdr->flags = SVGA_CB_FLAG_NONE; | 840 | cb_hdr->flags = SVGA_CB_FLAG_NONE; |
843 | cb_hdr->ptr.pa = (u64)header->handle + | 841 | cb_hdr->ptr.pa = (u64)header->handle + |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf_res.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf_res.c index 1f013d45c9e9..36c7b6c839c0 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf_res.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf_res.c | |||
@@ -205,7 +205,7 @@ int vmw_cmdbuf_res_add(struct vmw_cmdbuf_res_manager *man, | |||
205 | int ret; | 205 | int ret; |
206 | 206 | ||
207 | cres = kzalloc(sizeof(*cres), GFP_KERNEL); | 207 | cres = kzalloc(sizeof(*cres), GFP_KERNEL); |
208 | if (unlikely(cres == NULL)) | 208 | if (unlikely(!cres)) |
209 | return -ENOMEM; | 209 | return -ENOMEM; |
210 | 210 | ||
211 | cres->hash.key = user_key | (res_type << 24); | 211 | cres->hash.key = user_key | (res_type << 24); |
@@ -291,7 +291,7 @@ vmw_cmdbuf_res_man_create(struct vmw_private *dev_priv) | |||
291 | int ret; | 291 | int ret; |
292 | 292 | ||
293 | man = kzalloc(sizeof(*man), GFP_KERNEL); | 293 | man = kzalloc(sizeof(*man), GFP_KERNEL); |
294 | if (man == NULL) | 294 | if (!man) |
295 | return ERR_PTR(-ENOMEM); | 295 | return ERR_PTR(-ENOMEM); |
296 | 296 | ||
297 | man->dev_priv = dev_priv; | 297 | man->dev_priv = dev_priv; |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_context.c b/drivers/gpu/drm/vmwgfx/vmwgfx_context.c index bcc6d4136c87..4212b3e673bc 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_context.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_context.c | |||
@@ -210,8 +210,8 @@ static int vmw_gb_context_init(struct vmw_private *dev_priv, | |||
210 | for (i = 0; i < SVGA_COTABLE_DX10_MAX; ++i) { | 210 | for (i = 0; i < SVGA_COTABLE_DX10_MAX; ++i) { |
211 | uctx->cotables[i] = vmw_cotable_alloc(dev_priv, | 211 | uctx->cotables[i] = vmw_cotable_alloc(dev_priv, |
212 | &uctx->res, i); | 212 | &uctx->res, i); |
213 | if (unlikely(uctx->cotables[i] == NULL)) { | 213 | if (unlikely(IS_ERR(uctx->cotables[i]))) { |
214 | ret = -ENOMEM; | 214 | ret = PTR_ERR(uctx->cotables[i]); |
215 | goto out_cotables; | 215 | goto out_cotables; |
216 | } | 216 | } |
217 | } | 217 | } |
@@ -777,7 +777,7 @@ static int vmw_context_define(struct drm_device *dev, void *data, | |||
777 | } | 777 | } |
778 | 778 | ||
779 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); | 779 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
780 | if (unlikely(ctx == NULL)) { | 780 | if (unlikely(!ctx)) { |
781 | ttm_mem_global_free(vmw_mem_glob(dev_priv), | 781 | ttm_mem_global_free(vmw_mem_glob(dev_priv), |
782 | vmw_user_context_size); | 782 | vmw_user_context_size); |
783 | ret = -ENOMEM; | 783 | ret = -ENOMEM; |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c index 6c026d75c180..d87861bbe971 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_cotable.c | |||
@@ -584,7 +584,7 @@ struct vmw_resource *vmw_cotable_alloc(struct vmw_private *dev_priv, | |||
584 | return ERR_PTR(ret); | 584 | return ERR_PTR(ret); |
585 | 585 | ||
586 | vcotbl = kzalloc(sizeof(*vcotbl), GFP_KERNEL); | 586 | vcotbl = kzalloc(sizeof(*vcotbl), GFP_KERNEL); |
587 | if (unlikely(vcotbl == NULL)) { | 587 | if (unlikely(!vcotbl)) { |
588 | ret = -ENOMEM; | 588 | ret = -ENOMEM; |
589 | goto out_no_alloc; | 589 | goto out_no_alloc; |
590 | } | 590 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 4a641555b960..4436d53ae16c 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | |||
@@ -227,7 +227,7 @@ static const struct drm_ioctl_desc vmw_ioctls[] = { | |||
227 | DRM_AUTH | DRM_RENDER_ALLOW), | 227 | DRM_AUTH | DRM_RENDER_ALLOW), |
228 | }; | 228 | }; |
229 | 229 | ||
230 | static struct pci_device_id vmw_pci_id_list[] = { | 230 | static const struct pci_device_id vmw_pci_id_list[] = { |
231 | {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII}, | 231 | {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII}, |
232 | {0, 0, 0} | 232 | {0, 0, 0} |
233 | }; | 233 | }; |
@@ -630,7 +630,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) | |||
630 | char host_log[100] = {0}; | 630 | char host_log[100] = {0}; |
631 | 631 | ||
632 | dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); | 632 | dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL); |
633 | if (unlikely(dev_priv == NULL)) { | 633 | if (unlikely(!dev_priv)) { |
634 | DRM_ERROR("Failed allocating a device private struct.\n"); | 634 | DRM_ERROR("Failed allocating a device private struct.\n"); |
635 | return -ENOMEM; | 635 | return -ENOMEM; |
636 | } | 636 | } |
@@ -1035,7 +1035,7 @@ static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv) | |||
1035 | int ret = -ENOMEM; | 1035 | int ret = -ENOMEM; |
1036 | 1036 | ||
1037 | vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL); | 1037 | vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL); |
1038 | if (unlikely(vmw_fp == NULL)) | 1038 | if (unlikely(!vmw_fp)) |
1039 | return ret; | 1039 | return ret; |
1040 | 1040 | ||
1041 | vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10); | 1041 | vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10); |
@@ -1196,7 +1196,7 @@ static int vmw_master_create(struct drm_device *dev, | |||
1196 | struct vmw_master *vmaster; | 1196 | struct vmw_master *vmaster; |
1197 | 1197 | ||
1198 | vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL); | 1198 | vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL); |
1199 | if (unlikely(vmaster == NULL)) | 1199 | if (unlikely(!vmaster)) |
1200 | return -ENOMEM; | 1200 | return -ENOMEM; |
1201 | 1201 | ||
1202 | vmw_master_init(vmaster); | 1202 | vmw_master_init(vmaster); |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c index c7b53d987f06..2cfb3c93f42a 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c | |||
@@ -264,7 +264,7 @@ static int vmw_resource_val_add(struct vmw_sw_context *sw_context, | |||
264 | } | 264 | } |
265 | 265 | ||
266 | node = kzalloc(sizeof(*node), GFP_KERNEL); | 266 | node = kzalloc(sizeof(*node), GFP_KERNEL); |
267 | if (unlikely(node == NULL)) { | 267 | if (unlikely(!node)) { |
268 | DRM_ERROR("Failed to allocate a resource validation " | 268 | DRM_ERROR("Failed to allocate a resource validation " |
269 | "entry.\n"); | 269 | "entry.\n"); |
270 | return -ENOMEM; | 270 | return -ENOMEM; |
@@ -452,7 +452,7 @@ static int vmw_resource_relocation_add(struct list_head *list, | |||
452 | struct vmw_resource_relocation *rel; | 452 | struct vmw_resource_relocation *rel; |
453 | 453 | ||
454 | rel = kmalloc(sizeof(*rel), GFP_KERNEL); | 454 | rel = kmalloc(sizeof(*rel), GFP_KERNEL); |
455 | if (unlikely(rel == NULL)) { | 455 | if (unlikely(!rel)) { |
456 | DRM_ERROR("Failed to allocate a resource relocation.\n"); | 456 | DRM_ERROR("Failed to allocate a resource relocation.\n"); |
457 | return -ENOMEM; | 457 | return -ENOMEM; |
458 | } | 458 | } |
@@ -519,7 +519,7 @@ static int vmw_cmd_invalid(struct vmw_private *dev_priv, | |||
519 | struct vmw_sw_context *sw_context, | 519 | struct vmw_sw_context *sw_context, |
520 | SVGA3dCmdHeader *header) | 520 | SVGA3dCmdHeader *header) |
521 | { | 521 | { |
522 | return capable(CAP_SYS_ADMIN) ? : -EINVAL; | 522 | return -EINVAL; |
523 | } | 523 | } |
524 | 524 | ||
525 | static int vmw_cmd_ok(struct vmw_private *dev_priv, | 525 | static int vmw_cmd_ok(struct vmw_private *dev_priv, |
@@ -2584,7 +2584,7 @@ static int vmw_cmd_dx_set_vertex_buffers(struct vmw_private *dev_priv, | |||
2584 | 2584 | ||
2585 | /** | 2585 | /** |
2586 | * vmw_cmd_dx_ia_set_vertex_buffers - Validate an | 2586 | * vmw_cmd_dx_ia_set_vertex_buffers - Validate an |
2587 | * SVGA_3D_CMD_DX_IA_SET_VERTEX_BUFFERS command. | 2587 | * SVGA_3D_CMD_DX_IA_SET_INDEX_BUFFER command. |
2588 | * | 2588 | * |
2589 | * @dev_priv: Pointer to a device private struct. | 2589 | * @dev_priv: Pointer to a device private struct. |
2590 | * @sw_context: The software context being used for this batch. | 2590 | * @sw_context: The software context being used for this batch. |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c index 6b2708b4eafe..b8bc5bc7de7e 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fence.c | |||
@@ -284,7 +284,7 @@ struct vmw_fence_manager *vmw_fence_manager_init(struct vmw_private *dev_priv) | |||
284 | { | 284 | { |
285 | struct vmw_fence_manager *fman = kzalloc(sizeof(*fman), GFP_KERNEL); | 285 | struct vmw_fence_manager *fman = kzalloc(sizeof(*fman), GFP_KERNEL); |
286 | 286 | ||
287 | if (unlikely(fman == NULL)) | 287 | if (unlikely(!fman)) |
288 | return NULL; | 288 | return NULL; |
289 | 289 | ||
290 | fman->dev_priv = dev_priv; | 290 | fman->dev_priv = dev_priv; |
@@ -541,7 +541,7 @@ int vmw_fence_create(struct vmw_fence_manager *fman, | |||
541 | int ret; | 541 | int ret; |
542 | 542 | ||
543 | fence = kzalloc(sizeof(*fence), GFP_KERNEL); | 543 | fence = kzalloc(sizeof(*fence), GFP_KERNEL); |
544 | if (unlikely(fence == NULL)) | 544 | if (unlikely(!fence)) |
545 | return -ENOMEM; | 545 | return -ENOMEM; |
546 | 546 | ||
547 | ret = vmw_fence_obj_init(fman, fence, seqno, | 547 | ret = vmw_fence_obj_init(fman, fence, seqno, |
@@ -606,7 +606,7 @@ int vmw_user_fence_create(struct drm_file *file_priv, | |||
606 | return ret; | 606 | return ret; |
607 | 607 | ||
608 | ufence = kzalloc(sizeof(*ufence), GFP_KERNEL); | 608 | ufence = kzalloc(sizeof(*ufence), GFP_KERNEL); |
609 | if (unlikely(ufence == NULL)) { | 609 | if (unlikely(!ufence)) { |
610 | ret = -ENOMEM; | 610 | ret = -ENOMEM; |
611 | goto out_no_object; | 611 | goto out_no_object; |
612 | } | 612 | } |
@@ -966,7 +966,7 @@ int vmw_event_fence_action_queue(struct drm_file *file_priv, | |||
966 | struct vmw_fence_manager *fman = fman_from_fence(fence); | 966 | struct vmw_fence_manager *fman = fman_from_fence(fence); |
967 | 967 | ||
968 | eaction = kzalloc(sizeof(*eaction), GFP_KERNEL); | 968 | eaction = kzalloc(sizeof(*eaction), GFP_KERNEL); |
969 | if (unlikely(eaction == NULL)) | 969 | if (unlikely(!eaction)) |
970 | return -ENOMEM; | 970 | return -ENOMEM; |
971 | 971 | ||
972 | eaction->event = event; | 972 | eaction->event = event; |
@@ -1002,7 +1002,7 @@ static int vmw_event_fence_action_create(struct drm_file *file_priv, | |||
1002 | int ret; | 1002 | int ret; |
1003 | 1003 | ||
1004 | event = kzalloc(sizeof(*event), GFP_KERNEL); | 1004 | event = kzalloc(sizeof(*event), GFP_KERNEL); |
1005 | if (unlikely(event == NULL)) { | 1005 | if (unlikely(!event)) { |
1006 | DRM_ERROR("Failed to allocate an event.\n"); | 1006 | DRM_ERROR("Failed to allocate an event.\n"); |
1007 | ret = -ENOMEM; | 1007 | ret = -ENOMEM; |
1008 | goto out_no_space; | 1008 | goto out_no_space; |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c b/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c index c1900f4390a4..d2b03d4a3c86 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c | |||
@@ -121,7 +121,7 @@ static int vmw_gmrid_man_init(struct ttm_mem_type_manager *man, | |||
121 | struct vmwgfx_gmrid_man *gman = | 121 | struct vmwgfx_gmrid_man *gman = |
122 | kzalloc(sizeof(*gman), GFP_KERNEL); | 122 | kzalloc(sizeof(*gman), GFP_KERNEL); |
123 | 123 | ||
124 | if (unlikely(gman == NULL)) | 124 | if (unlikely(!gman)) |
125 | return -ENOMEM; | 125 | return -ENOMEM; |
126 | 126 | ||
127 | spin_lock_init(&gman->lock); | 127 | spin_lock_init(&gman->lock); |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 3d94ea67a825..61e06f0e8cd3 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | |||
@@ -384,6 +384,12 @@ vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, | |||
384 | 384 | ||
385 | hotspot_x = du->hotspot_x; | 385 | hotspot_x = du->hotspot_x; |
386 | hotspot_y = du->hotspot_y; | 386 | hotspot_y = du->hotspot_y; |
387 | |||
388 | if (plane->fb) { | ||
389 | hotspot_x += plane->fb->hot_x; | ||
390 | hotspot_y += plane->fb->hot_y; | ||
391 | } | ||
392 | |||
387 | du->cursor_surface = vps->surf; | 393 | du->cursor_surface = vps->surf; |
388 | du->cursor_dmabuf = vps->dmabuf; | 394 | du->cursor_dmabuf = vps->dmabuf; |
389 | 395 | ||
@@ -411,6 +417,9 @@ vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, | |||
411 | vmw_cursor_update_position(dev_priv, true, | 417 | vmw_cursor_update_position(dev_priv, true, |
412 | du->cursor_x + hotspot_x, | 418 | du->cursor_x + hotspot_x, |
413 | du->cursor_y + hotspot_y); | 419 | du->cursor_y + hotspot_y); |
420 | |||
421 | du->core_hotspot_x = hotspot_x - du->hotspot_x; | ||
422 | du->core_hotspot_y = hotspot_y - du->hotspot_y; | ||
414 | } else { | 423 | } else { |
415 | DRM_ERROR("Failed to update cursor image\n"); | 424 | DRM_ERROR("Failed to update cursor image\n"); |
416 | } | 425 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c b/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c index 941bcfd131ff..b17f08fc50d3 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_mob.c | |||
@@ -320,14 +320,14 @@ int vmw_otables_setup(struct vmw_private *dev_priv) | |||
320 | 320 | ||
321 | if (dev_priv->has_dx) { | 321 | if (dev_priv->has_dx) { |
322 | *otables = kmemdup(dx_tables, sizeof(dx_tables), GFP_KERNEL); | 322 | *otables = kmemdup(dx_tables, sizeof(dx_tables), GFP_KERNEL); |
323 | if (*otables == NULL) | 323 | if (!(*otables)) |
324 | return -ENOMEM; | 324 | return -ENOMEM; |
325 | 325 | ||
326 | dev_priv->otable_batch.num_otables = ARRAY_SIZE(dx_tables); | 326 | dev_priv->otable_batch.num_otables = ARRAY_SIZE(dx_tables); |
327 | } else { | 327 | } else { |
328 | *otables = kmemdup(pre_dx_tables, sizeof(pre_dx_tables), | 328 | *otables = kmemdup(pre_dx_tables, sizeof(pre_dx_tables), |
329 | GFP_KERNEL); | 329 | GFP_KERNEL); |
330 | if (*otables == NULL) | 330 | if (!(*otables)) |
331 | return -ENOMEM; | 331 | return -ENOMEM; |
332 | 332 | ||
333 | dev_priv->otable_batch.num_otables = ARRAY_SIZE(pre_dx_tables); | 333 | dev_priv->otable_batch.num_otables = ARRAY_SIZE(pre_dx_tables); |
@@ -407,7 +407,7 @@ struct vmw_mob *vmw_mob_create(unsigned long data_pages) | |||
407 | { | 407 | { |
408 | struct vmw_mob *mob = kzalloc(sizeof(*mob), GFP_KERNEL); | 408 | struct vmw_mob *mob = kzalloc(sizeof(*mob), GFP_KERNEL); |
409 | 409 | ||
410 | if (unlikely(mob == NULL)) | 410 | if (unlikely(!mob)) |
411 | return NULL; | 411 | return NULL; |
412 | 412 | ||
413 | mob->num_pages = vmw_mob_calculate_pt_pages(data_pages); | 413 | mob->num_pages = vmw_mob_calculate_pt_pages(data_pages); |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c index 6063c9636d4a..97000996b8dc 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_msg.c | |||
@@ -244,7 +244,7 @@ static int vmw_recv_msg(struct rpc_channel *channel, void **msg, | |||
244 | 244 | ||
245 | reply_len = ebx; | 245 | reply_len = ebx; |
246 | reply = kzalloc(reply_len + 1, GFP_KERNEL); | 246 | reply = kzalloc(reply_len + 1, GFP_KERNEL); |
247 | if (reply == NULL) { | 247 | if (!reply) { |
248 | DRM_ERROR("Cannot allocate memory for reply\n"); | 248 | DRM_ERROR("Cannot allocate memory for reply\n"); |
249 | return -ENOMEM; | 249 | return -ENOMEM; |
250 | } | 250 | } |
@@ -340,7 +340,7 @@ int vmw_host_get_guestinfo(const char *guest_info_param, | |||
340 | 340 | ||
341 | msg_len = strlen(guest_info_param) + strlen("info-get ") + 1; | 341 | msg_len = strlen(guest_info_param) + strlen("info-get ") + 1; |
342 | msg = kzalloc(msg_len, GFP_KERNEL); | 342 | msg = kzalloc(msg_len, GFP_KERNEL); |
343 | if (msg == NULL) { | 343 | if (!msg) { |
344 | DRM_ERROR("Cannot allocate memory to get %s", guest_info_param); | 344 | DRM_ERROR("Cannot allocate memory to get %s", guest_info_param); |
345 | return -ENOMEM; | 345 | return -ENOMEM; |
346 | } | 346 | } |
@@ -400,7 +400,7 @@ int vmw_host_log(const char *log) | |||
400 | 400 | ||
401 | msg_len = strlen(log) + strlen("log ") + 1; | 401 | msg_len = strlen(log) + strlen("log ") + 1; |
402 | msg = kzalloc(msg_len, GFP_KERNEL); | 402 | msg = kzalloc(msg_len, GFP_KERNEL); |
403 | if (msg == NULL) { | 403 | if (!msg) { |
404 | DRM_ERROR("Cannot allocate memory for log message\n"); | 404 | DRM_ERROR("Cannot allocate memory for log message\n"); |
405 | return -ENOMEM; | 405 | return -ENOMEM; |
406 | } | 406 | } |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c index 7d591f653dfa..a96f90f017d1 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c | |||
@@ -446,7 +446,7 @@ int vmw_user_dmabuf_alloc(struct vmw_private *dev_priv, | |||
446 | int ret; | 446 | int ret; |
447 | 447 | ||
448 | user_bo = kzalloc(sizeof(*user_bo), GFP_KERNEL); | 448 | user_bo = kzalloc(sizeof(*user_bo), GFP_KERNEL); |
449 | if (unlikely(user_bo == NULL)) { | 449 | if (unlikely(!user_bo)) { |
450 | DRM_ERROR("Failed to allocate a buffer.\n"); | 450 | DRM_ERROR("Failed to allocate a buffer.\n"); |
451 | return -ENOMEM; | 451 | return -ENOMEM; |
452 | } | 452 | } |
@@ -836,7 +836,7 @@ static int vmw_resource_buf_alloc(struct vmw_resource *res, | |||
836 | } | 836 | } |
837 | 837 | ||
838 | backup = kzalloc(sizeof(*backup), GFP_KERNEL); | 838 | backup = kzalloc(sizeof(*backup), GFP_KERNEL); |
839 | if (unlikely(backup == NULL)) | 839 | if (unlikely(!backup)) |
840 | return -ENOMEM; | 840 | return -ENOMEM; |
841 | 841 | ||
842 | ret = vmw_dmabuf_init(res->dev_priv, backup, res->backup_size, | 842 | ret = vmw_dmabuf_init(res->dev_priv, backup, res->backup_size, |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c index 68f135c5b0d8..9b832f136813 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_shader.c | |||
@@ -751,7 +751,7 @@ static int vmw_user_shader_alloc(struct vmw_private *dev_priv, | |||
751 | } | 751 | } |
752 | 752 | ||
753 | ushader = kzalloc(sizeof(*ushader), GFP_KERNEL); | 753 | ushader = kzalloc(sizeof(*ushader), GFP_KERNEL); |
754 | if (unlikely(ushader == NULL)) { | 754 | if (unlikely(!ushader)) { |
755 | ttm_mem_global_free(vmw_mem_glob(dev_priv), | 755 | ttm_mem_global_free(vmw_mem_glob(dev_priv), |
756 | vmw_user_shader_size); | 756 | vmw_user_shader_size); |
757 | ret = -ENOMEM; | 757 | ret = -ENOMEM; |
@@ -821,7 +821,7 @@ static struct vmw_resource *vmw_shader_alloc(struct vmw_private *dev_priv, | |||
821 | } | 821 | } |
822 | 822 | ||
823 | shader = kzalloc(sizeof(*shader), GFP_KERNEL); | 823 | shader = kzalloc(sizeof(*shader), GFP_KERNEL); |
824 | if (unlikely(shader == NULL)) { | 824 | if (unlikely(!shader)) { |
825 | ttm_mem_global_free(vmw_mem_glob(dev_priv), | 825 | ttm_mem_global_free(vmw_mem_glob(dev_priv), |
826 | vmw_shader_size); | 826 | vmw_shader_size); |
827 | ret = -ENOMEM; | 827 | ret = -ENOMEM; |
@@ -981,7 +981,7 @@ int vmw_compat_shader_add(struct vmw_private *dev_priv, | |||
981 | 981 | ||
982 | /* Allocate and pin a DMA buffer */ | 982 | /* Allocate and pin a DMA buffer */ |
983 | buf = kzalloc(sizeof(*buf), GFP_KERNEL); | 983 | buf = kzalloc(sizeof(*buf), GFP_KERNEL); |
984 | if (unlikely(buf == NULL)) | 984 | if (unlikely(!buf)) |
985 | return -ENOMEM; | 985 | return -ENOMEM; |
986 | 986 | ||
987 | ret = vmw_dmabuf_init(dev_priv, buf, size, &vmw_sys_ne_placement, | 987 | ret = vmw_dmabuf_init(dev_priv, buf, size, &vmw_sys_ne_placement, |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c index 50be1f034f9e..5284e8d2f7ba 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c | |||
@@ -1640,8 +1640,8 @@ int vmw_kms_stdu_init_display(struct vmw_private *dev_priv) | |||
1640 | * something arbitrarily large and we will reject any layout | 1640 | * something arbitrarily large and we will reject any layout |
1641 | * that doesn't fit prim_bb_mem later | 1641 | * that doesn't fit prim_bb_mem later |
1642 | */ | 1642 | */ |
1643 | dev->mode_config.max_width = 16384; | 1643 | dev->mode_config.max_width = 8192; |
1644 | dev->mode_config.max_height = 16384; | 1644 | dev->mode_config.max_height = 8192; |
1645 | } | 1645 | } |
1646 | 1646 | ||
1647 | vmw_kms_create_implicit_placement_property(dev_priv, false); | 1647 | vmw_kms_create_implicit_placement_property(dev_priv, false); |
diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 2c58a390123a..778272514164 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c | |||
@@ -186,8 +186,13 @@ static int host1x_probe(struct platform_device *pdev) | |||
186 | return -ENOMEM; | 186 | return -ENOMEM; |
187 | 187 | ||
188 | err = iommu_attach_device(host->domain, &pdev->dev); | 188 | err = iommu_attach_device(host->domain, &pdev->dev); |
189 | if (err) | 189 | if (err == -ENODEV) { |
190 | iommu_domain_free(host->domain); | ||
191 | host->domain = NULL; | ||
192 | goto skip_iommu; | ||
193 | } else if (err) { | ||
190 | goto fail_free_domain; | 194 | goto fail_free_domain; |
195 | } | ||
191 | 196 | ||
192 | geometry = &host->domain->geometry; | 197 | geometry = &host->domain->geometry; |
193 | 198 | ||
@@ -198,6 +203,7 @@ static int host1x_probe(struct platform_device *pdev) | |||
198 | host->iova_end = geometry->aperture_end; | 203 | host->iova_end = geometry->aperture_end; |
199 | } | 204 | } |
200 | 205 | ||
206 | skip_iommu: | ||
201 | err = host1x_channel_list_init(&host->channel_list, | 207 | err = host1x_channel_list_init(&host->channel_list, |
202 | host->info->nb_channels); | 208 | host->info->nb_channels); |
203 | if (err) { | 209 | if (err) { |