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-rw-r--r--arch/x86/events/amd/ibs.c2
-rw-r--r--arch/x86/kernel/apm_32.c2
-rw-r--r--arch/x86/kernel/cpu/mtrr/Makefile2
-rw-r--r--arch/x86/kernel/cpu/mtrr/mtrr.c (renamed from arch/x86/kernel/cpu/mtrr/main.c)33
-rw-r--r--arch/x86/kernel/e820.c32
-rw-r--r--arch/x86/kernel/early-quirks.c8
-rw-r--r--arch/x86/kernel/hpet.c5
-rw-r--r--arch/x86/kernel/uprobes.c4
-rw-r--r--arch/x86/mm/numa.c22
-rw-r--r--arch/x86/net/bpf_jit_comp.c233
10 files changed, 188 insertions, 155 deletions
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index 786fd875de92..4b98101209a1 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -889,7 +889,7 @@ static void force_ibs_eilvt_setup(void)
889 if (!ibs_eilvt_valid()) 889 if (!ibs_eilvt_valid())
890 goto out; 890 goto out;
891 891
892 pr_info("IBS: LVT offset %d assigned\n", offset); 892 pr_info("LVT offset %d assigned\n", offset);
893 893
894 return; 894 return;
895out: 895out:
diff --git a/arch/x86/kernel/apm_32.c b/arch/x86/kernel/apm_32.c
index cadeafabf167..5d0de79fdab0 100644
--- a/arch/x86/kernel/apm_32.c
+++ b/arch/x86/kernel/apm_32.c
@@ -2433,7 +2433,7 @@ MODULE_PARM_DESC(idle_threshold,
2433 "System idle percentage above which to make APM BIOS idle calls"); 2433 "System idle percentage above which to make APM BIOS idle calls");
2434module_param(idle_period, int, 0444); 2434module_param(idle_period, int, 0444);
2435MODULE_PARM_DESC(idle_period, 2435MODULE_PARM_DESC(idle_period,
2436 "Period (in sec/100) over which to caculate the idle percentage"); 2436 "Period (in sec/100) over which to calculate the idle percentage");
2437module_param(smp, bool, 0444); 2437module_param(smp, bool, 0444);
2438MODULE_PARM_DESC(smp, 2438MODULE_PARM_DESC(smp,
2439 "Set this to enable APM use on an SMP platform. Use with caution on older systems"); 2439 "Set this to enable APM use on an SMP platform. Use with caution on older systems");
diff --git a/arch/x86/kernel/cpu/mtrr/Makefile b/arch/x86/kernel/cpu/mtrr/Makefile
index ad9e5ed81181..2ad9107ee980 100644
--- a/arch/x86/kernel/cpu/mtrr/Makefile
+++ b/arch/x86/kernel/cpu/mtrr/Makefile
@@ -1,3 +1,3 @@
1obj-y := main.o if.o generic.o cleanup.o 1obj-y := mtrr.o if.o generic.o cleanup.o
2obj-$(CONFIG_X86_32) += amd.o cyrix.o centaur.o 2obj-$(CONFIG_X86_32) += amd.o cyrix.o centaur.o
3 3
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/mtrr.c
index 3ea0047beb40..9a19c800fe40 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.c
@@ -101,7 +101,7 @@ static int have_wrcomb(void)
101 if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS && 101 if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
102 dev->device == PCI_DEVICE_ID_SERVERWORKS_LE && 102 dev->device == PCI_DEVICE_ID_SERVERWORKS_LE &&
103 dev->revision <= 5) { 103 dev->revision <= 5) {
104 pr_info("mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n"); 104 pr_info("Serverworks LE rev < 6 detected. Write-combining disabled.\n");
105 pci_dev_put(dev); 105 pci_dev_put(dev);
106 return 0; 106 return 0;
107 } 107 }
@@ -111,7 +111,7 @@ static int have_wrcomb(void)
111 */ 111 */
112 if (dev->vendor == PCI_VENDOR_ID_INTEL && 112 if (dev->vendor == PCI_VENDOR_ID_INTEL &&
113 dev->device == PCI_DEVICE_ID_INTEL_82451NX) { 113 dev->device == PCI_DEVICE_ID_INTEL_82451NX) {
114 pr_info("mtrr: Intel 450NX MMC detected. Write-combining disabled.\n"); 114 pr_info("Intel 450NX MMC detected. Write-combining disabled.\n");
115 pci_dev_put(dev); 115 pci_dev_put(dev);
116 return 0; 116 return 0;
117 } 117 }
@@ -313,24 +313,24 @@ int mtrr_add_page(unsigned long base, unsigned long size,
313 return error; 313 return error;
314 314
315 if (type >= MTRR_NUM_TYPES) { 315 if (type >= MTRR_NUM_TYPES) {
316 pr_warn("mtrr: type: %u invalid\n", type); 316 pr_warn("type: %u invalid\n", type);
317 return -EINVAL; 317 return -EINVAL;
318 } 318 }
319 319
320 /* If the type is WC, check that this processor supports it */ 320 /* If the type is WC, check that this processor supports it */
321 if ((type == MTRR_TYPE_WRCOMB) && !have_wrcomb()) { 321 if ((type == MTRR_TYPE_WRCOMB) && !have_wrcomb()) {
322 pr_warn("mtrr: your processor doesn't support write-combining\n"); 322 pr_warn("your processor doesn't support write-combining\n");
323 return -ENOSYS; 323 return -ENOSYS;
324 } 324 }
325 325
326 if (!size) { 326 if (!size) {
327 pr_warn("mtrr: zero sized request\n"); 327 pr_warn("zero sized request\n");
328 return -EINVAL; 328 return -EINVAL;
329 } 329 }
330 330
331 if ((base | (base + size - 1)) >> 331 if ((base | (base + size - 1)) >>
332 (boot_cpu_data.x86_phys_bits - PAGE_SHIFT)) { 332 (boot_cpu_data.x86_phys_bits - PAGE_SHIFT)) {
333 pr_warn("mtrr: base or size exceeds the MTRR width\n"); 333 pr_warn("base or size exceeds the MTRR width\n");
334 return -EINVAL; 334 return -EINVAL;
335 } 335 }
336 336
@@ -361,8 +361,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
361 } else if (types_compatible(type, ltype)) 361 } else if (types_compatible(type, ltype))
362 continue; 362 continue;
363 } 363 }
364 pr_warn("mtrr: 0x%lx000,0x%lx000 overlaps existing" 364 pr_warn("0x%lx000,0x%lx000 overlaps existing 0x%lx000,0x%lx000\n", base, size, lbase,
365 " 0x%lx000,0x%lx000\n", base, size, lbase,
366 lsize); 365 lsize);
367 goto out; 366 goto out;
368 } 367 }
@@ -370,7 +369,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
370 if (ltype != type) { 369 if (ltype != type) {
371 if (types_compatible(type, ltype)) 370 if (types_compatible(type, ltype))
372 continue; 371 continue;
373 pr_warn("mtrr: type mismatch for %lx000,%lx000 old: %s new: %s\n", 372 pr_warn("type mismatch for %lx000,%lx000 old: %s new: %s\n",
374 base, size, mtrr_attrib_to_str(ltype), 373 base, size, mtrr_attrib_to_str(ltype),
375 mtrr_attrib_to_str(type)); 374 mtrr_attrib_to_str(type));
376 goto out; 375 goto out;
@@ -396,7 +395,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
396 } 395 }
397 } 396 }
398 } else { 397 } else {
399 pr_info("mtrr: no more MTRRs available\n"); 398 pr_info("no more MTRRs available\n");
400 } 399 }
401 error = i; 400 error = i;
402 out: 401 out:
@@ -408,8 +407,8 @@ int mtrr_add_page(unsigned long base, unsigned long size,
408static int mtrr_check(unsigned long base, unsigned long size) 407static int mtrr_check(unsigned long base, unsigned long size)
409{ 408{
410 if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) { 409 if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) {
411 pr_warn("mtrr: size and base must be multiples of 4 kiB\n"); 410 pr_warn("size and base must be multiples of 4 kiB\n");
412 pr_debug("mtrr: size: 0x%lx base: 0x%lx\n", size, base); 411 pr_debug("size: 0x%lx base: 0x%lx\n", size, base);
413 dump_stack(); 412 dump_stack();
414 return -1; 413 return -1;
415 } 414 }
@@ -500,22 +499,22 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
500 } 499 }
501 } 500 }
502 if (reg < 0) { 501 if (reg < 0) {
503 pr_debug("mtrr: no MTRR for %lx000,%lx000 found\n", 502 pr_debug("no MTRR for %lx000,%lx000 found\n",
504 base, size); 503 base, size);
505 goto out; 504 goto out;
506 } 505 }
507 } 506 }
508 if (reg >= max) { 507 if (reg >= max) {
509 pr_warn("mtrr: register: %d too big\n", reg); 508 pr_warn("register: %d too big\n", reg);
510 goto out; 509 goto out;
511 } 510 }
512 mtrr_if->get(reg, &lbase, &lsize, &ltype); 511 mtrr_if->get(reg, &lbase, &lsize, &ltype);
513 if (lsize < 1) { 512 if (lsize < 1) {
514 pr_warn("mtrr: MTRR %d not used\n", reg); 513 pr_warn("MTRR %d not used\n", reg);
515 goto out; 514 goto out;
516 } 515 }
517 if (mtrr_usage_table[reg] < 1) { 516 if (mtrr_usage_table[reg] < 1) {
518 pr_warn("mtrr: reg: %d has count=0\n", reg); 517 pr_warn("reg: %d has count=0\n", reg);
519 goto out; 518 goto out;
520 } 519 }
521 if (--mtrr_usage_table[reg] < 1) 520 if (--mtrr_usage_table[reg] < 1)
@@ -776,7 +775,7 @@ void __init mtrr_bp_init(void)
776 } 775 }
777 776
778 if (!mtrr_enabled()) { 777 if (!mtrr_enabled()) {
779 pr_info("MTRR: Disabled\n"); 778 pr_info("Disabled\n");
780 779
781 /* 780 /*
782 * PAT initialization relies on MTRR's rendezvous handler. 781 * PAT initialization relies on MTRR's rendezvous handler.