diff options
| -rw-r--r-- | arch/mips/include/asm/io.h | 1 | ||||
| -rw-r--r-- | arch/mips/include/asm/mips-cm.h | 4 | ||||
| -rw-r--r-- | arch/mips/include/asm/page.h | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/setup.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/smp-cps.c | 3 | ||||
| -rw-r--r-- | arch/mips/vdso/Makefile | 2 | ||||
| -rwxr-xr-x | scripts/ld-version.sh | 4 |
7 files changed, 14 insertions, 4 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index d10fd80dbb7e..2b4dc7ad53b8 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h | |||
| @@ -275,6 +275,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si | |||
| 275 | */ | 275 | */ |
| 276 | #define ioremap_cachable(offset, size) \ | 276 | #define ioremap_cachable(offset, size) \ |
| 277 | __ioremap_mode((offset), (size), _page_cachable_default) | 277 | __ioremap_mode((offset), (size), _page_cachable_default) |
| 278 | #define ioremap_cache ioremap_cachable | ||
| 278 | 279 | ||
| 279 | /* | 280 | /* |
| 280 | * These two are MIPS specific ioremap variant. ioremap_cacheable_cow | 281 | * These two are MIPS specific ioremap variant. ioremap_cacheable_cow |
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h index 6516e9da5133..b196825a1de9 100644 --- a/arch/mips/include/asm/mips-cm.h +++ b/arch/mips/include/asm/mips-cm.h | |||
| @@ -243,6 +243,10 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80) | |||
| 243 | #define CM_GCR_BASE_CMDEFTGT_IOCU0 2 | 243 | #define CM_GCR_BASE_CMDEFTGT_IOCU0 2 |
| 244 | #define CM_GCR_BASE_CMDEFTGT_IOCU1 3 | 244 | #define CM_GCR_BASE_CMDEFTGT_IOCU1 3 |
| 245 | 245 | ||
| 246 | /* GCR_RESET_EXT_BASE register fields */ | ||
| 247 | #define CM_GCR_RESET_EXT_BASE_EVARESET BIT(31) | ||
| 248 | #define CM_GCR_RESET_EXT_BASE_UEB BIT(30) | ||
| 249 | |||
| 246 | /* GCR_ACCESS register fields */ | 250 | /* GCR_ACCESS register fields */ |
| 247 | #define CM_GCR_ACCESS_ACCESSEN_SHF 0 | 251 | #define CM_GCR_ACCESS_ACCESSEN_SHF 0 |
| 248 | #define CM_GCR_ACCESS_ACCESSEN_MSK (_ULCAST_(0xff) << 0) | 252 | #define CM_GCR_ACCESS_ACCESSEN_MSK (_ULCAST_(0xff) << 0) |
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index 2046c0230224..21ed7150fec3 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h | |||
| @@ -33,7 +33,7 @@ | |||
| 33 | #define PAGE_SHIFT 16 | 33 | #define PAGE_SHIFT 16 |
| 34 | #endif | 34 | #endif |
| 35 | #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) | 35 | #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) |
| 36 | #define PAGE_MASK (~(PAGE_SIZE - 1)) | 36 | #define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) |
| 37 | 37 | ||
| 38 | /* | 38 | /* |
| 39 | * This is used for calculating the real page sizes | 39 | * This is used for calculating the real page sizes |
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 66aac55df349..569a7d5242dd 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
| @@ -623,7 +623,7 @@ static void __init request_crashkernel(struct resource *res) | |||
| 623 | 623 | ||
| 624 | #define USE_PROM_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER) | 624 | #define USE_PROM_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER) |
| 625 | #define USE_DTB_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB) | 625 | #define USE_DTB_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB) |
| 626 | #define EXTEND_WITH_PROM IS_ENABLED(CONFIG_MIPS_CMDLINE_EXTEND) | 626 | #define EXTEND_WITH_PROM IS_ENABLED(CONFIG_MIPS_CMDLINE_DTB_EXTEND) |
| 627 | 627 | ||
| 628 | static void __init arch_mem_init(char **cmdline_p) | 628 | static void __init arch_mem_init(char **cmdline_p) |
| 629 | { | 629 | { |
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index e04c8057b882..2ad4e4c96d61 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c | |||
| @@ -202,6 +202,9 @@ static void boot_core(unsigned core) | |||
| 202 | /* Ensure its coherency is disabled */ | 202 | /* Ensure its coherency is disabled */ |
| 203 | write_gcr_co_coherence(0); | 203 | write_gcr_co_coherence(0); |
| 204 | 204 | ||
| 205 | /* Start it with the legacy memory map and exception base */ | ||
| 206 | write_gcr_co_reset_ext_base(CM_GCR_RESET_EXT_BASE_UEB); | ||
| 207 | |||
| 205 | /* Ensure the core can access the GCRs */ | 208 | /* Ensure the core can access the GCRs */ |
| 206 | access = read_gcr_access(); | 209 | access = read_gcr_access(); |
| 207 | access |= 1 << (CM_GCR_ACCESS_ACCESSEN_SHF + core); | 210 | access |= 1 << (CM_GCR_ACCESS_ACCESSEN_SHF + core); |
diff --git a/arch/mips/vdso/Makefile b/arch/mips/vdso/Makefile index 14568900fc1d..ee3617c0c5e2 100644 --- a/arch/mips/vdso/Makefile +++ b/arch/mips/vdso/Makefile | |||
| @@ -26,7 +26,7 @@ aflags-vdso := $(ccflags-vdso) \ | |||
| 26 | # the comments on that file. | 26 | # the comments on that file. |
| 27 | # | 27 | # |
| 28 | ifndef CONFIG_CPU_MIPSR6 | 28 | ifndef CONFIG_CPU_MIPSR6 |
| 29 | ifeq ($(call ld-ifversion, -lt, 22500000, y),y) | 29 | ifeq ($(call ld-ifversion, -lt, 225000000, y),y) |
| 30 | $(warning MIPS VDSO requires binutils >= 2.25) | 30 | $(warning MIPS VDSO requires binutils >= 2.25) |
| 31 | obj-vdso-y := $(filter-out gettimeofday.o, $(obj-vdso-y)) | 31 | obj-vdso-y := $(filter-out gettimeofday.o, $(obj-vdso-y)) |
| 32 | ccflags-vdso += -DDISABLE_MIPS_VDSO | 32 | ccflags-vdso += -DDISABLE_MIPS_VDSO |
diff --git a/scripts/ld-version.sh b/scripts/ld-version.sh index 198580d245e0..d154f0877fd8 100755 --- a/scripts/ld-version.sh +++ b/scripts/ld-version.sh | |||
| @@ -2,7 +2,9 @@ | |||
| 2 | # extract linker version number from stdin and turn into single number | 2 | # extract linker version number from stdin and turn into single number |
| 3 | { | 3 | { |
| 4 | gsub(".*)", ""); | 4 | gsub(".*)", ""); |
| 5 | gsub(".*version ", ""); | ||
| 6 | gsub("-.*", ""); | ||
| 5 | split($1,a, "."); | 7 | split($1,a, "."); |
| 6 | print a[1]*10000000 + a[2]*100000 + a[3]*10000 + a[4]*100 + a[5]; | 8 | print a[1]*100000000 + a[2]*1000000 + a[3]*10000 + a[4]*100 + a[5]; |
| 7 | exit | 9 | exit |
| 8 | } | 10 | } |
