diff options
-rw-r--r-- | drivers/gpu/drm/i915/intel_csr.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c index c1ca6596ff5c..b4476d891fa3 100644 --- a/drivers/gpu/drm/i915/intel_csr.c +++ b/drivers/gpu/drm/i915/intel_csr.c | |||
@@ -34,6 +34,8 @@ | |||
34 | * low-power state and comes back to normal. | 34 | * low-power state and comes back to normal. |
35 | */ | 35 | */ |
36 | 36 | ||
37 | #define GEN12_CSR_MAX_FW_SIZE ICL_CSR_MAX_FW_SIZE | ||
38 | |||
37 | #define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bin" | 39 | #define ICL_CSR_PATH "i915/icl_dmc_ver1_07.bin" |
38 | #define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) | 40 | #define ICL_CSR_VERSION_REQUIRED CSR_VERSION(1, 7) |
39 | #define ICL_CSR_MAX_FW_SIZE 0x6000 | 41 | #define ICL_CSR_MAX_FW_SIZE 0x6000 |
@@ -467,7 +469,10 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv) | |||
467 | */ | 469 | */ |
468 | intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); | 470 | intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); |
469 | 471 | ||
470 | if (IS_ICELAKE(dev_priv)) { | 472 | if (INTEL_GEN(dev_priv) >= 12) { |
473 | /* Allow to load fw via parameter using the last known size */ | ||
474 | csr->max_fw_size = GEN12_CSR_MAX_FW_SIZE; | ||
475 | } else if (IS_ICELAKE(dev_priv)) { | ||
471 | csr->fw_path = ICL_CSR_PATH; | 476 | csr->fw_path = ICL_CSR_PATH; |
472 | csr->required_version = ICL_CSR_VERSION_REQUIRED; | 477 | csr->required_version = ICL_CSR_VERSION_REQUIRED; |
473 | csr->max_fw_size = ICL_CSR_MAX_FW_SIZE; | 478 | csr->max_fw_size = ICL_CSR_MAX_FW_SIZE; |