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-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/reg.h31
-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c11
2 files changed, 41 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h
index cc27c5de5a1d..4afc8486eb9a 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h
@@ -6401,6 +6401,36 @@ static inline void mlxsw_reg_mgpc_pack(char *payload, u32 counter_index,
6401 mlxsw_reg_mgpc_opcode_set(payload, opcode); 6401 mlxsw_reg_mgpc_opcode_set(payload, opcode);
6402} 6402}
6403 6403
6404/* TIGCR - Tunneling IPinIP General Configuration Register
6405 * -------------------------------------------------------
6406 * The TIGCR register is used for setting up the IPinIP Tunnel configuration.
6407 */
6408#define MLXSW_REG_TIGCR_ID 0xA801
6409#define MLXSW_REG_TIGCR_LEN 0x10
6410
6411MLXSW_REG_DEFINE(tigcr, MLXSW_REG_TIGCR_ID, MLXSW_REG_TIGCR_LEN);
6412
6413/* reg_tigcr_ipip_ttlc
6414 * For IPinIP Tunnel encapsulation: whether to copy the ttl from the packet
6415 * header.
6416 * Access: RW
6417 */
6418MLXSW_ITEM32(reg, tigcr, ttlc, 0x04, 8, 1);
6419
6420/* reg_tigcr_ipip_ttl_uc
6421 * The TTL for IPinIP Tunnel encapsulation of unicast packets if
6422 * reg_tigcr_ipip_ttlc is unset.
6423 * Access: RW
6424 */
6425MLXSW_ITEM32(reg, tigcr, ttl_uc, 0x04, 0, 8);
6426
6427static inline void mlxsw_reg_tigcr_pack(char *payload, bool ttlc, u8 ttl_uc)
6428{
6429 MLXSW_REG_ZERO(tigcr, payload);
6430 mlxsw_reg_tigcr_ttlc_set(payload, ttlc);
6431 mlxsw_reg_tigcr_ttl_uc_set(payload, ttl_uc);
6432}
6433
6404/* SBPR - Shared Buffer Pools Register 6434/* SBPR - Shared Buffer Pools Register
6405 * ----------------------------------- 6435 * -----------------------------------
6406 * The SBPR configures and retrieves the shared buffer pools and configuration. 6436 * The SBPR configures and retrieves the shared buffer pools and configuration.
@@ -6881,6 +6911,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
6881 MLXSW_REG(mcc), 6911 MLXSW_REG(mcc),
6882 MLXSW_REG(mcda), 6912 MLXSW_REG(mcda),
6883 MLXSW_REG(mgpc), 6913 MLXSW_REG(mgpc),
6914 MLXSW_REG(tigcr),
6884 MLXSW_REG(sbpr), 6915 MLXSW_REG(sbpr),
6885 MLXSW_REG(sbcm), 6916 MLXSW_REG(sbcm),
6886 MLXSW_REG(sbpm), 6917 MLXSW_REG(sbpm),
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
index c16718d296d3..5189022a1c8c 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c
@@ -5896,11 +5896,20 @@ static void mlxsw_sp_rifs_fini(struct mlxsw_sp *mlxsw_sp)
5896 kfree(mlxsw_sp->router->rifs); 5896 kfree(mlxsw_sp->router->rifs);
5897} 5897}
5898 5898
5899static int
5900mlxsw_sp_ipip_config_tigcr(struct mlxsw_sp *mlxsw_sp)
5901{
5902 char tigcr_pl[MLXSW_REG_TIGCR_LEN];
5903
5904 mlxsw_reg_tigcr_pack(tigcr_pl, true, 0);
5905 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(tigcr), tigcr_pl);
5906}
5907
5899static int mlxsw_sp_ipips_init(struct mlxsw_sp *mlxsw_sp) 5908static int mlxsw_sp_ipips_init(struct mlxsw_sp *mlxsw_sp)
5900{ 5909{
5901 mlxsw_sp->router->ipip_ops_arr = mlxsw_sp_ipip_ops_arr; 5910 mlxsw_sp->router->ipip_ops_arr = mlxsw_sp_ipip_ops_arr;
5902 INIT_LIST_HEAD(&mlxsw_sp->router->ipip_list); 5911 INIT_LIST_HEAD(&mlxsw_sp->router->ipip_list);
5903 return 0; 5912 return mlxsw_sp_ipip_config_tigcr(mlxsw_sp);
5904} 5913}
5905 5914
5906static void mlxsw_sp_ipips_fini(struct mlxsw_sp *mlxsw_sp) 5915static void mlxsw_sp_ipips_fini(struct mlxsw_sp *mlxsw_sp)