diff options
-rw-r--r-- | arch/arm64/kernel/module.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/kernel/module.c b/arch/arm64/kernel/module.c index 8c3a7264fb0f..f469e0435903 100644 --- a/arch/arm64/kernel/module.c +++ b/arch/arm64/kernel/module.c | |||
@@ -74,7 +74,7 @@ enum aarch64_reloc_op { | |||
74 | RELOC_OP_PAGE, | 74 | RELOC_OP_PAGE, |
75 | }; | 75 | }; |
76 | 76 | ||
77 | static u64 do_reloc(enum aarch64_reloc_op reloc_op, void *place, u64 val) | 77 | static u64 do_reloc(enum aarch64_reloc_op reloc_op, __le32 *place, u64 val) |
78 | { | 78 | { |
79 | switch (reloc_op) { | 79 | switch (reloc_op) { |
80 | case RELOC_OP_ABS: | 80 | case RELOC_OP_ABS: |
@@ -121,12 +121,12 @@ enum aarch64_insn_movw_imm_type { | |||
121 | AARCH64_INSN_IMM_MOVKZ, | 121 | AARCH64_INSN_IMM_MOVKZ, |
122 | }; | 122 | }; |
123 | 123 | ||
124 | static int reloc_insn_movw(enum aarch64_reloc_op op, void *place, u64 val, | 124 | static int reloc_insn_movw(enum aarch64_reloc_op op, __le32 *place, u64 val, |
125 | int lsb, enum aarch64_insn_movw_imm_type imm_type) | 125 | int lsb, enum aarch64_insn_movw_imm_type imm_type) |
126 | { | 126 | { |
127 | u64 imm; | 127 | u64 imm; |
128 | s64 sval; | 128 | s64 sval; |
129 | u32 insn = le32_to_cpu(*(u32 *)place); | 129 | u32 insn = le32_to_cpu(*place); |
130 | 130 | ||
131 | sval = do_reloc(op, place, val); | 131 | sval = do_reloc(op, place, val); |
132 | imm = sval >> lsb; | 132 | imm = sval >> lsb; |
@@ -154,7 +154,7 @@ static int reloc_insn_movw(enum aarch64_reloc_op op, void *place, u64 val, | |||
154 | 154 | ||
155 | /* Update the instruction with the new encoding. */ | 155 | /* Update the instruction with the new encoding. */ |
156 | insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_16, insn, imm); | 156 | insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_16, insn, imm); |
157 | *(u32 *)place = cpu_to_le32(insn); | 157 | *place = cpu_to_le32(insn); |
158 | 158 | ||
159 | if (imm > U16_MAX) | 159 | if (imm > U16_MAX) |
160 | return -ERANGE; | 160 | return -ERANGE; |
@@ -162,12 +162,12 @@ static int reloc_insn_movw(enum aarch64_reloc_op op, void *place, u64 val, | |||
162 | return 0; | 162 | return 0; |
163 | } | 163 | } |
164 | 164 | ||
165 | static int reloc_insn_imm(enum aarch64_reloc_op op, void *place, u64 val, | 165 | static int reloc_insn_imm(enum aarch64_reloc_op op, __le32 *place, u64 val, |
166 | int lsb, int len, enum aarch64_insn_imm_type imm_type) | 166 | int lsb, int len, enum aarch64_insn_imm_type imm_type) |
167 | { | 167 | { |
168 | u64 imm, imm_mask; | 168 | u64 imm, imm_mask; |
169 | s64 sval; | 169 | s64 sval; |
170 | u32 insn = le32_to_cpu(*(u32 *)place); | 170 | u32 insn = le32_to_cpu(*place); |
171 | 171 | ||
172 | /* Calculate the relocation value. */ | 172 | /* Calculate the relocation value. */ |
173 | sval = do_reloc(op, place, val); | 173 | sval = do_reloc(op, place, val); |
@@ -179,7 +179,7 @@ static int reloc_insn_imm(enum aarch64_reloc_op op, void *place, u64 val, | |||
179 | 179 | ||
180 | /* Update the instruction's immediate field. */ | 180 | /* Update the instruction's immediate field. */ |
181 | insn = aarch64_insn_encode_immediate(imm_type, insn, imm); | 181 | insn = aarch64_insn_encode_immediate(imm_type, insn, imm); |
182 | *(u32 *)place = cpu_to_le32(insn); | 182 | *place = cpu_to_le32(insn); |
183 | 183 | ||
184 | /* | 184 | /* |
185 | * Extract the upper value bits (including the sign bit) and | 185 | * Extract the upper value bits (including the sign bit) and |