selftests/powerpc: Add ptrace tests for GPR/FPR registers

This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Simon Guo <wei.guo.simon@gmail.com>
[mpe: Add #defines for the new note types when headers don't define them]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

8 files changed, 781 insertions, 1 deletions

diff --git a/tools/testing/selftests/powerpc/Makefile b/tools/testing/selftests/powerpc/Makefile
index 561afa1921b9..c2c4211ba58b 100644
--- a/tools/testing/selftests/powerpc/Makefile
+++ b/tools/testing/selftests/powerpc/Makefile
@@ -26,7 +26,8 @@ SUB_DIRS = alignment		\
            syscalls             \
            tm                   \
            vphn         \
-           math
+           math         \
+           ptrace
 
 endif
 
diff --git a/tools/testing/selftests/powerpc/include/reg.h b/tools/testing/selftests/powerpc/include/reg.h
index bb843b2d9bac..4afdebcce4cd 100644
--- a/tools/testing/selftests/powerpc/include/reg.h
+++ b/tools/testing/selftests/powerpc/include/reg.h
@@ -81,4 +81,65 @@
 #define STXVD2X(xs, ra, rb)     .long (0x7c000798 | VSX_XX1((xs), (ra), (rb)))
 #define LXVD2X(xs, ra, rb)      .long (0x7c000698 | VSX_XX1((xs), (ra), (rb)))
 
+#define ASM_LOAD_GPR_IMMED(_asm_symbol_name_immed) \
+                "li 14, %[" #_asm_symbol_name_immed "];" \
+                "li 15, %[" #_asm_symbol_name_immed "];" \
+                "li 16, %[" #_asm_symbol_name_immed "];" \
+                "li 17, %[" #_asm_symbol_name_immed "];" \
+                "li 18, %[" #_asm_symbol_name_immed "];" \
+                "li 19, %[" #_asm_symbol_name_immed "];" \
+                "li 20, %[" #_asm_symbol_name_immed "];" \
+                "li 21, %[" #_asm_symbol_name_immed "];" \
+                "li 22, %[" #_asm_symbol_name_immed "];" \
+                "li 23, %[" #_asm_symbol_name_immed "];" \
+                "li 24, %[" #_asm_symbol_name_immed "];" \
+                "li 25, %[" #_asm_symbol_name_immed "];" \
+                "li 26, %[" #_asm_symbol_name_immed "];" \
+                "li 27, %[" #_asm_symbol_name_immed "];" \
+                "li 28, %[" #_asm_symbol_name_immed "];" \
+                "li 29, %[" #_asm_symbol_name_immed "];" \
+                "li 30, %[" #_asm_symbol_name_immed "];" \
+                "li 31, %[" #_asm_symbol_name_immed "];"
+
+#define ASM_LOAD_FPR_SINGLE_PRECISION(_asm_symbol_name_addr) \
+                "lfs 0, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 1, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 2, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 3, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 4, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 5, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 6, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 7, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 8, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 9, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 10, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 11, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 12, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 13, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 14, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 15, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 16, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 17, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 18, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 19, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 20, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 21, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 22, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 23, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 24, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 25, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 26, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 27, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 28, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 29, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 30, 0(%[" #_asm_symbol_name_addr "]);" \
+                "lfs 31, 0(%[" #_asm_symbol_name_addr "]);"
+
+#ifndef __ASSEMBLER__
+void store_gpr(unsigned long *addr);
+void load_gpr(unsigned long *addr);
+void load_fpr_single_precision(float *addr);
+void store_fpr_single_precision(float *addr);
+#endif /* end of __ASSEMBLER__ */
+
 #endif /* _SELFTESTS_POWERPC_REG_H */
diff --git a/tools/testing/selftests/powerpc/lib/reg.S b/tools/testing/selftests/powerpc/lib/reg.S
new file mode 100644
index 000000000000..b6aee2f79454
--- /dev/null
+++ b/tools/testing/selftests/powerpc/lib/reg.S
@@ -0,0 +1,132 @@
+/*
+ * test helper assembly functions
+ *
+ * Copyright (C) 2016 Simon Guo, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <ppc-asm.h>
+#include "reg.h"
+
+
+/* Non volatile GPR - unsigned long buf[18] */
+FUNC_START(load_gpr)
+        ld      14, 0*8(3)
+        ld      15, 1*8(3)
+        ld      16, 2*8(3)
+        ld      17, 3*8(3)
+        ld      18, 4*8(3)
+        ld      19, 5*8(3)
+        ld      20, 6*8(3)
+        ld      21, 7*8(3)
+        ld      22, 8*8(3)
+        ld      23, 9*8(3)
+        ld      24, 10*8(3)
+        ld      25, 11*8(3)
+        ld      26, 12*8(3)
+        ld      27, 13*8(3)
+        ld      28, 14*8(3)
+        ld      29, 15*8(3)
+        ld      30, 16*8(3)
+        ld      31, 17*8(3)
+        blr
+FUNC_END(load_gpr)
+
+FUNC_START(store_gpr)
+        std     14, 0*8(3)
+        std     15, 1*8(3)
+        std     16, 2*8(3)
+        std     17, 3*8(3)
+        std     18, 4*8(3)
+        std     19, 5*8(3)
+        std     20, 6*8(3)
+        std     21, 7*8(3)
+        std     22, 8*8(3)
+        std     23, 9*8(3)
+        std     24, 10*8(3)
+        std     25, 11*8(3)
+        std     26, 12*8(3)
+        std     27, 13*8(3)
+        std     28, 14*8(3)
+        std     29, 15*8(3)
+        std     30, 16*8(3)
+        std     31, 17*8(3)
+        blr
+FUNC_END(store_gpr)
+
+/* Single Precision Float - float buf[32] */
+FUNC_START(load_fpr_single_precision)
+        lfs 0, 0*4(3)
+        lfs 1, 1*4(3)
+        lfs 2, 2*4(3)
+        lfs 3, 3*4(3)
+        lfs 4, 4*4(3)
+        lfs 5, 5*4(3)
+        lfs 6, 6*4(3)
+        lfs 7, 7*4(3)
+        lfs 8, 8*4(3)
+        lfs 9, 9*4(3)
+        lfs 10, 10*4(3)
+        lfs 11, 11*4(3)
+        lfs 12, 12*4(3)
+        lfs 13, 13*4(3)
+        lfs 14, 14*4(3)
+        lfs 15, 15*4(3)
+        lfs 16, 16*4(3)
+        lfs 17, 17*4(3)
+        lfs 18, 18*4(3)
+        lfs 19, 19*4(3)
+        lfs 20, 20*4(3)
+        lfs 21, 21*4(3)
+        lfs 22, 22*4(3)
+        lfs 23, 23*4(3)
+        lfs 24, 24*4(3)
+        lfs 25, 25*4(3)
+        lfs 26, 26*4(3)
+        lfs 27, 27*4(3)
+        lfs 28, 28*4(3)
+        lfs 29, 29*4(3)
+        lfs 30, 30*4(3)
+        lfs 31, 31*4(3)
+        blr
+FUNC_END(load_fpr_single_precision)
+
+/* Single Precision Float - float buf[32] */
+FUNC_START(store_fpr_single_precision)
+        stfs 0, 0*4(3)