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authorTony Lindgren <tony@atomide.com>2018-08-28 12:58:03 -0400
committerTony Lindgren <tony@atomide.com>2018-08-28 12:58:03 -0400
commitea4d65f14f6aaa53e379b93c5544245ef081b3e7 (patch)
treea15485f4f1cf547a52b31fa8e16e14b9579b7200 /tools/perf
parentce32d59ee2cd036f6e8a6ed17a06a0b0bec5c67c (diff)
parent496f3347d834aec91c38b45d6249ed00f58ad233 (diff)
Merge branch 'perm-fix' into omap-for-v4.19/fixes-v2
Diffstat (limited to 'tools/perf')
-rw-r--r--tools/perf/Documentation/perf-annotate.txt9
-rw-r--r--tools/perf/Documentation/perf-list.txt10
-rw-r--r--tools/perf/Documentation/perf-record.txt4
-rw-r--r--tools/perf/Documentation/perf-report.txt9
-rw-r--r--tools/perf/Makefile4
-rw-r--r--tools/perf/Makefile.config6
-rw-r--r--tools/perf/Makefile.perf10
-rw-r--r--tools/perf/arch/arm64/Makefile21
-rwxr-xr-xtools/perf/arch/arm64/entry/syscalls/mksyscalltbl62
-rw-r--r--tools/perf/arch/arm64/util/arm-spe.c1
-rw-r--r--tools/perf/arch/powerpc/util/skip-callchain-idx.c10
-rw-r--r--tools/perf/arch/powerpc/util/sym-handling.c4
-rw-r--r--tools/perf/arch/s390/util/auxtrace.c1
-rw-r--r--tools/perf/arch/s390/util/kvm-stat.c2
-rw-r--r--tools/perf/arch/x86/Makefile3
-rw-r--r--tools/perf/builtin-annotate.c4
-rw-r--r--tools/perf/builtin-c2c.c7
-rw-r--r--tools/perf/builtin-diff.c2
-rw-r--r--tools/perf/builtin-kmem.c6
-rw-r--r--tools/perf/builtin-report.c13
-rw-r--r--tools/perf/builtin-script.c6
-rw-r--r--tools/perf/builtin-stat.c60
-rw-r--r--tools/perf/builtin-top.c2
-rw-r--r--tools/perf/builtin-trace.c210
-rwxr-xr-xtools/perf/check-headers.sh20
-rw-r--r--tools/perf/examples/bpf/augmented_syscalls.c55
-rw-r--r--tools/perf/examples/bpf/hello.c9
-rw-r--r--tools/perf/examples/bpf/sys_enter_openat.c33
-rw-r--r--tools/perf/include/bpf/bpf.h23
-rw-r--r--tools/perf/include/bpf/stdio.h19
-rw-r--r--tools/perf/perf.h2
-rw-r--r--tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json32
-rw-r--r--tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json87
-rw-r--r--tools/perf/pmu-events/arch/arm64/mapfile.csv1
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z10/basic.json12
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z10/crypto.json16
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z10/extended.json18
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z13/basic.json12
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z13/crypto.json16
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z13/extended.json56
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z13/transaction.json7
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z14/basic.json8
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z14/crypto.json16
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z14/extended.json53
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z14/transaction.json7
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z196/basic.json12
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z196/crypto.json16
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_z196/extended.json24
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_zec12/basic.json12
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_zec12/crypto.json16
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_zec12/extended.json35
-rw-r--r--tools/perf/pmu-events/arch/s390/cf_zec12/transaction.json7
-rw-r--r--tools/perf/pmu-events/jevents.c2
-rw-r--r--tools/perf/tests/bitmap.c2
-rw-r--r--tools/perf/tests/builtin-test.c2
-rw-r--r--tools/perf/tests/code-reading.c4
-rw-r--r--tools/perf/tests/kmod-path.c136
-rw-r--r--tools/perf/tests/mem2node.c2
-rw-r--r--tools/perf/tests/parse-events.c18
-rwxr-xr-xtools/perf/tests/shell/record+probe_libc_inet_pton.sh36
-rw-r--r--tools/perf/trace/beauty/Build1
-rw-r--r--tools/perf/trace/beauty/beauty.h3
-rwxr-xr-xtools/perf/trace/beauty/drm_ioctl.sh9
-rwxr-xr-xtools/perf/trace/beauty/kcmp_type.sh2
-rwxr-xr-xtools/perf/trace/beauty/kvm_ioctl.sh4
-rwxr-xr-xtools/perf/trace/beauty/madvise_behavior.sh2
-rwxr-xr-xtools/perf/trace/beauty/perf_ioctl.sh2
-rwxr-xr-xtools/perf/trace/beauty/pkey_alloc_access_rights.sh2
-rwxr-xr-xtools/perf/trace/beauty/sndrv_ctl_ioctl.sh4
-rwxr-xr-xtools/perf/trace/beauty/sndrv_pcm_ioctl.sh4
-rw-r--r--tools/perf/trace/beauty/socket.c28
-rwxr-xr-xtools/perf/trace/beauty/socket_ipproto.sh11
-rwxr-xr-xtools/perf/trace/beauty/vhost_virtio_ioctl.sh6
-rw-r--r--tools/perf/ui/browsers/annotate.c76
-rw-r--r--tools/perf/ui/stdio/hist.c8
-rw-r--r--tools/perf/util/Build1
-rw-r--r--tools/perf/util/annotate.c305
-rw-r--r--tools/perf/util/annotate.h54
-rw-r--r--tools/perf/util/auxtrace.c6
-rw-r--r--tools/perf/util/auxtrace.h1
-rw-r--r--tools/perf/util/bpf-loader.c52
-rw-r--r--tools/perf/util/bpf-loader.h23
-rw-r--r--tools/perf/util/comm.c16
-rw-r--r--tools/perf/util/compress.h2
-rw-r--r--tools/perf/util/cs-etm-decoder/cs-etm-decoder.c10
-rw-r--r--tools/perf/util/cs-etm-decoder/cs-etm-decoder.h1
-rw-r--r--tools/perf/util/cs-etm.c71
-rw-r--r--tools/perf/util/data-convert-bt.c6
-rw-r--r--tools/perf/util/dso.c111
-rw-r--r--tools/perf/util/dso.h13
-rw-r--r--tools/perf/util/event.c13
-rw-r--r--tools/perf/util/evlist.c2
-rw-r--r--tools/perf/util/evsel.c27
-rw-r--r--tools/perf/util/evsel.h16
-rw-r--r--tools/perf/util/header.c11
-rw-r--r--tools/perf/util/hist.h2
-rw-r--r--tools/perf/util/llvm-utils.c31
-rw-r--r--tools/perf/util/llvm-utils.h9
-rw-r--r--tools/perf/util/lzma.c20
-rw-r--r--tools/perf/util/machine.c83
-rw-r--r--tools/perf/util/machine.h2
-rw-r--r--tools/perf/util/map.c44
-rw-r--r--tools/perf/util/map.h1
-rw-r--r--tools/perf/util/metricgroup.c26
-rw-r--r--tools/perf/util/metricgroup.h1
-rw-r--r--tools/perf/util/mmap.c3
-rw-r--r--tools/perf/util/mmap.h3
-rw-r--r--tools/perf/util/namespaces.c3
-rw-r--r--tools/perf/util/parse-events.c20
-rw-r--r--tools/perf/util/pmu.c6
-rw-r--r--tools/perf/util/python.c30
-rw-r--r--tools/perf/util/s390-cpumsf-kernel.h71
-rw-r--r--tools/perf/util/s390-cpumsf.c945
-rw-r--r--tools/perf/util/s390-cpumsf.h21
-rw-r--r--tools/perf/util/scripting-engines/trace-event-perl.c2
-rw-r--r--tools/perf/util/scripting-engines/trace-event-python.c6
-rw-r--r--tools/perf/util/setup.py10
-rw-r--r--tools/perf/util/sort.c16
-rw-r--r--tools/perf/util/sort.h2
-rw-r--r--tools/perf/util/stat-shadow.c5
-rw-r--r--tools/perf/util/syscalltbl.c4
-rw-r--r--tools/perf/util/trace-event-parse.c34
-rw-r--r--tools/perf/util/trace-event-read.c44
-rw-r--r--tools/perf/util/trace-event-scripting.c4
-rw-r--r--tools/perf/util/trace-event.c28
-rw-r--r--tools/perf/util/trace-event.h20
-rw-r--r--tools/perf/util/unwind-libdw.c2
-rw-r--r--tools/perf/util/unwind-libunwind-local.c2
-rw-r--r--tools/perf/util/zlib.c18
129 files changed, 3060 insertions, 653 deletions
diff --git a/tools/perf/Documentation/perf-annotate.txt b/tools/perf/Documentation/perf-annotate.txt
index 749cc6055dac..e8c972f89357 100644
--- a/tools/perf/Documentation/perf-annotate.txt
+++ b/tools/perf/Documentation/perf-annotate.txt
@@ -118,6 +118,15 @@ OPTIONS
118--group:: 118--group::
119 Show event group information together 119 Show event group information together
120 120
121--percent-type::
122 Set annotation percent type from following choices:
123 global-period, local-period, global-hits, local-hits
124
125 The local/global keywords set if the percentage is computed
126 in the scope of the function (local) or the whole data (global).
127 The period/hits keywords set the base the percentage is computed
128 on - the samples period or the number of samples (hits).
129
121SEE ALSO 130SEE ALSO
122-------- 131--------
123linkperf:perf-record[1], linkperf:perf-report[1] 132linkperf:perf-record[1], linkperf:perf-report[1]
diff --git a/tools/perf/Documentation/perf-list.txt b/tools/perf/Documentation/perf-list.txt
index 11300dbe35c5..236b9b97dfdb 100644
--- a/tools/perf/Documentation/perf-list.txt
+++ b/tools/perf/Documentation/perf-list.txt
@@ -18,6 +18,10 @@ various perf commands with the -e option.
18 18
19OPTIONS 19OPTIONS
20------- 20-------
21-d::
22--desc::
23Print extra event descriptions. (default)
24
21--no-desc:: 25--no-desc::
22Don't print descriptions. 26Don't print descriptions.
23 27
@@ -25,11 +29,13 @@ Don't print descriptions.
25--long-desc:: 29--long-desc::
26Print longer event descriptions. 30Print longer event descriptions.
27 31
32--debug::
33Enable debugging output.
34
28--details:: 35--details::
29Print how named events are resolved internally into perf events, and also 36Print how named events are resolved internally into perf events, and also
30any extra expressions computed by perf stat. 37any extra expressions computed by perf stat.
31 38
32
33[[EVENT_MODIFIERS]] 39[[EVENT_MODIFIERS]]
34EVENT MODIFIERS 40EVENT MODIFIERS
35--------------- 41---------------
@@ -234,7 +240,7 @@ perf also supports group leader sampling using the :S specifier.
234 perf record -e '{cycles,instructions}:S' ... 240 perf record -e '{cycles,instructions}:S' ...
235 perf report --group 241 perf report --group
236 242
237Normally all events in a event group sample, but with :S only 243Normally all events in an event group sample, but with :S only
238the first event (the leader) samples, and it only reads the values of the 244the first event (the leader) samples, and it only reads the values of the
239other events in the group. 245other events in the group.
240 246
diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt
index 04168da4268e..246dee081efd 100644
--- a/tools/perf/Documentation/perf-record.txt
+++ b/tools/perf/Documentation/perf-record.txt
@@ -94,7 +94,7 @@ OPTIONS
94 "perf report" to view group events together. 94 "perf report" to view group events together.
95 95
96--filter=<filter>:: 96--filter=<filter>::
97 Event filter. This option should follow a event selector (-e) which 97 Event filter. This option should follow an event selector (-e) which
98 selects either tracepoint event(s) or a hardware trace PMU 98 selects either tracepoint event(s) or a hardware trace PMU
99 (e.g. Intel PT or CoreSight). 99 (e.g. Intel PT or CoreSight).
100 100
@@ -153,7 +153,7 @@ OPTIONS
153 153
154--exclude-perf:: 154--exclude-perf::
155 Don't record events issued by perf itself. This option should follow 155 Don't record events issued by perf itself. This option should follow
156 a event selector (-e) which selects tracepoint event(s). It adds a 156 an event selector (-e) which selects tracepoint event(s). It adds a
157 filter expression 'common_pid != $PERFPID' to filters. If other 157 filter expression 'common_pid != $PERFPID' to filters. If other
158 '--filter' exists, the new filter expression will be combined with 158 '--filter' exists, the new filter expression will be combined with
159 them by '&&'. 159 them by '&&'.
diff --git a/tools/perf/Documentation/perf-report.txt b/tools/perf/Documentation/perf-report.txt
index 917e36fde6d8..474a4941f65d 100644
--- a/tools/perf/Documentation/perf-report.txt
+++ b/tools/perf/Documentation/perf-report.txt
@@ -477,6 +477,15 @@ include::itrace.txt[]
477 Display monitored tasks stored in perf data. Displaying pid/tid/ppid 477 Display monitored tasks stored in perf data. Displaying pid/tid/ppid
478 plus the command string aligned to distinguish parent and child tasks. 478 plus the command string aligned to distinguish parent and child tasks.
479 479
480--percent-type::
481 Set annotation percent type from following choices:
482 global-period, local-period, global-hits, local-hits
483
484 The local/global keywords set if the percentage is computed
485 in the scope of the function (local) or the whole data (global).
486 The period/hits keywords set the base the percentage is computed
487 on - the samples period or the number of samples (hits).
488
480include::callchain-overhead-calculation.txt[] 489include::callchain-overhead-calculation.txt[]
481 490
482SEE ALSO 491SEE ALSO
diff --git a/tools/perf/Makefile b/tools/perf/Makefile
index 225454416ed5..7902a5681fc8 100644
--- a/tools/perf/Makefile
+++ b/tools/perf/Makefile
@@ -84,10 +84,10 @@ endif # has_clean
84endif # MAKECMDGOALS 84endif # MAKECMDGOALS
85 85
86# 86#
87# The clean target is not really parallel, don't print the jobs info: 87# Explicitly disable parallelism for the clean target.
88# 88#
89clean: 89clean:
90 $(make) 90 $(make) -j1
91 91
92# 92#
93# The build-test target is not really parallel, don't print the jobs info, 93# The build-test target is not really parallel, don't print the jobs info,
diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config
index f5a3b402589e..f6d1a03c7523 100644
--- a/tools/perf/Makefile.config
+++ b/tools/perf/Makefile.config
@@ -54,6 +54,8 @@ endif
54 54
55ifeq ($(SRCARCH),arm64) 55ifeq ($(SRCARCH),arm64)
56 NO_PERF_REGS := 0 56 NO_PERF_REGS := 0
57 NO_SYSCALL_TABLE := 0
58 CFLAGS += -I$(OUTPUT)arch/arm64/include/generated
57 LIBUNWIND_LIBS = -lunwind -lunwind-aarch64 59 LIBUNWIND_LIBS = -lunwind -lunwind-aarch64
58endif 60endif
59 61
@@ -905,8 +907,8 @@ bindir = $(abspath $(prefix)/$(bindir_relative))
905mandir = share/man 907mandir = share/man
906infodir = share/info 908infodir = share/info
907perfexecdir = libexec/perf-core 909perfexecdir = libexec/perf-core
908perf_include_dir = lib/include/perf 910perf_include_dir = lib/perf/include
909perf_examples_dir = lib/examples/perf 911perf_examples_dir = lib/perf/examples
910sharedir = $(prefix)/share 912sharedir = $(prefix)/share
911template_dir = share/perf-core/templates 913template_dir = share/perf-core/templates
912STRACE_GROUPS_DIR = share/perf-core/strace/groups 914STRACE_GROUPS_DIR = share/perf-core/strace/groups
diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
index ecc9fc952655..b3d1b12a5081 100644
--- a/tools/perf/Makefile.perf
+++ b/tools/perf/Makefile.perf
@@ -384,6 +384,8 @@ export INSTALL SHELL_PATH
384 384
385SHELL = $(SHELL_PATH) 385SHELL = $(SHELL_PATH)
386 386
387linux_uapi_dir := $(srctree)/tools/include/uapi/linux
388
387beauty_outdir := $(OUTPUT)trace/beauty/generated 389beauty_outdir := $(OUTPUT)trace/beauty/generated
388beauty_ioctl_outdir := $(beauty_outdir)/ioctl 390beauty_ioctl_outdir := $(beauty_outdir)/ioctl
389drm_ioctl_array := $(beauty_ioctl_outdir)/drm_ioctl_array.c 391drm_ioctl_array := $(beauty_ioctl_outdir)/drm_ioctl_array.c
@@ -431,6 +433,12 @@ kvm_ioctl_tbl := $(srctree)/tools/perf/trace/beauty/kvm_ioctl.sh
431$(kvm_ioctl_array): $(kvm_hdr_dir)/kvm.h $(kvm_ioctl_tbl) 433$(kvm_ioctl_array): $(kvm_hdr_dir)/kvm.h $(kvm_ioctl_tbl)
432 $(Q)$(SHELL) '$(kvm_ioctl_tbl)' $(kvm_hdr_dir) > $@ 434 $(Q)$(SHELL) '$(kvm_ioctl_tbl)' $(kvm_hdr_dir) > $@
433 435
436socket_ipproto_array := $(beauty_outdir)/socket_ipproto_array.c
437socket_ipproto_tbl := $(srctree)/tools/perf/trace/beauty/socket_ipproto.sh
438
439$(socket_ipproto_array): $(linux_uapi_dir)/in.h $(socket_ipproto_tbl)
440 $(Q)$(SHELL) '$(socket_ipproto_tbl)' $(linux_uapi_dir) > $@
441
434vhost_virtio_ioctl_array := $(beauty_ioctl_outdir)/vhost_virtio_ioctl_array.c 442vhost_virtio_ioctl_array := $(beauty_ioctl_outdir)/vhost_virtio_ioctl_array.c
435vhost_virtio_hdr_dir := $(srctree)/tools/include/uapi/linux 443vhost_virtio_hdr_dir := $(srctree)/tools/include/uapi/linux
436vhost_virtio_ioctl_tbl := $(srctree)/tools/perf/trace/beauty/vhost_virtio_ioctl.sh 444vhost_virtio_ioctl_tbl := $(srctree)/tools/perf/trace/beauty/vhost_virtio_ioctl.sh
@@ -566,6 +574,7 @@ prepare: $(OUTPUT)PERF-VERSION-FILE $(OUTPUT)common-cmds.h archheaders $(drm_ioc
566 $(sndrv_ctl_ioctl_array) \ 574 $(sndrv_ctl_ioctl_array) \
567 $(kcmp_type_array) \ 575 $(kcmp_type_array) \
568 $(kvm_ioctl_array) \ 576 $(kvm_ioctl_array) \
577 $(socket_ipproto_array) \
569 $(vhost_virtio_ioctl_array) \ 578 $(vhost_virtio_ioctl_array) \
570 $(madvise_behavior_array) \ 579 $(madvise_behavior_array) \
571 $(perf_ioctl_array) \ 580 $(perf_ioctl_array) \
@@ -860,6 +869,7 @@ clean:: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean $(LIBBPF)-clean $(LIBSUBCMD)-clea
860 $(OUTPUT)$(sndrv_pcm_ioctl_array) \ 869 $(OUTPUT)$(sndrv_pcm_ioctl_array) \
861 $(OUTPUT)$(kvm_ioctl_array) \ 870 $(OUTPUT)$(kvm_ioctl_array) \
862 $(OUTPUT)$(kcmp_type_array) \ 871 $(OUTPUT)$(kcmp_type_array) \
872 $(OUTPUT)$(socket_ipproto_array) \
863 $(OUTPUT)$(vhost_virtio_ioctl_array) \ 873 $(OUTPUT)$(vhost_virtio_ioctl_array) \
864 $(OUTPUT)$(perf_ioctl_array) \ 874 $(OUTPUT)$(perf_ioctl_array) \
865 $(OUTPUT)$(prctl_option_array) \ 875 $(OUTPUT)$(prctl_option_array) \
diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile
index 91de4860faad..f013b115dc86 100644
--- a/tools/perf/arch/arm64/Makefile
+++ b/tools/perf/arch/arm64/Makefile
@@ -4,3 +4,24 @@ PERF_HAVE_DWARF_REGS := 1
4endif 4endif
5PERF_HAVE_JITDUMP := 1 5PERF_HAVE_JITDUMP := 1
6PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1 6PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
7
8#
9# Syscall table generation for perf
10#
11
12out := $(OUTPUT)arch/arm64/include/generated/asm
13header := $(out)/syscalls.c
14sysdef := $(srctree)/tools/include/uapi/asm-generic/unistd.h
15sysprf := $(srctree)/tools/perf/arch/arm64/entry/syscalls/
16systbl := $(sysprf)/mksyscalltbl
17
18# Create output directory if not already present
19_dummy := $(shell [ -d '$(out)' ] || mkdir -p '$(out)')
20
21$(header): $(sysdef) $(systbl)
22 $(Q)$(SHELL) '$(systbl)' '$(CC)' '$(HOSTCC)' $(sysdef) > $@
23
24clean::
25 $(call QUIET_CLEAN, arm64) $(RM) $(header)
26
27archheaders: $(header)
diff --git a/tools/perf/arch/arm64/entry/syscalls/mksyscalltbl b/tools/perf/arch/arm64/entry/syscalls/mksyscalltbl
new file mode 100755
index 000000000000..52e197317d3e
--- /dev/null
+++ b/tools/perf/arch/arm64/entry/syscalls/mksyscalltbl
@@ -0,0 +1,62 @@
1#!/bin/sh
2# SPDX-License-Identifier: GPL-2.0
3#
4# Generate system call table for perf. Derived from
5# powerpc script.
6#
7# Copyright IBM Corp. 2017
8# Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
9# Changed by: Ravi Bangoria <ravi.bangoria@linux.vnet.ibm.com>
10# Changed by: Kim Phillips <kim.phillips@arm.com>
11
12gcc=$1
13hostcc=$2
14input=$3
15
16if ! test -r $input; then
17 echo "Could not read input file" >&2
18 exit 1
19fi
20
21create_table_from_c()
22{
23 local sc nr last_sc
24
25 create_table_exe=`mktemp /tmp/create-table-XXXXXX`
26
27 {
28
29 cat <<-_EoHEADER
30 #include <stdio.h>
31 #define __ARCH_WANT_RENAMEAT
32 #include "$input"
33 int main(int argc, char *argv[])
34 {
35 _EoHEADER
36
37 while read sc nr; do
38 printf "%s\n" " printf(\"\\t[%d] = \\\"$sc\\\",\\n\", __NR_$sc);"
39 last_sc=$sc
40 done
41
42 printf "%s\n" " printf(\"#define SYSCALLTBL_ARM64_MAX_ID %d\\n\", __NR_$last_sc);"
43 printf "}\n"
44
45 } | $hostcc -o $create_table_exe -x c -
46
47 $create_table_exe
48
49 rm -f $create_table_exe
50}
51
52create_table()
53{
54 echo "static const char *syscalltbl_arm64[] = {"
55 create_table_from_c
56 echo "};"
57}
58
59$gcc -E -dM -x c $input \
60 |sed -ne 's/^#define __NR_//p' \
61 |sort -t' ' -k2 -nu \
62 |create_table
diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c
index 1120e39c1b00..5ccfce87e693 100644
--- a/tools/perf/arch/arm64/util/arm-spe.c
+++ b/tools/perf/arch/arm64/util/arm-spe.c
@@ -194,6 +194,7 @@ struct auxtrace_record *arm_spe_recording_init(int *err,
194 sper->itr.read_finish = arm_spe_read_finish; 194 sper->itr.read_finish = arm_spe_read_finish;
195 sper->itr.alignment = 0; 195 sper->itr.alignment = 0;
196 196
197 *err = 0;
197 return &sper->itr; 198 return &sper->itr;
198} 199}
199 200
diff --git a/tools/perf/arch/powerpc/util/skip-callchain-idx.c b/tools/perf/arch/powerpc/util/skip-callchain-idx.c
index ef5d59a5742e..7c6eeb4633fe 100644
--- a/tools/perf/arch/powerpc/util/skip-callchain-idx.c
+++ b/tools/perf/arch/powerpc/util/skip-callchain-idx.c
@@ -58,9 +58,13 @@ static int check_return_reg(int ra_regno, Dwarf_Frame *frame)
58 } 58 }
59 59
60 /* 60 /*
61 * Check if return address is on the stack. 61 * Check if return address is on the stack. If return address
62 * is in a register (typically R0), it is yet to be saved on
63 * the stack.
62 */ 64 */
63 if (nops != 0 || ops != NULL) 65 if ((nops != 0 || ops != NULL) &&
66 !(nops == 1 && ops[0].atom == DW_OP_regx &&
67 ops[0].number2 == 0 && ops[0].offset == 0))
64 return 0; 68 return 0;
65 69
66 /* 70 /*
@@ -246,7 +250,7 @@ int arch_skip_callchain_idx(struct thread *thread, struct ip_callchain *chain)
246 if (!chain || chain->nr < 3) 250 if (!chain || chain->nr < 3)
247 return skip_slot; 251 return skip_slot;
248 252
249 ip = chain->ips[2]; 253 ip = chain->ips[1];
250 254
251 thread__find_symbol(thread, PERF_RECORD_MISC_USER, ip, &al); 255 thread__find_symbol(thread, PERF_RECORD_MISC_USER, ip, &al);
252 256
diff --git a/tools/perf/arch/powerpc/util/sym-handling.c b/tools/perf/arch/powerpc/util/sym-handling.c
index 53d83d7e6a09..20e7d74d86cd 100644
--- a/tools/perf/arch/powerpc/util/sym-handling.c
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -141,8 +141,10 @@ void arch__post_process_probe_trace_events(struct perf_probe_event *pev,
141 for (i = 0; i < ntevs; i++) { 141 for (i = 0; i < ntevs; i++) {
142 tev = &pev->tevs[i]; 142 tev = &pev->tevs[i];
143 map__for_each_symbol(map, sym, tmp) { 143 map__for_each_symbol(map, sym, tmp) {
144 if (map->unmap_ip(map, sym->start) == tev->point.address) 144 if (map->unmap_ip(map, sym->start) == tev->point.address) {
145 arch__fix_tev_from_maps(pev, tev, map, sym); 145 arch__fix_tev_from_maps(pev, tev, map, sym);
146 break;
147 }
146 } 148 }
147 } 149 }
148} 150}
diff --git a/tools/perf/arch/s390/util/auxtrace.c b/tools/perf/arch/s390/util/auxtrace.c
index 3afe8256eff2..44c857388897 100644
--- a/tools/perf/arch/s390/util/auxtrace.c
+++ b/tools/perf/arch/s390/util/auxtrace.c
@@ -30,6 +30,7 @@ cpumsf_info_fill(struct auxtrace_record *itr __maybe_unused,
30 struct auxtrace_info_event *auxtrace_info __maybe_unused, 30 struct auxtrace_info_event *auxtrace_info __maybe_unused,
31 size_t priv_size __maybe_unused) 31 size_t priv_size __maybe_unused)
32{ 32{
33 auxtrace_info->type = PERF_AUXTRACE_S390_CPUMSF;
33 return 0; 34 return 0;
34} 35}
35 36
diff --git a/tools/perf/arch/s390/util/kvm-stat.c b/tools/perf/arch/s390/util/kvm-stat.c
index d233e2eb9592..aaabab5e2830 100644
--- a/tools/perf/arch/s390/util/kvm-stat.c
+++ b/tools/perf/arch/s390/util/kvm-stat.c
@@ -102,7 +102,7 @@ const char * const kvm_skip_events[] = {
102 102
103int cpu_isa_init(struct perf_kvm_stat *kvm, const char *cpuid) 103int cpu_isa_init(struct perf_kvm_stat *kvm, const char *cpuid)
104{ 104{
105 if (strstr(cpuid, "IBM/S390")) { 105 if (strstr(cpuid, "IBM")) {
106 kvm->exit_reasons = sie_exit_reasons; 106 kvm->exit_reasons = sie_exit_reasons;
107 kvm->exit_reasons_isa = "SIE"; 107 kvm->exit_reasons_isa = "SIE";
108 } else 108 } else
diff --git a/tools/perf/arch/x86/Makefile b/tools/perf/arch/x86/Makefile
index 1a38e78117ce..8cc6642fce7a 100644
--- a/tools/perf/arch/x86/Makefile
+++ b/tools/perf/arch/x86/Makefile
@@ -19,9 +19,6 @@ systbl := $(sys)/syscalltbl.sh
19_dummy := $(shell [ -d '$(out)' ] || mkdir -p '$(out)') 19_dummy := $(shell [ -d '$(out)' ] || mkdir -p '$(out)')
20 20
21$(header): $(sys)/syscall_64.tbl $(systbl) 21$(header): $(sys)/syscall_64.tbl $(systbl)
22 @(test -d ../../kernel -a -d ../../tools -a -d ../perf && ( \
23 (diff -B arch/x86/entry/syscalls/syscall_64.tbl ../../arch/x86/entry/syscalls/syscall_64.tbl >/dev/null) \
24 || echo "Warning: Kernel ABI header at 'tools/perf/arch/x86/entry/syscalls/syscall_64.tbl' differs from latest version at 'arch/x86/entry/syscalls/syscall_64.tbl'" >&2 )) || true
25 $(Q)$(SHELL) '$(systbl)' $(sys)/syscall_64.tbl 'x86_64' > $@ 22 $(Q)$(SHELL) '$(systbl)' $(sys)/syscall_64.tbl 'x86_64' > $@
26 23
27clean:: 24clean::
diff --git a/tools/perf/builtin-annotate.c b/tools/perf/builtin-annotate.c
index 8180319285af..830481b8db26 100644
--- a/tools/perf/builtin-annotate.c
+++ b/tools/perf/builtin-annotate.c
@@ -542,6 +542,10 @@ int cmd_annotate(int argc, const char **argv)
542 OPT_CALLBACK_DEFAULT(0, "stdio-color", NULL, "mode", 542 OPT_CALLBACK_DEFAULT(0, "stdio-color", NULL, "mode",
543 "'always' (default), 'never' or 'auto' only applicable to --stdio mode", 543 "'always' (default), 'never' or 'auto' only applicable to --stdio mode",
544 stdio__config_color, "always"), 544 stdio__config_color, "always"),
545 OPT_CALLBACK(0, "percent-type", &annotate.opts, "local-period",
546 "Set percent type local/global-period/hits",
547 annotate_parse_percent_type),
548
545 OPT_END() 549 OPT_END()
546 }; 550 };
547 int ret; 551 int ret;
diff --git a/tools/perf/builtin-c2c.c b/tools/perf/builtin-c2c.c
index 6a8738f7ead3..f3aa9d02a5ab 100644
--- a/tools/perf/builtin-c2c.c
+++ b/tools/perf/builtin-c2c.c
@@ -2193,7 +2193,7 @@ static void print_cacheline(struct c2c_hists *c2c_hists,
2193 fprintf(out, "%s\n", bf); 2193 fprintf(out, "%s\n", bf);
2194 fprintf(out, " -------------------------------------------------------------\n"); 2194 fprintf(out, " -------------------------------------------------------------\n");
2195 2195
2196 hists__fprintf(&c2c_hists->hists, false, 0, 0, 0, out, true); 2196 hists__fprintf(&c2c_hists->hists, false, 0, 0, 0, out, false);
2197} 2197}
2198 2198
2199static void print_pareto(FILE *out) 2199static void print_pareto(FILE *out)
@@ -2268,7 +2268,7 @@ static void perf_c2c__hists_fprintf(FILE *out, struct perf_session *session)
2268 fprintf(out, "=================================================\n"); 2268 fprintf(out, "=================================================\n");
2269 fprintf(out, "#\n"); 2269 fprintf(out, "#\n");
2270 2270
2271 hists__fprintf(&c2c.hists.hists, true, 0, 0, 0, stdout, false); 2271 hists__fprintf(&c2c.hists.hists, true, 0, 0, 0, stdout, true);
2272 2272
2273 fprintf(out, "\n"); 2273 fprintf(out, "\n");
2274 fprintf(out, "=================================================\n"); 2274 fprintf(out, "=================================================\n");
@@ -2349,6 +2349,9 @@ static int perf_c2c__browse_cacheline(struct hist_entry *he)
2349 " s Toggle full length of symbol and source line columns \n" 2349 " s Toggle full length of symbol and source line columns \n"
2350 " q Return back to cacheline list \n"; 2350 " q Return back to cacheline list \n";
2351 2351
2352 if (!he)
2353 return 0;
2354
2352 /* Display compact version first. */ 2355 /* Display compact version first. */
2353 c2c.symbol_full = false; 2356 c2c.symbol_full = false;
2354 2357
diff --git a/tools/perf/builtin-diff.c b/tools/perf/builtin-diff.c
index d660cb7b222b..39db2ee32d48 100644
--- a/tools/perf/builtin-diff.c
+++ b/tools/perf/builtin-diff.c
@@ -696,7 +696,7 @@ static void hists__process(struct hists *hists)
696 hists__output_resort(hists, NULL); 696 hists__output_resort(hists, NULL);
697 697
698 hists__fprintf(hists, !quiet, 0, 0, 0, stdout, 698 hists__fprintf(hists, !quiet, 0, 0, 0, stdout,
699 symbol_conf.use_callchain); 699 !symbol_conf.use_callchain);
700} 700}
701 701
702static void data__fprintf(void) 702static void data__fprintf(void)
diff --git a/tools/perf/builtin-kmem.c b/tools/perf/builtin-kmem.c
index 54d3f21b0e62..b63bca4b0c2a 100644
--- a/tools/perf/builtin-kmem.c
+++ b/tools/perf/builtin-kmem.c
@@ -729,7 +729,7 @@ static char *compact_gfp_string(unsigned long gfp_flags)
729static int parse_gfp_flags(struct perf_evsel *evsel, struct perf_sample *sample, 729static int parse_gfp_flags(struct perf_evsel *evsel, struct perf_sample *sample,
730 unsigned int gfp_flags) 730 unsigned int gfp_flags)
731{ 731{
732 struct pevent_record record = { 732 struct tep_record record = {
733 .cpu = sample->cpu, 733 .cpu = sample->cpu,
734 .data = sample->raw_data, 734 .data = sample->raw_data,
735 .size = sample->raw_size, 735 .size = sample->raw_size,
@@ -747,7 +747,7 @@ static int parse_gfp_flags(struct perf_evsel *evsel, struct perf_sample *sample,
747 } 747 }
748 748
749 trace_seq_init(&seq); 749 trace_seq_init(&seq);
750 pevent_event_info(&seq, evsel->tp_format, &record); 750 tep_event_info(&seq, evsel->tp_format, &record);
751 751
752 str = strtok_r(seq.buffer, " ", &pos); 752 str = strtok_r(seq.buffer, " ", &pos);
753 while (str) { 753 while (str) {
@@ -1974,7 +1974,7 @@ int cmd_kmem(int argc, const char **argv)
1974 goto out_delete; 1974 goto out_delete;
1975 } 1975 }
1976 1976
1977 kmem_page_size = pevent_get_page_size(evsel->tp_format->pevent); 1977 kmem_page_size = tep_get_page_size(evsel->tp_format->pevent);
1978 symbol_conf.use_callchain = true; 1978 symbol_conf.use_callchain = true;
1979 } 1979 }
1980 1980
diff --git a/tools/perf/builtin-report.c b/tools/perf/builtin-report.c
index c04dc7b53797..76e12bcd1765 100644
--- a/tools/perf/builtin-report.c
+++ b/tools/perf/builtin-report.c
@@ -478,8 +478,8 @@ static int perf_evlist__tty_browse_hists(struct perf_evlist *evlist,
478 478
479 hists__fprintf_nr_sample_events(hists, rep, evname, stdout); 479 hists__fprintf_nr_sample_events(hists, rep, evname, stdout);
480 hists__fprintf(hists, !quiet, 0, 0, rep->min_percent, stdout, 480 hists__fprintf(hists, !quiet, 0, 0, rep->min_percent, stdout,
481 symbol_conf.use_callchain || 481 !(symbol_conf.use_callchain ||
482 symbol_conf.show_branchflag_count); 482 symbol_conf.show_branchflag_count));
483 fprintf(stdout, "\n\n"); 483 fprintf(stdout, "\n\n");
484 } 484 }
485 485
@@ -1124,6 +1124,9 @@ int cmd_report(int argc, const char **argv)
1124 "Time span of interest (start,stop)"), 1124 "Time span of interest (start,stop)"),
1125 OPT_BOOLEAN(0, "inline", &symbol_conf.inline_name, 1125 OPT_BOOLEAN(0, "inline", &symbol_conf.inline_name,
1126 "Show inline function"), 1126 "Show inline function"),
1127 OPT_CALLBACK(0, "percent-type", &report.annotation_opts, "local-period",
1128 "Set percent type local/global-period/hits",
1129 annotate_parse_percent_type),
1127 OPT_END() 1130 OPT_END()
1128 }; 1131 };
1129 struct perf_data data = { 1132 struct perf_data data = {
@@ -1366,9 +1369,9 @@ repeat:
1366 } 1369 }
1367 1370
1368 if (session->tevent.pevent && 1371 if (session->tevent.pevent &&
1369 pevent_set_function_resolver(session->tevent.pevent, 1372 tep_set_function_resolver(session->tevent.pevent,
1370 machine__resolve_kernel_addr, 1373 machine__resolve_kernel_addr,
1371 &session->machines.host) < 0) { 1374 &session->machines.host) < 0) {
1372 pr_err("%s: failed to set libtraceevent function resolver\n", 1375 pr_err("%s: failed to set libtraceevent function resolver\n",
1373 __func__); 1376 __func__);
1374 return -1; 1377 return -1;
diff --git a/tools/perf/builtin-script.c b/tools/perf/builtin-script.c
index 568ddfac3213..ba481d73f910 100644
--- a/tools/perf/builtin-script.c
+++ b/tools/perf/builtin-script.c
@@ -3429,9 +3429,9 @@ int cmd_script(int argc, const char **argv)
3429 symbol_conf.use_callchain = false; 3429 symbol_conf.use_callchain = false;
3430 3430
3431 if (session->tevent.pevent && 3431 if (session->tevent.pevent &&
3432 pevent_set_function_resolver(session->tevent.pevent, 3432 tep_set_function_resolver(session->tevent.pevent,
3433 machine__resolve_kernel_addr, 3433 machine__resolve_kernel_addr,
3434 &session->machines.host) < 0) { 3434 &session->machines.host) < 0) {
3435 pr_err("%s: failed to set libtraceevent function resolver\n", __func__); 3435 pr_err("%s: failed to set libtraceevent function resolver\n", __func__);
3436 err = -1; 3436 err = -1;
3437 goto out_delete; 3437 goto out_delete;
diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c
index 05be023c3f0e..d097b5b47eb8 100644
--- a/tools/perf/builtin-stat.c
+++ b/tools/perf/builtin-stat.c
@@ -296,18 +296,6 @@ static int create_perf_stat_counter(struct perf_evsel *evsel)
296 return perf_evsel__open_per_thread(evsel, evsel_list->threads); 296 return perf_evsel__open_per_thread(evsel, evsel_list->threads);
297} 297}
298 298
299/*
300 * Does the counter have nsecs as a unit?
301 */
302static inline int nsec_counter(struct perf_evsel *evsel)
303{
304 if (perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK) ||
305 perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK))
306 return 1;
307
308 return 0;
309}
310
311static int process_synthesized_event(struct perf_tool *tool __maybe_unused, 299static int process_synthesized_event(struct perf_tool *tool __maybe_unused,
312 union perf_event *event, 300 union perf_event *event,
313 struct perf_sample *sample __maybe_unused, 301 struct perf_sample *sample __maybe_unused,
@@ -1058,34 +1046,6 @@ static void print_metric_header(void *ctx, const char *color __maybe_unused,
1058 fprintf(os->fh, "%*s ", metric_only_len, unit); 1046 fprintf(os->fh, "%*s ", metric_only_len, unit);
1059} 1047}
1060 1048
1061static void nsec_printout(int id, int nr, struct perf_evsel *evsel, double avg)
1062{
1063 FILE *output = stat_config.output;
1064 double msecs = avg / NSEC_PER_MSEC;
1065 const char *fmt_v, *fmt_n;
1066 char name[25];
1067
1068 fmt_v = csv_output ? "%.6f%s" : "%18.6f%s";
1069 fmt_n = csv_output ? "%s" : "%-25s";
1070
1071 aggr_printout(evsel, id, nr);
1072
1073 scnprintf(name, sizeof(name), "%s%s",
1074 perf_evsel__name(evsel), csv_output ? "" : " (msec)");
1075
1076 fprintf(output, fmt_v, msecs, csv_sep);
1077
1078 if (csv_output)
1079 fprintf(output, "%s%s", evsel->unit, csv_sep);
1080 else
1081 fprintf(output, "%-*s%s", unit_width, evsel->unit, csv_sep);
1082
1083 fprintf(output, fmt_n, name);
1084
1085 if (evsel->cgrp)
1086 fprintf(output, "%s%s", csv_sep, evsel->cgrp->name);
1087}
1088
1089static int first_shadow_cpu(struct perf_evsel *evsel, int id) 1049static int first_shadow_cpu(struct perf_evsel *evsel, int id)
1090{ 1050{
1091 int i; 1051 int i;
@@ -1241,11 +1201,7 @@ static void printout(int id, int nr, struct perf_evsel *counter, double uval,
1241 return; 1201 return;
1242 } 1202 }
1243 1203
1244 if (metric_only) 1204 if (!metric_only)
1245 /* nothing */;
1246 else if (nsec_counter(counter))
1247 nsec_printout(id, nr, counter, uval);
1248 else
1249 abs_printout(id, nr, counter, uval); 1205 abs_printout(id, nr, counter, uval);
1250 1206
1251 out.print_metric = pm; 1207 out.print_metric = pm;
@@ -1331,7 +1287,7 @@ static void collect_all_aliases(struct perf_evsel *counter,
1331 alias->scale != counter->scale || 1287 alias->scale != counter->scale ||
1332 alias->cgrp != counter->cgrp || 1288 alias->cgrp != counter->cgrp ||
1333 strcmp(alias->unit, counter->unit) || 1289 strcmp(alias->unit, counter->unit) ||
1334 nsec_counter(alias) != nsec_counter(counter)) 1290 perf_evsel__is_clock(alias) != perf_evsel__is_clock(counter))
1335 break; 1291 break;
1336 alias->merged_stat = true; 1292 alias->merged_stat = true;
1337 cb(alias, data, false); 1293 cb(alias, data, false);
@@ -2449,6 +2405,18 @@ static int add_default_attributes(void)
2449 return 0; 2405 return 0;
2450 2406
2451 if (transaction_run) { 2407 if (transaction_run) {
2408 /* Handle -T as -M transaction. Once platform specific metrics
2409 * support has been added to the json files, all archictures
2410 * will use this approach. To determine transaction support
2411 * on an architecture test for such a metric name.
2412 */
2413 if (metricgroup__has_metric("transaction")) {
2414 struct option opt = { .value = &evsel_list };
2415
2416 return metricgroup__parse_groups(&opt, "transaction",
2417 &metric_events);
2418 }
2419
2452 if (pmu_have_event("cpu", "cycles-ct") && 2420 if (pmu_have_event("cpu", "cycles-ct") &&
2453 pmu_have_event("cpu", "el-start")) 2421 pmu_have_event("cpu", "el-start"))
2454 err = parse_events(evsel_list, transaction_attrs, 2422 err = parse_events(evsel_list, transaction_attrs,
diff --git a/tools/perf/builtin-top.c b/tools/perf/builtin-top.c
index ffdc2769ff9f..d21d8751e749 100644
--- a/tools/perf/builtin-top.c
+++ b/tools/perf/builtin-top.c
@@ -307,7 +307,7 @@ static void perf_top__print_sym_table(struct perf_top *top)
307 hists__output_recalc_col_len(hists, top->print_entries - printed); 307 hists__output_recalc_col_len(hists, top->print_entries - printed);
308 putchar('\n'); 308 putchar('\n');
309 hists__fprintf(hists, false, top->print_entries - printed, win_width, 309 hists__fprintf(hists, false, top->print_entries - printed, win_width,
310 top->min_percent, stdout, symbol_conf.use_callchain); 310 top->min_percent, stdout, !symbol_conf.use_callchain);
311} 311}
312 312
313static void prompt_integer(int *target, const char *msg) 313static void prompt_integer(int *target, const char *msg)
diff --git a/tools/perf/builtin-trace.c b/tools/perf/builtin-trace.c
index 6a748eca2edb..22ab8e67c760 100644
--- a/tools/perf/builtin-trace.c
+++ b/tools/perf/builtin-trace.c
@@ -77,7 +77,8 @@ struct trace {
77 struct syscall *table; 77 struct syscall *table;
78 struct { 78 struct {
79 struct perf_evsel *sys_enter, 79 struct perf_evsel *sys_enter,
80 *sys_exit; 80 *sys_exit,
81 *augmented;
81 } events; 82 } events;
82 } syscalls; 83 } syscalls;
83 struct record_opts opts; 84 struct record_opts opts;
@@ -121,7 +122,6 @@ struct trace {
121 bool force; 122 bool force;
122 bool vfs_getname; 123 bool vfs_getname;
123 int trace_pgfaults; 124 int trace_pgfaults;
124 int open_id;
125}; 125};
126 126
127struct tp_field { 127struct tp_field {
@@ -157,13 +157,11 @@ TP_UINT_FIELD__SWAPPED(16);
157TP_UINT_FIELD__SWAPPED(32); 157TP_UINT_FIELD__SWAPPED(32);
158TP_UINT_FIELD__SWAPPED(64); 158TP_UINT_FIELD__SWAPPED(64);
159 159
160static int tp_field__init_uint(struct tp_field *field, 160static int __tp_field__init_uint(struct tp_field *field, int size, int offset, bool needs_swap)
161 struct format_field *format_field,
162 bool needs_swap)
163{ 161{
164 field->offset = format_field->offset; 162 field->offset = offset;
165 163
166 switch (format_field->size) { 164 switch (size) {
167 case 1: 165 case 1:
168 field->integer = tp_field__u8; 166 field->integer = tp_field__u8;
169 break; 167 break;
@@ -183,18 +181,28 @@ static int tp_field__init_uint(struct tp_field *field,
183 return 0; 181 return 0;
184} 182}
185 183
184static int tp_field__init_uint(struct tp_field *field, struct format_field *format_field, bool needs_swap)
185{
186 return __tp_field__init_uint(field, format_field->size, format_field->offset, needs_swap);
187}
188
186static void *tp_field__ptr(struct tp_field *field, struct perf_sample *sample) 189static void *tp_field__ptr(struct tp_field *field, struct perf_sample *sample)
187{ 190{
188 return sample->raw_data + field->offset; 191 return sample->raw_data + field->offset;
189} 192}
190 193
191static int tp_field__init_ptr(struct tp_field *field, struct format_field *format_field) 194static int __tp_field__init_ptr(struct tp_field *field, int offset)
192{ 195{
193 field->offset = format_field->offset; 196 field->offset = offset;
194 field->pointer = tp_field__ptr; 197 field->pointer = tp_field__ptr;
195 return 0; 198 return 0;
196} 199}
197 200
201static int tp_field__init_ptr(struct tp_field *field, struct format_field *format_field)
202{
203 return __tp_field__init_ptr(field, format_field->offset);
204}
205
198struct syscall_tp { 206struct syscall_tp {
199 struct tp_field id; 207 struct tp_field id;
200 union { 208 union {
@@ -240,7 +248,47 @@ static void perf_evsel__delete_priv(struct perf_evsel *evsel)
240 perf_evsel__delete(evsel); 248 perf_evsel__delete(evsel);
241} 249}
242 250
243static int perf_evsel__init_syscall_tp(struct perf_evsel *evsel, void *handler) 251static int perf_evsel__init_syscall_tp(struct perf_evsel *evsel)
252{
253 struct syscall_tp *sc = evsel->priv = malloc(sizeof(struct syscall_tp));
254
255 if (evsel->priv != NULL) {
256 if (perf_evsel__init_tp_uint_field(evsel, &sc->id, "__syscall_nr"))
257 goto out_delete;
258 return 0;
259 }
260
261 return -ENOMEM;
262out_delete:
263 zfree(&evsel->priv);
264 return -ENOENT;
265}
266
267static int perf_evsel__init_augmented_syscall_tp(struct perf_evsel *evsel)
268{
269 struct syscall_tp *sc = evsel->priv = malloc(sizeof(struct syscall_tp));
270
271 if (evsel->priv != NULL) { /* field, sizeof_field, offsetof_field */
272 if (__tp_field__init_uint(&sc->id, sizeof(long), sizeof(long long), evsel->needs_swap))
273 goto out_delete;
274
275 return 0;
276 }
277
278 return -ENOMEM;
279out_delete:
280 zfree(&evsel->priv);
281 return -EINVAL;
282}
283
284static int perf_evsel__init_augmented_syscall_tp_args(struct perf_evsel *evsel)
285{
286 struct syscall_tp *sc = evsel->priv;
287
288 return __tp_field__init_ptr(&sc->args, sc->id.offset + sizeof(u64));
289}
290
291static int perf_evsel__init_raw_syscall_tp(struct perf_evsel *evsel, void *handler)
244{ 292{
245 evsel->priv = malloc(sizeof(struct syscall_tp)); 293 evsel->priv = malloc(sizeof(struct syscall_tp));
246 if (evsel->priv != NULL) { 294 if (evsel->priv != NULL) {
@@ -258,7 +306,7 @@ out_delete:
258 return -ENOENT; 306 return -ENOENT;
259} 307}
260 308
261static struct perf_evsel *perf_evsel__syscall_newtp(const char *direction, void *handler) 309static struct perf_evsel *perf_evsel__raw_syscall_newtp(const char *direction, void *handler)
262{ 310{
263 struct perf_evsel *evsel = perf_evsel__newtp("raw_syscalls", direction); 311 struct perf_evsel *evsel = perf_evsel__newtp("raw_syscalls", direction);
264 312
@@ -269,7 +317,7 @@ static struct perf_evsel *perf_evsel__syscall_newtp(const char *direction, void
269 if (IS_ERR(evsel)) 317 if (IS_ERR(evsel))
270 return NULL; 318 return NULL;
271 319
272 if (perf_evsel__init_syscall_tp(evsel, handler)) 320 if (perf_evsel__init_raw_syscall_tp(evsel, handler))
273 goto out_delete; 321 goto out_delete;
274 322
275 return evsel; 323 return evsel;
@@ -291,7 +339,7 @@ size_t strarray__scnprintf(struct strarray *sa, char *bf, size_t size, const cha
291{ 339{
292 int idx = val - sa->offset; 340 int idx = val - sa->offset;
293 341
294 if (idx < 0 || idx >= sa->nr_entries) 342 if (idx < 0 || idx >= sa->nr_entries || sa->entries[idx] == NULL)
295 return scnprintf(bf, size, intfmt, val); 343 return scnprintf(bf, size, intfmt, val);
296 344
297 return scnprintf(bf, size, "%s", sa->entries[idx]); 345 return scnprintf(bf, size, "%s", sa->entries[idx]);
@@ -761,10 +809,12 @@ static struct syscall_fmt {
761 .arg = { [0] = STRARRAY(resource, rlimit_resources), }, }, 809 .arg = { [0] = STRARRAY(resource, rlimit_resources), }, },
762 { .name = "socket", 810 { .name = "socket",
763 .arg = { [0] = STRARRAY(family, socket_families), 811 .arg = { [0] = STRARRAY(family, socket_families),
764 [1] = { .scnprintf = SCA_SK_TYPE, /* type */ }, }, }, 812 [1] = { .scnprintf = SCA_SK_TYPE, /* type */ },
813 [2] = { .scnprintf = SCA_SK_PROTO, /* protocol */ }, }, },
765 { .name = "socketpair", 814 { .name = "socketpair",
766 .arg = { [0] = STRARRAY(family, socket_families), 815 .arg = { [0] = STRARRAY(family, socket_families),
767 [1] = { .scnprintf = SCA_SK_TYPE, /* type */ }, }, }, 816 [1] = { .scnprintf = SCA_SK_TYPE, /* type */ },
817 [2] = { .scnprintf = SCA_SK_PROTO, /* protocol */ }, }, },
768 { .name = "stat", .alias = "newstat", }, 818 { .name = "stat", .alias = "newstat", },
769 { .name = "statx", 819 { .name = "statx",
770 .arg = { [0] = { .scnprintf = SCA_FDAT, /* fdat */ }, 820 .arg = { [0] = { .scnprintf = SCA_FDAT, /* fdat */ },
@@ -803,12 +853,17 @@ static struct syscall_fmt *syscall_fmt__find(const char *name)
803 return bsearch(name, syscall_fmts, nmemb, sizeof(struct syscall_fmt), syscall_fmt__cmp); 853 return bsearch(name, syscall_fmts, nmemb, sizeof(struct syscall_fmt), syscall_fmt__cmp);
804} 854}
805 855
856/*
857 * is_exit: is this "exit" or "exit_group"?
858 * is_open: is this "open" or "openat"? To associate the fd returned in sys_exit with the pathname in sys_enter.
859 */
806struct syscall { 860struct syscall {
807 struct event_format *tp_format; 861 struct event_format *tp_format;
808 int nr_args; 862 int nr_args;
863 bool is_exit;
864 bool is_open;
809 struct format_field *args; 865 struct format_field *args;
810 const char *name; 866 const char *name;
811 bool is_exit;
812 struct syscall_fmt *fmt; 867 struct syscall_fmt *fmt;
813 struct syscall_arg_fmt *arg_fmt; 868 struct syscall_arg_fmt *arg_fmt;
814}; 869};
@@ -1297,6 +1352,7 @@ static int trace__read_syscall_info(struct trace *trace, int id)
1297 } 1352 }
1298 1353
1299 sc->is_exit = !strcmp(name, "exit_group") || !strcmp(name, "exit"); 1354 sc->is_exit = !strcmp(name, "exit_group") || !strcmp(name, "exit");
1355 sc->is_open = !strcmp(name, "open") || !strcmp(name, "openat");
1300 1356
1301 return syscall__set_arg_fmts(sc); 1357 return syscall__set_arg_fmts(sc);
1302} 1358}
@@ -1659,6 +1715,37 @@ out_put:
1659 return err; 1715 return err;
1660} 1716}
1661 1717
1718static int trace__fprintf_sys_enter(struct trace *trace, struct perf_evsel *evsel,
1719 struct perf_sample *sample)
1720{
1721 struct thread_trace *ttrace;
1722 struct thread *thread;
1723 int id = perf_evsel__sc_tp_uint(evsel, id, sample), err = -1;
1724 struct syscall *sc = trace__syscall_info(trace, evsel, id);
1725 char msg[1024];
1726 void *args;
1727
1728 if (sc == NULL)
1729 return -1;
1730
1731 thread = machine__findnew_thread(trace->host, sample->pid, sample->tid);
1732 ttrace = thread__trace(thread, trace->output);
1733 /*
1734 * We need to get ttrace just to make sure it is there when syscall__scnprintf_args()
1735 * and the rest of the beautifiers accessing it via struct syscall_arg touches it.
1736 */
1737 if (ttrace == NULL)
1738 goto out_put;
1739
1740 args = perf_evsel__sc_tp_ptr(evsel, args, sample);
1741 syscall__scnprintf_args(sc, msg, sizeof(msg), args, trace, thread);
1742 fprintf(trace->output, "%s", msg);
1743 err = 0;
1744out_put:
1745 thread__put(thread);
1746 return err;
1747}
1748
1662static int trace__resolve_callchain(struct trace *trace, struct perf_evsel *evsel, 1749static int trace__resolve_callchain(struct trace *trace, struct perf_evsel *evsel,
1663 struct perf_sample *sample, 1750 struct perf_sample *sample,
1664 struct callchain_cursor *cursor) 1751 struct callchain_cursor *cursor)
@@ -1720,7 +1807,7 @@ static int trace__sys_exit(struct trace *trace, struct perf_evsel *evsel,
1720 1807
1721 ret = perf_evsel__sc_tp_uint(evsel, ret, sample); 1808 ret = perf_evsel__sc_tp_uint(evsel, ret, sample);
1722 1809
1723 if (id == trace->open_id && ret >= 0 && ttrace->filename.pending_open) { 1810 if (sc->is_open && ret >= 0 && ttrace->filename.pending_open) {
1724 trace__set_fd_pathname(thread, ret, ttrace->filename.name); 1811 trace__set_fd_pathname(thread, ret, ttrace->filename.name);
1725 ttrace->filename.pending_open = false; 1812 ttrace->filename.pending_open = false;
1726 ++trace->stats.vfs_getname; 1813 ++trace->stats.vfs_getname;
@@ -1955,11 +2042,17 @@ static int trace__event_handler(struct trace *trace, struct perf_evsel *evsel,
1955 fprintf(trace->output, "%s:", evsel->name); 2042 fprintf(trace->output, "%s:", evsel->name);
1956 2043
1957 if (perf_evsel__is_bpf_output(evsel)) { 2044 if (perf_evsel__is_bpf_output(evsel)) {
1958 bpf_output__fprintf(trace, sample); 2045 if (evsel == trace->syscalls.events.augmented)
2046 trace__fprintf_sys_enter(trace, evsel, sample);
2047 else
2048 bpf_output__fprintf(trace, sample);
1959 } else if (evsel->tp_format) { 2049 } else if (evsel->tp_format) {
1960 event_format__fprintf(evsel->tp_format, sample->cpu, 2050 if (strncmp(evsel->tp_format->name, "sys_enter_", 10) ||
1961 sample->raw_data, sample->raw_size, 2051 trace__fprintf_sys_enter(trace, evsel, sample)) {
1962 trace->output); 2052 event_format__fprintf(evsel->tp_format, sample->cpu,
2053 sample->raw_data, sample->raw_size,
2054 trace->output);
2055 }
1963 } 2056 }
1964 2057
1965 fprintf(trace->output, "\n"); 2058 fprintf(trace->output, "\n");
@@ -2240,14 +2333,14 @@ static int trace__add_syscall_newtp(struct trace *trace)
2240 struct perf_evlist *evlist = trace->evlist; 2333 struct perf_evlist *evlist = trace->evlist;
2241 struct perf_evsel *sys_enter, *sys_exit; 2334 struct perf_evsel *sys_enter, *sys_exit;
2242 2335
2243 sys_enter = perf_evsel__syscall_newtp("sys_enter", trace__sys_enter); 2336 sys_enter = perf_evsel__raw_syscall_newtp("sys_enter", trace__sys_enter);
2244 if (sys_enter == NULL) 2337 if (sys_enter == NULL)
2245 goto out; 2338 goto out;
2246 2339
2247 if (perf_evsel__init_sc_tp_ptr_field(sys_enter, args)) 2340 if (perf_evsel__init_sc_tp_ptr_field(sys_enter, args))
2248 goto out_delete_sys_enter; 2341 goto out_delete_sys_enter;
2249 2342
2250 sys_exit = perf_evsel__syscall_newtp("sys_exit", trace__sys_exit); 2343 sys_exit = perf_evsel__raw_syscall_newtp("sys_exit", trace__sys_exit);
2251 if (sys_exit == NULL) 2344 if (sys_exit == NULL)
2252 goto out_delete_sys_enter; 2345 goto out_delete_sys_enter;
2253 2346
@@ -2669,7 +2762,7 @@ static int trace__replay(struct trace *trace)
2669 "syscalls:sys_enter"); 2762 "syscalls:sys_enter");
2670 2763
2671 if (evsel && 2764 if (evsel &&
2672 (perf_evsel__init_syscall_tp(evsel, trace__sys_enter) < 0 || 2765 (perf_evsel__init_raw_syscall_tp(evsel, trace__sys_enter) < 0 ||
2673 perf_evsel__init_sc_tp_ptr_field(evsel, args))) { 2766 perf_evsel__init_sc_tp_ptr_field(evsel, args))) {
2674 pr_err("Error during initialize raw_syscalls:sys_enter event\n"); 2767 pr_err("Error during initialize raw_syscalls:sys_enter event\n");
2675 goto out; 2768 goto out;
@@ -2681,7 +2774,7 @@ static int trace__replay(struct trace *trace)
2681 evsel = perf_evlist__find_tracepoint_by_name(session->evlist, 2774 evsel = perf_evlist__find_tracepoint_by_name(session->evlist,
2682 "syscalls:sys_exit"); 2775 "syscalls:sys_exit");
2683 if (evsel && 2776 if (evsel &&
2684 (perf_evsel__init_syscall_tp(evsel, trace__sys_exit) < 0 || 2777 (perf_evsel__init_raw_syscall_tp(evsel, trace__sys_exit) < 0 ||
2685 perf_evsel__init_sc_tp_uint_field(evsel, ret))) { 2778 perf_evsel__init_sc_tp_uint_field(evsel, ret))) {
2686 pr_err("Error during initialize raw_syscalls:sys_exit event\n"); 2779 pr_err("Error during initialize raw_syscalls:sys_exit event\n");
2687 goto out; 2780 goto out;
@@ -2921,6 +3014,36 @@ static void evlist__set_evsel_handler(struct perf_evlist *evlist, void *handler)
2921 evsel->handler = handler; 3014 evsel->handler = handler;
2922} 3015}
2923 3016
3017static int evlist__set_syscall_tp_fields(struct perf_evlist *evlist)
3018{
3019 struct perf_evsel *evsel;
3020
3021 evlist__for_each_entry(evlist, evsel) {
3022 if (evsel->priv || !evsel->tp_format)
3023 continue;
3024
3025 if (strcmp(evsel->tp_format->system, "syscalls"))
3026 continue;
3027
3028 if (perf_evsel__init_syscall_tp(evsel))
3029 return -1;
3030
3031 if (!strncmp(evsel->tp_format->name, "sys_enter_", 10)) {
3032 struct syscall_tp *sc = evsel->priv;
3033
3034 if (__tp_field__init_ptr(&sc->args, sc->id.offset + sizeof(u64)))
3035 return -1;
3036 } else if (!strncmp(evsel->tp_format->name, "sys_exit_", 9)) {
3037 struct syscall_tp *sc = evsel->priv;
3038
3039 if (__tp_field__init_uint(&sc->ret, sizeof(u64), sc->id.offset + sizeof(u64), evsel->needs_swap))
3040 return -1;
3041 }
3042 }
3043
3044 return 0;
3045}
3046
2924/* 3047/*
2925 * XXX: Hackish, just splitting the combined -e+--event (syscalls 3048 * XXX: Hackish, just splitting the combined -e+--event (syscalls
2926 * (raw_syscalls:{sys_{enter,exit}} + events (tracepoints, HW, SW, etc) to use 3049 * (raw_syscalls:{sys_{enter,exit}} + events (tracepoints, HW, SW, etc) to use
@@ -2990,6 +3113,7 @@ static int trace__parse_events_option(const struct option *opt, const char *str,
2990 3113
2991 if (trace__validate_ev_qualifier(trace)) 3114 if (trace__validate_ev_qualifier(trace))
2992 goto out; 3115 goto out;
3116 trace->trace_syscalls = true;
2993 } 3117 }
2994 3118
2995 err = 0; 3119 err = 0;
@@ -3045,7 +3169,7 @@ int cmd_trace(int argc, const char **argv)
3045 }, 3169 },
3046 .output = stderr, 3170 .output = stderr,
3047 .show_comm = true, 3171 .show_comm = true,
3048 .trace_syscalls = true, 3172 .trace_syscalls = false,
3049 .kernel_syscallchains = false, 3173 .kernel_syscallchains = false,
3050 .max_stack = UINT_MAX, 3174 .max_stack = UINT_MAX,
3051 }; 3175 };
@@ -3120,8 +3244,9 @@ int cmd_trace(int argc, const char **argv)
3120 }; 3244 };
3121 bool __maybe_unused max_stack_user_set = true; 3245 bool __maybe_unused max_stack_user_set = true;
3122 bool mmap_pages_user_set = true; 3246 bool mmap_pages_user_set = true;
3247 struct perf_evsel *evsel;
3123 const char * const trace_subcommands[] = { "record", NULL }; 3248 const char * const trace_subcommands[] = { "record", NULL };
3124 int err; 3249 int err = -1;
3125 char bf[BUFSIZ]; 3250 char bf[BUFSIZ];
3126 3251
3127 signal(SIGSEGV, sighandler_dump_stack); 3252 signal(SIGSEGV, sighandler_dump_stack);
@@ -3144,6 +3269,20 @@ int cmd_trace(int argc, const char **argv)
3144 "cgroup monitoring only available in system-wide mode"); 3269 "cgroup monitoring only available in system-wide mode");
3145 } 3270 }
3146 3271
3272 evsel = bpf__setup_output_event(trace.evlist, "__augmented_syscalls__");
3273 if (IS_ERR(evsel)) {
3274 bpf__strerror_setup_output_event(trace.evlist, PTR_ERR(evsel), bf, sizeof(bf));
3275 pr_err("ERROR: Setup trace syscalls enter failed: %s\n", bf);
3276 goto out;
3277 }
3278
3279 if (evsel) {
3280 if (perf_evsel__init_augmented_syscall_tp(evsel) ||
3281 perf_evsel__init_augmented_syscall_tp_args(evsel))
3282 goto out;
3283 trace.syscalls.events.augmented = evsel;
3284 }
3285
3147 err = bpf__setup_stdout(trace.evlist); 3286 err = bpf__setup_stdout(trace.evlist);
3148 if (err) { 3287 if (err) {
3149 bpf__strerror_setup_stdout(trace.evlist, err, bf, sizeof(bf)); 3288 bpf__strerror_setup_stdout(trace.evlist, err, bf, sizeof(bf));
@@ -3179,8 +3318,13 @@ int cmd_trace(int argc, const char **argv)
3179 symbol_conf.use_callchain = true; 3318 symbol_conf.use_callchain = true;
3180 } 3319 }
3181 3320
3182 if (trace.evlist->nr_entries > 0) 3321 if (trace.evlist->nr_entries > 0) {
3183 evlist__set_evsel_handler(trace.evlist, trace__event_handler); 3322 evlist__set_evsel_handler(trace.evlist, trace__event_handler);
3323 if (evlist__set_syscall_tp_fields(trace.evlist)) {
3324 perror("failed to set syscalls:* tracepoint fields");
3325 goto out;
3326 }
3327 }
3184 3328
3185 if ((argc >= 1) && (strcmp(argv[0], "record") == 0)) 3329 if ((argc >= 1) && (strcmp(argv[0], "record") == 0))
3186 return trace__record(&trace, argc-1, &argv[1]); 3330 return trace__record(&trace, argc-1, &argv[1]);
@@ -3191,13 +3335,7 @@ int cmd_trace(int argc, const char **argv)
3191 3335
3192 if (!trace.trace_syscalls && !trace.trace_pgfaults && 3336 if (!trace.trace_syscalls && !trace.trace_pgfaults &&
3193 trace.evlist->nr_entries == 0 /* Was --events used? */) { 3337 trace.evlist->nr_entries == 0 /* Was --events used? */) {
3194 pr_err("Please specify something to trace.\n"); 3338 trace.trace_syscalls = true;
3195 return -1;
3196 }
3197
3198 if (!trace.trace_syscalls && trace.ev_qualifier) {
3199 pr_err("The -e option can't be used with --no-syscalls.\n");
3200 goto out;
3201 } 3339 }
3202 3340
3203 if (output_name != NULL) { 3341 if (output_name != NULL) {
@@ -3208,8 +3346,6 @@ int cmd_trace(int argc, const char **argv)
3208 } 3346 }
3209 } 3347 }
3210 3348
3211 trace.open_id = syscalltbl__id(trace.sctbl, "open");
3212
3213 err = target__validate(&trace.opts.target); 3349 err = target__validate(&trace.opts.target);
3214 if (err) { 3350 if (err) {
3215 target__strerror(&trace.opts.target, err, bf, sizeof(bf)); 3351 target__strerror(&trace.opts.target, err, bf, sizeof(bf));
diff --git a/tools/perf/check-headers.sh b/tools/perf/check-headers.sh
index 10f333e2e825..466540ee8ea7 100755
--- a/tools/perf/check-headers.sh
+++ b/tools/perf/check-headers.sh
@@ -7,6 +7,7 @@ include/uapi/drm/i915_drm.h
7include/uapi/linux/fcntl.h 7include/uapi/linux/fcntl.h
8include/uapi/linux/kcmp.h 8include/uapi/linux/kcmp.h
9include/uapi/linux/kvm.h 9include/uapi/linux/kvm.h
10include/uapi/linux/in.h
10include/uapi/linux/perf_event.h 11include/uapi/linux/perf_event.h
11include/uapi/linux/prctl.h 12include/uapi/linux/prctl.h
12include/uapi/linux/sched.h 13include/uapi/linux/sched.h
@@ -35,6 +36,7 @@ arch/s390/include/uapi/asm/ptrace.h
35arch/s390/include/uapi/asm/sie.h 36arch/s390/include/uapi/asm/sie.h
36arch/arm/include/uapi/asm/kvm.h 37arch/arm/include/uapi/asm/kvm.h
37arch/arm64/include/uapi/asm/kvm.h 38arch/arm64/include/uapi/asm/kvm.h
39arch/arm64/include/uapi/asm/unistd.h
38arch/alpha/include/uapi/asm/errno.h 40arch/alpha/include/uapi/asm/errno.h
39arch/mips/include/asm/errno.h 41arch/mips/include/asm/errno.h
40arch/mips/include/uapi/asm/errno.h 42arch/mips/include/uapi/asm/errno.h
@@ -53,6 +55,7 @@ include/uapi/asm-generic/errno.h
53include/uapi/asm-generic/errno-base.h 55include/uapi/asm-generic/errno-base.h
54include/uapi/asm-generic/ioctls.h 56include/uapi/asm-generic/ioctls.h
55include/uapi/asm-generic/mman-common.h 57include/uapi/asm-generic/mman-common.h
58include/uapi/asm-generic/unistd.h
56' 59'
57 60
58check_2 () { 61check_2 () {
@@ -64,8 +67,12 @@ check_2 () {
64 67
65 cmd="diff $* $file1 $file2 > /dev/null" 68 cmd="diff $* $file1 $file2 > /dev/null"
66 69
67 test -f $file2 && 70 test -f $file2 && {
68 eval $cmd || echo "Warning: Kernel ABI header at 'tools/$file' differs from latest version at '$file'" >&2 71 eval $cmd || {
72 echo "Warning: Kernel ABI header at '$file1' differs from latest version at '$file2'" >&2
73 echo diff -u $file1 $file2
74 }
75 }
69} 76}
70 77
71check () { 78check () {
@@ -73,7 +80,7 @@ check () {
73 80
74 shift 81 shift
75 82
76 check_2 ../$file ../../$file $* 83 check_2 tools/$file $file $*
77} 84}
78 85
79# Check if we have the kernel headers (tools/perf/../../include), else 86# Check if we have the kernel headers (tools/perf/../../include), else
@@ -81,6 +88,8 @@ check () {
81# differences. 88# differences.
82test -d ../../include || exit 0 89test -d ../../include || exit 0
83 90
91cd ../..
92
84# simple diff check 93# simple diff check
85for i in $HEADERS; do 94for i in $HEADERS; do
86 check $i -B 95 check $i -B
@@ -91,3 +100,8 @@ check arch/x86/lib/memcpy_64.S '-I "^EXPORT_SYMBOL" -I "^#include <asm/ex
91check arch/x86/lib/memset_64.S '-I "^EXPORT_SYMBOL" -I "^#include <asm/export.h>"' 100check arch/x86/lib/memset_64.S '-I "^EXPORT_SYMBOL" -I "^#include <asm/export.h>"'
92check include/uapi/asm-generic/mman.h '-I "^#include <\(uapi/\)*asm-generic/mman-common.h>"' 101check include/uapi/asm-generic/mman.h '-I "^#include <\(uapi/\)*asm-generic/mman-common.h>"'
93check include/uapi/linux/mman.h '-I "^#include <\(uapi/\)*asm/mman.h>"' 102check include/uapi/linux/mman.h '-I "^#include <\(uapi/\)*asm/mman.h>"'
103
104# diff non-symmetric files
105check_2 tools/perf/arch/x86/entry/syscalls/syscall_64.tbl arch/x86/entry/syscalls/syscall_64.tbl
106
107cd tools/perf
diff --git a/tools/perf/examples/bpf/augmented_syscalls.c b/tools/perf/examples/bpf/augmented_syscalls.c
new file mode 100644
index 000000000000..69a31386d8cd
--- /dev/null
+++ b/tools/perf/examples/bpf/augmented_syscalls.c
@@ -0,0 +1,55 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Augment the openat syscall with the contents of the filename pointer argument.
4 *
5 * Test it with:
6 *
7 * perf trace -e tools/perf/examples/bpf/augmented_syscalls.c cat /etc/passwd > /dev/null
8 *
9 * It'll catch some openat syscalls related to the dynamic linked and
10 * the last one should be the one for '/etc/passwd'.
11 *
12 * This matches what is marshalled into the raw_syscall:sys_enter payload
13 * expected by the 'perf trace' beautifiers, and can be used by them unmodified,
14 * which will be done as that feature is implemented in the next csets, for now
15 * it will appear in a dump done by the default tracepoint handler in 'perf trace',
16 * that uses bpf_output__fprintf() to just dump those contents, as done with
17 * the bpf-output event associated with the __bpf_output__ map declared in
18 * tools/perf/include/bpf/stdio.h.
19 */
20
21#include <stdio.h>
22
23struct bpf_map SEC("maps") __augmented_syscalls__ = {
24 .type = BPF_MAP_TYPE_PERF_EVENT_ARRAY,
25 .key_size = sizeof(int),
26 .value_size = sizeof(u32),
27 .max_entries = __NR_CPUS__,
28};
29
30struct syscall_enter_openat_args {
31 unsigned long long common_tp_fields;
32 long syscall_nr;
33 long dfd;
34 char *filename_ptr;
35 long flags;
36 long mode;
37};
38
39struct augmented_enter_openat_args {
40 struct syscall_enter_openat_args args;
41 char filename[64];
42};
43
44int syscall_enter(openat)(struct syscall_enter_openat_args *args)
45{
46 struct augmented_enter_openat_args augmented_args;
47
48 probe_read(&augmented_args.args, sizeof(augmented_args.args), args);
49 probe_read_str(&augmented_args.filename, sizeof(augmented_args.filename), args->filename_ptr);
50 perf_event_output(args, &__augmented_syscalls__, BPF_F_CURRENT_CPU,
51 &augmented_args, sizeof(augmented_args));
52 return 1;
53}
54
55license(GPL);
diff --git a/tools/perf/examples/bpf/hello.c b/tools/perf/examples/bpf/hello.c
new file mode 100644
index 000000000000..cf3c2fdc7f79
--- /dev/null
+++ b/tools/perf/examples/bpf/hello.c
@@ -0,0 +1,9 @@
1#include <stdio.h>
2
3int syscall_enter(openat)(void *args)
4{
5 puts("Hello, world\n");
6 return 0;
7}
8
9license(GPL);
diff --git a/tools/perf/examples/bpf/sys_enter_openat.c b/tools/perf/examples/bpf/sys_enter_openat.c
new file mode 100644
index 000000000000..9cd124b09392
--- /dev/null
+++ b/tools/perf/examples/bpf/sys_enter_openat.c
@@ -0,0 +1,33 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Hook into 'openat' syscall entry tracepoint
4 *
5 * Test it with:
6 *
7 * perf trace -e tools/perf/examples/bpf/sys_enter_openat.c cat /etc/passwd > /dev/null
8 *
9 * It'll catch some openat syscalls related to the dynamic linked and
10 * the last one should be the one for '/etc/passwd'.
11 *
12 * The syscall_enter_openat_args can be used to get the syscall fields
13 * and use them for filtering calls, i.e. use in expressions for
14 * the return value.
15 */
16
17#include <bpf.h>
18
19struct syscall_enter_openat_args {
20 unsigned long long unused;
21 long syscall_nr;
22 long dfd;
23 char *filename_ptr;
24 long flags;
25 long mode;
26};
27
28int syscall_enter(openat)(struct syscall_enter_openat_args *args)
29{
30 return 1;
31}
32
33license(GPL);
diff --git a/tools/perf/include/bpf/bpf.h b/tools/perf/include/bpf/bpf.h
index dd764ad5efdf..47897d65e799 100644
--- a/tools/perf/include/bpf/bpf.h
+++ b/tools/perf/include/bpf/bpf.h
@@ -1,13 +1,36 @@
1// SPDX-License-Identifier: GPL-2.0 1// SPDX-License-Identifier: GPL-2.0
2#ifndef _PERF_BPF_H 2#ifndef _PERF_BPF_H
3#define _PERF_BPF_H 3#define _PERF_BPF_H
4
5#include <uapi/linux/bpf.h>
6
7/*
8 * A helper structure used by eBPF C program to describe map attributes to
9 * elf_bpf loader, taken from tools/testing/selftests/bpf/bpf_helpers.h:
10 */
11struct bpf_map {
12 unsigned int type;
13 unsigned int key_size;
14 unsigned int value_size;
15 unsigned int max_entries;
16 unsigned int map_flags;
17 unsigned int inner_map_idx;
18 unsigned int numa_node;
19};
20
4#define SEC(NAME) __attribute__((section(NAME), used)) 21#define SEC(NAME) __attribute__((section(NAME), used))
5 22
6#define probe(function, vars) \ 23#define probe(function, vars) \
7 SEC(#function "=" #function " " #vars) function 24 SEC(#function "=" #function " " #vars) function
8 25
26#define syscall_enter(name) \
27 SEC("syscalls:sys_enter_" #name) syscall_enter_ ## name
28
9#define license(name) \ 29#define license(name) \
10char _license[] SEC("license") = #name; \ 30char _license[] SEC("license") = #name; \
11int _version SEC("version") = LINUX_VERSION_CODE; 31int _version SEC("version") = LINUX_VERSION_CODE;
12 32
33static int (*probe_read)(void *dst, int size, const void *unsafe_addr) = (void *)BPF_FUNC_probe_read;
34static int (*probe_read_str)(void *dst, int size, const void *unsafe_addr) = (void *)BPF_FUNC_probe_read_str;
35
13#endif /* _PERF_BPF_H */ 36#endif /* _PERF_BPF_H */
diff --git a/tools/perf/include/bpf/stdio.h b/tools/perf/include/bpf/stdio.h
new file mode 100644
index 000000000000..2899cb7bfed8
--- /dev/null
+++ b/tools/perf/include/bpf/stdio.h
@@ -0,0 +1,19 @@
1// SPDX-License-Identifier: GPL-2.0
2
3#include <bpf.h>
4
5struct bpf_map SEC("maps") __bpf_stdout__ = {
6 .type = BPF_MAP_TYPE_PERF_EVENT_ARRAY,
7 .key_size = sizeof(int),
8 .value_size = sizeof(u32),
9 .max_entries = __NR_CPUS__,
10};
11
12static int (*perf_event_output)(void *, struct bpf_map *, int, void *, unsigned long) =
13 (void *)BPF_FUNC_perf_event_output;
14
15#define puts(from) \
16 ({ const int __len = sizeof(from); \
17 char __from[__len] = from; \
18 perf_event_output(args, &__bpf_stdout__, BPF_F_CURRENT_CPU, \
19 &__from, __len & (sizeof(from) - 1)); })
diff --git a/tools/perf/perf.h b/tools/perf/perf.h
index d215714f48df..21bf7f5a3cf5 100644
--- a/tools/perf/perf.h
+++ b/tools/perf/perf.h
@@ -25,7 +25,9 @@ static inline unsigned long long rdclock(void)
25 return ts.tv_sec * 1000000000ULL + ts.tv_nsec; 25 return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
26} 26}
27 27
28#ifndef MAX_NR_CPUS
28#define MAX_NR_CPUS 1024 29#define MAX_NR_CPUS 1024
30#endif
29 31
30extern const char *input_name; 32extern const char *input_name;
31extern bool perf_host, perf_guest; 33extern bool perf_host, perf_guest;
diff --git a/tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json b/tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json
new file mode 100644
index 000000000000..bc03c06c3918
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/ampere/emag/core-imp-def.json
@@ -0,0 +1,32 @@
1[
2 {
3 "ArchStdEvent": "L1D_CACHE_RD",
4 },
5 {
6 "ArchStdEvent": "L1D_CACHE_WR",
7 },
8 {
9 "ArchStdEvent": "L1D_CACHE_REFILL_RD",
10 },
11 {
12 "ArchStdEvent": "L1D_CACHE_REFILL_WR",
13 },
14 {
15 "ArchStdEvent": "L1D_TLB_REFILL_RD",
16 },
17 {
18 "ArchStdEvent": "L1D_TLB_REFILL_WR",
19 },
20 {
21 "ArchStdEvent": "L1D_TLB_RD",
22 },
23 {
24 "ArchStdEvent": "L1D_TLB_WR",
25 },
26 {
27 "ArchStdEvent": "BUS_ACCESS_RD",
28 },
29 {
30 "ArchStdEvent": "BUS_ACCESS_WR",
31 }
32]
diff --git a/tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json b/tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json
index bc03c06c3918..752e47eb6977 100644
--- a/tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json
+++ b/tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json
@@ -12,6 +12,21 @@
12 "ArchStdEvent": "L1D_CACHE_REFILL_WR", 12 "ArchStdEvent": "L1D_CACHE_REFILL_WR",
13 }, 13 },
14 { 14 {
15 "ArchStdEvent": "L1D_CACHE_REFILL_INNER",
16 },
17 {
18 "ArchStdEvent": "L1D_CACHE_REFILL_OUTER",
19 },
20 {
21 "ArchStdEvent": "L1D_CACHE_WB_VICTIM",
22 },
23 {
24 "ArchStdEvent": "L1D_CACHE_WB_CLEAN",
25 },
26 {
27 "ArchStdEvent": "L1D_CACHE_INVAL",
28 },
29 {
15 "ArchStdEvent": "L1D_TLB_REFILL_RD", 30 "ArchStdEvent": "L1D_TLB_REFILL_RD",
16 }, 31 },
17 { 32 {
@@ -24,9 +39,75 @@
24 "ArchStdEvent": "L1D_TLB_WR", 39 "ArchStdEvent": "L1D_TLB_WR",
25 }, 40 },
26 { 41 {
42 "ArchStdEvent": "L2D_TLB_REFILL_RD",
43 },
44 {
45 "ArchStdEvent": "L2D_TLB_REFILL_WR",
46 },
47 {
48 "ArchStdEvent": "L2D_TLB_RD",
49 },
50 {
51 "ArchStdEvent": "L2D_TLB_WR",
52 },
53 {
27 "ArchStdEvent": "BUS_ACCESS_RD", 54 "ArchStdEvent": "BUS_ACCESS_RD",
28 }, 55 },
29 { 56 {
30 "ArchStdEvent": "BUS_ACCESS_WR", 57 "ArchStdEvent": "BUS_ACCESS_WR",
31 } 58 },
59 {
60 "ArchStdEvent": "MEM_ACCESS_RD",
61 },
62 {
63 "ArchStdEvent": "MEM_ACCESS_WR",
64 },
65 {
66 "ArchStdEvent": "UNALIGNED_LD_SPEC",
67 },
68 {
69 "ArchStdEvent": "UNALIGNED_ST_SPEC",
70 },
71 {
72 "ArchStdEvent": "UNALIGNED_LDST_SPEC",
73 },
74 {
75 "ArchStdEvent": "EXC_UNDEF",
76 },
77 {
78 "ArchStdEvent": "EXC_SVC",
79 },
80 {
81 "ArchStdEvent": "EXC_PABORT",
82 },
83 {
84 "ArchStdEvent": "EXC_DABORT",
85 },
86 {
87 "ArchStdEvent": "EXC_IRQ",
88 },
89 {
90 "ArchStdEvent": "EXC_FIQ",
91 },
92 {
93 "ArchStdEvent": "EXC_SMC",
94 },
95 {
96 "ArchStdEvent": "EXC_HVC",
97 },
98 {
99 "ArchStdEvent": "EXC_TRAP_PABORT",
100 },
101 {
102 "ArchStdEvent": "EXC_TRAP_DABORT",
103 },
104 {
105 "ArchStdEvent": "EXC_TRAP_OTHER",
106 },
107 {
108 "ArchStdEvent": "EXC_TRAP_IRQ",
109 },
110 {
111 "ArchStdEvent": "EXC_TRAP_FIQ",
112 }
32] 113]
diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu-events/arch/arm64/mapfile.csv
index f03e26ecb658..59cd8604b0bd 100644
--- a/tools/perf/pmu-events/arch/arm64/mapfile.csv
+++ b/tools/perf/pmu-events/arch/arm64/mapfile.csv
@@ -16,3 +16,4 @@
160x00000000420f5160,v1,cavium/thunderx2,core 160x00000000420f5160,v1,cavium/thunderx2,core
170x00000000430f0af0,v1,cavium/thunderx2,core 170x00000000430f0af0,v1,cavium/thunderx2,core
180x00000000480fd010,v1,hisilicon/hip08,core 180x00000000480fd010,v1,hisilicon/hip08,core
190x00000000500f0000,v1,ampere/emag,core
diff --git a/tools/perf/pmu-events/arch/s390/cf_z10/basic.json b/tools/perf/pmu-events/arch/s390/cf_z10/basic.json
index 8bf16759ca53..2dd8dafff2ef 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z10/basic.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z10/basic.json
@@ -1,71 +1,83 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "0", 4 "EventCode": "0",
4 "EventName": "CPU_CYCLES", 5 "EventName": "CPU_CYCLES",
5 "BriefDescription": "CPU Cycles", 6 "BriefDescription": "CPU Cycles",
6 "PublicDescription": "Cycle Count" 7 "PublicDescription": "Cycle Count"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "1", 11 "EventCode": "1",
10 "EventName": "INSTRUCTIONS", 12 "EventName": "INSTRUCTIONS",
11 "BriefDescription": "Instructions", 13 "BriefDescription": "Instructions",
12 "PublicDescription": "Instruction Count" 14 "PublicDescription": "Instruction Count"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "2", 18 "EventCode": "2",
16 "EventName": "L1I_DIR_WRITES", 19 "EventName": "L1I_DIR_WRITES",
17 "BriefDescription": "L1I Directory Writes", 20 "BriefDescription": "L1I Directory Writes",
18 "PublicDescription": "Level-1 I-Cache Directory Write Count" 21 "PublicDescription": "Level-1 I-Cache Directory Write Count"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "3", 25 "EventCode": "3",
22 "EventName": "L1I_PENALTY_CYCLES", 26 "EventName": "L1I_PENALTY_CYCLES",
23 "BriefDescription": "L1I Penalty Cycles", 27 "BriefDescription": "L1I Penalty Cycles",
24 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "4", 32 "EventCode": "4",
28 "EventName": "L1D_DIR_WRITES", 33 "EventName": "L1D_DIR_WRITES",
29 "BriefDescription": "L1D Directory Writes", 34 "BriefDescription": "L1D Directory Writes",
30 "PublicDescription": "Level-1 D-Cache Directory Write Count" 35 "PublicDescription": "Level-1 D-Cache Directory Write Count"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "5", 39 "EventCode": "5",
34 "EventName": "L1D_PENALTY_CYCLES", 40 "EventName": "L1D_PENALTY_CYCLES",
35 "BriefDescription": "L1D Penalty Cycles", 41 "BriefDescription": "L1D Penalty Cycles",
36 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "32", 46 "EventCode": "32",
40 "EventName": "PROBLEM_STATE_CPU_CYCLES", 47 "EventName": "PROBLEM_STATE_CPU_CYCLES",
41 "BriefDescription": "Problem-State CPU Cycles", 48 "BriefDescription": "Problem-State CPU Cycles",
42 "PublicDescription": "Problem-State Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "33", 53 "EventCode": "33",
46 "EventName": "PROBLEM_STATE_INSTRUCTIONS", 54 "EventName": "PROBLEM_STATE_INSTRUCTIONS",
47 "BriefDescription": "Problem-State Instructions", 55 "BriefDescription": "Problem-State Instructions",
48 "PublicDescription": "Problem-State Instruction Count" 56 "PublicDescription": "Problem-State Instruction Count"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "34", 60 "EventCode": "34",
52 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES", 61 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES",
53 "BriefDescription": "Problem-State L1I Directory Writes", 62 "BriefDescription": "Problem-State L1I Directory Writes",
54 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count" 63 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "35", 67 "EventCode": "35",
58 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES", 68 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES",
59 "BriefDescription": "Problem-State L1I Penalty Cycles", 69 "BriefDescription": "Problem-State L1I Penalty Cycles",
60 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "36", 74 "EventCode": "36",
64 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES", 75 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES",
65 "BriefDescription": "Problem-State L1D Directory Writes", 76 "BriefDescription": "Problem-State L1D Directory Writes",
66 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count" 77 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "37", 81 "EventCode": "37",
70 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES", 82 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES",
71 "BriefDescription": "Problem-State L1D Penalty Cycles", 83 "BriefDescription": "Problem-State L1D Penalty Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z10/crypto.json b/tools/perf/pmu-events/arch/s390/cf_z10/crypto.json
index 7e5b72492141..db286f19e7b6 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z10/crypto.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z10/crypto.json
@@ -1,95 +1,111 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "64", 4 "EventCode": "64",
4 "EventName": "PRNG_FUNCTIONS", 5 "EventName": "PRNG_FUNCTIONS",
5 "BriefDescription": "PRNG Functions", 6 "BriefDescription": "PRNG Functions",
6 "PublicDescription": "Total number of the PRNG functions issued by the CPU" 7 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "65", 11 "EventCode": "65",
10 "EventName": "PRNG_CYCLES", 12 "EventName": "PRNG_CYCLES",
11 "BriefDescription": "PRNG Cycles", 13 "BriefDescription": "PRNG Cycles",
12 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU" 14 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "66", 18 "EventCode": "66",
16 "EventName": "PRNG_BLOCKED_FUNCTIONS", 19 "EventName": "PRNG_BLOCKED_FUNCTIONS",
17 "BriefDescription": "PRNG Blocked Functions", 20 "BriefDescription": "PRNG Blocked Functions",
18 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 21 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "67", 25 "EventCode": "67",
22 "EventName": "PRNG_BLOCKED_CYCLES", 26 "EventName": "PRNG_BLOCKED_CYCLES",
23 "BriefDescription": "PRNG Blocked Cycles", 27 "BriefDescription": "PRNG Blocked Cycles",
24 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 28 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "68", 32 "EventCode": "68",
28 "EventName": "SHA_FUNCTIONS", 33 "EventName": "SHA_FUNCTIONS",
29 "BriefDescription": "SHA Functions", 34 "BriefDescription": "SHA Functions",
30 "PublicDescription": "Total number of SHA functions issued by the CPU" 35 "PublicDescription": "Total number of SHA functions issued by the CPU"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "69", 39 "EventCode": "69",
34 "EventName": "SHA_CYCLES", 40 "EventName": "SHA_CYCLES",
35 "BriefDescription": "SHA Cycles", 41 "BriefDescription": "SHA Cycles",
36 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU" 42 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "70", 46 "EventCode": "70",
40 "EventName": "SHA_BLOCKED_FUNCTIONS", 47 "EventName": "SHA_BLOCKED_FUNCTIONS",
41 "BriefDescription": "SHA Blocked Functions", 48 "BriefDescription": "SHA Blocked Functions",
42 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 49 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "71", 53 "EventCode": "71",
46 "EventName": "SHA_BLOCKED_CYCLES", 54 "EventName": "SHA_BLOCKED_CYCLES",
47 "BriefDescription": "SHA Bloced Cycles", 55 "BriefDescription": "SHA Bloced Cycles",
48 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 56 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "72", 60 "EventCode": "72",
52 "EventName": "DEA_FUNCTIONS", 61 "EventName": "DEA_FUNCTIONS",
53 "BriefDescription": "DEA Functions", 62 "BriefDescription": "DEA Functions",
54 "PublicDescription": "Total number of the DEA functions issued by the CPU" 63 "PublicDescription": "Total number of the DEA functions issued by the CPU"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "73", 67 "EventCode": "73",
58 "EventName": "DEA_CYCLES", 68 "EventName": "DEA_CYCLES",
59 "BriefDescription": "DEA Cycles", 69 "BriefDescription": "DEA Cycles",
60 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU" 70 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "74", 74 "EventCode": "74",
64 "EventName": "DEA_BLOCKED_FUNCTIONS", 75 "EventName": "DEA_BLOCKED_FUNCTIONS",
65 "BriefDescription": "DEA Blocked Functions", 76 "BriefDescription": "DEA Blocked Functions",
66 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 77 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "75", 81 "EventCode": "75",
70 "EventName": "DEA_BLOCKED_CYCLES", 82 "EventName": "DEA_BLOCKED_CYCLES",
71 "BriefDescription": "DEA Blocked Cycles", 83 "BriefDescription": "DEA Blocked Cycles",
72 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 84 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "76", 88 "EventCode": "76",
76 "EventName": "AES_FUNCTIONS", 89 "EventName": "AES_FUNCTIONS",
77 "BriefDescription": "AES Functions", 90 "BriefDescription": "AES Functions",
78 "PublicDescription": "Total number of AES functions issued by the CPU" 91 "PublicDescription": "Total number of AES functions issued by the CPU"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "77", 95 "EventCode": "77",
82 "EventName": "AES_CYCLES", 96 "EventName": "AES_CYCLES",
83 "BriefDescription": "AES Cycles", 97 "BriefDescription": "AES Cycles",
84 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU" 98 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "78", 102 "EventCode": "78",
88 "EventName": "AES_BLOCKED_FUNCTIONS", 103 "EventName": "AES_BLOCKED_FUNCTIONS",
89 "BriefDescription": "AES Blocked Functions", 104 "BriefDescription": "AES Blocked Functions",
90 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 105 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "79", 109 "EventCode": "79",
94 "EventName": "AES_BLOCKED_CYCLES", 110 "EventName": "AES_BLOCKED_CYCLES",
95 "BriefDescription": "AES Blocked Cycles", 111 "BriefDescription": "AES Blocked Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z10/extended.json b/tools/perf/pmu-events/arch/s390/cf_z10/extended.json
index 0feedb40f30f..b6b7f29ca831 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z10/extended.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z10/extended.json
@@ -1,107 +1,125 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "128", 4 "EventCode": "128",
4 "EventName": "L1I_L2_SOURCED_WRITES", 5 "EventName": "L1I_L2_SOURCED_WRITES",
5 "BriefDescription": "L1I L2 Sourced Writes", 6 "BriefDescription": "L1I L2 Sourced Writes",
6 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from the Level-2 (L1.5) cache" 7 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from the Level-2 (L1.5) cache"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "129", 11 "EventCode": "129",
10 "EventName": "L1D_L2_SOURCED_WRITES", 12 "EventName": "L1D_L2_SOURCED_WRITES",
11 "BriefDescription": "L1D L2 Sourced Writes", 13 "BriefDescription": "L1D L2 Sourced Writes",
12 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from the Level-2 (L1.5) cache" 14 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from the Level-2 (L1.5) cache"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "130", 18 "EventCode": "130",
16 "EventName": "L1I_L3_LOCAL_WRITES", 19 "EventName": "L1I_L3_LOCAL_WRITES",
17 "BriefDescription": "L1I L3 Local Writes", 20 "BriefDescription": "L1I L3 Local Writes",
18 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from the Level-3 cache that is on the same book as the Instruction cache (Local L2 cache)" 21 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from the Level-3 cache that is on the same book as the Instruction cache (Local L2 cache)"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "131", 25 "EventCode": "131",
22 "EventName": "L1D_L3_LOCAL_WRITES", 26 "EventName": "L1D_L3_LOCAL_WRITES",
23 "BriefDescription": "L1D L3 Local Writes", 27 "BriefDescription": "L1D L3 Local Writes",
24 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installtion cache line was source from the Level-3 cache that is on the same book as the Data cache (Local L2 cache)" 28 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installtion cache line was source from the Level-3 cache that is on the same book as the Data cache (Local L2 cache)"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "132", 32 "EventCode": "132",
28 "EventName": "L1I_L3_REMOTE_WRITES", 33 "EventName": "L1I_L3_REMOTE_WRITES",
29 "BriefDescription": "L1I L3 Remote Writes", 34 "BriefDescription": "L1I L3 Remote Writes",
30 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Instruction cache (Remote L2 cache)" 35 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Instruction cache (Remote L2 cache)"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "133", 39 "EventCode": "133",
34 "EventName": "L1D_L3_REMOTE_WRITES", 40 "EventName": "L1D_L3_REMOTE_WRITES",
35 "BriefDescription": "L1D L3 Remote Writes", 41 "BriefDescription": "L1D L3 Remote Writes",
36 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Data cache (Remote L2 cache)" 42 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from a Level-3 cache that is not on the same book as the Data cache (Remote L2 cache)"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "134", 46 "EventCode": "134",
40 "EventName": "L1D_LMEM_SOURCED_WRITES", 47 "EventName": "L1D_LMEM_SOURCED_WRITES",
41 "BriefDescription": "L1D Local Memory Sourced Writes", 48 "BriefDescription": "L1D Local Memory Sourced Writes",
42 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)" 49 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "135", 53 "EventCode": "135",
46 "EventName": "L1I_LMEM_SOURCED_WRITES", 54 "EventName": "L1I_LMEM_SOURCED_WRITES",
47 "BriefDescription": "L1I Local Memory Sourced Writes", 55 "BriefDescription": "L1I Local Memory Sourced Writes",
48 "PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was sourced from memory that is attached to the s ame book as the Instruction cache (Local Memory)" 56 "PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was sourced from memory that is attached to the s ame book as the Instruction cache (Local Memory)"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "136", 60 "EventCode": "136",
52 "EventName": "L1D_RO_EXCL_WRITES", 61 "EventName": "L1D_RO_EXCL_WRITES",
53 "BriefDescription": "L1D Read-only Exclusive Writes", 62 "BriefDescription": "L1D Read-only Exclusive Writes",
54 "PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line" 63 "PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "137", 67 "EventCode": "137",
58 "EventName": "L1I_CACHELINE_INVALIDATES", 68 "EventName": "L1I_CACHELINE_INVALIDATES",
59 "BriefDescription": "L1I Cacheline Invalidates", 69 "BriefDescription": "L1I Cacheline Invalidates",
60 "PublicDescription": "A cache line in the Level-1 I-Cache has been invalidated by a store on the same CPU as the Level-1 I-Cache" 70 "PublicDescription": "A cache line in the Level-1 I-Cache has been invalidated by a store on the same CPU as the Level-1 I-Cache"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "138", 74 "EventCode": "138",
64 "EventName": "ITLB1_WRITES", 75 "EventName": "ITLB1_WRITES",
65 "BriefDescription": "ITLB1 Writes", 76 "BriefDescription": "ITLB1 Writes",
66 "PublicDescription": "A translation entry has been written into the Level-1 Instruction Translation Lookaside Buffer" 77 "PublicDescription": "A translation entry has been written into the Level-1 Instruction Translation Lookaside Buffer"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "139", 81 "EventCode": "139",
70 "EventName": "DTLB1_WRITES", 82 "EventName": "DTLB1_WRITES",
71 "BriefDescription": "DTLB1 Writes", 83 "BriefDescription": "DTLB1 Writes",
72 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer" 84 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "140", 88 "EventCode": "140",
76 "EventName": "TLB2_PTE_WRITES", 89 "EventName": "TLB2_PTE_WRITES",
77 "BriefDescription": "TLB2 PTE Writes", 90 "BriefDescription": "TLB2 PTE Writes",
78 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays" 91 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "141", 95 "EventCode": "141",
82 "EventName": "TLB2_CRSTE_WRITES", 96 "EventName": "TLB2_CRSTE_WRITES",
83 "BriefDescription": "TLB2 CRSTE Writes", 97 "BriefDescription": "TLB2 CRSTE Writes",
84 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays" 98 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "142", 102 "EventCode": "142",
88 "EventName": "TLB2_CRSTE_HPAGE_WRITES", 103 "EventName": "TLB2_CRSTE_HPAGE_WRITES",
89 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes", 104 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes",
90 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation" 105 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "145", 109 "EventCode": "145",
94 "EventName": "ITLB1_MISSES", 110 "EventName": "ITLB1_MISSES",
95 "BriefDescription": "ITLB1 Misses", 111 "BriefDescription": "ITLB1 Misses",
96 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle an ITLB1 miss is in progress" 112 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle an ITLB1 miss is in progress"
97 }, 113 },
98 { 114 {
115 "Unit": "CPU-M-CF",
99 "EventCode": "146", 116 "EventCode": "146",
100 "EventName": "DTLB1_MISSES", 117 "EventName": "DTLB1_MISSES",
101 "BriefDescription": "DTLB1 Misses", 118 "BriefDescription": "DTLB1 Misses",
102 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle an DTLB1 miss is in progress" 119 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle an DTLB1 miss is in progress"
103 }, 120 },
104 { 121 {
122 "Unit": "CPU-M-CF",
105 "EventCode": "147", 123 "EventCode": "147",
106 "EventName": "L2C_STORES_SENT", 124 "EventName": "L2C_STORES_SENT",
107 "BriefDescription": "L2C Stores Sent", 125 "BriefDescription": "L2C Stores Sent",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z13/basic.json b/tools/perf/pmu-events/arch/s390/cf_z13/basic.json
index 8bf16759ca53..2dd8dafff2ef 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z13/basic.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z13/basic.json
@@ -1,71 +1,83 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "0", 4 "EventCode": "0",
4 "EventName": "CPU_CYCLES", 5 "EventName": "CPU_CYCLES",
5 "BriefDescription": "CPU Cycles", 6 "BriefDescription": "CPU Cycles",
6 "PublicDescription": "Cycle Count" 7 "PublicDescription": "Cycle Count"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "1", 11 "EventCode": "1",
10 "EventName": "INSTRUCTIONS", 12 "EventName": "INSTRUCTIONS",
11 "BriefDescription": "Instructions", 13 "BriefDescription": "Instructions",
12 "PublicDescription": "Instruction Count" 14 "PublicDescription": "Instruction Count"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "2", 18 "EventCode": "2",
16 "EventName": "L1I_DIR_WRITES", 19 "EventName": "L1I_DIR_WRITES",
17 "BriefDescription": "L1I Directory Writes", 20 "BriefDescription": "L1I Directory Writes",
18 "PublicDescription": "Level-1 I-Cache Directory Write Count" 21 "PublicDescription": "Level-1 I-Cache Directory Write Count"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "3", 25 "EventCode": "3",
22 "EventName": "L1I_PENALTY_CYCLES", 26 "EventName": "L1I_PENALTY_CYCLES",
23 "BriefDescription": "L1I Penalty Cycles", 27 "BriefDescription": "L1I Penalty Cycles",
24 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "4", 32 "EventCode": "4",
28 "EventName": "L1D_DIR_WRITES", 33 "EventName": "L1D_DIR_WRITES",
29 "BriefDescription": "L1D Directory Writes", 34 "BriefDescription": "L1D Directory Writes",
30 "PublicDescription": "Level-1 D-Cache Directory Write Count" 35 "PublicDescription": "Level-1 D-Cache Directory Write Count"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "5", 39 "EventCode": "5",
34 "EventName": "L1D_PENALTY_CYCLES", 40 "EventName": "L1D_PENALTY_CYCLES",
35 "BriefDescription": "L1D Penalty Cycles", 41 "BriefDescription": "L1D Penalty Cycles",
36 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "32", 46 "EventCode": "32",
40 "EventName": "PROBLEM_STATE_CPU_CYCLES", 47 "EventName": "PROBLEM_STATE_CPU_CYCLES",
41 "BriefDescription": "Problem-State CPU Cycles", 48 "BriefDescription": "Problem-State CPU Cycles",
42 "PublicDescription": "Problem-State Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "33", 53 "EventCode": "33",
46 "EventName": "PROBLEM_STATE_INSTRUCTIONS", 54 "EventName": "PROBLEM_STATE_INSTRUCTIONS",
47 "BriefDescription": "Problem-State Instructions", 55 "BriefDescription": "Problem-State Instructions",
48 "PublicDescription": "Problem-State Instruction Count" 56 "PublicDescription": "Problem-State Instruction Count"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "34", 60 "EventCode": "34",
52 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES", 61 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES",
53 "BriefDescription": "Problem-State L1I Directory Writes", 62 "BriefDescription": "Problem-State L1I Directory Writes",
54 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count" 63 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "35", 67 "EventCode": "35",
58 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES", 68 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES",
59 "BriefDescription": "Problem-State L1I Penalty Cycles", 69 "BriefDescription": "Problem-State L1I Penalty Cycles",
60 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "36", 74 "EventCode": "36",
64 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES", 75 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES",
65 "BriefDescription": "Problem-State L1D Directory Writes", 76 "BriefDescription": "Problem-State L1D Directory Writes",
66 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count" 77 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "37", 81 "EventCode": "37",
70 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES", 82 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES",
71 "BriefDescription": "Problem-State L1D Penalty Cycles", 83 "BriefDescription": "Problem-State L1D Penalty Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z13/crypto.json b/tools/perf/pmu-events/arch/s390/cf_z13/crypto.json
index 7e5b72492141..db286f19e7b6 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z13/crypto.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z13/crypto.json
@@ -1,95 +1,111 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "64", 4 "EventCode": "64",
4 "EventName": "PRNG_FUNCTIONS", 5 "EventName": "PRNG_FUNCTIONS",
5 "BriefDescription": "PRNG Functions", 6 "BriefDescription": "PRNG Functions",
6 "PublicDescription": "Total number of the PRNG functions issued by the CPU" 7 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "65", 11 "EventCode": "65",
10 "EventName": "PRNG_CYCLES", 12 "EventName": "PRNG_CYCLES",
11 "BriefDescription": "PRNG Cycles", 13 "BriefDescription": "PRNG Cycles",
12 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU" 14 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "66", 18 "EventCode": "66",
16 "EventName": "PRNG_BLOCKED_FUNCTIONS", 19 "EventName": "PRNG_BLOCKED_FUNCTIONS",
17 "BriefDescription": "PRNG Blocked Functions", 20 "BriefDescription": "PRNG Blocked Functions",
18 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 21 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "67", 25 "EventCode": "67",
22 "EventName": "PRNG_BLOCKED_CYCLES", 26 "EventName": "PRNG_BLOCKED_CYCLES",
23 "BriefDescription": "PRNG Blocked Cycles", 27 "BriefDescription": "PRNG Blocked Cycles",
24 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 28 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "68", 32 "EventCode": "68",
28 "EventName": "SHA_FUNCTIONS", 33 "EventName": "SHA_FUNCTIONS",
29 "BriefDescription": "SHA Functions", 34 "BriefDescription": "SHA Functions",
30 "PublicDescription": "Total number of SHA functions issued by the CPU" 35 "PublicDescription": "Total number of SHA functions issued by the CPU"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "69", 39 "EventCode": "69",
34 "EventName": "SHA_CYCLES", 40 "EventName": "SHA_CYCLES",
35 "BriefDescription": "SHA Cycles", 41 "BriefDescription": "SHA Cycles",
36 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU" 42 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "70", 46 "EventCode": "70",
40 "EventName": "SHA_BLOCKED_FUNCTIONS", 47 "EventName": "SHA_BLOCKED_FUNCTIONS",
41 "BriefDescription": "SHA Blocked Functions", 48 "BriefDescription": "SHA Blocked Functions",
42 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 49 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "71", 53 "EventCode": "71",
46 "EventName": "SHA_BLOCKED_CYCLES", 54 "EventName": "SHA_BLOCKED_CYCLES",
47 "BriefDescription": "SHA Bloced Cycles", 55 "BriefDescription": "SHA Bloced Cycles",
48 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 56 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "72", 60 "EventCode": "72",
52 "EventName": "DEA_FUNCTIONS", 61 "EventName": "DEA_FUNCTIONS",
53 "BriefDescription": "DEA Functions", 62 "BriefDescription": "DEA Functions",
54 "PublicDescription": "Total number of the DEA functions issued by the CPU" 63 "PublicDescription": "Total number of the DEA functions issued by the CPU"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "73", 67 "EventCode": "73",
58 "EventName": "DEA_CYCLES", 68 "EventName": "DEA_CYCLES",
59 "BriefDescription": "DEA Cycles", 69 "BriefDescription": "DEA Cycles",
60 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU" 70 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "74", 74 "EventCode": "74",
64 "EventName": "DEA_BLOCKED_FUNCTIONS", 75 "EventName": "DEA_BLOCKED_FUNCTIONS",
65 "BriefDescription": "DEA Blocked Functions", 76 "BriefDescription": "DEA Blocked Functions",
66 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 77 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "75", 81 "EventCode": "75",
70 "EventName": "DEA_BLOCKED_CYCLES", 82 "EventName": "DEA_BLOCKED_CYCLES",
71 "BriefDescription": "DEA Blocked Cycles", 83 "BriefDescription": "DEA Blocked Cycles",
72 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 84 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "76", 88 "EventCode": "76",
76 "EventName": "AES_FUNCTIONS", 89 "EventName": "AES_FUNCTIONS",
77 "BriefDescription": "AES Functions", 90 "BriefDescription": "AES Functions",
78 "PublicDescription": "Total number of AES functions issued by the CPU" 91 "PublicDescription": "Total number of AES functions issued by the CPU"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "77", 95 "EventCode": "77",
82 "EventName": "AES_CYCLES", 96 "EventName": "AES_CYCLES",
83 "BriefDescription": "AES Cycles", 97 "BriefDescription": "AES Cycles",
84 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU" 98 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "78", 102 "EventCode": "78",
88 "EventName": "AES_BLOCKED_FUNCTIONS", 103 "EventName": "AES_BLOCKED_FUNCTIONS",
89 "BriefDescription": "AES Blocked Functions", 104 "BriefDescription": "AES Blocked Functions",
90 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 105 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "79", 109 "EventCode": "79",
94 "EventName": "AES_BLOCKED_CYCLES", 110 "EventName": "AES_BLOCKED_CYCLES",
95 "BriefDescription": "AES Blocked Cycles", 111 "BriefDescription": "AES Blocked Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z13/extended.json b/tools/perf/pmu-events/arch/s390/cf_z13/extended.json
index 9a002b6967f1..436ce33f1182 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z13/extended.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z13/extended.json
@@ -1,335 +1,391 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "128", 4 "EventCode": "128",
4 "EventName": "L1D_RO_EXCL_WRITES", 5 "EventName": "L1D_RO_EXCL_WRITES",
5 "BriefDescription": "L1D Read-only Exclusive Writes", 6 "BriefDescription": "L1D Read-only Exclusive Writes",
6 "PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line." 7 "PublicDescription": "A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line."
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "129", 11 "EventCode": "129",
10 "EventName": "DTLB1_WRITES", 12 "EventName": "DTLB1_WRITES",
11 "BriefDescription": "DTLB1 Writes", 13 "BriefDescription": "DTLB1 Writes",
12 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer" 14 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "130", 18 "EventCode": "130",
16 "EventName": "DTLB1_MISSES", 19 "EventName": "DTLB1_MISSES",
17 "BriefDescription": "DTLB1 Misses", 20 "BriefDescription": "DTLB1 Misses",
18 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB1 miss is in progress." 21 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB1 miss is in progress."
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "131", 25 "EventCode": "131",
22 "EventName": "DTLB1_HPAGE_WRITES", 26 "EventName": "DTLB1_HPAGE_WRITES",
23 "BriefDescription": "DTLB1 One-Megabyte Page Writes", 27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
24 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a one-megabyte page" 28 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a one-megabyte page"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "132", 32 "EventCode": "132",
28 "EventName": "DTLB1_GPAGE_WRITES", 33 "EventName": "DTLB1_GPAGE_WRITES",
29 "BriefDescription": "DTLB1 Two-Gigabyte Page Writes", 34 "BriefDescription": "DTLB1 Two-Gigabyte Page Writes",
30 "PublicDescription": "Counter:132 Name:DTLB1_GPAGE_WRITES A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a two-gigabyte page." 35 "PublicDescription": "Counter:132 Name:DTLB1_GPAGE_WRITES A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a two-gigabyte page."
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "133", 39 "EventCode": "133",
34 "EventName": "L1D_L2D_SOURCED_WRITES", 40 "EventName": "L1D_L2D_SOURCED_WRITES",
35 "BriefDescription": "L1D L2D Sourced Writes", 41 "BriefDescription": "L1D L2D Sourced Writes",
36 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache" 42 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "134", 46 "EventCode": "134",
40 "EventName": "ITLB1_WRITES", 47 "EventName": "ITLB1_WRITES",
41 "BriefDescription": "ITLB1 Writes", 48 "BriefDescription": "ITLB1 Writes",
42 "PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation Lookaside Buffer" 49 "PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation Lookaside Buffer"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "135", 53 "EventCode": "135",
46 "EventName": "ITLB1_MISSES", 54 "EventName": "ITLB1_MISSES",
47 "BriefDescription": "ITLB1 Misses", 55 "BriefDescription": "ITLB1 Misses",
48 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle an ITLB1 miss is in progress" 56 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle an ITLB1 miss is in progress"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "136", 60 "EventCode": "136",
52 "EventName": "L1I_L2I_SOURCED_WRITES", 61 "EventName": "L1I_L2I_SOURCED_WRITES",
53 "BriefDescription": "L1I L2I Sourced Writes", 62 "BriefDescription": "L1I L2I Sourced Writes",
54 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache" 63 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "137", 67 "EventCode": "137",
58 "EventName": "TLB2_PTE_WRITES", 68 "EventName": "TLB2_PTE_WRITES",
59 "BriefDescription": "TLB2 PTE Writes", 69 "BriefDescription": "TLB2 PTE Writes",
60 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays" 70 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "138", 74 "EventCode": "138",
64 "EventName": "TLB2_CRSTE_HPAGE_WRITES", 75 "EventName": "TLB2_CRSTE_HPAGE_WRITES",
65 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes", 76 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes",
66 "PublicDescription": "A translation entry has been written to the Level-2 TLB Combined Region Segment Table Entry arrays for a one-megabyte large page translation" 77 "PublicDescription": "A translation entry has been written to the Level-2 TLB Combined Region Segment Table Entry arrays for a one-megabyte large page translation"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "139", 81 "EventCode": "139",
70 "EventName": "TLB2_CRSTE_WRITES", 82 "EventName": "TLB2_CRSTE_WRITES",
71 "BriefDescription": "TLB2 CRSTE Writes", 83 "BriefDescription": "TLB2 CRSTE Writes",
72 "PublicDescription": "A translation entry has been written to the Level-2 TLB Combined Region Segment Table Entry arrays" 84 "PublicDescription": "A translation entry has been written to the Level-2 TLB Combined Region Segment Table Entry arrays"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "140", 88 "EventCode": "140",
76 "EventName": "TX_C_TEND", 89 "EventName": "TX_C_TEND",
77 "BriefDescription": "Completed TEND instructions in constrained TX mode", 90 "BriefDescription": "Completed TEND instructions in constrained TX mode",
78 "PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode" 91 "PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "141", 95 "EventCode": "141",
82 "EventName": "TX_NC_TEND", 96 "EventName": "TX_NC_TEND",
83 "BriefDescription": "Completed TEND instructions in non-constrained TX mode", 97 "BriefDescription": "Completed TEND instructions in non-constrained TX mode",
84 "PublicDescription": "A TEND instruction has completed in a non-constrained transactional-execution mode" 98 "PublicDescription": "A TEND instruction has completed in a non-constrained transactional-execution mode"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "143", 102 "EventCode": "143",
88 "EventName": "L1C_TLB1_MISSES", 103 "EventName": "L1C_TLB1_MISSES",
89 "BriefDescription": "L1C TLB1 Misses", 104 "BriefDescription": "L1C TLB1 Misses",
90 "PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-1 TLB miss is in progress." 105 "PublicDescription": "Increments by one for any cycle where a Level-1 cache or Level-1 TLB miss is in progress."
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "144", 109 "EventCode": "144",
94 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES", 110 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES",
95 "BriefDescription": "L1D On-Chip L3 Sourced Writes", 111 "BriefDescription": "L1D On-Chip L3 Sourced Writes",
96 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention" 112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention"
97 }, 113 },
98 { 114 {
115 "Unit": "CPU-M-CF",
99 "EventCode": "145", 116 "EventCode": "145",
100 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV", 117 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV",
101 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention", 118 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
102 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention" 119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention"
103 }, 120 },
104 { 121 {
122 "Unit": "CPU-M-CF",
105 "EventCode": "146", 123 "EventCode": "146",
106 "EventName": "L1D_ONNODE_L4_SOURCED_WRITES", 124 "EventName": "L1D_ONNODE_L4_SOURCED_WRITES",
107 "BriefDescription": "L1D On-Node L4 Sourced Writes", 125 "BriefDescription": "L1D On-Node L4 Sourced Writes",
108 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-4 cache" 126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-4 cache"
109 }, 127 },
110 { 128 {
129 "Unit": "CPU-M-CF",
111 "EventCode": "147", 130 "EventCode": "147",
112 "EventName": "L1D_ONNODE_L3_SOURCED_WRITES_IV", 131 "EventName": "L1D_ONNODE_L3_SOURCED_WRITES_IV",
113 "BriefDescription": "L1D On-Node L3 Sourced Writes with Intervention", 132 "BriefDescription": "L1D On-Node L3 Sourced Writes with Intervention",
114 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention" 133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention"
115 }, 134 },
116 { 135 {
136 "Unit": "CPU-M-CF",
117 "EventCode": "148", 137 "EventCode": "148",
118 "EventName": "L1D_ONNODE_L3_SOURCED_WRITES", 138 "EventName": "L1D_ONNODE_L3_SOURCED_WRITES",
119 "BriefDescription": "L1D On-Node L3 Sourced Writes", 139 "BriefDescription": "L1D On-Node L3 Sourced Writes",
120 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention" 140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention"
121 }, 141 },
122 { 142 {
143 "Unit": "CPU-M-CF",
123 "EventCode": "149", 144 "EventCode": "149",
124 "EventName": "L1D_ONDRAWER_L4_SOURCED_WRITES", 145 "EventName": "L1D_ONDRAWER_L4_SOURCED_WRITES",
125 "BriefDescription": "L1D On-Drawer L4 Sourced Writes", 146 "BriefDescription": "L1D On-Drawer L4 Sourced Writes",
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache" 147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache"
127 }, 148 },
128 { 149 {
150 "Unit": "CPU-M-CF",
129 "EventCode": "150", 151 "EventCode": "150",
130 "EventName": "L1D_ONDRAWER_L3_SOURCED_WRITES_IV", 152 "EventName": "L1D_ONDRAWER_L3_SOURCED_WRITES_IV",
131 "BriefDescription": "L1D On-Drawer L3 Sourced Writes with Intervention", 153 "BriefDescription": "L1D On-Drawer L3 Sourced Writes with Intervention",
132 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention" 154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention"
133 }, 155 },
134 { 156 {
157 "Unit": "CPU-M-CF",
135 "EventCode": "151", 158 "EventCode": "151",
136 "EventName": "L1D_ONDRAWER_L3_SOURCED_WRITES", 159 "EventName": "L1D_ONDRAWER_L3_SOURCED_WRITES",
137 "BriefDescription": "L1D On-Drawer L3 Sourced Writes", 160 "BriefDescription": "L1D On-Drawer L3 Sourced Writes",
138 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache without intervention" 161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache without intervention"
139 }, 162 },
140 { 163 {
164 "Unit": "CPU-M-CF",
141 "EventCode": "152", 165 "EventCode": "152",
142 "EventName": "L1D_OFFDRAWER_SCOL_L4_SOURCED_WRITES", 166 "EventName": "L1D_OFFDRAWER_SCOL_L4_SOURCED_WRITES",
143 "BriefDescription": "L1D Off-Drawer Same-Column L4 Sourced Writes", 167 "BriefDescription": "L1D Off-Drawer Same-Column L4 Sourced Writes",
144 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-4 cache" 168 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-4 cache"
145 }, 169 },
146 { 170 {
171 "Unit": "CPU-M-CF",
147 "EventCode": "153", 172 "EventCode": "153",
148 "EventName": "L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV", 173 "EventName": "L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV",
149 "BriefDescription": "L1D Off-Drawer Same-Column L3 Sourced Writes with Intervention", 174 "BriefDescription": "L1D Off-Drawer Same-Column L3 Sourced Writes with Intervention",
150 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache with intervention" 175 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache with intervention"
151 }, 176 },
152 { 177 {
178 "Unit": "CPU-M-CF",
153 "EventCode": "154", 179 "EventCode": "154",
154 "EventName": "L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES", 180 "EventName": "L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES",
155 "BriefDescription": "L1D Off-Drawer Same-Column L3 Sourced Writes", 181 "BriefDescription": "L1D Off-Drawer Same-Column L3 Sourced Writes",
156 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache without intervention" 182 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache without intervention"
157 }, 183 },
158 { 184 {
185 "Unit": "CPU-M-CF",
159 "EventCode": "155", 186 "EventCode": "155",
160 "EventName": "L1D_OFFDRAWER_FCOL_L4_SOURCED_WRITES", 187 "EventName": "L1D_OFFDRAWER_FCOL_L4_SOURCED_WRITES",
161 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes", 188 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes",
162 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-4 cache" 189 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-4 cache"
163 }, 190 },
164 { 191 {
192 "Unit": "CPU-M-CF",
165 "EventCode": "156", 193 "EventCode": "156",
166 "EventName": "L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV", 194 "EventName": "L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV",
167 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes with Intervention", 195 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes with Intervention",
168 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache with intervention" 196 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache with intervention"
169 }, 197 },
170 { 198 {
199 "Unit": "CPU-M-CF",
171 "EventCode": "157", 200 "EventCode": "157",
172 "EventName": "L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES", 201 "EventName": "L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES",
173 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes", 202 "BriefDescription": "L1D Off-Drawer Far-Column L3 Sourced Writes",
174 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache without intervention" 203 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache without intervention"
175 }, 204 },
176 { 205 {
206 "Unit": "CPU-M-CF",
177 "EventCode": "158", 207 "EventCode": "158",
178 "EventName": "L1D_ONNODE_MEM_SOURCED_WRITES", 208 "EventName": "L1D_ONNODE_MEM_SOURCED_WRITES",
179 "BriefDescription": "L1D On-Node Memory Sourced Writes", 209 "BriefDescription": "L1D On-Node Memory Sourced Writes",
180 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Node memory" 210 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Node memory"
181 }, 211 },
182 { 212 {
213 "Unit": "CPU-M-CF",
183 "EventCode": "159", 214 "EventCode": "159",
184 "EventName": "L1D_ONDRAWER_MEM_SOURCED_WRITES", 215 "EventName": "L1D_ONDRAWER_MEM_SOURCED_WRITES",
185 "BriefDescription": "L1D On-Drawer Memory Sourced Writes", 216 "BriefDescription": "L1D On-Drawer Memory Sourced Writes",
186 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer memory" 217 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer memory"
187 }, 218 },
188 { 219 {
220 "Unit": "CPU-M-CF",
189 "EventCode": "160", 221 "EventCode": "160",
190 "EventName": "L1D_OFFDRAWER_MEM_SOURCED_WRITES", 222 "EventName": "L1D_OFFDRAWER_MEM_SOURCED_WRITES",
191 "BriefDescription": "L1D Off-Drawer Memory Sourced Writes", 223 "BriefDescription": "L1D Off-Drawer Memory Sourced Writes",
192 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer memory" 224 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer memory"
193 }, 225 },
194 { 226 {
227 "Unit": "CPU-M-CF",
195 "EventCode": "161", 228 "EventCode": "161",
196 "EventName": "L1D_ONCHIP_MEM_SOURCED_WRITES", 229 "EventName": "L1D_ONCHIP_MEM_SOURCED_WRITES",
197 "BriefDescription": "L1D On-Chip Memory Sourced Writes", 230 "BriefDescription": "L1D On-Chip Memory Sourced Writes",
198 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory" 231 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory"
199 }, 232 },
200 { 233 {
234 "Unit": "CPU-M-CF",
201 "EventCode": "162", 235 "EventCode": "162",
202 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES", 236 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES",
203 "BriefDescription": "L1I On-Chip L3 Sourced Writes", 237 "BriefDescription": "L1I On-Chip L3 Sourced Writes",
204 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention" 238 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention"
205 }, 239 },
206 { 240 {
241 "Unit": "CPU-M-CF",
207 "EventCode": "163", 242 "EventCode": "163",
208 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV", 243 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV",
209 "BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention", 244 "BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention",
210 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Chip Level-3 cache with intervention" 245 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Chip Level-3 cache with intervention"
211 }, 246 },
212 { 247 {
248 "Unit": "CPU-M-CF",
213 "EventCode": "164", 249 "EventCode": "164",
214 "EventName": "L1I_ONNODE_L4_SOURCED_WRITES", 250 "EventName": "L1I_ONNODE_L4_SOURCED_WRITES",
215 "BriefDescription": "L1I On-Chip L4 Sourced Writes", 251 "BriefDescription": "L1I On-Chip L4 Sourced Writes",
216 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-4 cache" 252 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-4 cache"
217 }, 253 },
218 { 254 {
255 "Unit": "CPU-M-CF",
219 "EventCode": "165", 256 "EventCode": "165",
220 "EventName": "L1I_ONNODE_L3_SOURCED_WRITES_IV", 257 "EventName": "L1I_ONNODE_L3_SOURCED_WRITES_IV",
221 "BriefDescription": "L1I On-Node L3 Sourced Writes with Intervention", 258 "BriefDescription": "L1I On-Node L3 Sourced Writes with Intervention",
222 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention" 259 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-3 cache with intervention"
223 }, 260 },
224 { 261 {
262 "Unit": "CPU-M-CF",
225 "EventCode": "166", 263 "EventCode": "166",
226 "EventName": "L1I_ONNODE_L3_SOURCED_WRITES", 264 "EventName": "L1I_ONNODE_L3_SOURCED_WRITES",
227 "BriefDescription": "L1I On-Node L3 Sourced Writes", 265 "BriefDescription": "L1I On-Node L3 Sourced Writes",
228 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention" 266 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Node Level-3 cache without intervention"
229 }, 267 },
230 { 268 {
269 "Unit": "CPU-M-CF",
231 "EventCode": "167", 270 "EventCode": "167",
232 "EventName": "L1I_ONDRAWER_L4_SOURCED_WRITES", 271 "EventName": "L1I_ONDRAWER_L4_SOURCED_WRITES",
233 "BriefDescription": "L1I On-Drawer L4 Sourced Writes", 272 "BriefDescription": "L1I On-Drawer L4 Sourced Writes",
234 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache" 273 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-4 cache"
235 }, 274 },
236 { 275 {
276 "Unit": "CPU-M-CF",
237 "EventCode": "168", 277 "EventCode": "168",
238 "EventName": "L1I_ONDRAWER_L3_SOURCED_WRITES_IV", 278 "EventName": "L1I_ONDRAWER_L3_SOURCED_WRITES_IV",
239 "BriefDescription": "L1I On-Drawer L3 Sourced Writes with Intervention", 279 "BriefDescription": "L1I On-Drawer L3 Sourced Writes with Intervention",
240 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention" 280 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache with intervention"
241 }, 281 },
242 { 282 {
283 "Unit": "CPU-M-CF",
243 "EventCode": "169", 284 "EventCode": "169",
244 "EventName": "L1I_ONDRAWER_L3_SOURCED_WRITES", 285 "EventName": "L1I_ONDRAWER_L3_SOURCED_WRITES",
245 "BriefDescription": "L1I On-Drawer L3 Sourced Writes", 286 "BriefDescription": "L1I On-Drawer L3 Sourced Writes",
246 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache without intervention" 287 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Drawer Level-3 cache without intervention"
247 }, 288 },
248 { 289 {
290 "Unit": "CPU-M-CF",
249 "EventCode": "170", 291 "EventCode": "170",
250 "EventName": "L1I_OFFDRAWER_SCOL_L4_SOURCED_WRITES", 292 "EventName": "L1I_OFFDRAWER_SCOL_L4_SOURCED_WRITES",
251 "BriefDescription": "L1I Off-Drawer Same-Column L4 Sourced Writes", 293 "BriefDescription": "L1I Off-Drawer Same-Column L4 Sourced Writes",
252 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-4 cache" 294 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-4 cache"
253 }, 295 },
254 { 296 {
297 "Unit": "CPU-M-CF",
255 "EventCode": "171", 298 "EventCode": "171",
256 "EventName": "L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV", 299 "EventName": "L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV",
257 "BriefDescription": "L1I Off-Drawer Same-Column L3 Sourced Writes with Intervention", 300 "BriefDescription": "L1I Off-Drawer Same-Column L3 Sourced Writes with Intervention",
258 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache with intervention" 301 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache with intervention"
259 }, 302 },
260 { 303 {
304 "Unit": "CPU-M-CF",
261 "EventCode": "172", 305 "EventCode": "172",
262 "EventName": "L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES", 306 "EventName": "L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES",
263 "BriefDescription": "L1I Off-Drawer Same-Column L3 Sourced Writes", 307 "BriefDescription": "L1I Off-Drawer Same-Column L3 Sourced Writes",
264 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache without intervention" 308 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Same-Column Level-3 cache without intervention"
265 }, 309 },
266 { 310 {
311 "Unit": "CPU-M-CF",
267 "EventCode": "173", 312 "EventCode": "173",
268 "EventName": "L1I_OFFDRAWER_FCOL_L4_SOURCED_WRITES", 313 "EventName": "L1I_OFFDRAWER_FCOL_L4_SOURCED_WRITES",
269 "BriefDescription": "L1I Off-Drawer Far-Column L4 Sourced Writes", 314 "BriefDescription": "L1I Off-Drawer Far-Column L4 Sourced Writes",
270 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-4 cache" 315 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-4 cache"
271 }, 316 },
272 { 317 {
318 "Unit": "CPU-M-CF",
273 "EventCode": "174", 319 "EventCode": "174",
274 "EventName": "L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV", 320 "EventName": "L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV",
275 "BriefDescription": "L1I Off-Drawer Far-Column L3 Sourced Writes with Intervention", 321 "BriefDescription": "L1I Off-Drawer Far-Column L3 Sourced Writes with Intervention",
276 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache with intervention" 322 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache with intervention"
277 }, 323 },
278 { 324 {
325 "Unit": "CPU-M-CF",
279 "EventCode": "175", 326 "EventCode": "175",
280 "EventName": "L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES", 327 "EventName": "L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES",
281 "BriefDescription": "L1I Off-Drawer Far-Column L3 Sourced Writes", 328 "BriefDescription": "L1I Off-Drawer Far-Column L3 Sourced Writes",
282 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache without intervention" 329 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Far-Column Level-3 cache without intervention"
283 }, 330 },
284 { 331 {
332 "Unit": "CPU-M-CF",
285 "EventCode": "176", 333 "EventCode": "176",
286 "EventName": "L1I_ONNODE_MEM_SOURCED_WRITES", 334 "EventName": "L1I_ONNODE_MEM_SOURCED_WRITES",
287 "BriefDescription": "L1I On-Node Memory Sourced Writes", 335 "BriefDescription": "L1I On-Node Memory Sourced Writes",
288 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Node memory" 336 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Node memory"
289 }, 337 },
290 { 338 {
339 "Unit": "CPU-M-CF",
291 "EventCode": "177", 340 "EventCode": "177",
292 "EventName": "L1I_ONDRAWER_MEM_SOURCED_WRITES", 341 "EventName": "L1I_ONDRAWER_MEM_SOURCED_WRITES",
293 "BriefDescription": "L1I On-Drawer Memory Sourced Writes", 342 "BriefDescription": "L1I On-Drawer Memory Sourced Writes",
294 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer memory" 343 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer memory"
295 }, 344 },
296 { 345 {
346 "Unit": "CPU-M-CF",
297 "EventCode": "178", 347 "EventCode": "178",
298 "EventName": "L1I_OFFDRAWER_MEM_SOURCED_WRITES", 348 "EventName": "L1I_OFFDRAWER_MEM_SOURCED_WRITES",
299 "BriefDescription": "L1I Off-Drawer Memory Sourced Writes", 349 "BriefDescription": "L1I Off-Drawer Memory Sourced Writes",
300 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer memory" 350 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer memory"
301 }, 351 },
302 { 352 {
353 "Unit": "CPU-M-CF",
303 "EventCode": "179", 354 "EventCode": "179",
304 "EventName": "L1I_ONCHIP_MEM_SOURCED_WRITES", 355 "EventName": "L1I_ONCHIP_MEM_SOURCED_WRITES",
305 "BriefDescription": "L1I On-Chip Memory Sourced Writes", 356 "BriefDescription": "L1I On-Chip Memory Sourced Writes",
306 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Chip memory" 357 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Chip memory"
307 }, 358 },
308 { 359 {
360 "Unit": "CPU-M-CF",
309 "EventCode": "218", 361 "EventCode": "218",
310 "EventName": "TX_NC_TABORT", 362 "EventName": "TX_NC_TABORT",
311 "BriefDescription": "Aborted transactions in non-constrained TX mode", 363 "BriefDescription": "Aborted transactions in non-constrained TX mode",
312 "PublicDescription": "A transaction abort has occurred in a non-constrained transactional-execution mode" 364 "PublicDescription": "A transaction abort has occurred in a non-constrained transactional-execution mode"
313 }, 365 },
314 { 366 {
367 "Unit": "CPU-M-CF",
315 "EventCode": "219", 368 "EventCode": "219",
316 "EventName": "TX_C_TABORT_NO_SPECIAL", 369 "EventName": "TX_C_TABORT_NO_SPECIAL",
317 "BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic", 370 "BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic",
318 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete" 371 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete"
319 }, 372 },
320 { 373 {
374 "Unit": "CPU-M-CF",
321 "EventCode": "220", 375 "EventCode": "220",
322 "EventName": "TX_C_TABORT_SPECIAL", 376 "EventName": "TX_C_TABORT_SPECIAL",
323 "BriefDescription": "Aborted transactions in constrained TX mode using special completion logic", 377 "BriefDescription": "Aborted transactions in constrained TX mode using special completion logic",
324 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is using special logic to allow the transaction to complete" 378 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is using special logic to allow the transaction to complete"
325 }, 379 },
326 { 380 {
381 "Unit": "CPU-M-CF",
327 "EventCode": "448", 382 "EventCode": "448",
328 "EventName": "MT_DIAG_CYCLES_ONE_THR_ACTIVE", 383 "EventName": "MT_DIAG_CYCLES_ONE_THR_ACTIVE",
329 "BriefDescription": "Cycle count with one thread active", 384 "BriefDescription": "Cycle count with one thread active",
330 "PublicDescription": "Cycle count with one thread active" 385 "PublicDescription": "Cycle count with one thread active"
331 }, 386 },
332 { 387 {
388 "Unit": "CPU-M-CF",
333 "EventCode": "449", 389 "EventCode": "449",
334 "EventName": "MT_DIAG_CYCLES_TWO_THR_ACTIVE", 390 "EventName": "MT_DIAG_CYCLES_TWO_THR_ACTIVE",
335 "BriefDescription": "Cycle count with two threads active", 391 "BriefDescription": "Cycle count with two threads active",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z13/transaction.json b/tools/perf/pmu-events/arch/s390/cf_z13/transaction.json
new file mode 100644
index 000000000000..1a0034f79f73
--- /dev/null
+++ b/tools/perf/pmu-events/arch/s390/cf_z13/transaction.json
@@ -0,0 +1,7 @@
1[
2 {
3 "BriefDescription": "Transaction count",
4 "MetricName": "transaction",
5 "MetricExpr": "TX_C_TEND + TX_NC_TEND + TX_NC_TABORT + TX_C_TABORT_SPECIAL + TX_C_TABORT_NO_SPECIAL"
6 }
7]
diff --git a/tools/perf/pmu-events/arch/s390/cf_z14/basic.json b/tools/perf/pmu-events/arch/s390/cf_z14/basic.json
index 8f653c9d899d..17fb5241928b 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z14/basic.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z14/basic.json
@@ -1,47 +1,55 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "0", 4 "EventCode": "0",
4 "EventName": "CPU_CYCLES", 5 "EventName": "CPU_CYCLES",
5 "BriefDescription": "CPU Cycles", 6 "BriefDescription": "CPU Cycles",
6 "PublicDescription": "Cycle Count" 7 "PublicDescription": "Cycle Count"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "1", 11 "EventCode": "1",
10 "EventName": "INSTRUCTIONS", 12 "EventName": "INSTRUCTIONS",
11 "BriefDescription": "Instructions", 13 "BriefDescription": "Instructions",
12 "PublicDescription": "Instruction Count" 14 "PublicDescription": "Instruction Count"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "2", 18 "EventCode": "2",
16 "EventName": "L1I_DIR_WRITES", 19 "EventName": "L1I_DIR_WRITES",
17 "BriefDescription": "L1I Directory Writes", 20 "BriefDescription": "L1I Directory Writes",
18 "PublicDescription": "Level-1 I-Cache Directory Write Count" 21 "PublicDescription": "Level-1 I-Cache Directory Write Count"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "3", 25 "EventCode": "3",
22 "EventName": "L1I_PENALTY_CYCLES", 26 "EventName": "L1I_PENALTY_CYCLES",
23 "BriefDescription": "L1I Penalty Cycles", 27 "BriefDescription": "L1I Penalty Cycles",
24 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "4", 32 "EventCode": "4",
28 "EventName": "L1D_DIR_WRITES", 33 "EventName": "L1D_DIR_WRITES",
29 "BriefDescription": "L1D Directory Writes", 34 "BriefDescription": "L1D Directory Writes",
30 "PublicDescription": "Level-1 D-Cache Directory Write Count" 35 "PublicDescription": "Level-1 D-Cache Directory Write Count"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "5", 39 "EventCode": "5",
34 "EventName": "L1D_PENALTY_CYCLES", 40 "EventName": "L1D_PENALTY_CYCLES",
35 "BriefDescription": "L1D Penalty Cycles", 41 "BriefDescription": "L1D Penalty Cycles",
36 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "32", 46 "EventCode": "32",
40 "EventName": "PROBLEM_STATE_CPU_CYCLES", 47 "EventName": "PROBLEM_STATE_CPU_CYCLES",
41 "BriefDescription": "Problem-State CPU Cycles", 48 "BriefDescription": "Problem-State CPU Cycles",
42 "PublicDescription": "Problem-State Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "33", 53 "EventCode": "33",
46 "EventName": "PROBLEM_STATE_INSTRUCTIONS", 54 "EventName": "PROBLEM_STATE_INSTRUCTIONS",
47 "BriefDescription": "Problem-State Instructions", 55 "BriefDescription": "Problem-State Instructions",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z14/crypto.json b/tools/perf/pmu-events/arch/s390/cf_z14/crypto.json
index 7e5b72492141..db286f19e7b6 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z14/crypto.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z14/crypto.json
@@ -1,95 +1,111 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "64", 4 "EventCode": "64",
4 "EventName": "PRNG_FUNCTIONS", 5 "EventName": "PRNG_FUNCTIONS",
5 "BriefDescription": "PRNG Functions", 6 "BriefDescription": "PRNG Functions",
6 "PublicDescription": "Total number of the PRNG functions issued by the CPU" 7 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "65", 11 "EventCode": "65",
10 "EventName": "PRNG_CYCLES", 12 "EventName": "PRNG_CYCLES",
11 "BriefDescription": "PRNG Cycles", 13 "BriefDescription": "PRNG Cycles",
12 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU" 14 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "66", 18 "EventCode": "66",
16 "EventName": "PRNG_BLOCKED_FUNCTIONS", 19 "EventName": "PRNG_BLOCKED_FUNCTIONS",
17 "BriefDescription": "PRNG Blocked Functions", 20 "BriefDescription": "PRNG Blocked Functions",
18 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 21 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "67", 25 "EventCode": "67",
22 "EventName": "PRNG_BLOCKED_CYCLES", 26 "EventName": "PRNG_BLOCKED_CYCLES",
23 "BriefDescription": "PRNG Blocked Cycles", 27 "BriefDescription": "PRNG Blocked Cycles",
24 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 28 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "68", 32 "EventCode": "68",
28 "EventName": "SHA_FUNCTIONS", 33 "EventName": "SHA_FUNCTIONS",
29 "BriefDescription": "SHA Functions", 34 "BriefDescription": "SHA Functions",
30 "PublicDescription": "Total number of SHA functions issued by the CPU" 35 "PublicDescription": "Total number of SHA functions issued by the CPU"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "69", 39 "EventCode": "69",
34 "EventName": "SHA_CYCLES", 40 "EventName": "SHA_CYCLES",
35 "BriefDescription": "SHA Cycles", 41 "BriefDescription": "SHA Cycles",
36 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU" 42 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "70", 46 "EventCode": "70",
40 "EventName": "SHA_BLOCKED_FUNCTIONS", 47 "EventName": "SHA_BLOCKED_FUNCTIONS",
41 "BriefDescription": "SHA Blocked Functions", 48 "BriefDescription": "SHA Blocked Functions",
42 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 49 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "71", 53 "EventCode": "71",
46 "EventName": "SHA_BLOCKED_CYCLES", 54 "EventName": "SHA_BLOCKED_CYCLES",
47 "BriefDescription": "SHA Bloced Cycles", 55 "BriefDescription": "SHA Bloced Cycles",
48 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 56 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "72", 60 "EventCode": "72",
52 "EventName": "DEA_FUNCTIONS", 61 "EventName": "DEA_FUNCTIONS",
53 "BriefDescription": "DEA Functions", 62 "BriefDescription": "DEA Functions",
54 "PublicDescription": "Total number of the DEA functions issued by the CPU" 63 "PublicDescription": "Total number of the DEA functions issued by the CPU"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "73", 67 "EventCode": "73",
58 "EventName": "DEA_CYCLES", 68 "EventName": "DEA_CYCLES",
59 "BriefDescription": "DEA Cycles", 69 "BriefDescription": "DEA Cycles",
60 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU" 70 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "74", 74 "EventCode": "74",
64 "EventName": "DEA_BLOCKED_FUNCTIONS", 75 "EventName": "DEA_BLOCKED_FUNCTIONS",
65 "BriefDescription": "DEA Blocked Functions", 76 "BriefDescription": "DEA Blocked Functions",
66 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 77 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "75", 81 "EventCode": "75",
70 "EventName": "DEA_BLOCKED_CYCLES", 82 "EventName": "DEA_BLOCKED_CYCLES",
71 "BriefDescription": "DEA Blocked Cycles", 83 "BriefDescription": "DEA Blocked Cycles",
72 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 84 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "76", 88 "EventCode": "76",
76 "EventName": "AES_FUNCTIONS", 89 "EventName": "AES_FUNCTIONS",
77 "BriefDescription": "AES Functions", 90 "BriefDescription": "AES Functions",
78 "PublicDescription": "Total number of AES functions issued by the CPU" 91 "PublicDescription": "Total number of AES functions issued by the CPU"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "77", 95 "EventCode": "77",
82 "EventName": "AES_CYCLES", 96 "EventName": "AES_CYCLES",
83 "BriefDescription": "AES Cycles", 97 "BriefDescription": "AES Cycles",
84 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU" 98 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "78", 102 "EventCode": "78",
88 "EventName": "AES_BLOCKED_FUNCTIONS", 103 "EventName": "AES_BLOCKED_FUNCTIONS",
89 "BriefDescription": "AES Blocked Functions", 104 "BriefDescription": "AES Blocked Functions",
90 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 105 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "79", 109 "EventCode": "79",
94 "EventName": "AES_BLOCKED_CYCLES", 110 "EventName": "AES_BLOCKED_CYCLES",
95 "BriefDescription": "AES Blocked Cycles", 111 "BriefDescription": "AES Blocked Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z14/extended.json b/tools/perf/pmu-events/arch/s390/cf_z14/extended.json
index aa4dfb46b65b..e7a3524b748f 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z14/extended.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z14/extended.json
@@ -1,317 +1,370 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "128", 4 "EventCode": "128",
4 "EventName": "L1D_RO_EXCL_WRITES", 5 "EventName": "L1D_RO_EXCL_WRITES",
5 "BriefDescription": "L1D Read-only Exclusive Writes", 6 "BriefDescription": "L1D Read-only Exclusive Writes",
6 "PublicDescription": "Counter:128 Name:L1D_RO_EXCL_WRITES A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line" 7 "PublicDescription": "Counter:128 Name:L1D_RO_EXCL_WRITES A directory write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "129", 11 "EventCode": "129",
10 "EventName": "DTLB2_WRITES", 12 "EventName": "DTLB2_WRITES",
11 "BriefDescription": "DTLB2 Writes", 13 "BriefDescription": "DTLB2 Writes",
12 "PublicDescription": "A translation has been written into The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache" 14 "PublicDescription": "A translation has been written into The Translation Lookaside Buffer 2 (TLB2) and the request was made by the data cache"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "130", 18 "EventCode": "130",
16 "EventName": "DTLB2_MISSES", 19 "EventName": "DTLB2_MISSES",
17 "BriefDescription": "DTLB2 Misses", 20 "BriefDescription": "DTLB2 Misses",
18 "PublicDescription": "A TLB2 miss is in progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this cycle" 21 "PublicDescription": "A TLB2 miss is in progress for a request made by the data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this cycle"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "131", 25 "EventCode": "131",
22 "EventName": "DTLB2_HPAGE_WRITES", 26 "EventName": "DTLB2_HPAGE_WRITES",
23 "BriefDescription": "DTLB2 One-Megabyte Page Writes", 27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
24 "PublicDescription": "A translation entry was written into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page or a Last Host Translation was done" 28 "PublicDescription": "A translation entry was written into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page or a Last Host Translation was done"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "132", 32 "EventCode": "132",
28 "EventName": "DTLB2_GPAGE_WRITES", 33 "EventName": "DTLB2_GPAGE_WRITES",
29 "BriefDescription": "DTLB2 Two-Gigabyte Page Writes", 34 "BriefDescription": "DTLB2 Two-Gigabyte Page Writes",
30 "PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB" 35 "PublicDescription": "A translation entry for a two-gigabyte page was written into the Level-2 TLB"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "133", 39 "EventCode": "133",
34 "EventName": "L1D_L2D_SOURCED_WRITES", 40 "EventName": "L1D_L2D_SOURCED_WRITES",
35 "BriefDescription": "L1D L2D Sourced Writes", 41 "BriefDescription": "L1D L2D Sourced Writes",
36 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache" 42 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "134", 46 "EventCode": "134",
40 "EventName": "ITLB2_WRITES", 47 "EventName": "ITLB2_WRITES",
41 "BriefDescription": "ITLB2 Writes", 48 "BriefDescription": "ITLB2 Writes",
42 "PublicDescription": "A translation entry has been written into the Translation Lookaside Buffer 2 (TLB2) and the request was made by the instruction cache" 49 "PublicDescription": "A translation entry has been written into the Translation Lookaside Buffer 2 (TLB2) and the request was made by the instruction cache"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "135", 53 "EventCode": "135",
46 "EventName": "ITLB2_MISSES", 54 "EventName": "ITLB2_MISSES",
47 "BriefDescription": "ITLB2 Misses", 55 "BriefDescription": "ITLB2 Misses",
48 "PublicDescription": "A TLB2 miss is in progress for a request made by the instruction cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cache in a cycle" 56 "PublicDescription": "A TLB2 miss is in progress for a request made by the instruction cache. Incremented by one for every TLB2 miss in progress for the Level-1 Instruction cache in a cycle"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "136", 60 "EventCode": "136",
52 "EventName": "L1I_L2I_SOURCED_WRITES", 61 "EventName": "L1I_L2I_SOURCED_WRITES",
53 "BriefDescription": "L1I L2I Sourced Writes", 62 "BriefDescription": "L1I L2I Sourced Writes",
54 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache" 63 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "137", 67 "EventCode": "137",
58 "EventName": "TLB2_PTE_WRITES", 68 "EventName": "TLB2_PTE_WRITES",
59 "BriefDescription": "TLB2 PTE Writes", 69 "BriefDescription": "TLB2 PTE Writes",
60 "PublicDescription": "A translation entry was written into the Page Table Entry array in the Level-2 TLB" 70 "PublicDescription": "A translation entry was written into the Page Table Entry array in the Level-2 TLB"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "138", 74 "EventCode": "138",
64 "EventName": "TLB2_CRSTE_WRITES", 75 "EventName": "TLB2_CRSTE_WRITES",
65 "BriefDescription": "TLB2 CRSTE Writes", 76 "BriefDescription": "TLB2 CRSTE Writes",
66 "PublicDescription": "Translation entries were written into the Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB" 77 "PublicDescription": "Translation entries were written into the Combined Region and Segment Table Entry array and the Page Table Entry array in the Level-2 TLB"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "139", 81 "EventCode": "139",
70 "EventName": "TLB2_ENGINES_BUSY", 82 "EventName": "TLB2_ENGINES_BUSY",
71 "BriefDescription": "TLB2 Engines Busy", 83 "BriefDescription": "TLB2 Engines Busy",
72 "PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle" 84 "PublicDescription": "The number of Level-2 TLB translation engines busy in a cycle"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "140", 88 "EventCode": "140",
76 "EventName": "TX_C_TEND", 89 "EventName": "TX_C_TEND",
77 "BriefDescription": "Completed TEND instructions in constrained TX mode", 90 "BriefDescription": "Completed TEND instructions in constrained TX mode",
78 "PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode" 91 "PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "141", 95 "EventCode": "141",
82 "EventName": "TX_NC_TEND", 96 "EventName": "TX_NC_TEND",
83 "BriefDescription": "Completed TEND instructions in non-constrained TX mode", 97 "BriefDescription": "Completed TEND instructions in non-constrained TX mode",
84 "PublicDescription": "A TEND instruction has completed in a non-constrained transactional-execution mode" 98 "PublicDescription": "A TEND instruction has completed in a non-constrained transactional-execution mode"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "143", 102 "EventCode": "143",
88 "EventName": "L1C_TLB2_MISSES", 103 "EventName": "L1C_TLB2_MISSES",
89 "BriefDescription": "L1C TLB2 Misses", 104 "BriefDescription": "L1C TLB2 Misses",
90 "PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is in progress" 105 "PublicDescription": "Increments by one for any cycle where a level-1 cache or level-2 TLB miss is in progress"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "144", 109 "EventCode": "144",
94 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES", 110 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES",
95 "BriefDescription": "L1D On-Chip L3 Sourced Writes", 111 "BriefDescription": "L1D On-Chip L3 Sourced Writes",
96 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention" 112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache without intervention"
97 }, 113 },
98 { 114 {
115 "Unit": "CPU-M-CF",
99 "EventCode": "145", 116 "EventCode": "145",
100 "EventName": "L1D_ONCHIP_MEMORY_SOURCED_WRITES", 117 "EventName": "L1D_ONCHIP_MEMORY_SOURCED_WRITES",
101 "BriefDescription": "L1D On-Chip Memory Sourced Writes", 118 "BriefDescription": "L1D On-Chip Memory Sourced Writes",
102 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory" 119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip memory"
103 }, 120 },
104 { 121 {
122 "Unit": "CPU-M-CF",
105 "EventCode": "146", 123 "EventCode": "146",
106 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV", 124 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV",
107 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention", 125 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
108 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention" 126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Chip Level-3 cache with intervention"
109 }, 127 },
110 { 128 {
129 "Unit": "CPU-M-CF",
111 "EventCode": "147", 130 "EventCode": "147",
112 "EventName": "L1D_ONCLUSTER_L3_SOURCED_WRITES", 131 "EventName": "L1D_ONCLUSTER_L3_SOURCED_WRITES",
113 "BriefDescription": "L1D On-Cluster L3 Sourced Writes", 132 "BriefDescription": "L1D On-Cluster L3 Sourced Writes",
114 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Cluster Level-3 cache withountervention" 133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Cluster Level-3 cache withountervention"
115 }, 134 },
116 { 135 {
136 "Unit": "CPU-M-CF",
117 "EventCode": "148", 137 "EventCode": "148",
118 "EventName": "L1D_ONCLUSTER_MEMORY_SOURCED_WRITES", 138 "EventName": "L1D_ONCLUSTER_MEMORY_SOURCED_WRITES",
119 "BriefDescription": "L1D On-Cluster Memory Sourced Writes", 139 "BriefDescription": "L1D On-Cluster Memory Sourced Writes",
120 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster memory" 140 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster memory"
121 }, 141 },
122 { 142 {
143 "Unit": "CPU-M-CF",
123 "EventCode": "149", 144 "EventCode": "149",
124 "EventName": "L1D_ONCLUSTER_L3_SOURCED_WRITES_IV", 145 "EventName": "L1D_ONCLUSTER_L3_SOURCED_WRITES_IV",
125 "BriefDescription": "L1D On-Cluster L3 Sourced Writes with Intervention", 146 "BriefDescription": "L1D On-Cluster L3 Sourced Writes with Intervention",
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache with intervention" 147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache with intervention"
127 }, 148 },
128 { 149 {
150 "Unit": "CPU-M-CF",
129 "EventCode": "150", 151 "EventCode": "150",
130 "EventName": "L1D_OFFCLUSTER_L3_SOURCED_WRITES", 152 "EventName": "L1D_OFFCLUSTER_L3_SOURCED_WRITES",
131 "BriefDescription": "L1D Off-Cluster L3 Sourced Writes", 153 "BriefDescription": "L1D Off-Cluster L3 Sourced Writes",
132 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention" 154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention"
133 }, 155 },
134 { 156 {
157 "Unit": "CPU-M-CF",
135 "EventCode": "151", 158 "EventCode": "151",
136 "EventName": "L1D_OFFCLUSTER_MEMORY_SOURCED_WRITES", 159 "EventName": "L1D_OFFCLUSTER_MEMORY_SOURCED_WRITES",
137 "BriefDescription": "L1D Off-Cluster Memory Sourced Writes", 160 "BriefDescription": "L1D Off-Cluster Memory Sourced Writes",
138 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Cluster memory" 161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Cluster memory"
139 }, 162 },
140 { 163 {
164 "Unit": "CPU-M-CF",
141 "EventCode": "152", 165 "EventCode": "152",
142 "EventName": "L1D_OFFCLUSTER_L3_SOURCED_WRITES_IV", 166 "EventName": "L1D_OFFCLUSTER_L3_SOURCED_WRITES_IV",
143 "BriefDescription": "L1D Off-Cluster L3 Sourced Writes with Intervention", 167 "BriefDescription": "L1D Off-Cluster L3 Sourced Writes with Intervention",
144 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention" 168 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention"
145 }, 169 },
146 { 170 {
171 "Unit": "CPU-M-CF",
147 "EventCode": "153", 172 "EventCode": "153",
148 "EventName": "L1D_OFFDRAWER_L3_SOURCED_WRITES", 173 "EventName": "L1D_OFFDRAWER_L3_SOURCED_WRITES",
149 "BriefDescription": "L1D Off-Drawer L3 Sourced Writes", 174 "BriefDescription": "L1D Off-Drawer L3 Sourced Writes",
150 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention" 175 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention"
151 }, 176 },
152 { 177 {
178 "Unit": "CPU-M-CF",
153 "EventCode": "154", 179 "EventCode": "154",
154 "EventName": "L1D_OFFDRAWER_MEMORY_SOURCED_WRITES", 180 "EventName": "L1D_OFFDRAWER_MEMORY_SOURCED_WRITES",
155 "BriefDescription": "L1D Off-Drawer Memory Sourced Writes", 181 "BriefDescription": "L1D Off-Drawer Memory Sourced Writes",
156 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Drawer memory" 182 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Drawer memory"
157 }, 183 },
158 { 184 {
185 "Unit": "CPU-M-CF",
159 "EventCode": "155", 186 "EventCode": "155",
160 "EventName": "L1D_OFFDRAWER_L3_SOURCED_WRITES_IV", 187 "EventName": "L1D_OFFDRAWER_L3_SOURCED_WRITES_IV",
161 "BriefDescription": "L1D Off-Drawer L3 Sourced Writes with Intervention", 188 "BriefDescription": "L1D Off-Drawer L3 Sourced Writes with Intervention",
162 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache with intervention" 189 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache with intervention"
163 }, 190 },
164 { 191 {
192 "Unit": "CPU-M-CF",
165 "EventCode": "156", 193 "EventCode": "156",
166 "EventName": "L1D_ONDRAWER_L4_SOURCED_WRITES", 194 "EventName": "L1D_ONDRAWER_L4_SOURCED_WRITES",
167 "BriefDescription": "L1D On-Drawer L4 Sourced Writes", 195 "BriefDescription": "L1D On-Drawer L4 Sourced Writes",
168 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer Level-4 cache" 196 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Drawer Level-4 cache"
169 }, 197 },
170 { 198 {
199 "Unit": "CPU-M-CF",
171 "EventCode": "157", 200 "EventCode": "157",
172 "EventName": "L1D_OFFDRAWER_L4_SOURCED_WRITES", 201 "EventName": "L1D_OFFDRAWER_L4_SOURCED_WRITES",
173 "BriefDescription": "L1D Off-Drawer L4 Sourced Writes", 202 "BriefDescription": "L1D Off-Drawer L4 Sourced Writes",
174 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Drawer Level-4 cache" 203 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from Off-Drawer Level-4 cache"
175 }, 204 },
176 { 205 {
206 "Unit": "CPU-M-CF",
177 "EventCode": "158", 207 "EventCode": "158",
178 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_RO", 208 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_RO",
179 "BriefDescription": "L1D On-Chip L3 Sourced Writes read-only", 209 "BriefDescription": "L1D On-Chip L3 Sourced Writes read-only",
180 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip L3 but a read-only invalidate was done to remove other copies of the cache line" 210 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from On-Chip L3 but a read-only invalidate was done to remove other copies of the cache line"
181 }, 211 },
182 { 212 {
213 "Unit": "CPU-M-CF",
183 "EventCode": "162", 214 "EventCode": "162",
184 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES", 215 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES",
185 "BriefDescription": "L1I On-Chip L3 Sourced Writes", 216 "BriefDescription": "L1I On-Chip L3 Sourced Writes",
186 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from an On-Chip Level-3 cache without intervention" 217 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from an On-Chip Level-3 cache without intervention"
187 }, 218 },
188 { 219 {
220 "Unit": "CPU-M-CF",
189 "EventCode": "163", 221 "EventCode": "163",
190 "EventName": "L1I_ONCHIP_MEMORY_SOURCED_WRITES", 222 "EventName": "L1I_ONCHIP_MEMORY_SOURCED_WRITES",
191 "BriefDescription": "L1I On-Chip Memory Sourced Writes", 223 "BriefDescription": "L1I On-Chip Memory Sourced Writes",
192 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from On-Chip memory" 224 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from On-Chip memory"
193 }, 225 },
194 { 226 {
227 "Unit": "CPU-M-CF",
195 "EventCode": "164", 228 "EventCode": "164",
196 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV", 229 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV",
197 "BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention", 230 "BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention",
198 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from an On-Chip Level-3 cache with intervention" 231 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache ine was sourced from an On-Chip Level-3 cache with intervention"
199 }, 232 },
200 { 233 {
234 "Unit": "CPU-M-CF",
201 "EventCode": "165", 235 "EventCode": "165",
202 "EventName": "L1I_ONCLUSTER_L3_SOURCED_WRITES", 236 "EventName": "L1I_ONCLUSTER_L3_SOURCED_WRITES",
203 "BriefDescription": "L1I On-Cluster L3 Sourced Writes", 237 "BriefDescription": "L1I On-Cluster L3 Sourced Writes",
204 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache without intervention" 238 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Cluster Level-3 cache without intervention"
205 }, 239 },
206 { 240 {
241 "Unit": "CPU-M-CF",
207 "EventCode": "166", 242 "EventCode": "166",
208 "EventName": "L1I_ONCLUSTER_MEMORY_SOURCED_WRITES", 243 "EventName": "L1I_ONCLUSTER_MEMORY_SOURCED_WRITES",
209 "BriefDescription": "L1I On-Cluster Memory Sourced Writes", 244 "BriefDescription": "L1I On-Cluster Memory Sourced Writes",
210 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Cluster memory" 245 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On-Cluster memory"
211 }, 246 },
212 { 247 {
248 "Unit": "CPU-M-CF",
213 "EventCode": "167", 249 "EventCode": "167",
214 "EventName": "L1I_ONCLUSTER_L3_SOURCED_WRITES_IV", 250 "EventName": "L1I_ONCLUSTER_L3_SOURCED_WRITES_IV",
215 "BriefDescription": "L1I On-Cluster L3 Sourced Writes with Intervention", 251 "BriefDescription": "L1I On-Cluster L3 Sourced Writes with Intervention",
216 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Cluster Level-3 cache with intervention" 252 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Cluster Level-3 cache with intervention"
217 }, 253 },
218 { 254 {
255 "Unit": "CPU-M-CF",
219 "EventCode": "168", 256 "EventCode": "168",
220 "EventName": "L1I_OFFCLUSTER_L3_SOURCED_WRITES", 257 "EventName": "L1I_OFFCLUSTER_L3_SOURCED_WRITES",
221 "BriefDescription": "L1I Off-Cluster L3 Sourced Writes", 258 "BriefDescription": "L1I Off-Cluster L3 Sourced Writes",
222 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention" 259 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache without intervention"
223 }, 260 },
224 { 261 {
262 "Unit": "CPU-M-CF",
225 "EventCode": "169", 263 "EventCode": "169",
226 "EventName": "L1I_OFFCLUSTER_MEMORY_SOURCED_WRITES", 264 "EventName": "L1I_OFFCLUSTER_MEMORY_SOURCED_WRITES",
227 "BriefDescription": "L1I Off-Cluster Memory Sourced Writes", 265 "BriefDescription": "L1I Off-Cluster Memory Sourced Writes",
228 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Cluster memory" 266 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Cluster memory"
229 }, 267 },
230 { 268 {
269 "Unit": "CPU-M-CF",
231 "EventCode": "170", 270 "EventCode": "170",
232 "EventName": "L1I_OFFCLUSTER_L3_SOURCED_WRITES_IV", 271 "EventName": "L1I_OFFCLUSTER_L3_SOURCED_WRITES_IV",
233 "BriefDescription": "L1I Off-Cluster L3 Sourced Writes with Intervention", 272 "BriefDescription": "L1I Off-Cluster L3 Sourced Writes with Intervention",
234 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention" 273 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Cluster Level-3 cache with intervention"
235 }, 274 },
236 { 275 {
276 "Unit": "CPU-M-CF",
237 "EventCode": "171", 277 "EventCode": "171",
238 "EventName": "L1I_OFFDRAWER_L3_SOURCED_WRITES", 278 "EventName": "L1I_OFFDRAWER_L3_SOURCED_WRITES",
239 "BriefDescription": "L1I Off-Drawer L3 Sourced Writes", 279 "BriefDescription": "L1I Off-Drawer L3 Sourced Writes",
240 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention" 280 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache without intervention"
241 }, 281 },
242 { 282 {
283 "Unit": "CPU-M-CF",
243 "EventCode": "172", 284 "EventCode": "172",
244 "EventName": "L1I_OFFDRAWER_MEMORY_SOURCED_WRITES", 285 "EventName": "L1I_OFFDRAWER_MEMORY_SOURCED_WRITES",
245 "BriefDescription": "L1I Off-Drawer Memory Sourced Writes", 286 "BriefDescription": "L1I Off-Drawer Memory Sourced Writes",
246 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Drawer memory" 287 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Drawer memory"
247 }, 288 },
248 { 289 {
290 "Unit": "CPU-M-CF",
249 "EventCode": "173", 291 "EventCode": "173",
250 "EventName": "L1I_OFFDRAWER_L3_SOURCED_WRITES_IV", 292 "EventName": "L1I_OFFDRAWER_L3_SOURCED_WRITES_IV",
251 "BriefDescription": "L1I Off-Drawer L3 Sourced Writes with Intervention", 293 "BriefDescription": "L1I Off-Drawer L3 Sourced Writes with Intervention",
252 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache with intervention" 294 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off-Drawer Level-3 cache with intervention"
253 }, 295 },
254 { 296 {
297 "Unit": "CPU-M-CF",
255 "EventCode": "174", 298 "EventCode": "174",
256 "EventName": "L1I_ONDRAWER_L4_SOURCED_WRITES", 299 "EventName": "L1I_ONDRAWER_L4_SOURCED_WRITES",
257 "BriefDescription": "L1I On-Drawer L4 Sourced Writes", 300 "BriefDescription": "L1I On-Drawer L4 Sourced Writes",
258 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer Level-4 cache" 301 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from On-Drawer Level-4 cache"
259 }, 302 },
260 { 303 {
304 "Unit": "CPU-M-CF",
261 "EventCode": "175", 305 "EventCode": "175",
262 "EventName": "L1I_OFFDRAWER_L4_SOURCED_WRITES", 306 "EventName": "L1I_OFFDRAWER_L4_SOURCED_WRITES",
263 "BriefDescription": "L1I Off-Drawer L4 Sourced Writes", 307 "BriefDescription": "L1I Off-Drawer L4 Sourced Writes",
264 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Drawer Level-4 cache" 308 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from Off-Drawer Level-4 cache"
265 }, 309 },
266 { 310 {
311 "Unit": "CPU-M-CF",
267 "EventCode": "224", 312 "EventCode": "224",
268 "EventName": "BCD_DFP_EXECUTION_SLOTS", 313 "EventName": "BCD_DFP_EXECUTION_SLOTS",
269 "BriefDescription": "BCD DFP Execution Slots", 314 "BriefDescription": "BCD DFP Execution Slots",
270 "PublicDescription": "Count of floating point execution slots used for finished Binary Coded Decimal to Decimal Floating Point conversions. Instructions: CDZT, CXZT, CZDT, CZXT" 315 "PublicDescription": "Count of floating point execution slots used for finished Binary Coded Decimal to Decimal Floating Point conversions. Instructions: CDZT, CXZT, CZDT, CZXT"
271 }, 316 },
272 { 317 {
318 "Unit": "CPU-M-CF",
273 "EventCode": "225", 319 "EventCode": "225",
274 "EventName": "VX_BCD_EXECUTION_SLOTS", 320 "EventName": "VX_BCD_EXECUTION_SLOTS",
275 "BriefDescription": "VX BCD Execution Slots", 321 "BriefDescription": "VX BCD Execution Slots",
276 "PublicDescription": "Count of floating point execution slots used for finished vector arithmetic Binary Coded Decimal instructions. Instructions: VAP, VSP, VMPVMSP, VDP, VSDP, VRP, VLIP, VSRP, VPSOPVCP, VTP, VPKZ, VUPKZ, VCVB, VCVBG, VCVDVCVDG" 322 "PublicDescription": "Count of floating point execution slots used for finished vector arithmetic Binary Coded Decimal instructions. Instructions: VAP, VSP, VMPVMSP, VDP, VSDP, VRP, VLIP, VSRP, VPSOPVCP, VTP, VPKZ, VUPKZ, VCVB, VCVBG, VCVDVCVDG"
277 }, 323 },
278 { 324 {
325 "Unit": "CPU-M-CF",
279 "EventCode": "226", 326 "EventCode": "226",
280 "EventName": "DECIMAL_INSTRUCTIONS", 327 "EventName": "DECIMAL_INSTRUCTIONS",
281 "BriefDescription": "Decimal Instructions", 328 "BriefDescription": "Decimal Instructions",
282 "PublicDescription": "Decimal instructions dispatched. Instructions: CVB, CVD, AP, CP, DP, ED, EDMK, MP, SRP, SP, ZAP" 329 "PublicDescription": "Decimal instructions dispatched. Instructions: CVB, CVD, AP, CP, DP, ED, EDMK, MP, SRP, SP, ZAP"
283 }, 330 },
284 { 331 {
332 "Unit": "CPU-M-CF",
285 "EventCode": "232", 333 "EventCode": "232",
286 "EventName": "LAST_HOST_TRANSLATIONS", 334 "EventName": "LAST_HOST_TRANSLATIONS",
287 "BriefDescription": "Last host translation done", 335 "BriefDescription": "Last host translation done",
288 "PublicDescription": "Last Host Translation done" 336 "PublicDescription": "Last Host Translation done"
289 }, 337 },
290 { 338 {
339 "Unit": "CPU-M-CF",
291 "EventCode": "243", 340 "EventCode": "243",
292 "EventName": "TX_NC_TABORT", 341 "EventName": "TX_NC_TABORT",
293 "BriefDescription": "Aborted transactions in non-constrained TX mode", 342 "BriefDescription": "Aborted transactions in non-constrained TX mode",
294 "PublicDescription": "A transaction abort has occurred in a non-constrained transactional-execution mode" 343 "PublicDescription": "A transaction abort has occurred in a non-constrained transactional-execution mode"
295 }, 344 },
296 { 345 {
346 "Unit": "CPU-M-CF",
297 "EventCode": "244", 347 "EventCode": "244",
298 "EventName": "TX_C_TABORT_NO_SPECIAL", 348 "EventName": "TX_C_TABORT_NO_SPECIAL",
299 "BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic", 349 "BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic",
300 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete" 350 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete"
301 }, 351 },
302 { 352 {
353 "Unit": "CPU-M-CF",
303 "EventCode": "245", 354 "EventCode": "245",
304 "EventName": "TX_C_TABORT_SPECIAL", 355 "EventName": "TX_C_TABORT_SPECIAL",
305 "BriefDescription": "Aborted transactions in constrained TX mode using special completion logic", 356 "BriefDescription": "Aborted transactions in constrained TX mode using special completion logic",
306 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is using special logic to allow the transaction to complete" 357 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is using special logic to allow the transaction to complete"
307 }, 358 },
308 { 359 {
360 "Unit": "CPU-M-CF",
309 "EventCode": "448", 361 "EventCode": "448",
310 "EventName": "MT_DIAG_CYCLES_ONE_THR_ACTIVE", 362 "EventName": "MT_DIAG_CYCLES_ONE_THR_ACTIVE",
311 "BriefDescription": "Cycle count with one thread active", 363 "BriefDescription": "Cycle count with one thread active",
312 "PublicDescription": "Cycle count with one thread active" 364 "PublicDescription": "Cycle count with one thread active"
313 }, 365 },
314 { 366 {
367 "Unit": "CPU-M-CF",
315 "EventCode": "449", 368 "EventCode": "449",
316 "EventName": "MT_DIAG_CYCLES_TWO_THR_ACTIVE", 369 "EventName": "MT_DIAG_CYCLES_TWO_THR_ACTIVE",
317 "BriefDescription": "Cycle count with two threads active", 370 "BriefDescription": "Cycle count with two threads active",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z14/transaction.json b/tools/perf/pmu-events/arch/s390/cf_z14/transaction.json
new file mode 100644
index 000000000000..1a0034f79f73
--- /dev/null
+++ b/tools/perf/pmu-events/arch/s390/cf_z14/transaction.json
@@ -0,0 +1,7 @@
1[
2 {
3 "BriefDescription": "Transaction count",
4 "MetricName": "transaction",
5 "MetricExpr": "TX_C_TEND + TX_NC_TEND + TX_NC_TABORT + TX_C_TABORT_SPECIAL + TX_C_TABORT_NO_SPECIAL"
6 }
7]
diff --git a/tools/perf/pmu-events/arch/s390/cf_z196/basic.json b/tools/perf/pmu-events/arch/s390/cf_z196/basic.json
index 8bf16759ca53..2dd8dafff2ef 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z196/basic.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z196/basic.json
@@ -1,71 +1,83 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "0", 4 "EventCode": "0",
4 "EventName": "CPU_CYCLES", 5 "EventName": "CPU_CYCLES",
5 "BriefDescription": "CPU Cycles", 6 "BriefDescription": "CPU Cycles",
6 "PublicDescription": "Cycle Count" 7 "PublicDescription": "Cycle Count"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "1", 11 "EventCode": "1",
10 "EventName": "INSTRUCTIONS", 12 "EventName": "INSTRUCTIONS",
11 "BriefDescription": "Instructions", 13 "BriefDescription": "Instructions",
12 "PublicDescription": "Instruction Count" 14 "PublicDescription": "Instruction Count"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "2", 18 "EventCode": "2",
16 "EventName": "L1I_DIR_WRITES", 19 "EventName": "L1I_DIR_WRITES",
17 "BriefDescription": "L1I Directory Writes", 20 "BriefDescription": "L1I Directory Writes",
18 "PublicDescription": "Level-1 I-Cache Directory Write Count" 21 "PublicDescription": "Level-1 I-Cache Directory Write Count"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "3", 25 "EventCode": "3",
22 "EventName": "L1I_PENALTY_CYCLES", 26 "EventName": "L1I_PENALTY_CYCLES",
23 "BriefDescription": "L1I Penalty Cycles", 27 "BriefDescription": "L1I Penalty Cycles",
24 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "4", 32 "EventCode": "4",
28 "EventName": "L1D_DIR_WRITES", 33 "EventName": "L1D_DIR_WRITES",
29 "BriefDescription": "L1D Directory Writes", 34 "BriefDescription": "L1D Directory Writes",
30 "PublicDescription": "Level-1 D-Cache Directory Write Count" 35 "PublicDescription": "Level-1 D-Cache Directory Write Count"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "5", 39 "EventCode": "5",
34 "EventName": "L1D_PENALTY_CYCLES", 40 "EventName": "L1D_PENALTY_CYCLES",
35 "BriefDescription": "L1D Penalty Cycles", 41 "BriefDescription": "L1D Penalty Cycles",
36 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "32", 46 "EventCode": "32",
40 "EventName": "PROBLEM_STATE_CPU_CYCLES", 47 "EventName": "PROBLEM_STATE_CPU_CYCLES",
41 "BriefDescription": "Problem-State CPU Cycles", 48 "BriefDescription": "Problem-State CPU Cycles",
42 "PublicDescription": "Problem-State Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "33", 53 "EventCode": "33",
46 "EventName": "PROBLEM_STATE_INSTRUCTIONS", 54 "EventName": "PROBLEM_STATE_INSTRUCTIONS",
47 "BriefDescription": "Problem-State Instructions", 55 "BriefDescription": "Problem-State Instructions",
48 "PublicDescription": "Problem-State Instruction Count" 56 "PublicDescription": "Problem-State Instruction Count"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "34", 60 "EventCode": "34",
52 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES", 61 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES",
53 "BriefDescription": "Problem-State L1I Directory Writes", 62 "BriefDescription": "Problem-State L1I Directory Writes",
54 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count" 63 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "35", 67 "EventCode": "35",
58 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES", 68 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES",
59 "BriefDescription": "Problem-State L1I Penalty Cycles", 69 "BriefDescription": "Problem-State L1I Penalty Cycles",
60 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "36", 74 "EventCode": "36",
64 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES", 75 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES",
65 "BriefDescription": "Problem-State L1D Directory Writes", 76 "BriefDescription": "Problem-State L1D Directory Writes",
66 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count" 77 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "37", 81 "EventCode": "37",
70 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES", 82 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES",
71 "BriefDescription": "Problem-State L1D Penalty Cycles", 83 "BriefDescription": "Problem-State L1D Penalty Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z196/crypto.json b/tools/perf/pmu-events/arch/s390/cf_z196/crypto.json
index 7e5b72492141..db286f19e7b6 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z196/crypto.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z196/crypto.json
@@ -1,95 +1,111 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "64", 4 "EventCode": "64",
4 "EventName": "PRNG_FUNCTIONS", 5 "EventName": "PRNG_FUNCTIONS",
5 "BriefDescription": "PRNG Functions", 6 "BriefDescription": "PRNG Functions",
6 "PublicDescription": "Total number of the PRNG functions issued by the CPU" 7 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "65", 11 "EventCode": "65",
10 "EventName": "PRNG_CYCLES", 12 "EventName": "PRNG_CYCLES",
11 "BriefDescription": "PRNG Cycles", 13 "BriefDescription": "PRNG Cycles",
12 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU" 14 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "66", 18 "EventCode": "66",
16 "EventName": "PRNG_BLOCKED_FUNCTIONS", 19 "EventName": "PRNG_BLOCKED_FUNCTIONS",
17 "BriefDescription": "PRNG Blocked Functions", 20 "BriefDescription": "PRNG Blocked Functions",
18 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 21 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "67", 25 "EventCode": "67",
22 "EventName": "PRNG_BLOCKED_CYCLES", 26 "EventName": "PRNG_BLOCKED_CYCLES",
23 "BriefDescription": "PRNG Blocked Cycles", 27 "BriefDescription": "PRNG Blocked Cycles",
24 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 28 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "68", 32 "EventCode": "68",
28 "EventName": "SHA_FUNCTIONS", 33 "EventName": "SHA_FUNCTIONS",
29 "BriefDescription": "SHA Functions", 34 "BriefDescription": "SHA Functions",
30 "PublicDescription": "Total number of SHA functions issued by the CPU" 35 "PublicDescription": "Total number of SHA functions issued by the CPU"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "69", 39 "EventCode": "69",
34 "EventName": "SHA_CYCLES", 40 "EventName": "SHA_CYCLES",
35 "BriefDescription": "SHA Cycles", 41 "BriefDescription": "SHA Cycles",
36 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU" 42 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "70", 46 "EventCode": "70",
40 "EventName": "SHA_BLOCKED_FUNCTIONS", 47 "EventName": "SHA_BLOCKED_FUNCTIONS",
41 "BriefDescription": "SHA Blocked Functions", 48 "BriefDescription": "SHA Blocked Functions",
42 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 49 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "71", 53 "EventCode": "71",
46 "EventName": "SHA_BLOCKED_CYCLES", 54 "EventName": "SHA_BLOCKED_CYCLES",
47 "BriefDescription": "SHA Bloced Cycles", 55 "BriefDescription": "SHA Bloced Cycles",
48 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 56 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "72", 60 "EventCode": "72",
52 "EventName": "DEA_FUNCTIONS", 61 "EventName": "DEA_FUNCTIONS",
53 "BriefDescription": "DEA Functions", 62 "BriefDescription": "DEA Functions",
54 "PublicDescription": "Total number of the DEA functions issued by the CPU" 63 "PublicDescription": "Total number of the DEA functions issued by the CPU"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "73", 67 "EventCode": "73",
58 "EventName": "DEA_CYCLES", 68 "EventName": "DEA_CYCLES",
59 "BriefDescription": "DEA Cycles", 69 "BriefDescription": "DEA Cycles",
60 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU" 70 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "74", 74 "EventCode": "74",
64 "EventName": "DEA_BLOCKED_FUNCTIONS", 75 "EventName": "DEA_BLOCKED_FUNCTIONS",
65 "BriefDescription": "DEA Blocked Functions", 76 "BriefDescription": "DEA Blocked Functions",
66 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 77 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "75", 81 "EventCode": "75",
70 "EventName": "DEA_BLOCKED_CYCLES", 82 "EventName": "DEA_BLOCKED_CYCLES",
71 "BriefDescription": "DEA Blocked Cycles", 83 "BriefDescription": "DEA Blocked Cycles",
72 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 84 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "76", 88 "EventCode": "76",
76 "EventName": "AES_FUNCTIONS", 89 "EventName": "AES_FUNCTIONS",
77 "BriefDescription": "AES Functions", 90 "BriefDescription": "AES Functions",
78 "PublicDescription": "Total number of AES functions issued by the CPU" 91 "PublicDescription": "Total number of AES functions issued by the CPU"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "77", 95 "EventCode": "77",
82 "EventName": "AES_CYCLES", 96 "EventName": "AES_CYCLES",
83 "BriefDescription": "AES Cycles", 97 "BriefDescription": "AES Cycles",
84 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU" 98 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "78", 102 "EventCode": "78",
88 "EventName": "AES_BLOCKED_FUNCTIONS", 103 "EventName": "AES_BLOCKED_FUNCTIONS",
89 "BriefDescription": "AES Blocked Functions", 104 "BriefDescription": "AES Blocked Functions",
90 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 105 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "79", 109 "EventCode": "79",
94 "EventName": "AES_BLOCKED_CYCLES", 110 "EventName": "AES_BLOCKED_CYCLES",
95 "BriefDescription": "AES Blocked Cycles", 111 "BriefDescription": "AES Blocked Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_z196/extended.json b/tools/perf/pmu-events/arch/s390/cf_z196/extended.json
index b6d7fec7c2e7..b7b42a870bb0 100644
--- a/tools/perf/pmu-events/arch/s390/cf_z196/extended.json
+++ b/tools/perf/pmu-events/arch/s390/cf_z196/extended.json
@@ -1,143 +1,167 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "128", 4 "EventCode": "128",
4 "EventName": "L1D_L2_SOURCED_WRITES", 5 "EventName": "L1D_L2_SOURCED_WRITES",
5 "BriefDescription": "L1D L2 Sourced Writes", 6 "BriefDescription": "L1D L2 Sourced Writes",
6 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from the Level-2 cache" 7 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from the Level-2 cache"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "129", 11 "EventCode": "129",
10 "EventName": "L1I_L2_SOURCED_WRITES", 12 "EventName": "L1I_L2_SOURCED_WRITES",
11 "BriefDescription": "L1I L2 Sourced Writes", 13 "BriefDescription": "L1I L2 Sourced Writes",
12 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from the Level-2 cache" 14 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from the Level-2 cache"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "130", 18 "EventCode": "130",
16 "EventName": "DTLB1_MISSES", 19 "EventName": "DTLB1_MISSES",
17 "BriefDescription": "DTLB1 Misses", 20 "BriefDescription": "DTLB1 Misses",
18 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB1 miss is in progress." 21 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB1 miss is in progress."
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "131", 25 "EventCode": "131",
22 "EventName": "ITLB1_MISSES", 26 "EventName": "ITLB1_MISSES",
23 "BriefDescription": "ITLB1 Misses", 27 "BriefDescription": "ITLB1 Misses",
24 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle a ITLB1 miss is in progress." 28 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle a ITLB1 miss is in progress."
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "133", 32 "EventCode": "133",
28 "EventName": "L2C_STORES_SENT", 33 "EventName": "L2C_STORES_SENT",
29 "BriefDescription": "L2C Stores Sent", 34 "BriefDescription": "L2C Stores Sent",
30 "PublicDescription": "Incremented by one for every store sent to Level-2 cache" 35 "PublicDescription": "Incremented by one for every store sent to Level-2 cache"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "134", 39 "EventCode": "134",
34 "EventName": "L1D_OFFBOOK_L3_SOURCED_WRITES", 40 "EventName": "L1D_OFFBOOK_L3_SOURCED_WRITES",
35 "BriefDescription": "L1D Off-Book L3 Sourced Writes", 41 "BriefDescription": "L1D Off-Book L3 Sourced Writes",
36 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an Off Book Level-3 cache" 42 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an Off Book Level-3 cache"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "135", 46 "EventCode": "135",
40 "EventName": "L1D_ONBOOK_L4_SOURCED_WRITES", 47 "EventName": "L1D_ONBOOK_L4_SOURCED_WRITES",
41 "BriefDescription": "L1D On-Book L4 Sourced Writes", 48 "BriefDescription": "L1D On-Book L4 Sourced Writes",
42 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an On Book Level-4 cache" 49 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an On Book Level-4 cache"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "136", 53 "EventCode": "136",
46 "EventName": "L1I_ONBOOK_L4_SOURCED_WRITES", 54 "EventName": "L1I_ONBOOK_L4_SOURCED_WRITES",
47 "BriefDescription": "L1I On-Book L4 Sourced Writes", 55 "BriefDescription": "L1I On-Book L4 Sourced Writes",
48 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an On Book Level-4 cache" 56 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an On Book Level-4 cache"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "137", 60 "EventCode": "137",
52 "EventName": "L1D_RO_EXCL_WRITES", 61 "EventName": "L1D_RO_EXCL_WRITES",
53 "BriefDescription": "L1D Read-only Exclusive Writes", 62 "BriefDescription": "L1D Read-only Exclusive Writes",
54 "PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line" 63 "PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "138", 67 "EventCode": "138",
58 "EventName": "L1D_OFFBOOK_L4_SOURCED_WRITES", 68 "EventName": "L1D_OFFBOOK_L4_SOURCED_WRITES",
59 "BriefDescription": "L1D Off-Book L4 Sourced Writes", 69 "BriefDescription": "L1D Off-Book L4 Sourced Writes",
60 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an Off Book Level-4 cache" 70 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an Off Book Level-4 cache"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "139", 74 "EventCode": "139",
64 "EventName": "L1I_OFFBOOK_L4_SOURCED_WRITES", 75 "EventName": "L1I_OFFBOOK_L4_SOURCED_WRITES",
65 "BriefDescription": "L1I Off-Book L4 Sourced Writes", 76 "BriefDescription": "L1I Off-Book L4 Sourced Writes",
66 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an Off Book Level-4 cache" 77 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an Off Book Level-4 cache"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "140", 81 "EventCode": "140",
70 "EventName": "DTLB1_HPAGE_WRITES", 82 "EventName": "DTLB1_HPAGE_WRITES",
71 "BriefDescription": "DTLB1 One-Megabyte Page Writes", 83 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
72 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a one-megabyte page" 84 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a one-megabyte page"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "141", 88 "EventCode": "141",
76 "EventName": "L1D_LMEM_SOURCED_WRITES", 89 "EventName": "L1D_LMEM_SOURCED_WRITES",
77 "BriefDescription": "L1D Local Memory Sourced Writes", 90 "BriefDescription": "L1D Local Memory Sourced Writes",
78 "PublicDescription": "A directory write to the Level-1 D-Cache where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)" 91 "PublicDescription": "A directory write to the Level-1 D-Cache where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "142", 95 "EventCode": "142",
82 "EventName": "L1I_LMEM_SOURCED_WRITES", 96 "EventName": "L1I_LMEM_SOURCED_WRITES",
83 "BriefDescription": "L1I Local Memory Sourced Writes", 97 "BriefDescription": "L1I Local Memory Sourced Writes",
84 "PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was sourced from memory that is attached to the same book as the Instruction cache (Local Memory)" 98 "PublicDescription": "A directory write to the Level-1 I-Cache where the installed cache line was sourced from memory that is attached to the same book as the Instruction cache (Local Memory)"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "143", 102 "EventCode": "143",
88 "EventName": "L1I_OFFBOOK_L3_SOURCED_WRITES", 103 "EventName": "L1I_OFFBOOK_L3_SOURCED_WRITES",
89 "BriefDescription": "L1I Off-Book L3 Sourced Writes", 104 "BriefDescription": "L1I Off-Book L3 Sourced Writes",
90 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an Off Book Level-3 cache" 105 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an Off Book Level-3 cache"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "144", 109 "EventCode": "144",
94 "EventName": "DTLB1_WRITES", 110 "EventName": "DTLB1_WRITES",
95 "BriefDescription": "DTLB1 Writes", 111 "BriefDescription": "DTLB1 Writes",
96 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer" 112 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer"
97 }, 113 },
98 { 114 {
115 "Unit": "CPU-M-CF",
99 "EventCode": "145", 116 "EventCode": "145",
100 "EventName": "ITLB1_WRITES", 117 "EventName": "ITLB1_WRITES",
101 "BriefDescription": "ITLB1 Writes", 118 "BriefDescription": "ITLB1 Writes",
102 "PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation Lookaside Buffer" 119 "PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation Lookaside Buffer"
103 }, 120 },
104 { 121 {
122 "Unit": "CPU-M-CF",
105 "EventCode": "146", 123 "EventCode": "146",
106 "EventName": "TLB2_PTE_WRITES", 124 "EventName": "TLB2_PTE_WRITES",
107 "BriefDescription": "TLB2 PTE Writes", 125 "BriefDescription": "TLB2 PTE Writes",
108 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays" 126 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays"
109 }, 127 },
110 { 128 {
129 "Unit": "CPU-M-CF",
111 "EventCode": "147", 130 "EventCode": "147",
112 "EventName": "TLB2_CRSTE_HPAGE_WRITES", 131 "EventName": "TLB2_CRSTE_HPAGE_WRITES",
113 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes", 132 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes",
114 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation" 133 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation"
115 }, 134 },
116 { 135 {
136 "Unit": "CPU-M-CF",
117 "EventCode": "148", 137 "EventCode": "148",
118 "EventName": "TLB2_CRSTE_WRITES", 138 "EventName": "TLB2_CRSTE_WRITES",
119 "BriefDescription": "TLB2 CRSTE Writes", 139 "BriefDescription": "TLB2 CRSTE Writes",
120 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays" 140 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays"
121 }, 141 },
122 { 142 {
143 "Unit": "CPU-M-CF",
123 "EventCode": "150", 144 "EventCode": "150",
124 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES", 145 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES",
125 "BriefDescription": "L1D On-Chip L3 Sourced Writes", 146 "BriefDescription": "L1D On-Chip L3 Sourced Writes",
126 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an On Chip Level-3 cache" 147 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an On Chip Level-3 cache"
127 }, 148 },
128 { 149 {
150 "Unit": "CPU-M-CF",
129 "EventCode": "152", 151 "EventCode": "152",
130 "EventName": "L1D_OFFCHIP_L3_SOURCED_WRITES", 152 "EventName": "L1D_OFFCHIP_L3_SOURCED_WRITES",
131 "BriefDescription": "L1D Off-Chip L3 Sourced Writes", 153 "BriefDescription": "L1D Off-Chip L3 Sourced Writes",
132 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache" 154 "PublicDescription": "A directory write to the Level-1 D-Cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache"
133 }, 155 },
134 { 156 {
157 "Unit": "CPU-M-CF",
135 "EventCode": "153", 158 "EventCode": "153",
136 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES", 159 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES",
137 "BriefDescription": "L1I On-Chip L3 Sourced Writes", 160 "BriefDescription": "L1I On-Chip L3 Sourced Writes",
138 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an On Chip Level-3 cache" 161 "PublicDescription": "A directory write to the Level-1 I-Cache directory where the returned cache line was sourced from an On Chip Level-3 cache"
139 }, 162 },
140 { 163 {
164 "Unit": "CPU-M-CF",
141 "EventCode": "155", 165 "EventCode": "155",
142 "EventName": "L1I_OFFCHIP_L3_SOURCED_WRITES", 166 "EventName": "L1I_OFFCHIP_L3_SOURCED_WRITES",
143 "BriefDescription": "L1I Off-Chip L3 Sourced Writes", 167 "BriefDescription": "L1I Off-Chip L3 Sourced Writes",
diff --git a/tools/perf/pmu-events/arch/s390/cf_zec12/basic.json b/tools/perf/pmu-events/arch/s390/cf_zec12/basic.json
index 8bf16759ca53..2dd8dafff2ef 100644
--- a/tools/perf/pmu-events/arch/s390/cf_zec12/basic.json
+++ b/tools/perf/pmu-events/arch/s390/cf_zec12/basic.json
@@ -1,71 +1,83 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "0", 4 "EventCode": "0",
4 "EventName": "CPU_CYCLES", 5 "EventName": "CPU_CYCLES",
5 "BriefDescription": "CPU Cycles", 6 "BriefDescription": "CPU Cycles",
6 "PublicDescription": "Cycle Count" 7 "PublicDescription": "Cycle Count"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "1", 11 "EventCode": "1",
10 "EventName": "INSTRUCTIONS", 12 "EventName": "INSTRUCTIONS",
11 "BriefDescription": "Instructions", 13 "BriefDescription": "Instructions",
12 "PublicDescription": "Instruction Count" 14 "PublicDescription": "Instruction Count"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "2", 18 "EventCode": "2",
16 "EventName": "L1I_DIR_WRITES", 19 "EventName": "L1I_DIR_WRITES",
17 "BriefDescription": "L1I Directory Writes", 20 "BriefDescription": "L1I Directory Writes",
18 "PublicDescription": "Level-1 I-Cache Directory Write Count" 21 "PublicDescription": "Level-1 I-Cache Directory Write Count"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "3", 25 "EventCode": "3",
22 "EventName": "L1I_PENALTY_CYCLES", 26 "EventName": "L1I_PENALTY_CYCLES",
23 "BriefDescription": "L1I Penalty Cycles", 27 "BriefDescription": "L1I Penalty Cycles",
24 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count" 28 "PublicDescription": "Level-1 I-Cache Penalty Cycle Count"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "4", 32 "EventCode": "4",
28 "EventName": "L1D_DIR_WRITES", 33 "EventName": "L1D_DIR_WRITES",
29 "BriefDescription": "L1D Directory Writes", 34 "BriefDescription": "L1D Directory Writes",
30 "PublicDescription": "Level-1 D-Cache Directory Write Count" 35 "PublicDescription": "Level-1 D-Cache Directory Write Count"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "5", 39 "EventCode": "5",
34 "EventName": "L1D_PENALTY_CYCLES", 40 "EventName": "L1D_PENALTY_CYCLES",
35 "BriefDescription": "L1D Penalty Cycles", 41 "BriefDescription": "L1D Penalty Cycles",
36 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count" 42 "PublicDescription": "Level-1 D-Cache Penalty Cycle Count"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "32", 46 "EventCode": "32",
40 "EventName": "PROBLEM_STATE_CPU_CYCLES", 47 "EventName": "PROBLEM_STATE_CPU_CYCLES",
41 "BriefDescription": "Problem-State CPU Cycles", 48 "BriefDescription": "Problem-State CPU Cycles",
42 "PublicDescription": "Problem-State Cycle Count" 49 "PublicDescription": "Problem-State Cycle Count"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "33", 53 "EventCode": "33",
46 "EventName": "PROBLEM_STATE_INSTRUCTIONS", 54 "EventName": "PROBLEM_STATE_INSTRUCTIONS",
47 "BriefDescription": "Problem-State Instructions", 55 "BriefDescription": "Problem-State Instructions",
48 "PublicDescription": "Problem-State Instruction Count" 56 "PublicDescription": "Problem-State Instruction Count"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "34", 60 "EventCode": "34",
52 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES", 61 "EventName": "PROBLEM_STATE_L1I_DIR_WRITES",
53 "BriefDescription": "Problem-State L1I Directory Writes", 62 "BriefDescription": "Problem-State L1I Directory Writes",
54 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count" 63 "PublicDescription": "Problem-State Level-1 I-Cache Directory Write Count"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "35", 67 "EventCode": "35",
58 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES", 68 "EventName": "PROBLEM_STATE_L1I_PENALTY_CYCLES",
59 "BriefDescription": "Problem-State L1I Penalty Cycles", 69 "BriefDescription": "Problem-State L1I Penalty Cycles",
60 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count" 70 "PublicDescription": "Problem-State Level-1 I-Cache Penalty Cycle Count"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "36", 74 "EventCode": "36",
64 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES", 75 "EventName": "PROBLEM_STATE_L1D_DIR_WRITES",
65 "BriefDescription": "Problem-State L1D Directory Writes", 76 "BriefDescription": "Problem-State L1D Directory Writes",
66 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count" 77 "PublicDescription": "Problem-State Level-1 D-Cache Directory Write Count"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "37", 81 "EventCode": "37",
70 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES", 82 "EventName": "PROBLEM_STATE_L1D_PENALTY_CYCLES",
71 "BriefDescription": "Problem-State L1D Penalty Cycles", 83 "BriefDescription": "Problem-State L1D Penalty Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_zec12/crypto.json b/tools/perf/pmu-events/arch/s390/cf_zec12/crypto.json
index 7e5b72492141..db286f19e7b6 100644
--- a/tools/perf/pmu-events/arch/s390/cf_zec12/crypto.json
+++ b/tools/perf/pmu-events/arch/s390/cf_zec12/crypto.json
@@ -1,95 +1,111 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "64", 4 "EventCode": "64",
4 "EventName": "PRNG_FUNCTIONS", 5 "EventName": "PRNG_FUNCTIONS",
5 "BriefDescription": "PRNG Functions", 6 "BriefDescription": "PRNG Functions",
6 "PublicDescription": "Total number of the PRNG functions issued by the CPU" 7 "PublicDescription": "Total number of the PRNG functions issued by the CPU"
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "65", 11 "EventCode": "65",
10 "EventName": "PRNG_CYCLES", 12 "EventName": "PRNG_CYCLES",
11 "BriefDescription": "PRNG Cycles", 13 "BriefDescription": "PRNG Cycles",
12 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU" 14 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing PRNG functions issued by the CPU"
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "66", 18 "EventCode": "66",
16 "EventName": "PRNG_BLOCKED_FUNCTIONS", 19 "EventName": "PRNG_BLOCKED_FUNCTIONS",
17 "BriefDescription": "PRNG Blocked Functions", 20 "BriefDescription": "PRNG Blocked Functions",
18 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 21 "PublicDescription": "Total number of the PRNG functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "67", 25 "EventCode": "67",
22 "EventName": "PRNG_BLOCKED_CYCLES", 26 "EventName": "PRNG_BLOCKED_CYCLES",
23 "BriefDescription": "PRNG Blocked Cycles", 27 "BriefDescription": "PRNG Blocked Cycles",
24 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 28 "PublicDescription": "Total number of CPU cycles blocked for the PRNG functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "68", 32 "EventCode": "68",
28 "EventName": "SHA_FUNCTIONS", 33 "EventName": "SHA_FUNCTIONS",
29 "BriefDescription": "SHA Functions", 34 "BriefDescription": "SHA Functions",
30 "PublicDescription": "Total number of SHA functions issued by the CPU" 35 "PublicDescription": "Total number of SHA functions issued by the CPU"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "69", 39 "EventCode": "69",
34 "EventName": "SHA_CYCLES", 40 "EventName": "SHA_CYCLES",
35 "BriefDescription": "SHA Cycles", 41 "BriefDescription": "SHA Cycles",
36 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU" 42 "PublicDescription": "Total number of CPU cycles when the SHA coprocessor is busy performing the SHA functions issued by the CPU"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "70", 46 "EventCode": "70",
40 "EventName": "SHA_BLOCKED_FUNCTIONS", 47 "EventName": "SHA_BLOCKED_FUNCTIONS",
41 "BriefDescription": "SHA Blocked Functions", 48 "BriefDescription": "SHA Blocked Functions",
42 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU" 49 "PublicDescription": "Total number of the SHA functions that are issued by the CPU and are blocked because the SHA coprocessor is busy performing a function issued by another CPU"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "71", 53 "EventCode": "71",
46 "EventName": "SHA_BLOCKED_CYCLES", 54 "EventName": "SHA_BLOCKED_CYCLES",
47 "BriefDescription": "SHA Bloced Cycles", 55 "BriefDescription": "SHA Bloced Cycles",
48 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU" 56 "PublicDescription": "Total number of CPU cycles blocked for the SHA functions issued by the CPU because the SHA coprocessor is busy performing a function issued by another CPU"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "72", 60 "EventCode": "72",
52 "EventName": "DEA_FUNCTIONS", 61 "EventName": "DEA_FUNCTIONS",
53 "BriefDescription": "DEA Functions", 62 "BriefDescription": "DEA Functions",
54 "PublicDescription": "Total number of the DEA functions issued by the CPU" 63 "PublicDescription": "Total number of the DEA functions issued by the CPU"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "73", 67 "EventCode": "73",
58 "EventName": "DEA_CYCLES", 68 "EventName": "DEA_CYCLES",
59 "BriefDescription": "DEA Cycles", 69 "BriefDescription": "DEA Cycles",
60 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU" 70 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the DEA functions issued by the CPU"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "74", 74 "EventCode": "74",
64 "EventName": "DEA_BLOCKED_FUNCTIONS", 75 "EventName": "DEA_BLOCKED_FUNCTIONS",
65 "BriefDescription": "DEA Blocked Functions", 76 "BriefDescription": "DEA Blocked Functions",
66 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 77 "PublicDescription": "Total number of the DEA functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "75", 81 "EventCode": "75",
70 "EventName": "DEA_BLOCKED_CYCLES", 82 "EventName": "DEA_BLOCKED_CYCLES",
71 "BriefDescription": "DEA Blocked Cycles", 83 "BriefDescription": "DEA Blocked Cycles",
72 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU" 84 "PublicDescription": "Total number of CPU cycles blocked for the DEA functions issued by the CPU because the DEA/AES coprocessor is busy performing a function issued by another CPU"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "76", 88 "EventCode": "76",
76 "EventName": "AES_FUNCTIONS", 89 "EventName": "AES_FUNCTIONS",
77 "BriefDescription": "AES Functions", 90 "BriefDescription": "AES Functions",
78 "PublicDescription": "Total number of AES functions issued by the CPU" 91 "PublicDescription": "Total number of AES functions issued by the CPU"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "77", 95 "EventCode": "77",
82 "EventName": "AES_CYCLES", 96 "EventName": "AES_CYCLES",
83 "BriefDescription": "AES Cycles", 97 "BriefDescription": "AES Cycles",
84 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU" 98 "PublicDescription": "Total number of CPU cycles when the DEA/AES coprocessor is busy performing the AES functions issued by the CPU"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "78", 102 "EventCode": "78",
88 "EventName": "AES_BLOCKED_FUNCTIONS", 103 "EventName": "AES_BLOCKED_FUNCTIONS",
89 "BriefDescription": "AES Blocked Functions", 104 "BriefDescription": "AES Blocked Functions",
90 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU" 105 "PublicDescription": "Total number of AES functions that are issued by the CPU and are blocked because the DEA/AES coprocessor is busy performing a function issued by another CPU"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "79", 109 "EventCode": "79",
94 "EventName": "AES_BLOCKED_CYCLES", 110 "EventName": "AES_BLOCKED_CYCLES",
95 "BriefDescription": "AES Blocked Cycles", 111 "BriefDescription": "AES Blocked Cycles",
diff --git a/tools/perf/pmu-events/arch/s390/cf_zec12/extended.json b/tools/perf/pmu-events/arch/s390/cf_zec12/extended.json
index 8682126aabb2..162251037219 100644
--- a/tools/perf/pmu-events/arch/s390/cf_zec12/extended.json
+++ b/tools/perf/pmu-events/arch/s390/cf_zec12/extended.json
@@ -1,209 +1,244 @@
1[ 1[
2 { 2 {
3 "Unit": "CPU-M-CF",
3 "EventCode": "128", 4 "EventCode": "128",
4 "EventName": "DTLB1_MISSES", 5 "EventName": "DTLB1_MISSES",
5 "BriefDescription": "DTLB1 Misses", 6 "BriefDescription": "DTLB1 Misses",
6 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB1 miss is in progress." 7 "PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB1 miss is in progress."
7 }, 8 },
8 { 9 {
10 "Unit": "CPU-M-CF",
9 "EventCode": "129", 11 "EventCode": "129",
10 "EventName": "ITLB1_MISSES", 12 "EventName": "ITLB1_MISSES",
11 "BriefDescription": "ITLB1 Misses", 13 "BriefDescription": "ITLB1 Misses",
12 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle a ITLB1 miss is in progress." 14 "PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle a ITLB1 miss is in progress."
13 }, 15 },
14 { 16 {
17 "Unit": "CPU-M-CF",
15 "EventCode": "130", 18 "EventCode": "130",
16 "EventName": "L1D_L2I_SOURCED_WRITES", 19 "EventName": "L1D_L2I_SOURCED_WRITES",
17 "BriefDescription": "L1D L2I Sourced Writes", 20 "BriefDescription": "L1D L2I Sourced Writes",
18 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Instruction cache" 21 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Instruction cache"
19 }, 22 },
20 { 23 {
24 "Unit": "CPU-M-CF",
21 "EventCode": "131", 25 "EventCode": "131",
22 "EventName": "L1I_L2I_SOURCED_WRITES", 26 "EventName": "L1I_L2I_SOURCED_WRITES",
23 "BriefDescription": "L1I L2I Sourced Writes", 27 "BriefDescription": "L1I L2I Sourced Writes",
24 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache" 28 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from the Level-2 Instruction cache"
25 }, 29 },
26 { 30 {
31 "Unit": "CPU-M-CF",
27 "EventCode": "132", 32 "EventCode": "132",
28 "EventName": "L1D_L2D_SOURCED_WRITES", 33 "EventName": "L1D_L2D_SOURCED_WRITES",
29 "BriefDescription": "L1D L2D Sourced Writes", 34 "BriefDescription": "L1D L2D Sourced Writes",
30 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache" 35 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from the Level-2 Data cache"
31 }, 36 },
32 { 37 {
38 "Unit": "CPU-M-CF",
33 "EventCode": "133", 39 "EventCode": "133",
34 "EventName": "DTLB1_WRITES", 40 "EventName": "DTLB1_WRITES",
35 "BriefDescription": "DTLB1 Writes", 41 "BriefDescription": "DTLB1 Writes",
36 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer" 42 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer"
37 }, 43 },
38 { 44 {
45 "Unit": "CPU-M-CF",
39 "EventCode": "135", 46 "EventCode": "135",
40 "EventName": "L1D_LMEM_SOURCED_WRITES", 47 "EventName": "L1D_LMEM_SOURCED_WRITES",
41 "BriefDescription": "L1D Local Memory Sourced Writes", 48 "BriefDescription": "L1D Local Memory Sourced Writes",
42 "PublicDescription": "A directory write to the Level-1 Data cache where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)" 49 "PublicDescription": "A directory write to the Level-1 Data cache where the installed cache line was sourced from memory that is attached to the same book as the Data cache (Local Memory)"
43 }, 50 },
44 { 51 {
52 "Unit": "CPU-M-CF",
45 "EventCode": "137", 53 "EventCode": "137",
46 "EventName": "L1I_LMEM_SOURCED_WRITES", 54 "EventName": "L1I_LMEM_SOURCED_WRITES",
47 "BriefDescription": "L1I Local Memory Sourced Writes", 55 "BriefDescription": "L1I Local Memory Sourced Writes",
48 "PublicDescription": "A directory write to the Level-1 Instruction cache where the installed cache line was sourced from memory that is attached to the same book as the Instruction cache (Local Memory)" 56 "PublicDescription": "A directory write to the Level-1 Instruction cache where the installed cache line was sourced from memory that is attached to the same book as the Instruction cache (Local Memory)"
49 }, 57 },
50 { 58 {
59 "Unit": "CPU-M-CF",
51 "EventCode": "138", 60 "EventCode": "138",
52 "EventName": "L1D_RO_EXCL_WRITES", 61 "EventName": "L1D_RO_EXCL_WRITES",
53 "BriefDescription": "L1D Read-only Exclusive Writes", 62 "BriefDescription": "L1D Read-only Exclusive Writes",
54 "PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line" 63 "PublicDescription": "A directory write to the Level-1 D-Cache where the line was originally in a Read-Only state in the cache but has been updated to be in the Exclusive state that allows stores to the cache line"
55 }, 64 },
56 { 65 {
66 "Unit": "CPU-M-CF",
57 "EventCode": "139", 67 "EventCode": "139",
58 "EventName": "DTLB1_HPAGE_WRITES", 68 "EventName": "DTLB1_HPAGE_WRITES",
59 "BriefDescription": "DTLB1 One-Megabyte Page Writes", 69 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
60 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a one-megabyte page" 70 "PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a one-megabyte page"
61 }, 71 },
62 { 72 {
73 "Unit": "CPU-M-CF",
63 "EventCode": "140", 74 "EventCode": "140",
64 "EventName": "ITLB1_WRITES", 75 "EventName": "ITLB1_WRITES",
65 "BriefDescription": "ITLB1 Writes", 76 "BriefDescription": "ITLB1 Writes",
66 "PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation Lookaside Buffer" 77 "PublicDescription": "A translation entry has been written to the Level-1 Instruction Translation Lookaside Buffer"
67 }, 78 },
68 { 79 {
80 "Unit": "CPU-M-CF",
69 "EventCode": "141", 81 "EventCode": "141",
70 "EventName": "TLB2_PTE_WRITES", 82 "EventName": "TLB2_PTE_WRITES",
71 "BriefDescription": "TLB2 PTE Writes", 83 "BriefDescription": "TLB2 PTE Writes",
72 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays" 84 "PublicDescription": "A translation entry has been written to the Level-2 TLB Page Table Entry arrays"
73 }, 85 },
74 { 86 {
87 "Unit": "CPU-M-CF",
75 "EventCode": "142", 88 "EventCode": "142",
76 "EventName": "TLB2_CRSTE_HPAGE_WRITES", 89 "EventName": "TLB2_CRSTE_HPAGE_WRITES",
77 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes", 90 "BriefDescription": "TLB2 CRSTE One-Megabyte Page Writes",
78 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation" 91 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays for a one-megabyte large page translation"
79 }, 92 },
80 { 93 {
94 "Unit": "CPU-M-CF",
81 "EventCode": "143", 95 "EventCode": "143",
82 "EventName": "TLB2_CRSTE_WRITES", 96 "EventName": "TLB2_CRSTE_WRITES",
83 "BriefDescription": "TLB2 CRSTE Writes", 97 "BriefDescription": "TLB2 CRSTE Writes",
84 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays" 98 "PublicDescription": "A translation entry has been written to the Level-2 TLB Common Region Segment Table Entry arrays"
85 }, 99 },
86 { 100 {
101 "Unit": "CPU-M-CF",
87 "EventCode": "144", 102 "EventCode": "144",
88 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES", 103 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES",
89 "BriefDescription": "L1D On-Chip L3 Sourced Writes", 104 "BriefDescription": "L1D On-Chip L3 Sourced Writes",
90 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On Chip Level-3 cache without intervention" 105 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On Chip Level-3 cache without intervention"
91 }, 106 },
92 { 107 {
108 "Unit": "CPU-M-CF",
93 "EventCode": "145", 109 "EventCode": "145",
94 "EventName": "L1D_OFFCHIP_L3_SOURCED_WRITES", 110 "EventName": "L1D_OFFCHIP_L3_SOURCED_WRITES",
95 "BriefDescription": "L1D Off-Chip L3 Sourced Writes", 111 "BriefDescription": "L1D Off-Chip L3 Sourced Writes",
96 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache without intervention" 112 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache without intervention"
97 }, 113 },
98 { 114 {
115 "Unit": "CPU-M-CF",
99 "EventCode": "146", 116 "EventCode": "146",
100 "EventName": "L1D_OFFBOOK_L3_SOURCED_WRITES", 117 "EventName": "L1D_OFFBOOK_L3_SOURCED_WRITES",
101 "BriefDescription": "L1D Off-Book L3 Sourced Writes", 118 "BriefDescription": "L1D Off-Book L3 Sourced Writes",
102 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-3 cache without intervention" 119 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-3 cache without intervention"
103 }, 120 },
104 { 121 {
122 "Unit": "CPU-M-CF",
105 "EventCode": "147", 123 "EventCode": "147",
106 "EventName": "L1D_ONBOOK_L4_SOURCED_WRITES", 124 "EventName": "L1D_ONBOOK_L4_SOURCED_WRITES",
107 "BriefDescription": "L1D On-Book L4 Sourced Writes", 125 "BriefDescription": "L1D On-Book L4 Sourced Writes",
108 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On Book Level-4 cache" 126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an On Book Level-4 cache"
109 }, 127 },
110 { 128 {
129 "Unit": "CPU-M-CF",
111 "EventCode": "148", 130 "EventCode": "148",
112 "EventName": "L1D_OFFBOOK_L4_SOURCED_WRITES", 131 "EventName": "L1D_OFFBOOK_L4_SOURCED_WRITES",
113 "BriefDescription": "L1D Off-Book L4 Sourced Writes", 132 "BriefDescription": "L1D Off-Book L4 Sourced Writes",
114 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-4 cache" 133 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-4 cache"
115 }, 134 },
116 { 135 {
136 "Unit": "CPU-M-CF",
117 "EventCode": "149", 137 "EventCode": "149",
118 "EventName": "TX_NC_TEND", 138 "EventName": "TX_NC_TEND",
119 "BriefDescription": "Completed TEND instructions in non-constrained TX mode", 139 "BriefDescription": "Completed TEND instructions in non-constrained TX mode",
120 "PublicDescription": "A TEND instruction has completed in a nonconstrained transactional-execution mode" 140 "PublicDescription": "A TEND instruction has completed in a nonconstrained transactional-execution mode"
121 }, 141 },
122 { 142 {
143 "Unit": "CPU-M-CF",
123 "EventCode": "150", 144 "EventCode": "150",
124 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV", 145 "EventName": "L1D_ONCHIP_L3_SOURCED_WRITES_IV",
125 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention", 146 "BriefDescription": "L1D On-Chip L3 Sourced Writes with Intervention",
126 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from a On Chip Level-3 cache with intervention" 147 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from a On Chip Level-3 cache with intervention"
127 }, 148 },
128 { 149 {
150 "Unit": "CPU-M-CF",
129 "EventCode": "151", 151 "EventCode": "151",
130 "EventName": "L1D_OFFCHIP_L3_SOURCED_WRITES_IV", 152 "EventName": "L1D_OFFCHIP_L3_SOURCED_WRITES_IV",
131 "BriefDescription": "L1D Off-Chip L3 Sourced Writes with Intervention", 153 "BriefDescription": "L1D Off-Chip L3 Sourced Writes with Intervention",
132 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache with intervention" 154 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache with intervention"
133 }, 155 },
134 { 156 {
157 "Unit": "CPU-M-CF",
135 "EventCode": "152", 158 "EventCode": "152",
136 "EventName": "L1D_OFFBOOK_L3_SOURCED_WRITES_IV", 159 "EventName": "L1D_OFFBOOK_L3_SOURCED_WRITES_IV",
137 "BriefDescription": "L1D Off-Book L3 Sourced Writes with Intervention", 160 "BriefDescription": "L1D Off-Book L3 Sourced Writes with Intervention",
138 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-3 cache with intervention" 161 "PublicDescription": "A directory write to the Level-1 Data cache directory where the returned cache line was sourced from an Off Book Level-3 cache with intervention"
139 }, 162 },
140 { 163 {
164 "Unit": "CPU-M-CF",
141 "EventCode": "153", 165 "EventCode": "153",
142 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES", 166 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES",
143 "BriefDescription": "L1I On-Chip L3 Sourced Writes", 167 "BriefDescription": "L1I On-Chip L3 Sourced Writes",
144 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Chip Level-3 cache without intervention" 168 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Chip Level-3 cache without intervention"
145 }, 169 },
146 { 170 {
171 "Unit": "CPU-M-CF",
147 "EventCode": "154", 172 "EventCode": "154",
148 "EventName": "L1I_OFFCHIP_L3_SOURCED_WRITES", 173 "EventName": "L1I_OFFCHIP_L3_SOURCED_WRITES",
149 "BriefDescription": "L1I Off-Chip L3 Sourced Writes", 174 "BriefDescription": "L1I Off-Chip L3 Sourced Writes",
150 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache without intervention" 175 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache without intervention"
151 }, 176 },
152 { 177 {
178 "Unit": "CPU-M-CF",
153 "EventCode": "155", 179 "EventCode": "155",
154 "EventName": "L1I_OFFBOOK_L3_SOURCED_WRITES", 180 "EventName": "L1I_OFFBOOK_L3_SOURCED_WRITES",
155 "BriefDescription": "L1I Off-Book L3 Sourced Writes", 181 "BriefDescription": "L1I Off-Book L3 Sourced Writes",
156 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Book Level-3 cache without intervention" 182 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Book Level-3 cache without intervention"
157 }, 183 },
158 { 184 {
185 "Unit": "CPU-M-CF",
159 "EventCode": "156", 186 "EventCode": "156",
160 "EventName": "L1I_ONBOOK_L4_SOURCED_WRITES", 187 "EventName": "L1I_ONBOOK_L4_SOURCED_WRITES",
161 "BriefDescription": "L1I On-Book L4 Sourced Writes", 188 "BriefDescription": "L1I On-Book L4 Sourced Writes",
162 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Book Level-4 cache" 189 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Book Level-4 cache"
163 }, 190 },
164 { 191 {
192 "Unit": "CPU-M-CF",
165 "EventCode": "157", 193 "EventCode": "157",
166 "EventName": "L1I_OFFBOOK_L4_SOURCED_WRITES", 194 "EventName": "L1I_OFFBOOK_L4_SOURCED_WRITES",
167 "BriefDescription": "L1I Off-Book L4 Sourced Writes", 195 "BriefDescription": "L1I Off-Book L4 Sourced Writes",
168 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Book Level-4 cache" 196 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Book Level-4 cache"
169 }, 197 },
170 { 198 {
199 "Unit": "CPU-M-CF",
171 "EventCode": "158", 200 "EventCode": "158",
172 "EventName": "TX_C_TEND", 201 "EventName": "TX_C_TEND",
173 "BriefDescription": "Completed TEND instructions in constrained TX mode", 202 "BriefDescription": "Completed TEND instructions in constrained TX mode",
174 "PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode" 203 "PublicDescription": "A TEND instruction has completed in a constrained transactional-execution mode"
175 }, 204 },
176 { 205 {
206 "Unit": "CPU-M-CF",
177 "EventCode": "159", 207 "EventCode": "159",
178 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV", 208 "EventName": "L1I_ONCHIP_L3_SOURCED_WRITES_IV",
179 "BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention", 209 "BriefDescription": "L1I On-Chip L3 Sourced Writes with Intervention",
180 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Chip Level-3 cache with intervention" 210 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an On Chip Level-3 cache with intervention"
181 }, 211 },
182 { 212 {
213 "Unit": "CPU-M-CF",
183 "EventCode": "160", 214 "EventCode": "160",
184 "EventName": "L1I_OFFCHIP_L3_SOURCED_WRITES_IV", 215 "EventName": "L1I_OFFCHIP_L3_SOURCED_WRITES_IV",
185 "BriefDescription": "L1I Off-Chip L3 Sourced Writes with Intervention", 216 "BriefDescription": "L1I Off-Chip L3 Sourced Writes with Intervention",
186 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache with intervention" 217 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Chip/On Book Level-3 cache with intervention"
187 }, 218 },
188 { 219 {
220 "Unit": "CPU-M-CF",
189 "EventCode": "161", 221 "EventCode": "161",
190 "EventName": "L1I_OFFBOOK_L3_SOURCED_WRITES_IV", 222 "EventName": "L1I_OFFBOOK_L3_SOURCED_WRITES_IV",
191 "BriefDescription": "L1I Off-Book L3 Sourced Writes with Intervention", 223 "BriefDescription": "L1I Off-Book L3 Sourced Writes with Intervention",
192 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Book Level-3 cache with intervention" 224 "PublicDescription": "A directory write to the Level-1 Instruction cache directory where the returned cache line was sourced from an Off Book Level-3 cache with intervention"
193 }, 225 },
194 { 226 {
227 "Unit": "CPU-M-CF",
195 "EventCode": "177", 228 "EventCode": "177",
196 "EventName": "TX_NC_TABORT", 229 "EventName": "TX_NC_TABORT",
197 "BriefDescription": "Aborted transactions in non-constrained TX mode", 230 "BriefDescription": "Aborted transactions in non-constrained TX mode",
198 "PublicDescription": "A transaction abort has occurred in a nonconstrained transactional-execution mode" 231 "PublicDescription": "A transaction abort has occurred in a nonconstrained transactional-execution mode"
199 }, 232 },
200 { 233 {
234 "Unit": "CPU-M-CF",
201 "EventCode": "178", 235 "EventCode": "178",
202 "EventName": "TX_C_TABORT_NO_SPECIAL", 236 "EventName": "TX_C_TABORT_NO_SPECIAL",
203 "BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic", 237 "BriefDescription": "Aborted transactions in constrained TX mode not using special completion logic",
204 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete" 238 "PublicDescription": "A transaction abort has occurred in a constrained transactional-execution mode and the CPU is not using any special logic to allow the transaction to complete"
205 }, 239 },
206 { 240 {
241 "Unit": "CPU-M-CF",
207 "EventCode": "179", 242 "EventCode": "179",
208 "EventName": "TX_C_TABORT_SPECIAL", 243 "EventName": "TX_C_TABORT_SPECIAL",
209 "BriefDescription": "Aborted transactions in constrained TX mode using special completion logic", 244 "BriefDescription": "Aborted transactions in constrained TX mode using special completion logic",
diff --git a/tools/perf/pmu-events/arch/s390/cf_zec12/transaction.json b/tools/perf/pmu-events/arch/s390/cf_zec12/transaction.json
new file mode 100644
index 000000000000..1a0034f79f73
--- /dev/null
+++ b/tools/perf/pmu-events/arch/s390/cf_zec12/transaction.json
@@ -0,0 +1,7 @@
1[
2 {
3 "BriefDescription": "Transaction count",
4 "MetricName": "transaction",
5 "MetricExpr": "TX_C_TEND + TX_NC_TEND + TX_NC_TABORT + TX_C_TABORT_SPECIAL + TX_C_TABORT_NO_SPECIAL"
6 }
7]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index db3a594ee1e4..68c92bb599ee 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -233,6 +233,8 @@ static struct map {
233 { "QPI LL", "uncore_qpi" }, 233 { "QPI LL", "uncore_qpi" },
234 { "SBO", "uncore_sbox" }, 234 { "SBO", "uncore_sbox" },
235 { "iMPH-U", "uncore_arb" }, 235 { "iMPH-U", "uncore_arb" },
236 { "CPU-M-CF", "cpum_cf" },
237 { "CPU-M-SF", "cpum_sf" },
236 {} 238 {}
237}; 239};
238 240
diff --git a/tools/perf/tests/bitmap.c b/tools/perf/tests/bitmap.c
index 47bedf25ba69..96e7fc1ad3f9 100644
--- a/tools/perf/tests/bitmap.c
+++ b/tools/perf/tests/bitmap.c
@@ -16,8 +16,6 @@ static unsigned long *get_bitmap(const char *str, int nbits)
16 bm = bitmap_alloc(nbits); 16 bm = bitmap_alloc(nbits);
17 17
18 if (map && bm) { 18 if (map && bm) {
19 bitmap_zero(bm, nbits);
20
21 for (i = 0; i < map->nr; i++) 19 for (i = 0; i < map->nr; i++)
22 set_bit(map->map[i], bm); 20 set_bit(map->map[i], bm);
23 } 21 }
diff --git a/tools/perf/tests/builtin-test.c b/tools/perf/tests/builtin-test.c
index dd850a26d579..d7a5e1b9aa6f 100644
--- a/tools/perf/tests/builtin-test.c
+++ b/tools/perf/tests/builtin-test.c
@@ -385,7 +385,7 @@ static int test_and_print(struct test *t, bool force_skip, int subtest)
385 if (!t->subtest.get_nr) 385 if (!t->subtest.get_nr)
386 pr_debug("%s:", t->desc); 386 pr_debug("%s:", t->desc);
387 else 387 else
388 pr_debug("%s subtest %d:", t->desc, subtest); 388 pr_debug("%s subtest %d:", t->desc, subtest + 1);
389 389
390 switch (err) { 390 switch (err) {
391 case TEST_OK: 391 case TEST_OK:
diff --git a/tools/perf/tests/code-reading.c b/tools/perf/tests/code-reading.c
index 4892bd2dc33e..6b049f3f5cf4 100644
--- a/tools/perf/tests/code-reading.c
+++ b/tools/perf/tests/code-reading.c
@@ -232,6 +232,7 @@ static int read_object_code(u64 addr, size_t len, u8 cpumode,
232 u64 objdump_addr; 232 u64 objdump_addr;
233 const char *objdump_name; 233 const char *objdump_name;
234 char decomp_name[KMOD_DECOMP_LEN]; 234 char decomp_name[KMOD_DECOMP_LEN];
235 bool decomp = false;
235 int ret; 236 int ret;
236 237
237 pr_debug("Reading object code for memory address: %#"PRIx64"\n", addr); 238 pr_debug("Reading object code for memory address: %#"PRIx64"\n", addr);
@@ -305,6 +306,7 @@ static int read_object_code(u64 addr, size_t len, u8 cpumode,
305 return -1; 306 return -1;
306 } 307 }
307 308
309 decomp = true;
308 objdump_name = decomp_name; 310 objdump_name = decomp_name;
309 } 311 }
310 312
@@ -312,7 +314,7 @@ static int read_object_code(u64 addr, size_t len, u8 cpumode,
312 objdump_addr = map__rip_2objdump(al.map, al.addr); 314 objdump_addr = map__rip_2objdump(al.map, al.addr);
313 ret = read_via_objdump(objdump_name, objdump_addr, buf2, len); 315 ret = read_via_objdump(objdump_name, objdump_addr, buf2, len);
314 316
315 if (dso__needs_decompress(al.map->dso)) 317 if (decomp)
316 unlink(objdump_name); 318 unlink(objdump_name);
317 319
318 if (ret > 0) { 320 if (ret > 0) {
diff --git a/tools/perf/tests/kmod-path.c b/tools/perf/tests/kmod-path.c
index 148dd31cc201..0579a70bbbff 100644
--- a/tools/perf/tests/kmod-path.c
+++ b/tools/perf/tests/kmod-path.c
@@ -5,34 +5,28 @@
5#include "dso.h" 5#include "dso.h"
6#include "debug.h" 6#include "debug.h"
7 7
8static int test(const char *path, bool alloc_name, bool alloc_ext, 8static int test(const char *path, bool alloc_name, bool kmod,
9 bool kmod, bool comp, const char *name, const char *ext) 9 int comp, const char *name)
10{ 10{
11 struct kmod_path m; 11 struct kmod_path m;
12 12
13 memset(&m, 0x0, sizeof(m)); 13 memset(&m, 0x0, sizeof(m));
14 14
15 TEST_ASSERT_VAL("kmod_path__parse", 15 TEST_ASSERT_VAL("kmod_path__parse",
16 !__kmod_path__parse(&m, path, alloc_name, alloc_ext)); 16 !__kmod_path__parse(&m, path, alloc_name));
17 17
18 pr_debug("%s - alloc name %d, alloc ext %d, kmod %d, comp %d, name '%s', ext '%s'\n", 18 pr_debug("%s - alloc name %d, kmod %d, comp %d, name '%s'\n",
19 path, alloc_name, alloc_ext, m.kmod, m.comp, m.name, m.ext); 19 path, alloc_name, m.kmod, m.comp, m.name);
20 20
21 TEST_ASSERT_VAL("wrong kmod", m.kmod == kmod); 21 TEST_ASSERT_VAL("wrong kmod", m.kmod == kmod);
22 TEST_ASSERT_VAL("wrong comp", m.comp == comp); 22 TEST_ASSERT_VAL("wrong comp", m.comp == comp);
23 23
24 if (ext)
25 TEST_ASSERT_VAL("wrong ext", m.ext && !strcmp(ext, m.ext));
26 else
27 TEST_ASSERT_VAL("wrong ext", !m.ext);
28
29 if (name) 24 if (name)
30 TEST_ASSERT_VAL("wrong name", m.name && !strcmp(name, m.name)); 25 TEST_ASSERT_VAL("wrong name", m.name && !strcmp(name, m.name));
31 else 26 else
32 TEST_ASSERT_VAL("wrong name", !m.name); 27 TEST_ASSERT_VAL("wrong name", !m.name);
33 28
34 free(m.name); 29 free(m.name);
35 free(m.ext);
36 return 0; 30 return 0;
37} 31}
38 32
@@ -45,118 +39,118 @@ static int test_is_kernel_module(const char *path, int cpumode, bool expect)
45 return 0; 39 return 0;
46} 40}
47 41
48#define T(path, an, ae, k, c, n, e) \ 42#define T(path, an, k, c, n) \
49 TEST_ASSERT_VAL("failed", !test(path, an, ae, k, c, n, e)) 43 TEST_ASSERT_VAL("failed", !test(path, an, k, c, n))
50 44
51#define M(path, c, e) \ 45#define M(path, c, e) \
52 TEST_ASSERT_VAL("failed", !test_is_kernel_module(path, c, e)) 46 TEST_ASSERT_VAL("failed", !test_is_kernel_module(path, c, e))
53 47
54int test__kmod_path__parse(struct test *t __maybe_unused, int subtest __maybe_unused) 48int test__kmod_path__parse(struct test *t __maybe_unused, int subtest __maybe_unused)
55{ 49{
56 /* path alloc_name alloc_ext kmod comp name ext */ 50 /* path alloc_name kmod comp name */
57 T("/xxxx/xxxx/x-x.ko", true , true , true, false, "[x_x]", NULL); 51 T("/xxxx/xxxx/x-x.ko", true , true, 0 , "[x_x]");
58 T("/xxxx/xxxx/x-x.ko", false , true , true, false, NULL , NULL); 52 T("/xxxx/xxxx/x-x.ko", false , true, 0 , NULL );
59 T("/xxxx/xxxx/x-x.ko", true , false , true, false, "[x_x]", NULL); 53 T("/xxxx/xxxx/x-x.ko", true , true, 0 , "[x_x]");
60 T("/xxxx/xxxx/x-x.ko", false , false , true, false, NULL , NULL); 54 T("/xxxx/xxxx/x-x.ko", false , true, 0 , NULL );
61 M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); 55 M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true);
62 M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_KERNEL, true); 56 M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_KERNEL, true);
63 M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_USER, false); 57 M("/xxxx/xxxx/x-x.ko", PERF_RECORD_MISC_USER, false);
64 58
65#ifdef HAVE_ZLIB_SUPPORT 59#ifdef HAVE_ZLIB_SUPPORT
66 /* path alloc_name alloc_ext kmod comp name ext */ 60 /* path alloc_name kmod comp name */
67 T("/xxxx/xxxx/x.ko.gz", true , true , true, true, "[x]", "gz"); 61 T("/xxxx/xxxx/x.ko.gz", true , true, 1 , "[x]");
68 T("/xxxx/xxxx/x.ko.gz", false , true , true, true, NULL , "gz"); 62 T("/xxxx/xxxx/x.ko.gz", false , true, 1 , NULL );
69 T("/xxxx/xxxx/x.ko.gz", true , false , true, true, "[x]", NULL); 63 T("/xxxx/xxxx/x.ko.gz", true , true, 1 , "[x]");
70 T("/xxxx/xxxx/x.ko.gz", false , false , true, true, NULL , NULL); 64 T("/xxxx/xxxx/x.ko.gz", false , true, 1 , NULL );
71 M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); 65 M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true);
72 M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_KERNEL, true); 66 M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_KERNEL, true);
73 M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_USER, false); 67 M("/xxxx/xxxx/x.ko.gz", PERF_RECORD_MISC_USER, false);
74 68
75 /* path alloc_name alloc_ext kmod comp name ext */ 69 /* path alloc_name kmod comp name */
76 T("/xxxx/xxxx/x.gz", true , true , false, true, "x.gz" ,"gz"); 70 T("/xxxx/xxxx/x.gz", true , false, 1 , "x.gz");
77 T("/xxxx/xxxx/x.gz", false , true , false, true, NULL ,"gz"); 71 T("/xxxx/xxxx/x.gz", false , false, 1 , NULL );
78 T("/xxxx/xxxx/x.gz", true , false , false, true, "x.gz" , NULL); 72 T("/xxxx/xxxx/x.gz", true , false, 1 , "x.gz");
79 T("/xxxx/xxxx/x.gz", false , false , false, true, NULL , NULL); 73 T("/xxxx/xxxx/x.gz", false , false, 1 , NULL );
80 M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); 74 M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false);
81 M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_KERNEL, false); 75 M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_KERNEL, false);
82 M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_USER, false); 76 M("/xxxx/xxxx/x.gz", PERF_RECORD_MISC_USER, false);
83 77
84 /* path alloc_name alloc_ext kmod comp name ext */ 78 /* path alloc_name kmod comp name */
85 T("x.gz", true , true , false, true, "x.gz", "gz"); 79 T("x.gz", true , false, 1 , "x.gz");
86 T("x.gz", false , true , false, true, NULL , "gz"); 80 T("x.gz", false , false, 1 , NULL );
87 T("x.gz", true , false , false, true, "x.gz", NULL); 81 T("x.gz", true , false, 1 , "x.gz");
88 T("x.gz", false , false , false, true, NULL , NULL); 82 T("x.gz", false , false, 1 , NULL );
89 M("x.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); 83 M("x.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false);
90 M("x.gz", PERF_RECORD_MISC_KERNEL, false); 84 M("x.gz", PERF_RECORD_MISC_KERNEL, false);
91 M("x.gz", PERF_RECORD_MISC_USER, false); 85 M("x.gz", PERF_RECORD_MISC_USER, false);
92 86
93 /* path alloc_name alloc_ext kmod comp name ext */ 87 /* path alloc_name kmod comp name */
94 T("x.ko.gz", true , true , true, true, "[x]", "gz"); 88 T("x.ko.gz", true , true, 1 , "[x]");
95 T("x.ko.gz", false , true , true, true, NULL , "gz"); 89 T("x.ko.gz", false , true, 1 , NULL );
96 T("x.ko.gz", true , false , true, true, "[x]", NULL); 90 T("x.ko.gz", true , true, 1 , "[x]");
97 T("x.ko.gz", false , false , true, true, NULL , NULL); 91 T("x.ko.gz", false , true, 1 , NULL );
98 M("x.ko.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); 92 M("x.ko.gz", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true);
99 M("x.ko.gz", PERF_RECORD_MISC_KERNEL, true); 93 M("x.ko.gz", PERF_RECORD_MISC_KERNEL, true);
100 M("x.ko.gz", PERF_RECORD_MISC_USER, false); 94 M("x.ko.gz", PERF_RECORD_MISC_USER, false);
101#endif 95#endif
102 96
103 /* path alloc_name alloc_ext kmod comp name ext */ 97 /* path alloc_name kmod comp name */
104 T("[test_module]", true , true , true, false, "[test_module]", NULL); 98 T("[test_module]", true , true, false, "[test_module]");
105 T("[test_module]", false , true , true, false, NULL , NULL); 99 T("[test_module]", false , true, false, NULL );
106 T("[test_module]", true , false , true, false, "[test_module]", NULL); 100 T("[test_module]", true , true, false, "[test_module]");
107 T("[test_module]", false , false , true, false, NULL , NULL); 101 T("[test_module]", false , true, false, NULL );
108 M("[test_module]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); 102 M("[test_module]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true);
109 M("[test_module]", PERF_RECORD_MISC_KERNEL, true); 103 M("[test_module]", PERF_RECORD_MISC_KERNEL, true);
110 M("[test_module]", PERF_RECORD_MISC_USER, false); 104 M("[test_module]", PERF_RECORD_MISC_USER, false);
111 105
112 /* path alloc_name alloc_ext kmod comp name ext */ 106 /* path alloc_name kmod comp name */
113 T("[test.module]", true , true , true, false, "[test.module]", NULL); 107 T("[test.module]", true , true, false, "[test.module]");
114 T("[test.module]", false , true , true, false, NULL , NULL); 108 T("[test.module]", false , true, false, NULL );
115 T("[test.module]", true , false , true, false, "[test.module]", NULL); 109 T("[test.module]", true , true, false, "[test.module]");
116 T("[test.module]", false , false , true, false, NULL , NULL); 110 T("[test.module]", false , true, false, NULL );
117 M("[test.module]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true); 111 M("[test.module]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, true);
118 M("[test.module]", PERF_RECORD_MISC_KERNEL, true); 112 M("[test.module]", PERF_RECORD_MISC_KERNEL, true);
119 M("[test.module]", PERF_RECORD_MISC_USER, false); 113 M("[test.module]", PERF_RECORD_MISC_USER, false);
120 114
121 /* path alloc_name alloc_ext kmod comp name ext */ 115 /* path alloc_name kmod comp name */
122 T("[vdso]", true , true , false, false, "[vdso]", NULL); 116 T("[vdso]", true , false, false, "[vdso]");
123 T("[vdso]", false , true , false, false, NULL , NULL); 117 T("[vdso]", false , false, false, NULL );
124 T("[vdso]", true , false , false, false, "[vdso]", NULL); 118 T("[vdso]", true , false, false, "[vdso]");
125 T("[vdso]", false , false , false, false, NULL , NULL); 119 T("[vdso]", false , false, false, NULL );
126 M("[vdso]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); 120 M("[vdso]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false);
127 M("[vdso]", PERF_RECORD_MISC_KERNEL, false); 121 M("[vdso]", PERF_RECORD_MISC_KERNEL, false);
128 M("[vdso]", PERF_RECORD_MISC_USER, false); 122 M("[vdso]", PERF_RECORD_MISC_USER, false);
129 123
130 T("[vdso32]", true , true , false, false, "[vdso32]", NULL); 124 T("[vdso32]", true , false, false, "[vdso32]");
131 T("[vdso32]", false , true , false, false, NULL , NULL); 125 T("[vdso32]", false , false, false, NULL );
132 T("[vdso32]", true , false , false, false, "[vdso32]", NULL); 126 T("[vdso32]", true , false, false, "[vdso32]");
133 T("[vdso32]", false , false , false, false, NULL , NULL); 127 T("[vdso32]", false , false, false, NULL );
134 M("[vdso32]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); 128 M("[vdso32]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false);
135 M("[vdso32]", PERF_RECORD_MISC_KERNEL, false); 129 M("[vdso32]", PERF_RECORD_MISC_KERNEL, false);
136 M("[vdso32]", PERF_RECORD_MISC_USER, false); 130 M("[vdso32]", PERF_RECORD_MISC_USER, false);
137 131
138 T("[vdsox32]", true , true , false, false, "[vdsox32]", NULL); 132 T("[vdsox32]", true , false, false, "[vdsox32]");
139 T("[vdsox32]", false , true , false, false, NULL , NULL); 133 T("[vdsox32]", false , false, false, NULL );
140 T("[vdsox32]", true , false , false, false, "[vdsox32]", NULL); 134 T("[vdsox32]", true , false, false, "[vdsox32]");
141 T("[vdsox32]", false , false , false, false, NULL , NULL); 135 T("[vdsox32]", false , false, false, NULL );
142 M("[vdsox32]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); 136 M("[vdsox32]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false);
143 M("[vdsox32]", PERF_RECORD_MISC_KERNEL, false); 137 M("[vdsox32]", PERF_RECORD_MISC_KERNEL, false);
144 M("[vdsox32]", PERF_RECORD_MISC_USER, false); 138 M("[vdsox32]", PERF_RECORD_MISC_USER, false);
145 139
146 /* path alloc_name alloc_ext kmod comp name ext */ 140 /* path alloc_name kmod comp name */
147 T("[vsyscall]", true , true , false, false, "[vsyscall]", NULL); 141 T("[vsyscall]", true , false, false, "[vsyscall]");
148 T("[vsyscall]", false , true , false, false, NULL , NULL); 142 T("[vsyscall]", false , false, false, NULL );
149 T("[vsyscall]", true , false , false, false, "[vsyscall]", NULL); 143 T("[vsyscall]", true , false, false, "[vsyscall]");
150 T("[vsyscall]", false , false , false, false, NULL , NULL); 144 T("[vsyscall]", false , false, false, NULL );
151 M("[vsyscall]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); 145 M("[vsyscall]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false);
152 M("[vsyscall]", PERF_RECORD_MISC_KERNEL, false); 146 M("[vsyscall]", PERF_RECORD_MISC_KERNEL, false);
153 M("[vsyscall]", PERF_RECORD_MISC_USER, false); 147 M("[vsyscall]", PERF_RECORD_MISC_USER, false);
154 148
155 /* path alloc_name alloc_ext kmod comp name ext */ 149 /* path alloc_name kmod comp name */
156 T("[kernel.kallsyms]", true , true , false, false, "[kernel.kallsyms]", NULL); 150 T("[kernel.kallsyms]", true , false, false, "[kernel.kallsyms]");
157 T("[kernel.kallsyms]", false , true , false, false, NULL , NULL); 151 T("[kernel.kallsyms]", false , false, false, NULL );
158 T("[kernel.kallsyms]", true , false , false, false, "[kernel.kallsyms]", NULL); 152 T("[kernel.kallsyms]", true , false, false, "[kernel.kallsyms]");
159 T("[kernel.kallsyms]", false , false , false, false, NULL , NULL); 153 T("[kernel.kallsyms]", false , false, false, NULL );
160 M("[kernel.kallsyms]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false); 154 M("[kernel.kallsyms]", PERF_RECORD_MISC_CPUMODE_UNKNOWN, false);
161 M("[kernel.kallsyms]", PERF_RECORD_MISC_KERNEL, false); 155 M("[kernel.kallsyms]", PERF_RECORD_MISC_KERNEL, false);
162 M("[kernel.kallsyms]", PERF_RECORD_MISC_USER, false); 156 M("[kernel.kallsyms]", PERF_RECORD_MISC_USER, false);
diff --git a/tools/perf/tests/mem2node.c b/tools/perf/tests/mem2node.c
index 0c3c87f86e03..9e9e4d37cc77 100644
--- a/tools/perf/tests/mem2node.c
+++ b/tools/perf/tests/mem2node.c
@@ -24,8 +24,6 @@ static unsigned long *get_bitmap(const char *str, int nbits)
24 bm = bitmap_alloc(nbits); 24 bm = bitmap_alloc(nbits);
25 25
26 if (map && bm) { 26 if (map && bm) {
27 bitmap_zero(bm, nbits);
28
29 for (i = 0; i < map->nr; i++) { 27 for (i = 0; i < map->nr; i++) {
30 set_bit(map->map[i], bm); 28 set_bit(map->map[i], bm);
31 } 29 }
diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-events.c
index 61211918bfba..3b97ac018d5a 100644
--- a/tools/perf/tests/parse-events.c
+++ b/tools/perf/tests/parse-events.c
@@ -1322,6 +1322,14 @@ static int test__intel_pt(struct perf_evlist *evlist)
1322 return 0; 1322 return 0;
1323} 1323}
1324 1324
1325static int test__checkevent_complex_name(struct perf_evlist *evlist)
1326{
1327 struct perf_evsel *evsel = perf_evlist__first(evlist);
1328
1329 TEST_ASSERT_VAL("wrong complex name parsing", strcmp(evsel->name, "COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks") == 0);
1330 return 0;
1331}
1332
1325static int count_tracepoints(void) 1333static int count_tracepoints(void)
1326{ 1334{
1327 struct dirent *events_ent; 1335 struct dirent *events_ent;
@@ -1658,6 +1666,11 @@ static struct evlist_test test__events[] = {
1658 .check = test__intel_pt, 1666 .check = test__intel_pt,
1659 .id = 52, 1667 .id = 52,
1660 }, 1668 },
1669 {
1670 .name = "cycles/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks'/Duk",
1671 .check = test__checkevent_complex_name,
1672 .id = 53
1673 }
1661}; 1674};
1662 1675
1663static struct evlist_test test__events_pmu[] = { 1676static struct evlist_test test__events_pmu[] = {
@@ -1676,6 +1689,11 @@ static struct evlist_test test__events_pmu[] = {
1676 .check = test__checkevent_pmu_partial_time_callgraph, 1689 .check = test__checkevent_pmu_partial_time_callgraph,
1677 .id = 2, 1690 .id = 2,
1678 }, 1691 },
1692 {
1693 .name = "cpu/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks',period=0x1,event=0x2/ukp",
1694 .check = test__checkevent_complex_name,
1695 .id = 3,
1696 }
1679}; 1697};
1680 1698
1681struct terms_test { 1699struct terms_test {
diff --git a/tools/perf/tests/shell/record+probe_libc_inet_pton.sh b/tools/perf/tests/shell/record+probe_libc_inet_pton.sh
index 94e513e62b34..3013ac8f83d0 100755
--- a/tools/perf/tests/shell/record+probe_libc_inet_pton.sh
+++ b/tools/perf/tests/shell/record+probe_libc_inet_pton.sh
@@ -13,11 +13,24 @@
13libc=$(grep -w libc /proc/self/maps | head -1 | sed -r 's/.*[[:space:]](\/.*)/\1/g') 13libc=$(grep -w libc /proc/self/maps | head -1 | sed -r 's/.*[[:space:]](\/.*)/\1/g')
14nm -Dg $libc 2>/dev/null | fgrep -q inet_pton || exit 254 14nm -Dg $libc 2>/dev/null | fgrep -q inet_pton || exit 254
15 15
16event_pattern='probe_libc:inet_pton(\_[[:digit:]]+)?'
17
18add_libc_inet_pton_event() {
19
20 event_name=$(perf probe -f -x $libc -a inet_pton 2>&1 | tail -n +2 | head -n -5 | \
21 grep -P -o "$event_pattern(?=[[:space:]]\(on inet_pton in $libc\))")
22
23 if [ $? -ne 0 -o -z "$event_name" ] ; then
24 printf "FAIL: could not add event\n"
25 return 1
26 fi
27}
28
16trace_libc_inet_pton_backtrace() { 29trace_libc_inet_pton_backtrace() {
17 30
18 expected=`mktemp -u /tmp/expected.XXX` 31 expected=`mktemp -u /tmp/expected.XXX`
19 32
20 echo "ping[][0-9 \.:]+probe_libc:inet_pton: \([[:xdigit:]]+\)" > $expected 33 echo "ping[][0-9 \.:]+$event_name: \([[:xdigit:]]+\)" > $expected
21 echo ".*inet_pton\+0x[[:xdigit:]]+[[:space:]]\($libc|inlined\)$" >> $expected 34 echo ".*inet_pton\+0x[[:xdigit:]]+[[:space:]]\($libc|inlined\)$" >> $expected
22 case "$(uname -m)" in 35 case "$(uname -m)" in
23 s390x) 36 s390x)
@@ -26,6 +39,12 @@ trace_libc_inet_pton_backtrace() {
26 echo "(__GI_)?getaddrinfo\+0x[[:xdigit:]]+[[:space:]]\($libc|inlined\)$" >> $expected 39 echo "(__GI_)?getaddrinfo\+0x[[:xdigit:]]+[[:space:]]\($libc|inlined\)$" >> $expected
27 echo "main\+0x[[:xdigit:]]+[[:space:]]\(.*/bin/ping.*\)$" >> $expected 40 echo "main\+0x[[:xdigit:]]+[[:space:]]\(.*/bin/ping.*\)$" >> $expected
28 ;; 41 ;;
42 ppc64|ppc64le)
43 eventattr='max-stack=4'
44 echo "gaih_inet.*\+0x[[:xdigit:]]+[[:space:]]\($libc\)$" >> $expected
45 echo "getaddrinfo\+0x[[:xdigit:]]+[[:space:]]\($libc\)$" >> $expected
46 echo ".*\+0x[[:xdigit:]]+[[:space:]]\(.*/bin/ping.*\)$" >> $expected
47 ;;
29 *) 48 *)
30 eventattr='max-stack=3' 49 eventattr='max-stack=3'
31 echo "getaddrinfo\+0x[[:xdigit:]]+[[:space:]]\($libc\)$" >> $expected 50 echo "getaddrinfo\+0x[[:xdigit:]]+[[:space:]]\($libc\)$" >> $expected
@@ -35,7 +54,7 @@ trace_libc_inet_pton_backtrace() {
35 54
36 perf_data=`mktemp -u /tmp/perf.data.XXX` 55 perf_data=`mktemp -u /tmp/perf.data.XXX`
37 perf_script=`mktemp -u /tmp/perf.script.XXX` 56 perf_script=`mktemp -u /tmp/perf.script.XXX`
38 perf record -e probe_libc:inet_pton/$eventattr/ -o $perf_data ping -6 -c 1 ::1 > /dev/null 2>&1 57 perf record -e $event_name/$eventattr/ -o $perf_data ping -6 -c 1 ::1 > /dev/null 2>&1
39 perf script -i $perf_data > $perf_script 58 perf script -i $perf_data > $perf_script
40 59
41 exec 3<$perf_script 60 exec 3<$perf_script
@@ -46,7 +65,7 @@ trace_libc_inet_pton_backtrace() {
46 echo "$line" | egrep -q "$pattern" 65 echo "$line" | egrep -q "$pattern"
47 if [ $? -ne 0 ] ; then 66 if [ $? -ne 0 ] ; then
48 printf "FAIL: expected backtrace entry \"%s\" got \"%s\"\n" "$pattern" "$line" 67 printf "FAIL: expected backtrace entry \"%s\" got \"%s\"\n" "$pattern" "$line"
49 exit 1 68 return 1
50 fi 69 fi
51 done 70 done
52 71
@@ -56,13 +75,20 @@ trace_libc_inet_pton_backtrace() {
56 # even if the perf script output does not match. 75 # even if the perf script output does not match.
57} 76}
58 77
78delete_libc_inet_pton_event() {
79
80 if [ -n "$event_name" ] ; then
81 perf probe -q -d $event_name
82 fi
83}
84
59# Check for IPv6 interface existence 85# Check for IPv6 interface existence
60ip a sh lo | fgrep -q inet6 || exit 2 86ip a sh lo | fgrep -q inet6 || exit 2
61 87
62skip_if_no_perf_probe && \ 88skip_if_no_perf_probe && \
63perf probe -q $libc inet_pton && \ 89add_libc_inet_pton_event && \
64trace_libc_inet_pton_backtrace 90trace_libc_inet_pton_backtrace
65err=$? 91err=$?
66rm -f ${perf_data} ${perf_script} ${expected} 92rm -f ${perf_data} ${perf_script} ${expected}
67perf probe -q -d probe_libc:inet_pton 93delete_libc_inet_pton_event
68exit $err 94exit $err
diff --git a/tools/perf/trace/beauty/Build b/tools/perf/trace/beauty/Build
index 66330d4b739b..f528ba35e140 100644
--- a/tools/perf/trace/beauty/Build
+++ b/tools/perf/trace/beauty/Build
@@ -7,4 +7,5 @@ endif
7libperf-y += kcmp.o 7libperf-y += kcmp.o
8libperf-y += pkey_alloc.o 8libperf-y += pkey_alloc.o
9libperf-y += prctl.o 9libperf-y += prctl.o
10libperf-y += socket.o
10libperf-y += statx.o 11libperf-y += statx.o
diff --git a/tools/perf/trace/beauty/beauty.h b/tools/perf/trace/beauty/beauty.h
index 984a504d335c..9615af5d412b 100644
--- a/tools/perf/trace/beauty/beauty.h
+++ b/tools/perf/trace/beauty/beauty.h
@@ -106,6 +106,9 @@ size_t syscall_arg__scnprintf_prctl_arg2(char *bf, size_t size, struct syscall_a
106size_t syscall_arg__scnprintf_prctl_arg3(char *bf, size_t size, struct syscall_arg *arg); 106size_t syscall_arg__scnprintf_prctl_arg3(char *bf, size_t size, struct syscall_arg *arg);
107#define SCA_PRCTL_ARG3 syscall_arg__scnprintf_prctl_arg3 107#define SCA_PRCTL_ARG3 syscall_arg__scnprintf_prctl_arg3
108 108
109size_t syscall_arg__scnprintf_socket_protocol(char *bf, size_t size, struct syscall_arg *arg);
110#define SCA_SK_PROTO syscall_arg__scnprintf_socket_protocol
111
109size_t syscall_arg__scnprintf_statx_flags(char *bf, size_t size, struct syscall_arg *arg); 112size_t syscall_arg__scnprintf_statx_flags(char *bf, size_t size, struct syscall_arg *arg);
110#define SCA_STATX_FLAGS syscall_arg__scnprintf_statx_flags 113#define SCA_STATX_FLAGS syscall_arg__scnprintf_statx_flags
111 114
diff --git a/tools/perf/trace/beauty/drm_ioctl.sh b/tools/perf/trace/beauty/drm_ioctl.sh
index 2149d3a98e42..9d3816815e60 100755
--- a/tools/perf/trace/beauty/drm_ioctl.sh
+++ b/tools/perf/trace/beauty/drm_ioctl.sh
@@ -1,13 +1,14 @@
1#!/bin/sh 1#!/bin/sh
2 2
3drm_header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/drm/
4
4printf "#ifndef DRM_COMMAND_BASE\n" 5printf "#ifndef DRM_COMMAND_BASE\n"
5grep "#define DRM_COMMAND_BASE" $drm_header_dir/drm.h 6grep "#define DRM_COMMAND_BASE" $header_dir/drm.h
6printf "#endif\n" 7printf "#endif\n"
7 8
8printf "static const char *drm_ioctl_cmds[] = {\n" 9printf "static const char *drm_ioctl_cmds[] = {\n"
9grep "^#define DRM_IOCTL.*DRM_IO" $drm_header_dir/drm.h | \ 10grep "^#define DRM_IOCTL.*DRM_IO" $header_dir/drm.h | \
10 sed -r 's/^#define +DRM_IOCTL_([A-Z0-9_]+)[ ]+DRM_IO[A-Z]* *\( *(0x[[:xdigit:]]+),*.*/ [\2] = "\1",/g' 11 sed -r 's/^#define +DRM_IOCTL_([A-Z0-9_]+)[ ]+DRM_IO[A-Z]* *\( *(0x[[:xdigit:]]+),*.*/ [\2] = "\1",/g'
11grep "^#define DRM_I915_[A-Z_0-9]\+[ ]\+0x" $drm_header_dir/i915_drm.h | \ 12grep "^#define DRM_I915_[A-Z_0-9]\+[ ]\+0x" $header_dir/i915_drm.h | \
12 sed -r 's/^#define +DRM_I915_([A-Z0-9_]+)[ ]+(0x[[:xdigit:]]+)/\t[DRM_COMMAND_BASE + \2] = "I915_\1",/g' 13 sed -r 's/^#define +DRM_I915_([A-Z0-9_]+)[ ]+(0x[[:xdigit:]]+)/\t[DRM_COMMAND_BASE + \2] = "I915_\1",/g'
13printf "};\n" 14printf "};\n"
diff --git a/tools/perf/trace/beauty/kcmp_type.sh b/tools/perf/trace/beauty/kcmp_type.sh
index 40d063b8c082..a3c304caa336 100755
--- a/tools/perf/trace/beauty/kcmp_type.sh
+++ b/tools/perf/trace/beauty/kcmp_type.sh
@@ -1,6 +1,6 @@
1#!/bin/sh 1#!/bin/sh
2 2
3header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/linux/
4 4
5printf "static const char *kcmp_types[] = {\n" 5printf "static const char *kcmp_types[] = {\n"
6regex='^[[:space:]]+(KCMP_(\w+)),' 6regex='^[[:space:]]+(KCMP_(\w+)),'
diff --git a/tools/perf/trace/beauty/kvm_ioctl.sh b/tools/perf/trace/beauty/kvm_ioctl.sh
index bd28817afced..c4699fd46bb6 100755
--- a/tools/perf/trace/beauty/kvm_ioctl.sh
+++ b/tools/perf/trace/beauty/kvm_ioctl.sh
@@ -1,10 +1,10 @@
1#!/bin/sh 1#!/bin/sh
2 2
3kvm_header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/linux/
4 4
5printf "static const char *kvm_ioctl_cmds[] = {\n" 5printf "static const char *kvm_ioctl_cmds[] = {\n"
6regex='^#[[:space:]]*define[[:space:]]+KVM_(\w+)[[:space:]]+_IO[RW]*\([[:space:]]*KVMIO[[:space:]]*,[[:space:]]*(0x[[:xdigit:]]+).*' 6regex='^#[[:space:]]*define[[:space:]]+KVM_(\w+)[[:space:]]+_IO[RW]*\([[:space:]]*KVMIO[[:space:]]*,[[:space:]]*(0x[[:xdigit:]]+).*'
7egrep $regex ${kvm_header_dir}/kvm.h | \ 7egrep $regex ${header_dir}/kvm.h | \
8 sed -r "s/$regex/\2 \1/g" | \ 8 sed -r "s/$regex/\2 \1/g" | \
9 egrep -v " ((ARM|PPC|S390)_|[GS]ET_(DEBUGREGS|PIT2|XSAVE|TSC_KHZ)|CREATE_SPAPR_TCE_64)" | \ 9 egrep -v " ((ARM|PPC|S390)_|[GS]ET_(DEBUGREGS|PIT2|XSAVE|TSC_KHZ)|CREATE_SPAPR_TCE_64)" | \
10 sort | xargs printf "\t[%s] = \"%s\",\n" 10 sort | xargs printf "\t[%s] = \"%s\",\n"
diff --git a/tools/perf/trace/beauty/madvise_behavior.sh b/tools/perf/trace/beauty/madvise_behavior.sh
index 60ef8640ee70..431639eb4d29 100755
--- a/tools/perf/trace/beauty/madvise_behavior.sh
+++ b/tools/perf/trace/beauty/madvise_behavior.sh
@@ -1,6 +1,6 @@
1#!/bin/sh 1#!/bin/sh
2 2
3header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/asm-generic/
4 4
5printf "static const char *madvise_advices[] = {\n" 5printf "static const char *madvise_advices[] = {\n"
6regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MADV_([[:alnum:]_]+)[[:space:]]+([[:digit:]]+)[[:space:]]*.*' 6regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MADV_([[:alnum:]_]+)[[:space:]]+([[:digit:]]+)[[:space:]]*.*'
diff --git a/tools/perf/trace/beauty/perf_ioctl.sh b/tools/perf/trace/beauty/perf_ioctl.sh
index faea4237c793..6492c74df928 100755
--- a/tools/perf/trace/beauty/perf_ioctl.sh
+++ b/tools/perf/trace/beauty/perf_ioctl.sh
@@ -1,6 +1,6 @@
1#!/bin/sh 1#!/bin/sh
2 2
3header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/linux/
4 4
5printf "static const char *perf_ioctl_cmds[] = {\n" 5printf "static const char *perf_ioctl_cmds[] = {\n"
6regex='^#[[:space:]]*define[[:space:]]+PERF_EVENT_IOC_(\w+)[[:space:]]+_IO[RW]*[[:space:]]*\([[:space:]]*.\$.[[:space:]]*,[[:space:]]*([[:digit:]]+).*' 6regex='^#[[:space:]]*define[[:space:]]+PERF_EVENT_IOC_(\w+)[[:space:]]+_IO[RW]*[[:space:]]*\([[:space:]]*.\$.[[:space:]]*,[[:space:]]*([[:digit:]]+).*'
diff --git a/tools/perf/trace/beauty/pkey_alloc_access_rights.sh b/tools/perf/trace/beauty/pkey_alloc_access_rights.sh
index 62e51a02b839..e0a51aeb20b2 100755
--- a/tools/perf/trace/beauty/pkey_alloc_access_rights.sh
+++ b/tools/perf/trace/beauty/pkey_alloc_access_rights.sh
@@ -1,6 +1,6 @@
1#!/bin/sh 1#!/bin/sh
2 2
3header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/asm-generic/
4 4
5printf "static const char *pkey_alloc_access_rights[] = {\n" 5printf "static const char *pkey_alloc_access_rights[] = {\n"
6regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+PKEY_([[:alnum:]_]+)[[:space:]]+(0x[[:xdigit:]]+)[[:space:]]*' 6regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+PKEY_([[:alnum:]_]+)[[:space:]]+(0x[[:xdigit:]]+)[[:space:]]*'
diff --git a/tools/perf/trace/beauty/sndrv_ctl_ioctl.sh b/tools/perf/trace/beauty/sndrv_ctl_ioctl.sh
index aad5ab130539..eb511bb5fbd3 100755
--- a/tools/perf/trace/beauty/sndrv_ctl_ioctl.sh
+++ b/tools/perf/trace/beauty/sndrv_ctl_ioctl.sh
@@ -1,8 +1,8 @@
1#!/bin/sh 1#!/bin/sh
2 2
3sound_header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/sound/
4 4
5printf "static const char *sndrv_ctl_ioctl_cmds[] = {\n" 5printf "static const char *sndrv_ctl_ioctl_cmds[] = {\n"
6grep "^#define[\t ]\+SNDRV_CTL_IOCTL_" $sound_header_dir/asound.h | \ 6grep "^#define[\t ]\+SNDRV_CTL_IOCTL_" $header_dir/asound.h | \
7 sed -r 's/^#define +SNDRV_CTL_IOCTL_([A-Z0-9_]+)[\t ]+_IO[RW]*\( *.U., *(0x[[:xdigit:]]+),?.*/\t[\2] = \"\1\",/g' 7 sed -r 's/^#define +SNDRV_CTL_IOCTL_([A-Z0-9_]+)[\t ]+_IO[RW]*\( *.U., *(0x[[:xdigit:]]+),?.*/\t[\2] = \"\1\",/g'
8printf "};\n" 8printf "};\n"
diff --git a/tools/perf/trace/beauty/sndrv_pcm_ioctl.sh b/tools/perf/trace/beauty/sndrv_pcm_ioctl.sh
index b7e9ef6b2f55..6818392968b2 100755
--- a/tools/perf/trace/beauty/sndrv_pcm_ioctl.sh
+++ b/tools/perf/trace/beauty/sndrv_pcm_ioctl.sh
@@ -1,8 +1,8 @@
1#!/bin/sh 1#!/bin/sh
2 2
3sound_header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/sound/
4 4
5printf "static const char *sndrv_pcm_ioctl_cmds[] = {\n" 5printf "static const char *sndrv_pcm_ioctl_cmds[] = {\n"
6grep "^#define[\t ]\+SNDRV_PCM_IOCTL_" $sound_header_dir/asound.h | \ 6grep "^#define[\t ]\+SNDRV_PCM_IOCTL_" $header_dir/asound.h | \
7 sed -r 's/^#define +SNDRV_PCM_IOCTL_([A-Z0-9_]+)[\t ]+_IO[RW]*\( *.A., *(0x[[:xdigit:]]+),?.*/\t[\2] = \"\1\",/g' 7 sed -r 's/^#define +SNDRV_PCM_IOCTL_([A-Z0-9_]+)[\t ]+_IO[RW]*\( *.A., *(0x[[:xdigit:]]+),?.*/\t[\2] = \"\1\",/g'
8printf "};\n" 8printf "};\n"
diff --git a/tools/perf/trace/beauty/socket.c b/tools/perf/trace/beauty/socket.c
new file mode 100644
index 000000000000..65227269384b
--- /dev/null
+++ b/tools/perf/trace/beauty/socket.c
@@ -0,0 +1,28 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * trace/beauty/socket.c
4 *
5 * Copyright (C) 2018, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com>
6 */
7
8#include "trace/beauty/beauty.h"
9#include <sys/types.h>
10#include <sys/socket.h>
11
12static size_t socket__scnprintf_ipproto(int protocol, char *bf, size_t size)
13{
14#include "trace/beauty/generated/socket_ipproto_array.c"
15 static DEFINE_STRARRAY(socket_ipproto);
16
17 return strarray__scnprintf(&strarray__socket_ipproto, bf, size, "%d", protocol);
18}
19
20size_t syscall_arg__scnprintf_socket_protocol(char *bf, size_t size, struct syscall_arg *arg)
21{
22 int domain = syscall_arg__val(arg, 0);
23
24 if (domain == AF_INET || domain == AF_INET6)
25 return socket__scnprintf_ipproto(arg->val, bf, size);
26
27 return syscall_arg__scnprintf_int(bf, size, arg);
28}
diff --git a/tools/perf/trace/beauty/socket_ipproto.sh b/tools/perf/trace/beauty/socket_ipproto.sh
new file mode 100755
index 000000000000..a3cc24633bec
--- /dev/null
+++ b/tools/perf/trace/beauty/socket_ipproto.sh
@@ -0,0 +1,11 @@
1#!/bin/sh
2
3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/linux/
4
5printf "static const char *socket_ipproto[] = {\n"
6regex='^[[:space:]]+IPPROTO_(\w+)[[:space:]]+=[[:space:]]+([[:digit:]]+),.*'
7
8egrep $regex ${header_dir}/in.h | \
9 sed -r "s/$regex/\2 \1/g" | \
10 sort | xargs printf "\t[%s] = \"%s\",\n"
11printf "};\n"
diff --git a/tools/perf/trace/beauty/vhost_virtio_ioctl.sh b/tools/perf/trace/beauty/vhost_virtio_ioctl.sh
index 76f1de697787..0f6a5197d0be 100755
--- a/tools/perf/trace/beauty/vhost_virtio_ioctl.sh
+++ b/tools/perf/trace/beauty/vhost_virtio_ioctl.sh
@@ -1,17 +1,17 @@
1#!/bin/sh 1#!/bin/sh
2 2
3vhost_virtio_header_dir=$1 3[ $# -eq 1 ] && header_dir=$1 || header_dir=tools/include/uapi/linux/
4 4
5printf "static const char *vhost_virtio_ioctl_cmds[] = {\n" 5printf "static const char *vhost_virtio_ioctl_cmds[] = {\n"
6regex='^#[[:space:]]*define[[:space:]]+VHOST_(\w+)[[:space:]]+_IOW?\([[:space:]]*VHOST_VIRTIO[[:space:]]*,[[:space:]]*(0x[[:xdigit:]]+).*' 6regex='^#[[:space:]]*define[[:space:]]+VHOST_(\w+)[[:space:]]+_IOW?\([[:space:]]*VHOST_VIRTIO[[:space:]]*,[[:space:]]*(0x[[:xdigit:]]+).*'
7egrep $regex ${vhost_virtio_header_dir}/vhost.h | \ 7egrep $regex ${header_dir}/vhost.h | \
8 sed -r "s/$regex/\2 \1/g" | \ 8 sed -r "s/$regex/\2 \1/g" | \
9 sort | xargs printf "\t[%s] = \"%s\",\n" 9 sort | xargs printf "\t[%s] = \"%s\",\n"
10printf "};\n" 10printf "};\n"
11 11
12printf "static const char *vhost_virtio_ioctl_read_cmds[] = {\n" 12printf "static const char *vhost_virtio_ioctl_read_cmds[] = {\n"
13regex='^#[[:space:]]*define[[:space:]]+VHOST_(\w+)[[:space:]]+_IOW?R\([[:space:]]*VHOST_VIRTIO[[:space:]]*,[[:space:]]*(0x[[:xdigit:]]+).*' 13regex='^#[[:space:]]*define[[:space:]]+VHOST_(\w+)[[:space:]]+_IOW?R\([[:space:]]*VHOST_VIRTIO[[:space:]]*,[[:space:]]*(0x[[:xdigit:]]+).*'
14egrep $regex ${vhost_virtio_header_dir}/vhost.h | \ 14egrep $regex ${header_dir}/vhost.h | \
15 sed -r "s/$regex/\2 \1/g" | \ 15 sed -r "s/$regex/\2 \1/g" | \
16 sort | xargs printf "\t[%s] = \"%s\",\n" 16 sort | xargs printf "\t[%s] = \"%s\",\n"
17printf "};\n" 17printf "};\n"
diff --git a/tools/perf/ui/browsers/annotate.c b/tools/perf/ui/browsers/annotate.c
index 3b4f1c10ff57..1d00e5ec7906 100644
--- a/tools/perf/ui/browsers/annotate.c
+++ b/tools/perf/ui/browsers/annotate.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/string.h> 16#include <linux/string.h>
17#include <sys/ttydefaults.h> 17#include <sys/ttydefaults.h>
18#include <asm/bug.h>
18 19
19struct disasm_line_samples { 20struct disasm_line_samples {
20 double percent; 21 double percent;
@@ -115,7 +116,7 @@ static void annotate_browser__write(struct ui_browser *browser, void *entry, int
115 if (!browser->navkeypressed) 116 if (!browser->navkeypressed)
116 ops.width += 1; 117 ops.width += 1;
117 118
118 annotation_line__write(al, notes, &ops); 119 annotation_line__write(al, notes, &ops, ab->opts);
119 120
120 if (ops.current_entry) 121 if (ops.current_entry)
121 ab->selection = al; 122 ab->selection = al;
@@ -227,10 +228,10 @@ static int disasm__cmp(struct annotation_line *a, struct annotation_line *b)
227{ 228{
228 int i; 229 int i;
229 230
230 for (i = 0; i < a->samples_nr; i++) { 231 for (i = 0; i < a->data_nr; i++) {
231 if (a->samples[i].percent == b->samples[i].percent) 232 if (a->data[i].percent == b->data[i].percent)
232 continue; 233 continue;
233 return a->samples[i].percent < b->samples[i].percent; 234 return a->data[i].percent < b->data[i].percent;
234 } 235 }
235 return 0; 236 return 0;
236} 237}
@@ -314,11 +315,14 @@ static void annotate_browser__calc_percent(struct annotate_browser *browser,
314 continue; 315 continue;
315 } 316 }
316 317
317 for (i = 0; i < pos->al.samples_nr; i++) { 318 for (i = 0; i < pos->al.data_nr; i++) {
318 struct annotation_data *sample = &pos->al.samples[i]; 319 double percent;
319 320
320 if (max_percent < sample->percent) 321 percent = annotation_data__percent(&pos->al.data[i],
321 max_percent = sample->percent; 322 browser->opts->percent_type);
323
324 if (max_percent < percent)
325 max_percent = percent;
322 } 326 }
323 327
324 if (max_percent < 0.01 && pos->al.ipc == 0) { 328 if (max_percent < 0.01 && pos->al.ipc == 0) {
@@ -380,9 +384,10 @@ static void ui_browser__init_asm_mode(struct ui_browser *browser)
380#define SYM_TITLE_MAX_SIZE (PATH_MAX + 64) 384#define SYM_TITLE_MAX_SIZE (PATH_MAX + 64)
381 385
382static int sym_title(struct symbol *sym, struct map *map, char *title, 386static int sym_title(struct symbol *sym, struct map *map, char *title,
383 size_t sz) 387 size_t sz, int percent_type)
384{ 388{
385 return snprintf(title, sz, "%s %s", sym->name, map->dso->long_name); 389 return snprintf(title, sz, "%s %s [Percent: %s]", sym->name, map->dso->long_name,
390 percent_type_str(percent_type));
386} 391}
387 392
388/* 393/*
@@ -420,7 +425,7 @@ static bool annotate_browser__callq(struct annotate_browser *browser,
420 425
421 pthread_mutex_unlock(&notes->lock); 426 pthread_mutex_unlock(&notes->lock);
422 symbol__tui_annotate(dl->ops.target.sym, ms->map, evsel, hbt, browser->opts); 427 symbol__tui_annotate(dl->ops.target.sym, ms->map, evsel, hbt, browser->opts);
423 sym_title(ms->sym, ms->map, title, sizeof(title)); 428 sym_title(ms->sym, ms->map, title, sizeof(title), browser->opts->percent_type);
424 ui_browser__show_title(&browser->b, title); 429 ui_browser__show_title(&browser->b, title);
425 return true; 430 return true;
426} 431}
@@ -595,6 +600,7 @@ bool annotate_browser__continue_search_reverse(struct annotate_browser *browser,
595 600
596static int annotate_browser__show(struct ui_browser *browser, char *title, const char *help) 601static int annotate_browser__show(struct ui_browser *browser, char *title, const char *help)
597{ 602{
603 struct annotate_browser *ab = container_of(browser, struct annotate_browser, b);
598 struct map_symbol *ms = browser->priv; 604 struct map_symbol *ms = browser->priv;
599 struct symbol *sym = ms->sym; 605 struct symbol *sym = ms->sym;
600 char symbol_dso[SYM_TITLE_MAX_SIZE]; 606 char symbol_dso[SYM_TITLE_MAX_SIZE];
@@ -602,7 +608,7 @@ static int annotate_browser__show(struct ui_browser *browser, char *title, const
602 if (ui_browser__show(browser, title, help) < 0) 608 if (ui_browser__show(browser, title, help) < 0)
603 return -1; 609 return -1;
604 610
605 sym_title(sym, ms->map, symbol_dso, sizeof(symbol_dso)); 611 sym_title(sym, ms->map, symbol_dso, sizeof(symbol_dso), ab->opts->percent_type);
606 612
607 ui_browser__gotorc_title(browser, 0, 0); 613 ui_browser__gotorc_title(browser, 0, 0);
608 ui_browser__set_color(browser, HE_COLORSET_ROOT); 614 ui_browser__set_color(browser, HE_COLORSET_ROOT);
@@ -610,6 +616,39 @@ static int annotate_browser__show(struct ui_browser *browser, char *title, const
610 return 0; 616 return 0;
611} 617}
612 618
619static void
620switch_percent_type(struct annotation_options *opts, bool base)
621{
622 switch (opts->percent_type) {
623 case PERCENT_HITS_LOCAL:
624 if (base)
625 opts->percent_type = PERCENT_PERIOD_LOCAL;
626 else
627 opts->percent_type = PERCENT_HITS_GLOBAL;
628 break;
629 case PERCENT_HITS_GLOBAL:
630 if (base)
631 opts->percent_type = PERCENT_PERIOD_GLOBAL;
632 else
633 opts->percent_type = PERCENT_HITS_LOCAL;
634 break;
635 case PERCENT_PERIOD_LOCAL:
636 if (base)
637 opts->percent_type = PERCENT_HITS_LOCAL;
638 else
639 opts->percent_type = PERCENT_PERIOD_GLOBAL;
640 break;
641 case PERCENT_PERIOD_GLOBAL:
642 if (base)
643 opts->percent_type = PERCENT_HITS_GLOBAL;
644 else
645 opts->percent_type = PERCENT_PERIOD_LOCAL;
646 break;
647 default:
648 WARN_ON(1);
649 }
650}
651
613static int annotate_browser__run(struct annotate_browser *browser, 652static int annotate_browser__run(struct annotate_browser *browser,
614 struct perf_evsel *evsel, 653 struct perf_evsel *evsel,
615 struct hist_browser_timer *hbt) 654 struct hist_browser_timer *hbt)
@@ -624,8 +663,7 @@ static int annotate_browser__run(struct annotate_browser *browser,
624 char title[256]; 663 char title[256];
625 int key; 664 int key;
626 665
627 annotation__scnprintf_samples_period(notes, title, sizeof(title), evsel); 666 hists__scnprintf_title(hists, title, sizeof(title));
628
629 if (annotate_browser__show(&browser->b, title, help) < 0) 667 if (annotate_browser__show(&browser->b, title, help) < 0)
630 return -1; 668 return -1;
631 669
@@ -701,6 +739,8 @@ static int annotate_browser__run(struct annotate_browser *browser,
701 "k Toggle line numbers\n" 739 "k Toggle line numbers\n"
702 "P Print to [symbol_name].annotation file.\n" 740 "P Print to [symbol_name].annotation file.\n"
703 "r Run available scripts\n" 741 "r Run available scripts\n"
742 "p Toggle percent type [local/global]\n"
743 "b Toggle percent base [period/hits]\n"
704 "? Search string backwards\n"); 744 "? Search string backwards\n");
705 continue; 745 continue;
706 case 'r': 746 case 'r':
@@ -781,7 +821,7 @@ show_sup_ins:
781 continue; 821 continue;
782 } 822 }
783 case 'P': 823 case 'P':
784 map_symbol__annotation_dump(ms, evsel); 824 map_symbol__annotation_dump(ms, evsel, browser->opts);
785 continue; 825 continue;
786 case 't': 826 case 't':
787 if (notes->options->show_total_period) { 827 if (notes->options->show_total_period) {
@@ -800,6 +840,12 @@ show_sup_ins:
800 notes->options->show_minmax_cycle = true; 840 notes->options->show_minmax_cycle = true;
801 annotation__update_column_widths(notes); 841 annotation__update_column_widths(notes);
802 continue; 842 continue;
843 case 'p':
844 case 'b':
845 switch_percent_type(browser->opts, key == 'b');
846 hists__scnprintf_title(hists, title, sizeof(title));
847 annotate_browser__show(&browser->b, title, help);
848 continue;
803 case K_LEFT: 849 case K_LEFT:
804 case K_ESC: 850 case K_ESC:
805 case 'q': 851 case 'q':
diff --git a/tools/perf/ui/stdio/hist.c b/tools/perf/ui/stdio/hist.c
index 69b7a28f7a1c..74c4ae1f0a05 100644
--- a/tools/perf/ui/stdio/hist.c
+++ b/tools/perf/ui/stdio/hist.c
@@ -529,7 +529,7 @@ out:
529 529
530static int hist_entry__fprintf(struct hist_entry *he, size_t size, 530static int hist_entry__fprintf(struct hist_entry *he, size_t size,
531 char *bf, size_t bfsz, FILE *fp, 531 char *bf, size_t bfsz, FILE *fp,
532 bool use_callchain) 532 bool ignore_callchains)
533{ 533{
534 int ret; 534 int ret;
535 int callchain_ret = 0; 535 int callchain_ret = 0;
@@ -550,7 +550,7 @@ static int hist_entry__fprintf(struct hist_entry *he, size_t size,
550 550
551 ret = fprintf(fp, "%s\n", bf); 551 ret = fprintf(fp, "%s\n", bf);
552 552
553 if (hist_entry__has_callchains(he) && use_callchain) 553 if (hist_entry__has_callchains(he) && !ignore_callchains)
554 callchain_ret = hist_entry_callchain__fprintf(he, total_period, 554 callchain_ret = hist_entry_callchain__fprintf(he, total_period,
555 0, fp); 555 0, fp);
556 556
@@ -755,7 +755,7 @@ int hists__fprintf_headers(struct hists *hists, FILE *fp)
755 755
756size_t hists__fprintf(struct hists *hists, bool show_header, int max_rows, 756size_t hists__fprintf(struct hists *hists, bool show_header, int max_rows,
757 int max_cols, float min_pcnt, FILE *fp, 757 int max_cols, float min_pcnt, FILE *fp,
758 bool use_callchain) 758 bool ignore_callchains)
759{ 759{
760 struct rb_node *nd; 760 struct rb_node *nd;
761 size_t ret = 0; 761 size_t ret = 0;
@@ -799,7 +799,7 @@ size_t hists__fprintf(struct hists *hists, bool show_header, int max_rows,
799 if (percent < min_pcnt) 799 if (percent < min_pcnt)
800 continue; 800 continue;
801 801
802 ret += hist_entry__fprintf(h, max_cols, line, linesz, fp, use_callchain); 802 ret += hist_entry__fprintf(h, max_cols, line, linesz, fp, ignore_callchains);
803 803
804 if (max_rows && ++nr_rows >= max_rows) 804 if (max_rows && ++nr_rows >= max_rows)
805 break; 805 break;
diff --git a/tools/perf/util/Build b/tools/perf/util/Build
index b604ef334dc9..7efe15b9618d 100644
--- a/tools/perf/util/Build
+++ b/tools/perf/util/Build
@@ -87,6 +87,7 @@ libperf-$(CONFIG_AUXTRACE) += intel-pt.o
87libperf-$(CONFIG_AUXTRACE) += intel-bts.o 87libperf-$(CONFIG_AUXTRACE) += intel-bts.o
88libperf-$(CONFIG_AUXTRACE) += arm-spe.o 88libperf-$(CONFIG_AUXTRACE) += arm-spe.o
89libperf-$(CONFIG_AUXTRACE) += arm-spe-pkt-decoder.o 89libperf-$(CONFIG_AUXTRACE) += arm-spe-pkt-decoder.o
90libperf-$(CONFIG_AUXTRACE) += s390-cpumsf.o
90 91
91ifdef CONFIG_LIBOPENCSD 92ifdef CONFIG_LIBOPENCSD
92libperf-$(CONFIG_AUXTRACE) += cs-etm.o 93libperf-$(CONFIG_AUXTRACE) += cs-etm.o
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index f91775b4bc3c..20061cf42288 100644
--- a/tools/perf/util/annotate.c
+++ b/tools/perf/util/annotate.c
@@ -49,6 +49,7 @@ struct annotation_options annotation__default_options = {
49 .jump_arrows = true, 49 .jump_arrows = true,
50 .annotate_src = true, 50 .annotate_src = true,
51 .offset_level = ANNOTATION__OFFSET_JUMP_TARGETS, 51 .offset_level = ANNOTATION__OFFSET_JUMP_TARGETS,
52 .percent_type = PERCENT_PERIOD_LOCAL,
52}; 53};
53 54
54static regex_t file_lineno; 55static regex_t file_lineno;
@@ -1108,7 +1109,7 @@ annotation_line__new(struct annotate_args *args, size_t privsize)
1108 if (perf_evsel__is_group_event(evsel)) 1109 if (perf_evsel__is_group_event(evsel))
1109 nr = evsel->nr_members; 1110 nr = evsel->nr_members;
1110 1111
1111 size += sizeof(al->samples[0]) * nr; 1112 size += sizeof(al->data[0]) * nr;
1112 1113
1113 al = zalloc(size); 1114 al = zalloc(size);
1114 if (al) { 1115 if (al) {
@@ -1117,7 +1118,7 @@ annotation_line__new(struct annotate_args *args, size_t privsize)
1117 al->offset = args->offset; 1118 al->offset = args->offset;
1118 al->line = strdup(args->line); 1119 al->line = strdup(args->line);
1119 al->line_nr = args->line_nr; 1120 al->line_nr = args->line_nr;
1120 al->samples_nr = nr; 1121 al->data_nr = nr;
1121 } 1122 }
1122 1123
1123 return al; 1124 return al;
@@ -1297,7 +1298,8 @@ static int disasm_line__print(struct disasm_line *dl, u64 start, int addr_fmt_wi
1297static int 1298static int
1298annotation_line__print(struct annotation_line *al, struct symbol *sym, u64 start, 1299annotation_line__print(struct annotation_line *al, struct symbol *sym, u64 start,
1299 struct perf_evsel *evsel, u64 len, int min_pcnt, int printed, 1300 struct perf_evsel *evsel, u64 len, int min_pcnt, int printed,
1300 int max_lines, struct annotation_line *queue, int addr_fmt_width) 1301 int max_lines, struct annotation_line *queue, int addr_fmt_width,
1302 int percent_type)
1301{ 1303{
1302 struct disasm_line *dl = container_of(al, struct disasm_line, al); 1304 struct disasm_line *dl = container_of(al, struct disasm_line, al);
1303 static const char *prev_line; 1305 static const char *prev_line;
@@ -1309,15 +1311,18 @@ annotation_line__print(struct annotation_line *al, struct symbol *sym, u64 start
1309 const char *color; 1311 const char *color;
1310 struct annotation *notes = symbol__annotation(sym); 1312 struct annotation *notes = symbol__annotation(sym);
1311 1313
1312 for (i = 0; i < al->samples_nr; i++) { 1314 for (i = 0; i < al->data_nr; i++) {
1313 struct annotation_data *sample = &al->samples[i]; 1315 double percent;
1314 1316
1315 if (sample->percent > max_percent) 1317 percent = annotation_data__percent(&al->data[i],
1316 max_percent = sample->percent; 1318 percent_type);
1319
1320 if (percent > max_percent)
1321 max_percent = percent;
1317 } 1322 }
1318 1323
1319 if (al->samples_nr > nr_percent) 1324 if (al->data_nr > nr_percent)
1320 nr_percent = al->samples_nr; 1325 nr_percent = al->data_nr;
1321 1326
1322 if (max_percent < min_pcnt) 1327 if (max_percent < min_pcnt)
1323 return -1; 1328 return -1;
@@ -1330,7 +1335,8 @@ annotation_line__print(struct annotation_line *al, struct symbol *sym, u64 start
1330 if (queue == al) 1335 if (queue == al)
1331 break; 1336 break;
1332 annotation_line__print(queue, sym, start, evsel, len, 1337 annotation_line__print(queue, sym, start, evsel, len,
1333 0, 0, 1, NULL, addr_fmt_width); 1338 0, 0, 1, NULL, addr_fmt_width,
1339 percent_type);
1334 } 1340 }
1335 } 1341 }
1336 1342
@@ -1351,18 +1357,20 @@ annotation_line__print(struct annotation_line *al, struct symbol *sym, u64 start
1351 } 1357 }
1352 1358
1353 for (i = 0; i < nr_percent; i++) { 1359 for (i = 0; i < nr_percent; i++) {
1354 struct annotation_data *sample = &al->samples[i]; 1360 struct annotation_data *data = &al->data[i];
1361 double percent;
1355 1362
1356 color = get_percent_color(sample->percent); 1363 percent = annotation_data__percent(data, percent_type);
1364 color = get_percent_color(percent);
1357 1365
1358 if (symbol_conf.show_total_period) 1366 if (symbol_conf.show_total_period)
1359 color_fprintf(stdout, color, " %11" PRIu64, 1367 color_fprintf(stdout, color, " %11" PRIu64,
1360 sample->he.period); 1368 data->he.period);
1361 else if (symbol_conf.show_nr_samples) 1369 else if (symbol_conf.show_nr_samples)
1362 color_fprintf(stdout, color, " %7" PRIu64, 1370 color_fprintf(stdout, color, " %7" PRIu64,
1363 sample->he.nr_samples); 1371 data->he.nr_samples);
1364 else 1372 else
1365 color_fprintf(stdout, color, " %7.2f", sample->percent); 1373 color_fprintf(stdout, color, " %7.2f", percent);
1366 } 1374 }
1367 1375
1368 printf(" : "); 1376 printf(" : ");
@@ -1621,6 +1629,7 @@ static int symbol__disassemble(struct symbol *sym, struct annotate_args *args)
1621 char symfs_filename[PATH_MAX]; 1629 char symfs_filename[PATH_MAX];
1622 struct kcore_extract kce; 1630 struct kcore_extract kce;
1623 bool delete_extract = false; 1631 bool delete_extract = false;
1632 bool decomp = false;
1624 int stdout_fd[2]; 1633 int stdout_fd[2];
1625 int lineno = 0; 1634 int lineno = 0;
1626 int nline; 1635 int nline;
@@ -1654,6 +1663,7 @@ static int symbol__disassemble(struct symbol *sym, struct annotate_args *args)
1654 tmp, sizeof(tmp)) < 0) 1663 tmp, sizeof(tmp)) < 0)
1655 goto out; 1664 goto out;
1656 1665
1666 decomp = true;
1657 strcpy(symfs_filename, tmp); 1667 strcpy(symfs_filename, tmp);
1658 } 1668 }
1659 1669
@@ -1740,7 +1750,7 @@ out_free_command:
1740out_remove_tmp: 1750out_remove_tmp:
1741 close(stdout_fd[0]); 1751 close(stdout_fd[0]);
1742 1752
1743 if (dso__needs_decompress(dso)) 1753 if (decomp)
1744 unlink(symfs_filename); 1754 unlink(symfs_filename);
1745 1755
1746 if (delete_extract) 1756 if (delete_extract)
@@ -1753,34 +1763,45 @@ out_close_stdout:
1753 goto out_free_command; 1763 goto out_free_command;
1754} 1764}
1755 1765
1756static void calc_percent(struct sym_hist *hist, 1766static void calc_percent(struct sym_hist *sym_hist,
1757 struct annotation_data *sample, 1767 struct hists *hists,
1768 struct annotation_data *data,
1758 s64 offset, s64 end) 1769 s64 offset, s64 end)
1759{ 1770{
1760 unsigned int hits = 0; 1771 unsigned int hits = 0;
1761 u64 period = 0; 1772 u64 period = 0;
1762 1773
1763 while (offset < end) { 1774 while (offset < end) {
1764 hits += hist->addr[offset].nr_samples; 1775 hits += sym_hist->addr[offset].nr_samples;
1765 period += hist->addr[offset].period; 1776 period += sym_hist->addr[offset].period;
1766 ++offset; 1777 ++offset;
1767 } 1778 }
1768 1779
1769 if (hist->nr_samples) { 1780 if (sym_hist->nr_samples) {
1770 sample->he.period = period; 1781 data->he.period = period;
1771 sample->he.nr_samples = hits; 1782 data->he.nr_samples = hits;
1772 sample->percent = 100.0 * hits / hist->nr_samples; 1783 data->percent[PERCENT_HITS_LOCAL] = 100.0 * hits / sym_hist->nr_samples;
1773 } 1784 }
1785
1786 if (hists->stats.nr_non_filtered_samples)
1787 data->percent[PERCENT_HITS_GLOBAL] = 100.0 * hits / hists->stats.nr_non_filtered_samples;
1788
1789 if (sym_hist->period)
1790 data->percent[PERCENT_PERIOD_LOCAL] = 100.0 * period / sym_hist->period;
1791
1792 if (hists->stats.total_period)
1793 data->percent[PERCENT_PERIOD_GLOBAL] = 100.0 * period / hists->stats.total_period;
1774} 1794}
1775 1795
1776static void annotation__calc_percent(struct annotation *notes, 1796static void annotation__calc_percent(struct annotation *notes,
1777 struct perf_evsel *evsel, s64 len) 1797 struct perf_evsel *leader, s64 len)
1778{ 1798{
1779 struct annotation_line *al, *next; 1799 struct annotation_line *al, *next;
1800 struct perf_evsel *evsel;
1780 1801
1781 list_for_each_entry(al, &notes->src->source, node) { 1802 list_for_each_entry(al, &notes->src->source, node) {
1782 s64 end; 1803 s64 end;
1783 int i; 1804 int i = 0;
1784 1805
1785 if (al->offset == -1) 1806 if (al->offset == -1)
1786 continue; 1807 continue;
@@ -1788,14 +1809,17 @@ static void annotation__calc_percent(struct annotation *notes,
1788 next = annotation_line__next(al, &notes->src->source); 1809 next = annotation_line__next(al, &notes->src->source);
1789 end = next ? next->offset : len; 1810 end = next ? next->offset : len;
1790 1811
1791 for (i = 0; i < al->samples_nr; i++) { 1812 for_each_group_evsel(evsel, leader) {
1792 struct annotation_data *sample; 1813 struct hists *hists = evsel__hists(evsel);
1793 struct sym_hist *hist; 1814 struct annotation_data *data;
1815 struct sym_hist *sym_hist;
1816
1817 BUG_ON(i >= al->data_nr);
1794 1818
1795 hist = annotation__histogram(notes, evsel->idx + i); 1819 sym_hist = annotation__histogram(notes, evsel->idx);
1796 sample = &al->samples[i]; 1820 data = &al->data[i++];
1797 1821
1798 calc_percent(hist, sample, al->offset, end); 1822 calc_percent(sym_hist, hists, data, al->offset, end);
1799 } 1823 }
1800 } 1824 }
1801} 1825}
@@ -1846,7 +1870,8 @@ int symbol__annotate(struct symbol *sym, struct map *map,
1846 return symbol__disassemble(sym, &args); 1870 return symbol__disassemble(sym, &args);
1847} 1871}
1848 1872
1849static void insert_source_line(struct rb_root *root, struct annotation_line *al) 1873static void insert_source_line(struct rb_root *root, struct annotation_line *al,
1874 struct annotation_options *opts)
1850{ 1875{
1851 struct annotation_line *iter; 1876 struct annotation_line *iter;
1852 struct rb_node **p = &root->rb_node; 1877 struct rb_node **p = &root->rb_node;
@@ -1859,8 +1884,10 @@ static void insert_source_line(struct rb_root *root, struct annotation_line *al)
1859 1884
1860 ret = strcmp(iter->path, al->path); 1885 ret = strcmp(iter->path, al->path);
1861 if (ret == 0) { 1886 if (ret == 0) {
1862 for (i = 0; i < al->samples_nr; i++) 1887 for (i = 0; i < al->data_nr; i++) {
1863 iter->samples[i].percent_sum += al->samples[i].percent; 1888 iter->data[i].percent_sum += annotation_data__percent(&al->data[i],
1889 opts->percent_type);
1890 }
1864 return; 1891 return;
1865 } 1892 }
1866 1893
@@ -1870,8 +1897,10 @@ static void insert_source_line(struct rb_root *root, struct annotation_line *al)
1870 p = &(*p)->rb_right; 1897 p = &(*p)->rb_right;
1871 } 1898 }
1872 1899
1873 for (i = 0; i < al->samples_nr; i++) 1900 for (i = 0; i < al->data_nr; i++) {
1874 al->samples[i].percent_sum = al->samples[i].percent; 1901 al->data[i].percent_sum = annotation_data__percent(&al->data[i],
1902 opts->percent_type);
1903 }
1875 1904
1876 rb_link_node(&al->rb_node, parent, p); 1905 rb_link_node(&al->rb_node, parent, p);
1877 rb_insert_color(&al->rb_node, root); 1906 rb_insert_color(&al->rb_node, root);
@@ -1881,10 +1910,10 @@ static int cmp_source_line(struct annotation_line *a, struct annotation_line *b)
1881{ 1910{
1882 int i; 1911 int i;
1883 1912
1884 for (i = 0; i < a->samples_nr; i++) { 1913 for (i = 0; i < a->data_nr; i++) {
1885 if (a->samples[i].percent_sum == b->samples[i].percent_sum) 1914 if (a->data[i].percent_sum == b->data[i].percent_sum)
1886 continue; 1915 continue;
1887 return a->samples[i].percent_sum > b->samples[i].percent_sum; 1916 return a->data[i].percent_sum > b->data[i].percent_sum;
1888 } 1917 }
1889 1918
1890 return 0; 1919 return 0;
@@ -1949,8 +1978,8 @@ static void print_summary(struct rb_root *root, const char *filename)
1949 int i; 1978 int i;
1950 1979
1951 al = rb_entry(node, struct annotation_line, rb_node); 1980 al = rb_entry(node, struct annotation_line, rb_node);
1952 for (i = 0; i < al->samples_nr; i++) { 1981 for (i = 0; i < al->data_nr; i++) {
1953 percent = al->samples[i].percent_sum; 1982 percent = al->data[i].percent_sum;
1954 color = get_percent_color(percent); 1983 color = get_percent_color(percent);
1955 color_fprintf(stdout, color, " %7.2f", percent); 1984 color_fprintf(stdout, color, " %7.2f", percent);
1956 1985
@@ -2029,10 +2058,12 @@ int symbol__annotate_printf(struct symbol *sym, struct map *map,
2029 evsel_name = buf; 2058 evsel_name = buf;
2030 } 2059 }
2031 2060
2032 graph_dotted_len = printf(" %-*.*s| Source code & Disassembly of %s for %s (%" PRIu64 " samples)\n", 2061 graph_dotted_len = printf(" %-*.*s| Source code & Disassembly of %s for %s (%" PRIu64 " samples, "
2062 "percent: %s)\n",
2033 width, width, symbol_conf.show_total_period ? "Period" : 2063 width, width, symbol_conf.show_total_period ? "Period" :
2034 symbol_conf.show_nr_samples ? "Samples" : "Percent", 2064 symbol_conf.show_nr_samples ? "Samples" : "Percent",
2035 d_filename, evsel_name, h->nr_samples); 2065 d_filename, evsel_name, h->nr_samples,
2066 percent_type_str(opts->percent_type));
2036 2067
2037 printf("%-*.*s----\n", 2068 printf("%-*.*s----\n",
2038 graph_dotted_len, graph_dotted_len, graph_dotted_line); 2069 graph_dotted_len, graph_dotted_len, graph_dotted_line);
@@ -2052,7 +2083,7 @@ int symbol__annotate_printf(struct symbol *sym, struct map *map,
2052 2083
2053 err = annotation_line__print(pos, sym, start, evsel, len, 2084 err = annotation_line__print(pos, sym, start, evsel, len,
2054 opts->min_pcnt, printed, opts->max_lines, 2085 opts->min_pcnt, printed, opts->max_lines,
2055 queue, addr_fmt_width); 2086 queue, addr_fmt_width, opts->percent_type);
2056 2087
2057 switch (err) { 2088 switch (err) {
2058 case 0: 2089 case 0:
@@ -2129,10 +2160,11 @@ static void FILE__write_graph(void *fp, int graph)
2129 fputs(s, fp); 2160 fputs(s, fp);
2130} 2161}
2131 2162
2132int symbol__annotate_fprintf2(struct symbol *sym, FILE *fp) 2163static int symbol__annotate_fprintf2(struct symbol *sym, FILE *fp,
2164 struct annotation_options *opts)
2133{ 2165{
2134 struct annotation *notes = symbol__annotation(sym); 2166 struct annotation *notes = symbol__annotation(sym);
2135 struct annotation_write_ops ops = { 2167 struct annotation_write_ops wops = {
2136 .first_line = true, 2168 .first_line = true,
2137 .obj = fp, 2169 .obj = fp,
2138 .set_color = FILE__set_color, 2170 .set_color = FILE__set_color,
@@ -2146,15 +2178,16 @@ int symbol__annotate_fprintf2(struct symbol *sym, FILE *fp)
2146 list_for_each_entry(al, &notes->src->source, node) { 2178 list_for_each_entry(al, &notes->src->source, node) {
2147 if (annotation_line__filter(al, notes)) 2179 if (annotation_line__filter(al, notes))
2148 continue; 2180 continue;
2149 annotation_line__write(al, notes, &ops); 2181 annotation_line__write(al, notes, &wops, opts);
2150 fputc('\n', fp); 2182 fputc('\n', fp);
2151 ops.first_line = false; 2183 wops.first_line = false;
2152 } 2184 }
2153 2185
2154 return 0; 2186 return 0;
2155} 2187}
2156 2188
2157int map_symbol__annotation_dump(struct map_symbol *ms, struct perf_evsel *evsel) 2189int map_symbol__annotation_dump(struct map_symbol *ms, struct perf_evsel *evsel,
2190 struct annotation_options *opts)
2158{ 2191{
2159 const char *ev_name = perf_evsel__name(evsel); 2192 const char *ev_name = perf_evsel__name(evsel);
2160 char buf[1024]; 2193 char buf[1024];
@@ -2176,7 +2209,7 @@ int map_symbol__annotation_dump(struct map_symbol *ms, struct perf_evsel *evsel)
2176 2209
2177 fprintf(fp, "%s() %s\nEvent: %s\n\n", 2210 fprintf(fp, "%s() %s\nEvent: %s\n\n",
2178 ms->sym->name, ms->map->dso->long_name, ev_name); 2211 ms->sym->name, ms->map->dso->long_name, ev_name);
2179 symbol__annotate_fprintf2(ms->sym, fp); 2212 symbol__annotate_fprintf2(ms->sym, fp, opts);
2180 2213
2181 fclose(fp); 2214 fclose(fp);
2182 err = 0; 2215 err = 0;
@@ -2346,7 +2379,8 @@ void annotation__update_column_widths(struct annotation *notes)
2346} 2379}
2347 2380
2348static void annotation__calc_lines(struct annotation *notes, struct map *map, 2381static void annotation__calc_lines(struct annotation *notes, struct map *map,
2349 struct rb_root *root) 2382 struct rb_root *root,
2383 struct annotation_options *opts)
2350{ 2384{
2351 struct annotation_line *al; 2385 struct annotation_line *al;
2352 struct rb_root tmp_root = RB_ROOT; 2386 struct rb_root tmp_root = RB_ROOT;
@@ -2355,13 +2389,14 @@ static void annotation__calc_lines(struct annotation *notes, struct map *map,
2355 double percent_max = 0.0; 2389 double percent_max = 0.0;
2356 int i; 2390 int i;
2357 2391
2358 for (i = 0; i < al->samples_nr; i++) { 2392 for (i = 0; i < al->data_nr; i++) {
2359 struct annotation_data *sample; 2393 double percent;
2360 2394
2361 sample = &al->samples[i]; 2395 percent = annotation_data__percent(&al->data[i],
2396 opts->percent_type);
2362 2397
2363 if (sample->percent > percent_max) 2398 if (percent > percent_max)
2364 percent_max = sample->percent; 2399 percent_max = percent;
2365 } 2400 }
2366 2401
2367 if (percent_max <= 0.5) 2402 if (percent_max <= 0.5)
@@ -2369,18 +2404,19 @@ static void annotation__calc_lines(struct annotation *notes, struct map *map,
2369 2404
2370 al->path = get_srcline(map->dso, notes->start + al->offset, NULL, 2405 al->path = get_srcline(map->dso, notes->start + al->offset, NULL,
2371 false, true, notes->start + al->offset); 2406 false, true, notes->start + al->offset);
2372 insert_source_line(&tmp_root, al); 2407 insert_source_line(&tmp_root, al, opts);
2373 } 2408 }
2374 2409
2375 resort_source_line(root, &tmp_root); 2410 resort_source_line(root, &tmp_root);
2376} 2411}
2377 2412
2378static void symbol__calc_lines(struct symbol *sym, struct map *map, 2413static void symbol__calc_lines(struct symbol *sym, struct map *map,
2379 struct rb_root *root) 2414 struct rb_root *root,
2415 struct annotation_options *opts)
2380{ 2416{
2381 struct annotation *notes = symbol__annotation(sym); 2417 struct annotation *notes = symbol__annotation(sym);
2382 2418
2383 annotation__calc_lines(notes, map, root); 2419 annotation__calc_lines(notes, map, root, opts);
2384} 2420}
2385 2421
2386int symbol__tty_annotate2(struct symbol *sym, struct map *map, 2422int symbol__tty_annotate2(struct symbol *sym, struct map *map,
@@ -2389,7 +2425,7 @@ int symbol__tty_annotate2(struct symbol *sym, struct map *map,
2389{ 2425{
2390 struct dso *dso = map->dso; 2426 struct dso *dso = map->dso;
2391 struct rb_root source_line = RB_ROOT; 2427 struct rb_root source_line = RB_ROOT;
2392 struct annotation *notes = symbol__annotation(sym); 2428 struct hists *hists = evsel__hists(evsel);
2393 char buf[1024]; 2429 char buf[1024];
2394 2430
2395 if (symbol__annotate2(sym, map, evsel, opts, NULL) < 0) 2431 if (symbol__annotate2(sym, map, evsel, opts, NULL) < 0)
@@ -2397,13 +2433,14 @@ int symbol__tty_annotate2(struct symbol *sym, struct map *map,
2397 2433
2398 if (opts->print_lines) { 2434 if (opts->print_lines) {
2399 srcline_full_filename = opts->full_path; 2435 srcline_full_filename = opts->full_path;
2400 symbol__calc_lines(sym, map, &source_line); 2436 symbol__calc_lines(sym, map, &source_line, opts);
2401 print_summary(&source_line, dso->long_name); 2437 print_summary(&source_line, dso->long_name);
2402 } 2438 }
2403 2439
2404 annotation__scnprintf_samples_period(notes, buf, sizeof(buf), evsel); 2440 hists__scnprintf_title(hists, buf, sizeof(buf));
2405 fprintf(stdout, "%s\n%s() %s\n", buf, sym->name, dso->long_name); 2441 fprintf(stdout, "%s, [percent: %s]\n%s() %s\n",
2406 symbol__annotate_fprintf2(sym, stdout); 2442 buf, percent_type_str(opts->percent_type), sym->name, dso->long_name);
2443 symbol__annotate_fprintf2(sym, stdout, opts);
2407 2444
2408 annotated_source__purge(symbol__annotation(sym)->src); 2445 annotated_source__purge(symbol__annotation(sym)->src);
2409 2446
@@ -2424,7 +2461,7 @@ int symbol__tty_annotate(struct symbol *sym, struct map *map,
2424 2461
2425 if (opts->print_lines) { 2462 if (opts->print_lines) {
2426 srcline_full_filename = opts->full_path; 2463 srcline_full_filename = opts->full_path;
2427 symbol__calc_lines(sym, map, &source_line); 2464 symbol__calc_lines(sym, map, &source_line, opts);
2428 print_summary(&source_line, dso->long_name); 2465 print_summary(&source_line, dso->long_name);
2429 } 2466 }
2430 2467
@@ -2441,14 +2478,21 @@ bool ui__has_annotation(void)
2441} 2478}
2442 2479
2443 2480
2444double annotation_line__max_percent(struct annotation_line *al, struct annotation *notes) 2481static double annotation_line__max_percent(struct annotation_line *al,
2482 struct annotation *notes,
2483 unsigned int percent_type)
2445{ 2484{
2446 double percent_max = 0.0; 2485 double percent_max = 0.0;
2447 int i; 2486 int i;
2448 2487
2449 for (i = 0; i < notes->nr_events; i++) { 2488 for (i = 0; i < notes->nr_events; i++) {
2450 if (al->samples[i].percent > percent_max) 2489 double percent;
2451 percent_max = al->samples[i].percent; 2490
2491 percent = annotation_data__percent(&al->data[i],
2492 percent_type);
2493
2494 if (percent > percent_max)
2495 percent_max = percent;
2452 } 2496 }
2453 2497
2454 return percent_max; 2498 return percent_max;
@@ -2487,7 +2531,7 @@ call_like:
2487 2531
2488static void __annotation_line__write(struct annotation_line *al, struct annotation *notes, 2532static void __annotation_line__write(struct annotation_line *al, struct annotation *notes,
2489 bool first_line, bool current_entry, bool change_color, int width, 2533 bool first_line, bool current_entry, bool change_color, int width,
2490 void *obj, 2534 void *obj, unsigned int percent_type,
2491 int (*obj__set_color)(void *obj, int color), 2535 int (*obj__set_color)(void *obj, int color),
2492 void (*obj__set_percent_color)(void *obj, double percent, bool current), 2536 void (*obj__set_percent_color)(void *obj, double percent, bool current),
2493 int (*obj__set_jumps_percent_color)(void *obj, int nr, bool current), 2537 int (*obj__set_jumps_percent_color)(void *obj, int nr, bool current),
@@ -2495,7 +2539,7 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati
2495 void (*obj__write_graph)(void *obj, int graph)) 2539 void (*obj__write_graph)(void *obj, int graph))
2496 2540
2497{ 2541{
2498 double percent_max = annotation_line__max_percent(al, notes); 2542 double percent_max = annotation_line__max_percent(al, notes, percent_type);
2499 int pcnt_width = annotation__pcnt_width(notes), 2543 int pcnt_width = annotation__pcnt_width(notes),
2500 cycles_width = annotation__cycles_width(notes); 2544 cycles_width = annotation__cycles_width(notes);
2501 bool show_title = false; 2545 bool show_title = false;
@@ -2514,15 +2558,18 @@ static void __annotation_line__write(struct annotation_line *al, struct annotati
2514 int i; 2558 int i;
2515 2559
2516 for (i = 0; i < notes->nr_events; i++) { 2560 for (i = 0; i < notes->nr_events; i++) {
2517 obj__set_percent_color(obj, al->samples[i].percent, current_entry); 2561 double percent;
2562
2563 percent = annotation_data__percent(&al->data[i], percent_type);
2564
2565 obj__set_percent_color(obj, percent, current_entry);
2518 if (notes->options->show_total_period) { 2566 if (notes->options->show_total_period) {
2519 obj__printf(obj, "%11" PRIu64 " ", al->samples[i].he.period); 2567 obj__printf(obj, "%11" PRIu64 " ", al->data[i].he.period);
2520 } else if (notes->options->show_nr_samples) { 2568 } else if (notes->options->show_nr_samples) {
2521 obj__printf(obj, "%6" PRIu64 " ", 2569 obj__printf(obj, "%6" PRIu64 " ",
2522 al->samples[i].he.nr_samples); 2570 al->data[i].he.nr_samples);
2523 } else { 2571 } else {
2524 obj__printf(obj, "%6.2f ", 2572 obj__printf(obj, "%6.2f ", percent);
2525 al->samples[i].percent);
2526 } 2573 }
2527 } 2574 }
2528 } else { 2575 } else {
@@ -2640,13 +2687,15 @@ print_addr:
2640} 2687}
2641 2688
2642void annotation_line__write(struct annotation_line *al, struct annotation *notes, 2689void annotation_line__write(struct annotation_line *al, struct annotation *notes,
2643 struct annotation_write_ops *ops) 2690 struct annotation_write_ops *wops,
2691 struct annotation_options *opts)
2644{ 2692{
2645 __annotation_line__write(al, notes, ops->first_line, ops->current_entry, 2693 __annotation_line__write(al, notes, wops->first_line, wops->current_entry,
2646 ops->change_color, ops->width, ops->obj, 2694 wops->change_color, wops->width, wops->obj,
2647 ops->set_color, ops->set_percent_color, 2695 opts->percent_type,
2648 ops->set_jumps_percent_color, ops->printf, 2696 wops->set_color, wops->set_percent_color,
2649 ops->write_graph); 2697 wops->set_jumps_percent_color, wops->printf,
2698 wops->write_graph);
2650} 2699}
2651 2700
2652int symbol__annotate2(struct symbol *sym, struct map *map, struct perf_evsel *evsel, 2701int symbol__annotate2(struct symbol *sym, struct map *map, struct perf_evsel *evsel,
@@ -2688,46 +2737,6 @@ out_free_offsets:
2688 return -1; 2737 return -1;
2689} 2738}
2690 2739
2691int __annotation__scnprintf_samples_period(struct annotation *notes,
2692 char *bf, size_t size,
2693 struct perf_evsel *evsel,
2694 bool show_freq)
2695{
2696 const char *ev_name = perf_evsel__name(evsel);
2697 char buf[1024], ref[30] = " show reference callgraph, ";
2698 char sample_freq_str[64] = "";
2699 unsigned long nr_samples = 0;
2700 int nr_members = 1;
2701 bool enable_ref = false;
2702 u64 nr_events = 0;
2703 char unit;
2704 int i;
2705
2706 if (perf_evsel__is_group_event(evsel)) {
2707 perf_evsel__group_desc(evsel, buf, sizeof(buf));
2708 ev_name = buf;
2709 nr_members = evsel->nr_members;
2710 }
2711
2712 for (i = 0; i < nr_members; i++) {
2713 struct sym_hist *ah = annotation__histogram(notes, evsel->idx + i);
2714
2715 nr_samples += ah->nr_samples;
2716 nr_events += ah->period;
2717 }
2718
2719 if (symbol_conf.show_ref_callgraph && strstr(ev_name, "call-graph=no"))
2720 enable_ref = true;
2721
2722 if (show_freq)
2723 scnprintf(sample_freq_str, sizeof(sample_freq_str), " %d Hz,", evsel->attr.sample_freq);
2724
2725 nr_samples = convert_unit(nr_samples, &unit);
2726 return scnprintf(bf, size, "Samples: %lu%c of event%s '%s',%s%sEvent count (approx.): %" PRIu64,
2727 nr_samples, unit, evsel->nr_members > 1 ? "s" : "",
2728 ev_name, sample_freq_str, enable_ref ? ref : " ", nr_events);
2729}
2730
2731#define ANNOTATION__CFG(n) \ 2740#define ANNOTATION__CFG(n) \
2732 { .name = #n, .value = &annotation__default_options.n, } 2741 { .name = #n, .value = &annotation__default_options.n, }
2733 2742
@@ -2792,3 +2801,55 @@ void annotation_config__init(void)
2792 annotation__default_options.show_total_period = symbol_conf.show_total_period; 2801 annotation__default_options.show_total_period = symbol_conf.show_total_period;
2793 annotation__default_options.show_nr_samples = symbol_conf.show_nr_samples; 2802 annotation__default_options.show_nr_samples = symbol_conf.show_nr_samples;
2794} 2803}
2804
2805static unsigned int parse_percent_type(char *str1, char *str2)
2806{
2807 unsigned int type = (unsigned int) -1;
2808
2809 if (!strcmp("period", str1)) {
2810 if (!strcmp("local", str2))
2811 type = PERCENT_PERIOD_LOCAL;
2812 else if (!strcmp("global", str2))
2813 type = PERCENT_PERIOD_GLOBAL;
2814 }
2815
2816 if (!strcmp("hits", str1)) {
2817 if (!strcmp("local", str2))
2818 type = PERCENT_HITS_LOCAL;
2819 else if (!strcmp("global", str2))
2820 type = PERCENT_HITS_GLOBAL;
2821 }
2822
2823 return type;
2824}
2825
2826int annotate_parse_percent_type(const struct option *opt, const char *_str,
2827 int unset __maybe_unused)
2828{
2829 struct annotation_options *opts = opt->value;
2830 unsigned int type;
2831 char *str1, *str2;
2832 int err = -1;
2833
2834 str1 = strdup(_str);
2835 if (!str1)
2836 return -ENOMEM;
2837
2838 str2 = strchr(str1, '-');
2839 if (!str2)
2840 goto out;
2841
2842 *str2++ = 0;
2843
2844 type = parse_percent_type(str1, str2);
2845 if (type == (unsigned int) -1)
2846 type = parse_percent_type(str2, str1);
2847 if (type != (unsigned int) -1) {
2848 opts->percent_type = type;
2849 err = 0;
2850 }
2851
2852out:
2853 free(str1);
2854 return err;
2855}
diff --git a/tools/perf/util/annotate.h b/tools/perf/util/annotate.h
index a4c0d91907e6..005a5fe8a8c6 100644
--- a/tools/perf/util/annotate.h
+++ b/tools/perf/util/annotate.h
@@ -11,6 +11,7 @@
11#include <linux/list.h> 11#include <linux/list.h>
12#include <linux/rbtree.h> 12#include <linux/rbtree.h>
13#include <pthread.h> 13#include <pthread.h>
14#include <asm/bug.h>
14 15
15struct ins_ops; 16struct ins_ops;
16 17
@@ -82,6 +83,7 @@ struct annotation_options {
82 int context; 83 int context;
83 const char *objdump_path; 84 const char *objdump_path;
84 const char *disassembler_style; 85 const char *disassembler_style;
86 unsigned int percent_type;
85}; 87};
86 88
87enum { 89enum {
@@ -101,8 +103,16 @@ struct sym_hist_entry {
101 u64 period; 103 u64 period;
102}; 104};
103 105
106enum {
107 PERCENT_HITS_LOCAL,
108 PERCENT_HITS_GLOBAL,
109 PERCENT_PERIOD_LOCAL,
110 PERCENT_PERIOD_GLOBAL,
111 PERCENT_MAX,
112};
113
104struct annotation_data { 114struct annotation_data {
105 double percent; 115 double percent[PERCENT_MAX];
106 double percent_sum; 116 double percent_sum;
107 struct sym_hist_entry he; 117 struct sym_hist_entry he;
108}; 118};
@@ -122,8 +132,8 @@ struct annotation_line {
122 char *path; 132 char *path;
123 u32 idx; 133 u32 idx;
124 int idx_asm; 134 int idx_asm;
125 int samples_nr; 135 int data_nr;
126 struct annotation_data samples[0]; 136 struct annotation_data data[0];
127}; 137};
128 138
129struct disasm_line { 139struct disasm_line {
@@ -134,6 +144,27 @@ struct disasm_line {
134 struct annotation_line al; 144 struct annotation_line al;
135}; 145};
136 146
147static inline double annotation_data__percent(struct annotation_data *data,
148 unsigned int which)
149{
150 return which < PERCENT_MAX ? data->percent[which] : -1;
151}
152
153static inline const char *percent_type_str(unsigned int type)
154{
155 static const char *str[PERCENT_MAX] = {
156 "local hits",
157 "global hits",
158 "local period",
159 "global period",
160 };
161
162 if (WARN_ON(type >= PERCENT_MAX))
163 return "N/A";
164
165 return str[type];
166}
167
137static inline struct disasm_line *disasm_line(struct annotation_line *al) 168static inline struct disasm_line *disasm_line(struct annotation_line *al)
138{ 169{
139 return al ? container_of(al, struct disasm_line, al) : NULL; 170 return al ? container_of(al, struct disasm_line, al) : NULL;
@@ -169,22 +200,15 @@ struct annotation_write_ops {
169 void (*write_graph)(void *obj, int graph); 200 void (*write_graph)(void *obj, int graph);
170}; 201};
171 202
172double annotation_line__max_percent(struct annotation_line *al, struct annotation *notes);
173void annotation_line__write(struct annotation_line *al, struct annotation *notes, 203void annotation_line__write(struct annotation_line *al, struct annotation *notes,
174 struct annotation_write_ops *ops); 204 struct annotation_write_ops *ops,
205 struct annotation_options *opts);
175 206
176int __annotation__scnprintf_samples_period(struct annotation *notes, 207int __annotation__scnprintf_samples_period(struct annotation *notes,
177 char *bf, size_t size, 208 char *bf, size_t size,
178 struct perf_evsel *evsel, 209 struct perf_evsel *evsel,
179 bool show_freq); 210 bool show_freq);
180 211
181static inline int annotation__scnprintf_samples_period(struct annotation *notes,
182 char *bf, size_t size,
183 struct perf_evsel *evsel)
184{
185 return __annotation__scnprintf_samples_period(notes, bf, size, evsel, true);
186}
187
188int disasm_line__scnprintf(struct disasm_line *dl, char *bf, size_t size, bool raw); 212int disasm_line__scnprintf(struct disasm_line *dl, char *bf, size_t size, bool raw);
189size_t disasm__fprintf(struct list_head *head, FILE *fp); 213size_t disasm__fprintf(struct list_head *head, FILE *fp);
190void symbol__calc_percent(struct symbol *sym, struct perf_evsel *evsel); 214void symbol__calc_percent(struct symbol *sym, struct perf_evsel *evsel);
@@ -340,12 +364,12 @@ int symbol__strerror_disassemble(struct symbol *sym, struct map *map,
340int symbol__annotate_printf(struct symbol *sym, struct map *map, 364int symbol__annotate_printf(struct symbol *sym, struct map *map,
341 struct perf_evsel *evsel, 365 struct perf_evsel *evsel,
342 struct annotation_options *options); 366 struct annotation_options *options);
343int symbol__annotate_fprintf2(struct symbol *sym, FILE *fp);
344void symbol__annotate_zero_histogram(struct symbol *sym, int evidx); 367void symbol__annotate_zero_histogram(struct symbol *sym, int evidx);
345void symbol__annotate_decay_histogram(struct symbol *sym, int evidx); 368void symbol__annotate_decay_histogram(struct symbol *sym, int evidx);
346void annotated_source__purge(struct annotated_source *as); 369void annotated_source__purge(struct annotated_source *as);
347 370
348int map_symbol__annotation_dump(struct map_symbol *ms, struct perf_evsel *evsel); 371int map_symbol__annotation_dump(struct map_symbol *ms, struct perf_evsel *evsel,
372 struct annotation_options *opts);
349 373
350bool ui__has_annotation(void); 374bool ui__has_annotation(void);
351 375
@@ -373,4 +397,6 @@ static inline int symbol__tui_annotate(struct symbol *sym __maybe_unused,
373 397
374void annotation_config__init(void); 398void annotation_config__init(void);
375 399
400int annotate_parse_percent_type(const struct option *opt, const char *_str,
401 int unset);
376#endif /* __PERF_ANNOTATE_H */ 402#endif /* __PERF_ANNOTATE_H */
diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c
index d056447520a2..db1511359c5e 100644
--- a/tools/perf/util/auxtrace.c
+++ b/tools/perf/util/auxtrace.c
@@ -56,6 +56,7 @@
56#include "intel-pt.h" 56#include "intel-pt.h"
57#include "intel-bts.h" 57#include "intel-bts.h"
58#include "arm-spe.h" 58#include "arm-spe.h"
59#include "s390-cpumsf.h"
59 60
60#include "sane_ctype.h" 61#include "sane_ctype.h"
61#include "symbol/kallsyms.h" 62#include "symbol/kallsyms.h"
@@ -202,6 +203,9 @@ static int auxtrace_queues__grow(struct auxtrace_queues *queues,
202 for (i = 0; i < queues->nr_queues; i++) { 203 for (i = 0; i < queues->nr_queues; i++) {
203 list_splice_tail(&queues->queue_array[i].head, 204 list_splice_tail(&queues->queue_array[i].head,
204 &queue_array[i].head); 205 &queue_array[i].head);
206 queue_array[i].tid = queues->queue_array[i].tid;
207 queue_array[i].cpu = queues->queue_array[i].cpu;
208 queue_array[i].set = queues->queue_array[i].set;
205 queue_array[i].priv = queues->queue_array[i].priv; 209 queue_array[i].priv = queues->queue_array[i].priv;
206 } 210 }
207 211
@@ -920,6 +924,8 @@ int perf_event__process_auxtrace_info(struct perf_tool *tool __maybe_unused,
920 return arm_spe_process_auxtrace_info(event, session); 924 return arm_spe_process_auxtrace_info(event, session);
921 case PERF_AUXTRACE_CS_ETM: 925 case PERF_AUXTRACE_CS_ETM:
922 return cs_etm__process_auxtrace_info(event, session); 926 return cs_etm__process_auxtrace_info(event, session);
927 case PERF_AUXTRACE_S390_CPUMSF:
928 return s390_cpumsf_process_auxtrace_info(event, session);
923 case PERF_AUXTRACE_UNKNOWN: 929 case PERF_AUXTRACE_UNKNOWN:
924 default: 930 default:
925 return -EINVAL; 931 return -EINVAL;
diff --git a/tools/perf/util/auxtrace.h b/tools/perf/util/auxtrace.h
index e731f55da072..71fc3bd74299 100644
--- a/tools/perf/util/auxtrace.h
+++ b/tools/perf/util/auxtrace.h
@@ -44,6 +44,7 @@ enum auxtrace_type {
44 PERF_AUXTRACE_INTEL_BTS, 44 PERF_AUXTRACE_INTEL_BTS,
45 PERF_AUXTRACE_CS_ETM, 45 PERF_AUXTRACE_CS_ETM,
46 PERF_AUXTRACE_ARM_SPE, 46 PERF_AUXTRACE_ARM_SPE,
47 PERF_AUXTRACE_S390_CPUMSF,
47}; 48};
48 49
49enum itrace_period_type { 50enum itrace_period_type {
diff --git a/tools/perf/util/bpf-loader.c b/tools/perf/util/bpf-loader.c
index cee658733e2c..47aac41349a2 100644
--- a/tools/perf/util/bpf-loader.c
+++ b/tools/perf/util/bpf-loader.c
@@ -747,7 +747,9 @@ int bpf__load(struct bpf_object *obj)
747 747
748 err = bpf_object__load(obj); 748 err = bpf_object__load(obj);
749 if (err) { 749 if (err) {
750 pr_debug("bpf: load objects failed\n"); 750 char bf[128];
751 libbpf_strerror(err, bf, sizeof(bf));
752 pr_debug("bpf: load objects failed: err=%d: (%s)\n", err, bf);
751 return err; 753 return err;
752 } 754 }
753 return 0; 755 return 0;
@@ -1527,13 +1529,13 @@ int bpf__apply_obj_config(void)
1527 bpf_object__for_each_safe(obj, objtmp) \ 1529 bpf_object__for_each_safe(obj, objtmp) \
1528 bpf_map__for_each(pos, obj) 1530 bpf_map__for_each(pos, obj)
1529 1531
1530#define bpf__for_each_stdout_map(pos, obj, objtmp) \ 1532#define bpf__for_each_map_named(pos, obj, objtmp, name) \
1531 bpf__for_each_map(pos, obj, objtmp) \ 1533 bpf__for_each_map(pos, obj, objtmp) \
1532 if (bpf_map__name(pos) && \ 1534 if (bpf_map__name(pos) && \
1533 (strcmp("__bpf_stdout__", \ 1535 (strcmp(name, \
1534 bpf_map__name(pos)) == 0)) 1536 bpf_map__name(pos)) == 0))
1535 1537
1536int bpf__setup_stdout(struct perf_evlist *evlist) 1538struct perf_evsel *bpf__setup_output_event(struct perf_evlist *evlist, const char *name)
1537{ 1539{
1538 struct bpf_map_priv *tmpl_priv = NULL; 1540 struct bpf_map_priv *tmpl_priv = NULL;
1539 struct bpf_object *obj, *tmp; 1541 struct bpf_object *obj, *tmp;
@@ -1542,11 +1544,11 @@ int bpf__setup_stdout(struct perf_evlist *evlist)
1542 int err; 1544 int err;
1543 bool need_init = false; 1545 bool need_init = false;
1544 1546
1545 bpf__for_each_stdout_map(map, obj, tmp) { 1547 bpf__for_each_map_named(map, obj, tmp, name) {
1546 struct bpf_map_priv *priv = bpf_map__priv(map); 1548 struct bpf_map_priv *priv = bpf_map__priv(map);
1547 1549
1548 if (IS_ERR(priv)) 1550 if (IS_ERR(priv))
1549 return -BPF_LOADER_ERRNO__INTERNAL; 1551 return ERR_PTR(-BPF_LOADER_ERRNO__INTERNAL);
1550 1552
1551 /* 1553 /*
1552 * No need to check map type: type should have been 1554 * No need to check map type: type should have been
@@ -1559,49 +1561,61 @@ int bpf__setup_stdout(struct perf_evlist *evlist)
1559 } 1561 }
1560 1562
1561 if (!need_init) 1563 if (!need_init)
1562 return 0; 1564 return NULL;
1563 1565
1564 if (!tmpl_priv) { 1566 if (!tmpl_priv) {
1565 err = parse_events(evlist, "bpf-output/no-inherit=1,name=__bpf_stdout__/", 1567 char *event_definition = NULL;
1566 NULL); 1568
1569 if (asprintf(&event_definition, "bpf-output/no-inherit=1,name=%s/", name) < 0)
1570 return ERR_PTR(-ENOMEM);
1571
1572 err = parse_events(evlist, event_definition, NULL);
1573 free(event_definition);
1574
1567 if (err) { 1575 if (err) {
1568 pr_debug("ERROR: failed to create bpf-output event\n"); 1576 pr_debug("ERROR: failed to create the \"%s\" bpf-output event\n", name);
1569 return -err; 1577 return ERR_PTR(-err);
1570 } 1578 }
1571 1579
1572 evsel = perf_evlist__last(evlist); 1580 evsel = perf_evlist__last(evlist);
1573 } 1581 }
1574 1582
1575 bpf__for_each_stdout_map(map, obj, tmp) { 1583 bpf__for_each_map_named(map, obj, tmp, name) {
1576 struct bpf_map_priv *priv = bpf_map__priv(map); 1584 struct bpf_map_priv *priv = bpf_map__priv(map);
1577 1585
1578 if (IS_ERR(priv)) 1586 if (IS_ERR(priv))
1579 return -BPF_LOADER_ERRNO__INTERNAL; 1587 return ERR_PTR(-BPF_LOADER_ERRNO__INTERNAL);
1580 if (priv) 1588 if (priv)
1581 continue; 1589 continue;
1582 1590
1583 if (tmpl_priv) { 1591 if (tmpl_priv) {
1584 priv = bpf_map_priv__clone(tmpl_priv); 1592 priv = bpf_map_priv__clone(tmpl_priv);
1585 if (!priv) 1593 if (!priv)
1586 return -ENOMEM; 1594 return ERR_PTR(-ENOMEM);
1587 1595
1588 err = bpf_map__set_priv(map, priv, bpf_map_priv__clear); 1596 err = bpf_map__set_priv(map, priv, bpf_map_priv__clear);
1589 if (err) { 1597 if (err) {
1590 bpf_map_priv__clear(map, priv); 1598 bpf_map_priv__clear(map, priv);
1591 return err; 1599 return ERR_PTR(err);
1592 } 1600 }
1593 } else if (evsel) { 1601 } else if (evsel) {
1594 struct bpf_map_op *op; 1602 struct bpf_map_op *op;
1595 1603
1596 op = bpf_map__add_newop(map, NULL); 1604 op = bpf_map__add_newop(map, NULL);
1597 if (IS_ERR(op)) 1605 if (IS_ERR(op))
1598 return PTR_ERR(op); 1606 return ERR_PTR(PTR_ERR(op));
1599 op->op_type = BPF_MAP_OP_SET_EVSEL; 1607 op->op_type = BPF_MAP_OP_SET_EVSEL;
1600 op->v.evsel = evsel; 1608 op->v.evsel = evsel;
1601 } 1609 }
1602 } 1610 }
1603 1611
1604 return 0; 1612 return evsel;
1613}
1614
1615int bpf__setup_stdout(struct perf_evlist *evlist)
1616{
1617 struct perf_evsel *evsel = bpf__setup_output_event(evlist, "__bpf_stdout__");
1618 return IS_ERR(evsel) ? PTR_ERR(evsel) : 0;
1605} 1619}
1606 1620
1607#define ERRNO_OFFSET(e) ((e) - __BPF_LOADER_ERRNO__START) 1621#define ERRNO_OFFSET(e) ((e) - __BPF_LOADER_ERRNO__START)
@@ -1778,8 +1792,8 @@ int bpf__strerror_apply_obj_config(int err, char *buf, size_t size)
1778 return 0; 1792 return 0;
1779} 1793}
1780 1794
1781int bpf__strerror_setup_stdout(struct perf_evlist *evlist __maybe_unused, 1795int bpf__strerror_setup_output_event(struct perf_evlist *evlist __maybe_unused,
1782 int err, char *buf, size_t size) 1796 int err, char *buf, size_t size)
1783{ 1797{
1784 bpf__strerror_head(err, buf, size); 1798 bpf__strerror_head(err, buf, size);
1785 bpf__strerror_end(buf, size); 1799 bpf__strerror_end(buf, size);
diff --git a/tools/perf/util/bpf-loader.h b/tools/perf/util/bpf-loader.h
index 5d3aefd6fae7..62d245a90e1d 100644
--- a/tools/perf/util/bpf-loader.h
+++ b/tools/perf/util/bpf-loader.h
@@ -43,6 +43,7 @@ enum bpf_loader_errno {
43 __BPF_LOADER_ERRNO__END, 43 __BPF_LOADER_ERRNO__END,
44}; 44};
45 45
46struct perf_evsel;
46struct bpf_object; 47struct bpf_object;
47struct parse_events_term; 48struct parse_events_term;
48#define PERF_BPF_PROBE_GROUP "perf_bpf_probe" 49#define PERF_BPF_PROBE_GROUP "perf_bpf_probe"
@@ -82,9 +83,8 @@ int bpf__apply_obj_config(void);
82int bpf__strerror_apply_obj_config(int err, char *buf, size_t size); 83int bpf__strerror_apply_obj_config(int err, char *buf, size_t size);
83 84
84int bpf__setup_stdout(struct perf_evlist *evlist); 85int bpf__setup_stdout(struct perf_evlist *evlist);
85int bpf__strerror_setup_stdout(struct perf_evlist *evlist, int err, 86struct perf_evsel *bpf__setup_output_event(struct perf_evlist *evlist, const char *name);
86 char *buf, size_t size); 87int bpf__strerror_setup_output_event(struct perf_evlist *evlist, int err, char *buf, size_t size);
87
88#else 88#else
89#include <errno.h> 89#include <errno.h>
90 90
@@ -138,6 +138,12 @@ bpf__setup_stdout(struct perf_evlist *evlist __maybe_unused)
138 return 0; 138 return 0;
139} 139}
140 140
141static inline struct perf_evsel *
142bpf__setup_output_event(struct perf_evlist *evlist __maybe_unused, const char *name __maybe_unused)
143{
144 return NULL;
145}
146
141static inline int 147static inline int
142__bpf_strerror(char *buf, size_t size) 148__bpf_strerror(char *buf, size_t size)
143{ 149{
@@ -193,11 +199,16 @@ bpf__strerror_apply_obj_config(int err __maybe_unused,
193} 199}
194 200
195static inline int 201static inline int
196bpf__strerror_setup_stdout(struct perf_evlist *evlist __maybe_unused, 202bpf__strerror_setup_output_event(struct perf_evlist *evlist __maybe_unused,
197 int err __maybe_unused, char *buf, 203 int err __maybe_unused, char *buf, size_t size)
198 size_t size)
199{ 204{
200 return __bpf_strerror(buf, size); 205 return __bpf_strerror(buf, size);
201} 206}
207
202#endif 208#endif
209
210static inline int bpf__strerror_setup_stdout(struct perf_evlist *evlist, int err, char *buf, size_t size)
211{
212 return bpf__strerror_setup_output_event(evlist, err, buf, size);
213}
203#endif 214#endif
diff --git a/tools/perf/util/comm.c b/tools/perf/util/comm.c
index 7798a2cc8a86..31279a7bd919 100644
--- a/tools/perf/util/comm.c
+++ b/tools/perf/util/comm.c
@@ -20,9 +20,10 @@ static struct rw_semaphore comm_str_lock = {.lock = PTHREAD_RWLOCK_INITIALIZER,}
20 20
21static struct comm_str *comm_str__get(struct comm_str *cs) 21static struct comm_str *comm_str__get(struct comm_str *cs)
22{ 22{
23 if (cs) 23 if (cs && refcount_inc_not_zero(&cs->refcnt))
24 refcount_inc(&cs->refcnt); 24 return cs;
25 return cs; 25
26 return NULL;
26} 27}
27 28
28static void comm_str__put(struct comm_str *cs) 29static void comm_str__put(struct comm_str *cs)
@@ -67,9 +68,14 @@ struct comm_str *__comm_str__findnew(const char *str, struct rb_root *root)
67 parent = *p; 68 parent = *p;
68 iter = rb_entry(parent, struct comm_str, rb_node); 69 iter = rb_entry(parent, struct comm_str, rb_node);
69 70
71 /*
72 * If we race with comm_str__put, iter->refcnt is 0
73 * and it will be removed within comm_str__put call
74 * shortly, ignore it in this search.
75 */
70 cmp = strcmp(str, iter->str); 76 cmp = strcmp(str, iter->str);
71 if (!cmp) 77 if (!cmp && comm_str__get(iter))
72 return comm_str__get(iter); 78 return iter;
73 79
74 if (cmp < 0) 80 if (cmp < 0)
75 p = &(*p)->rb_left; 81 p = &(*p)->rb_left;
diff --git a/tools/perf/util/compress.h b/tools/perf/util/compress.h
index ecca688a25fb..892e92e7e7fc 100644
--- a/tools/perf/util/compress.h
+++ b/tools/perf/util/compress.h
@@ -4,10 +4,12 @@
4 4
5#ifdef HAVE_ZLIB_SUPPORT 5#ifdef HAVE_ZLIB_SUPPORT
6int gzip_decompress_to_file(const char *input, int output_fd); 6int gzip_decompress_to_file(const char *input, int output_fd);
7bool gzip_is_compressed(const char *input);
7#endif 8#endif
8 9
9#ifdef HAVE_LZMA_SUPPORT 10#ifdef HAVE_LZMA_SUPPORT
10int lzma_decompress_to_file(const char *input, int output_fd); 11int lzma_decompress_to_file(const char *input, int output_fd);
12bool lzma_is_compressed(const char *input);
11#endif 13#endif
12 14
13#endif /* PERF_COMPRESS_H */ 15#endif /* PERF_COMPRESS_H */
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
index 4d5fc374e730..938def6d0bb9 100644
--- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
+++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.c
@@ -31,6 +31,8 @@
31#endif 31#endif
32#endif 32#endif
33 33
34#define CS_ETM_INVAL_ADDR 0xdeadbeefdeadbeefUL
35
34struct cs_etm_decoder { 36struct cs_etm_decoder {
35 void *data; 37 void *data;
36 void (*packet_printer)(const char *msg); 38 void (*packet_printer)(const char *msg);
@@ -261,8 +263,8 @@ static void cs_etm_decoder__clear_buffer(struct cs_etm_decoder *decoder)
261 decoder->tail = 0; 263 decoder->tail = 0;
262 decoder->packet_count = 0; 264 decoder->packet_count = 0;
263 for (i = 0; i < MAX_BUFFER; i++) { 265 for (i = 0; i < MAX_BUFFER; i++) {
264 decoder->packet_buffer[i].start_addr = 0xdeadbeefdeadbeefUL; 266 decoder->packet_buffer[i].start_addr = CS_ETM_INVAL_ADDR;
265 decoder->packet_buffer[i].end_addr = 0xdeadbeefdeadbeefUL; 267 decoder->packet_buffer[i].end_addr = CS_ETM_INVAL_ADDR;
266 decoder->packet_buffer[i].last_instr_taken_branch = false; 268 decoder->packet_buffer[i].last_instr_taken_branch = false;
267 decoder->packet_buffer[i].exc = false; 269 decoder->packet_buffer[i].exc = false;
268 decoder->packet_buffer[i].exc_ret = false; 270 decoder->packet_buffer[i].exc_ret = false;
@@ -295,8 +297,8 @@ cs_etm_decoder__buffer_packet(struct cs_etm_decoder *decoder,
295 decoder->packet_buffer[et].exc = false; 297 decoder->packet_buffer[et].exc = false;
296 decoder->packet_buffer[et].exc_ret = false; 298 decoder->packet_buffer[et].exc_ret = false;
297 decoder->packet_buffer[et].cpu = *((int *)inode->priv); 299 decoder->packet_buffer[et].cpu = *((int *)inode->priv);
298 decoder->packet_buffer[et].start_addr = 0xdeadbeefdeadbeefUL; 300 decoder->packet_buffer[et].start_addr = CS_ETM_INVAL_ADDR;
299 decoder->packet_buffer[et].end_addr = 0xdeadbeefdeadbeefUL; 301 decoder->packet_buffer[et].end_addr = CS_ETM_INVAL_ADDR;
300 302
301 if (decoder->packet_count == MAX_BUFFER - 1) 303 if (decoder->packet_count == MAX_BUFFER - 1)
302 return OCSD_RESP_WAIT; 304 return OCSD_RESP_WAIT;
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h
index 743f5f444304..612b5755f742 100644
--- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h
+++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h
@@ -23,6 +23,7 @@ struct cs_etm_buffer {
23}; 23};
24 24
25enum cs_etm_sample_type { 25enum cs_etm_sample_type {
26 CS_ETM_EMPTY = 0,
26 CS_ETM_RANGE = 1 << 0, 27 CS_ETM_RANGE = 1 << 0,
27 CS_ETM_TRACE_ON = 1 << 1, 28 CS_ETM_TRACE_ON = 1 << 1,
28}; 29};
diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
index 822ba915d144..2ae640257fdb 100644
--- a/tools/perf/util/cs-etm.c
+++ b/tools/perf/util/cs-etm.c
@@ -494,6 +494,10 @@ static inline void cs_etm__reset_last_branch_rb(struct cs_etm_queue *etmq)
494 494
495static inline u64 cs_etm__last_executed_instr(struct cs_etm_packet *packet) 495static inline u64 cs_etm__last_executed_instr(struct cs_etm_packet *packet)
496{ 496{
497 /* Returns 0 for the CS_ETM_TRACE_ON packet */
498 if (packet->sample_type == CS_ETM_TRACE_ON)
499 return 0;
500
497 /* 501 /*
498 * The packet records the execution range with an exclusive end address 502 * The packet records the execution range with an exclusive end address
499 * 503 *
@@ -505,6 +509,15 @@ static inline u64 cs_etm__last_executed_instr(struct cs_etm_packet *packet)
505 return packet->end_addr - A64_INSTR_SIZE; 509 return packet->end_addr - A64_INSTR_SIZE;
506} 510}
507 511
512static inline u64 cs_etm__first_executed_instr(struct cs_etm_packet *packet)
513{
514 /* Returns 0 for the CS_ETM_TRACE_ON packet */
515 if (packet->sample_type == CS_ETM_TRACE_ON)
516 return 0;
517
518 return packet->start_addr;
519}
520
508static inline u64 cs_etm__instr_count(const struct cs_etm_packet *packet) 521static inline u64 cs_etm__instr_count(const struct cs_etm_packet *packet)
509{ 522{
510 /* 523 /*
@@ -546,7 +559,7 @@ static void cs_etm__update_last_branch_rb(struct cs_etm_queue *etmq)
546 559
547 be = &bs->entries[etmq->last_branch_pos]; 560 be = &bs->entries[etmq->last_branch_pos];
548 be->from = cs_etm__last_executed_instr(etmq->prev_packet); 561 be->from = cs_etm__last_executed_instr(etmq->prev_packet);
549 be->to = etmq->packet->start_addr; 562 be->to = cs_etm__first_executed_instr(etmq->packet);
550 /* No support for mispredict */ 563 /* No support for mispredict */
551 be->flags.mispred = 0; 564 be->flags.mispred = 0;
552 be->flags.predicted = 1; 565 be->flags.predicted = 1;
@@ -701,7 +714,7 @@ static int cs_etm__synth_branch_sample(struct cs_etm_queue *etmq)
701 sample.ip = cs_etm__last_executed_instr(etmq->prev_packet); 714 sample.ip = cs_etm__last_executed_instr(etmq->prev_packet);
702 sample.pid = etmq->pid; 715 sample.pid = etmq->pid;
703 sample.tid = etmq->tid; 716 sample.tid = etmq->tid;
704 sample.addr = etmq->packet->start_addr; 717 sample.addr = cs_etm__first_executed_instr(etmq->packet);
705 sample.id = etmq->etm->branches_id; 718 sample.id = etmq->etm->branches_id;
706 sample.stream_id = etmq->etm->branches_id; 719 sample.stream_id = etmq->etm->branches_id;
707 sample.period = 1; 720 sample.period = 1;
@@ -897,13 +910,23 @@ static int cs_etm__sample(struct cs_etm_queue *etmq)
897 etmq->period_instructions = instrs_over; 910 etmq->period_instructions = instrs_over;
898 } 911 }
899 912
900 if (etm->sample_branches && 913 if (etm->sample_branches && etmq->prev_packet) {
901 etmq->prev_packet && 914 bool generate_sample = false;
902 etmq->prev_packet->sample_type == CS_ETM_RANGE && 915
903 etmq->prev_packet->last_instr_taken_branch) { 916 /* Generate sample for tracing on packet */
904 ret = cs_etm__synth_branch_sample(etmq); 917 if (etmq->prev_packet->sample_type == CS_ETM_TRACE_ON)
905 if (ret) 918 generate_sample = true;
906 return ret; 919
920 /* Generate sample for branch taken packet */
921 if (etmq->prev_packet->sample_type == CS_ETM_RANGE &&
922 etmq->prev_packet->last_instr_taken_branch)
923 generate_sample = true;
924
925 if (generate_sample) {
926 ret = cs_etm__synth_branch_sample(etmq);
927 if (ret)
928 return ret;
929 }
907 } 930 }
908 931
909 if (etm->sample_branches || etm->synth_opts.last_branch) { 932 if (etm->sample_branches || etm->synth_opts.last_branch) {
@@ -922,10 +945,17 @@ static int cs_etm__sample(struct cs_etm_queue *etmq)
922static int cs_etm__flush(struct cs_etm_queue *etmq) 945static int cs_etm__flush(struct cs_etm_queue *etmq)
923{ 946{
924 int err = 0; 947 int err = 0;
948 struct cs_etm_auxtrace *etm = etmq->etm;
925 struct cs_etm_packet *tmp; 949 struct cs_etm_packet *tmp;
926 950
951 if (!etmq->prev_packet)
952 return 0;
953
954 /* Handle start tracing packet */
955 if (etmq->prev_packet->sample_type == CS_ETM_EMPTY)
956 goto swap_packet;
957
927 if (etmq->etm->synth_opts.last_branch && 958 if (etmq->etm->synth_opts.last_branch &&
928 etmq->prev_packet &&
929 etmq->prev_packet->sample_type == CS_ETM_RANGE) { 959 etmq->prev_packet->sample_type == CS_ETM_RANGE) {
930 /* 960 /*
931 * Generate a last branch event for the branches left in the 961 * Generate a last branch event for the branches left in the
@@ -939,8 +969,22 @@ static int cs_etm__flush(struct cs_etm_queue *etmq)
939 err = cs_etm__synth_instruction_sample( 969 err = cs_etm__synth_instruction_sample(
940 etmq, addr, 970 etmq, addr,
941 etmq->period_instructions); 971 etmq->period_instructions);
972 if (err)
973 return err;
974
942 etmq->period_instructions = 0; 975 etmq->period_instructions = 0;
943 976
977 }
978
979 if (etm->sample_branches &&
980 etmq->prev_packet->sample_type == CS_ETM_RANGE) {
981 err = cs_etm__synth_branch_sample(etmq);
982 if (err)
983 return err;
984 }
985
986swap_packet:
987 if (etmq->etm->synth_opts.last_branch) {
944 /* 988 /*
945 * Swap PACKET with PREV_PACKET: PACKET becomes PREV_PACKET for 989 * Swap PACKET with PREV_PACKET: PACKET becomes PREV_PACKET for
946 * the next incoming packet. 990 * the next incoming packet.
@@ -1020,6 +1064,13 @@ static int cs_etm__run_decoder(struct cs_etm_queue *etmq)
1020 */ 1064 */
1021 cs_etm__flush(etmq); 1065 cs_etm__flush(etmq);
1022 break; 1066 break;
1067 case CS_ETM_EMPTY:
1068 /*
1069 * Should not receive empty packet,
1070 * report error.
1071 */
1072 pr_err("CS ETM Trace: empty packet\n");
1073 return -EINVAL;
1023 default: 1074 default:
1024 break; 1075 break;
1025 } 1076 }
diff --git a/tools/perf/util/data-convert-bt.c b/tools/perf/util/data-convert-bt.c
index 5744c12641a5..abd38abf1d91 100644
--- a/tools/perf/util/data-convert-bt.c
+++ b/tools/perf/util/data-convert-bt.c
@@ -310,8 +310,8 @@ static int add_tracepoint_field_value(struct ctf_writer *cw,
310 if (flags & FIELD_IS_DYNAMIC) { 310 if (flags & FIELD_IS_DYNAMIC) {
311 unsigned long long tmp_val; 311 unsigned long long tmp_val;
312 312
313 tmp_val = pevent_read_number(fmtf->event->pevent, 313 tmp_val = tep_read_number(fmtf->event->pevent,
314 data + offset, len); 314 data + offset, len);
315 offset = tmp_val; 315 offset = tmp_val;
316 len = offset >> 16; 316 len = offset >> 16;
317 offset &= 0xffff; 317 offset &= 0xffff;
@@ -353,7 +353,7 @@ static int add_tracepoint_field_value(struct ctf_writer *cw,
353 else { 353 else {
354 unsigned long long value_int; 354 unsigned long long value_int;
355 355
356 value_int = pevent_read_number( 356 value_int = tep_read_number(
357 fmtf->event->pevent, 357 fmtf->event->pevent,
358 data + offset + i * len, len); 358 data + offset + i * len, len);
359 359
diff --git a/tools/perf/util/dso.c b/tools/perf/util/dso.c
index 51cf82cf1882..bbed90e5d9bb 100644
--- a/tools/perf/util/dso.c
+++ b/tools/perf/util/dso.c
@@ -189,28 +189,34 @@ int dso__read_binary_type_filename(const struct dso *dso,
189 return ret; 189 return ret;
190} 190}
191 191
192enum {
193 COMP_ID__NONE = 0,
194};
195
192static const struct { 196static const struct {
193 const char *fmt; 197 const char *fmt;
194 int (*decompress)(const char *input, int output); 198 int (*decompress)(const char *input, int output);
199 bool (*is_compressed)(const char *input);
195} compressions[] = { 200} compressions[] = {
201 [COMP_ID__NONE] = { .fmt = NULL, },
196#ifdef HAVE_ZLIB_SUPPORT 202#ifdef HAVE_ZLIB_SUPPORT
197 { "gz", gzip_decompress_to_file }, 203 { "gz", gzip_decompress_to_file, gzip_is_compressed },
198#endif 204#endif
199#ifdef HAVE_LZMA_SUPPORT 205#ifdef HAVE_LZMA_SUPPORT
200 { "xz", lzma_decompress_to_file }, 206 { "xz", lzma_decompress_to_file, lzma_is_compressed },
201#endif 207#endif
202 { NULL, NULL }, 208 { NULL, NULL, NULL },
203}; 209};
204 210
205bool is_supported_compression(const char *ext) 211static int is_supported_compression(const char *ext)
206{ 212{
207 unsigned i; 213 unsigned i;
208 214
209 for (i = 0; compressions[i].fmt; i++) { 215 for (i = 1; compressions[i].fmt; i++) {
210 if (!strcmp(ext, compressions[i].fmt)) 216 if (!strcmp(ext, compressions[i].fmt))
211 return true; 217 return i;
212 } 218 }
213 return false; 219 return COMP_ID__NONE;
214} 220}
215 221
216bool is_kernel_module(const char *pathname, int cpumode) 222bool is_kernel_module(const char *pathname, int cpumode)
@@ -239,80 +245,73 @@ bool is_kernel_module(const char *pathname, int cpumode)
239 return m.kmod; 245 return m.kmod;
240} 246}
241 247
242bool decompress_to_file(const char *ext, const char *filename, int output_fd)
243{
244 unsigned i;
245
246 for (i = 0; compressions[i].fmt; i++) {
247 if (!strcmp(ext, compressions[i].fmt))
248 return !compressions[i].decompress(filename,
249 output_fd);
250 }
251 return false;
252}
253
254bool dso__needs_decompress(struct dso *dso) 248bool dso__needs_decompress(struct dso *dso)
255{ 249{
256 return dso->symtab_type == DSO_BINARY_TYPE__SYSTEM_PATH_KMODULE_COMP || 250 return dso->symtab_type == DSO_BINARY_TYPE__SYSTEM_PATH_KMODULE_COMP ||
257 dso->symtab_type == DSO_BINARY_TYPE__GUEST_KMODULE_COMP; 251 dso->symtab_type == DSO_BINARY_TYPE__GUEST_KMODULE_COMP;
258} 252}
259 253
260static int decompress_kmodule(struct dso *dso, const char *name, char *tmpbuf) 254static int decompress_kmodule(struct dso *dso, const char *name,
255 char *pathname, size_t len)
261{ 256{
257 char tmpbuf[] = KMOD_DECOMP_NAME;
262 int fd = -1; 258 int fd = -1;
263 struct kmod_path m;
264 259
265 if (!dso__needs_decompress(dso)) 260 if (!dso__needs_decompress(dso))
266 return -1; 261 return -1;
267 262
268 if (kmod_path__parse_ext(&m, dso->long_name)) 263 if (dso->comp == COMP_ID__NONE)
269 return -1; 264 return -1;
270 265
271 if (!m.comp) 266 /*
272 goto out; 267 * We have proper compression id for DSO and yet the file
268 * behind the 'name' can still be plain uncompressed object.
269 *
270 * The reason is behind the logic we open the DSO object files,
271 * when we try all possible 'debug' objects until we find the
272 * data. So even if the DSO is represented by 'krava.xz' module,
273 * we can end up here opening ~/.debug/....23432432/debug' file
274 * which is not compressed.
275 *
276 * To keep this transparent, we detect this and return the file
277 * descriptor to the uncompressed file.
278 */
279 if (!compressions[dso->comp].is_compressed(name))
280 return open(name, O_RDONLY);
273 281
274 fd = mkstemp(tmpbuf); 282 fd = mkstemp(tmpbuf);
275 if (fd < 0) { 283 if (fd < 0) {
276 dso->load_errno = errno; 284 dso->load_errno = errno;
277 goto out; 285 return -1;
278 } 286 }
279 287
280 if (!decompress_to_file(m.ext, name, fd)) { 288 if (compressions[dso->comp].decompress(name, fd)) {
281 dso->load_errno = DSO_LOAD_ERRNO__DECOMPRESSION_FAILURE; 289 dso->load_errno = DSO_LOAD_ERRNO__DECOMPRESSION_FAILURE;
282 close(fd); 290 close(fd);
283 fd = -1; 291 fd = -1;
284 } 292 }
285 293
286out: 294 if (!pathname || (fd < 0))
287 free(m.ext); 295 unlink(tmpbuf);
296
297 if (pathname && (fd >= 0))
298 strncpy(pathname, tmpbuf, len);
299
288 return fd; 300 return fd;
289} 301}
290 302
291int dso__decompress_kmodule_fd(struct dso *dso, const char *name) 303int dso__decompress_kmodule_fd(struct dso *dso, const char *name)
292{ 304{
293 char tmpbuf[] = KMOD_DECOMP_NAME; 305 return decompress_kmodule(dso, name, NULL, 0);
294 int fd;
295
296 fd = decompress_kmodule(dso, name, tmpbuf);
297 unlink(tmpbuf);
298 return fd;
299} 306}
300 307
301int dso__decompress_kmodule_path(struct dso *dso, const char *name, 308int dso__decompress_kmodule_path(struct dso *dso, const char *name,
302 char *pathname, size_t len) 309 char *pathname, size_t len)
303{ 310{
304 char tmpbuf[] = KMOD_DECOMP_NAME; 311 int fd = decompress_kmodule(dso, name, pathname, len);
305 int fd;
306 312
307 fd = decompress_kmodule(dso, name, tmpbuf);
308 if (fd < 0) {
309 unlink(tmpbuf);
310 return -1;
311 }
312
313 strncpy(pathname, tmpbuf, len);
314 close(fd); 313 close(fd);
315 return 0; 314 return fd >= 0 ? 0 : -1;
316} 315}
317 316
318/* 317/*
@@ -332,7 +331,7 @@ int dso__decompress_kmodule_path(struct dso *dso, const char *name,
332 * Returns 0 if there's no strdup error, -ENOMEM otherwise. 331 * Returns 0 if there's no strdup error, -ENOMEM otherwise.
333 */ 332 */
334int __kmod_path__parse(struct kmod_path *m, const char *path, 333int __kmod_path__parse(struct kmod_path *m, const char *path,
335 bool alloc_name, bool alloc_ext) 334 bool alloc_name)
336{ 335{
337 const char *name = strrchr(path, '/'); 336 const char *name = strrchr(path, '/');
338 const char *ext = strrchr(path, '.'); 337 const char *ext = strrchr(path, '.');
@@ -372,10 +371,9 @@ int __kmod_path__parse(struct kmod_path *m, const char *path,
372 return 0; 371 return 0;
373 } 372 }
374 373
375 if (is_supported_compression(ext + 1)) { 374 m->comp = is_supported_compression(ext + 1);
376 m->comp = true; 375 if (m->comp > COMP_ID__NONE)
377 ext -= 3; 376 ext -= 3;
378 }
379 377
380 /* Check .ko extension only if there's enough name left. */ 378 /* Check .ko extension only if there's enough name left. */
381 if (ext > name) 379 if (ext > name)
@@ -393,14 +391,6 @@ int __kmod_path__parse(struct kmod_path *m, const char *path,
393 strxfrchar(m->name, '-', '_'); 391 strxfrchar(m->name, '-', '_');
394 } 392 }
395 393
396 if (alloc_ext && m->comp) {
397 m->ext = strdup(ext + 4);
398 if (!m->ext) {
399 free((void *) m->name);
400 return -ENOMEM;
401 }
402 }
403
404 return 0; 394 return 0;
405} 395}
406 396
@@ -413,8 +403,10 @@ void dso__set_module_info(struct dso *dso, struct kmod_path *m,
413 dso->symtab_type = DSO_BINARY_TYPE__GUEST_KMODULE; 403 dso->symtab_type = DSO_BINARY_TYPE__GUEST_KMODULE;
414 404
415 /* _KMODULE_COMP should be next to _KMODULE */ 405 /* _KMODULE_COMP should be next to _KMODULE */
416 if (m->kmod && m->comp) 406 if (m->kmod && m->comp) {
417 dso->symtab_type++; 407 dso->symtab_type++;
408 dso->comp = m->comp;
409 }
418 410
419 dso__set_short_name(dso, strdup(m->name), true); 411 dso__set_short_name(dso, strdup(m->name), true);
420} 412}
@@ -468,6 +460,7 @@ static int __open_dso(struct dso *dso, struct machine *machine)
468 int fd = -EINVAL; 460 int fd = -EINVAL;
469 char *root_dir = (char *)""; 461 char *root_dir = (char *)"";
470 char *name = malloc(PATH_MAX); 462 char *name = malloc(PATH_MAX);
463 bool decomp = false;
471 464
472 if (!name) 465 if (!name)
473 return -ENOMEM; 466 return -ENOMEM;
@@ -491,12 +484,13 @@ static int __open_dso(struct dso *dso, struct machine *machine)
491 goto out; 484 goto out;
492 } 485 }
493 486
487 decomp = true;
494 strcpy(name, newpath); 488 strcpy(name, newpath);
495 } 489 }
496 490
497 fd = do_open(name); 491 fd = do_open(name);
498 492
499 if (dso__needs_decompress(dso)) 493 if (decomp)
500 unlink(name); 494 unlink(name);
501 495
502out: 496out:
@@ -1218,6 +1212,7 @@ struct dso *dso__new(const char *name)
1218 dso->a2l_fails = 1; 1212 dso->a2l_fails = 1;
1219 dso->kernel = DSO_TYPE_USER; 1213 dso->kernel = DSO_TYPE_USER;
1220 dso->needs_swap = DSO_SWAP__UNSET; 1214 dso->needs_swap = DSO_SWAP__UNSET;
1215 dso->comp = COMP_ID__NONE;
1221 RB_CLEAR_NODE(&dso->rb_node); 1216 RB_CLEAR_NODE(&dso->rb_node);
1222 dso->root = NULL; 1217 dso->root = NULL;
1223 INIT_LIST_HEAD(&dso->node); 1218 INIT_LIST_HEAD(&dso->node);
diff --git a/tools/perf/util/dso.h b/tools/perf/util/dso.h
index ef69de2e69ea..c5380500bed4 100644
--- a/tools/perf/util/dso.h
+++ b/tools/perf/util/dso.h
@@ -175,6 +175,7 @@ struct dso {
175 u16 short_name_len; 175 u16 short_name_len;
176 void *dwfl; /* DWARF debug info */ 176 void *dwfl; /* DWARF debug info */
177 struct auxtrace_cache *auxtrace_cache; 177 struct auxtrace_cache *auxtrace_cache;
178 int comp;
178 179
179 /* dso data file */ 180 /* dso data file */
180 struct { 181 struct {
@@ -250,9 +251,7 @@ int dso__kernel_module_get_build_id(struct dso *dso, const char *root_dir);
250char dso__symtab_origin(const struct dso *dso); 251char dso__symtab_origin(const struct dso *dso);
251int dso__read_binary_type_filename(const struct dso *dso, enum dso_binary_type type, 252int dso__read_binary_type_filename(const struct dso *dso, enum dso_binary_type type,
252 char *root_dir, char *filename, size_t size); 253 char *root_dir, char *filename, size_t size);
253bool is_supported_compression(const char *ext);
254bool is_kernel_module(const char *pathname, int cpumode); 254bool is_kernel_module(const char *pathname, int cpumode);
255bool decompress_to_file(const char *ext, const char *filename, int output_fd);
256bool dso__needs_decompress(struct dso *dso); 255bool dso__needs_decompress(struct dso *dso);
257int dso__decompress_kmodule_fd(struct dso *dso, const char *name); 256int dso__decompress_kmodule_fd(struct dso *dso, const char *name);
258int dso__decompress_kmodule_path(struct dso *dso, const char *name, 257int dso__decompress_kmodule_path(struct dso *dso, const char *name,
@@ -263,17 +262,15 @@ int dso__decompress_kmodule_path(struct dso *dso, const char *name,
263 262
264struct kmod_path { 263struct kmod_path {
265 char *name; 264 char *name;
266 char *ext; 265 int comp;
267 bool comp;
268 bool kmod; 266 bool kmod;
269}; 267};
270 268
271int __kmod_path__parse(struct kmod_path *m, const char *path, 269int __kmod_path__parse(struct kmod_path *m, const char *path,
272 bool alloc_name, bool alloc_ext); 270 bool alloc_name);
273 271
274#define kmod_path__parse(__m, __p) __kmod_path__parse(__m, __p, false, false) 272#define kmod_path__parse(__m, __p) __kmod_path__parse(__m, __p, false)
275#define kmod_path__parse_name(__m, __p) __kmod_path__parse(__m, __p, true , false) 273#define kmod_path__parse_name(__m, __p) __kmod_path__parse(__m, __p, true)
276#define kmod_path__parse_ext(__m, __p) __kmod_path__parse(__m, __p, false, true)
277 274
278void dso__set_module_info(struct dso *dso, struct kmod_path *m, 275void dso__set_module_info(struct dso *dso, struct kmod_path *m,
279 struct machine *machine); 276 struct machine *machine);
diff --git a/tools/perf/util/event.c b/tools/perf/util/event.c
index 0c8ecf0c78a4..0cd42150f712 100644
--- a/tools/perf/util/event.c
+++ b/tools/perf/util/event.c
@@ -541,10 +541,17 @@ static int __event__synthesize_thread(union perf_event *comm_event,
541 tgid, process, machine) < 0) 541 tgid, process, machine) < 0)
542 return -1; 542 return -1;
543 543
544 /*
545 * send mmap only for thread group leader
546 * see thread__init_map_groups
547 */
548 if (pid == tgid &&
549 perf_event__synthesize_mmap_events(tool, mmap_event, pid, tgid,
550 process, machine, mmap_data,
551 proc_map_timeout))
552 return -1;
544 553
545 return perf_event__synthesize_mmap_events(tool, mmap_event, pid, tgid, 554 return 0;
546 process, machine, mmap_data,
547 proc_map_timeout);
548 } 555 }
549 556
550 if (machine__is_default_guest(machine)) 557 if (machine__is_default_guest(machine))
diff --git a/tools/perf/util/evlist.c b/tools/perf/util/evlist.c
index e7a4b31a84fb..be440df29615 100644
--- a/tools/perf/util/evlist.c
+++ b/tools/perf/util/evlist.c
@@ -803,7 +803,7 @@ static int perf_evlist__mmap_per_evsel(struct perf_evlist *evlist, int idx,
803 if (*output == -1) { 803 if (*output == -1) {
804 *output = fd; 804 *output = fd;
805 805
806 if (perf_mmap__mmap(&maps[idx], mp, *output) < 0) 806 if (perf_mmap__mmap(&maps[idx], mp, *output, evlist_cpu) < 0)
807 return -1; 807 return -1;
808 } else { 808 } else {
809 if (ioctl(fd, PERF_EVENT_IOC_SET_OUTPUT, *output) != 0) 809 if (ioctl(fd, PERF_EVENT_IOC_SET_OUTPUT, *output) != 0)
diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c
index 94fce4f537e9..c980bbff6353 100644
--- a/tools/perf/util/evsel.c
+++ b/tools/perf/util/evsel.c
@@ -260,6 +260,17 @@ struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx)
260 evsel->attr.sample_period = 1; 260 evsel->attr.sample_period = 1;
261 } 261 }
262 262
263 if (perf_evsel__is_clock(evsel)) {
264 /*
265 * The evsel->unit points to static alias->unit
266 * so it's ok to use static string in here.
267 */
268 static const char *unit = "msec";
269
270 evsel->unit = unit;
271 evsel->scale = 1e-6;
272 }
273
263 return evsel; 274 return evsel;
264} 275}
265 276
@@ -848,6 +859,12 @@ static void apply_config_terms(struct perf_evsel *evsel,
848 } 859 }
849} 860}
850 861
862static bool is_dummy_event(struct perf_evsel *evsel)
863{
864 return (evsel->attr.type == PERF_TYPE_SOFTWARE) &&
865 (evsel->attr.config == PERF_COUNT_SW_DUMMY);
866}
867
851/* 868/*
852 * The enable_on_exec/disabled value strategy: 869 * The enable_on_exec/disabled value strategy:
853 * 870 *
@@ -1086,6 +1103,14 @@ void perf_evsel__config(struct perf_evsel *evsel, struct record_opts *opts,
1086 else 1103 else
1087 perf_evsel__reset_sample_bit(evsel, PERIOD); 1104 perf_evsel__reset_sample_bit(evsel, PERIOD);
1088 } 1105 }
1106
1107 /*
1108 * For initial_delay, a dummy event is added implicitly.
1109 * The software event will trigger -EOPNOTSUPP error out,
1110 * if BRANCH_STACK bit is set.
1111 */
1112 if (opts->initial_delay && is_dummy_event(evsel))
1113 perf_evsel__reset_sample_bit(evsel, BRANCH_STACK);
1089} 1114}
1090 1115
1091static int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads) 1116static int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads)
@@ -2658,7 +2683,7 @@ int perf_event__synthesize_sample(union perf_event *event, u64 type,
2658 2683
2659struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name) 2684struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name)
2660{ 2685{
2661 return pevent_find_field(evsel->tp_format, name); 2686 return tep_find_field(evsel->tp_format, name);
2662} 2687}
2663 2688
2664void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample, 2689void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample,
diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h
index d277930b19a1..163c960614d3 100644
--- a/tools/perf/util/evsel.h
+++ b/tools/perf/util/evsel.h
@@ -402,10 +402,13 @@ bool perf_evsel__is_function_event(struct perf_evsel *evsel);
402 402
403static inline bool perf_evsel__is_bpf_output(struct perf_evsel *evsel) 403static inline bool perf_evsel__is_bpf_output(struct perf_evsel *evsel)
404{ 404{
405 struct perf_event_attr *attr = &evsel->attr; 405 return perf_evsel__match(evsel, SOFTWARE, SW_BPF_OUTPUT);
406}
406 407
407 return (attr->config == PERF_COUNT_SW_BPF_OUTPUT) && 408static inline bool perf_evsel__is_clock(struct perf_evsel *evsel)
408 (attr->type == PERF_TYPE_SOFTWARE); 409{
410 return perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK) ||
411 perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK);
409} 412}
410 413
411struct perf_attr_details { 414struct perf_attr_details {
@@ -449,11 +452,18 @@ static inline int perf_evsel__group_idx(struct perf_evsel *evsel)
449 return evsel->idx - evsel->leader->idx; 452 return evsel->idx - evsel->leader->idx;
450} 453}
451 454
455/* Iterates group WITHOUT the leader. */
452#define for_each_group_member(_evsel, _leader) \ 456#define for_each_group_member(_evsel, _leader) \
453for ((_evsel) = list_entry((_leader)->node.next, struct perf_evsel, node); \ 457for ((_evsel) = list_entry((_leader)->node.next, struct perf_evsel, node); \
454 (_evsel) && (_evsel)->leader == (_leader); \ 458 (_evsel) && (_evsel)->leader == (_leader); \
455 (_evsel) = list_entry((_evsel)->node.next, struct perf_evsel, node)) 459 (_evsel) = list_entry((_evsel)->node.next, struct perf_evsel, node))
456 460
461/* Iterates group WITH the leader. */
462#define for_each_group_evsel(_evsel, _leader) \
463for ((_evsel) = _leader; \
464 (_evsel) && (_evsel)->leader == (_leader); \
465 (_evsel) = list_entry((_evsel)->node.next, struct perf_evsel, node))
466
457static inline bool perf_evsel__has_branch_callstack(const struct perf_evsel *evsel) 467static inline bool perf_evsel__has_branch_callstack(const struct perf_evsel *evsel)
458{ 468{
459 return evsel->attr.branch_sample_type & PERF_SAMPLE_BRANCH_CALL_STACK; 469 return evsel->attr.branch_sample_type & PERF_SAMPLE_BRANCH_CALL_STACK;
diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
index 653ff65aa2c3..3cadc252dd89 100644
--- a/tools/perf/util/header.c
+++ b/tools/perf/util/header.c
@@ -279,8 +279,6 @@ static int do_read_bitmap(struct feat_fd *ff, unsigned long **pset, u64 *psize)
279 if (!set) 279 if (!set)
280 return -ENOMEM; 280 return -ENOMEM;
281 281
282 bitmap_zero(set, size);
283
284 p = (u64 *) set; 282 p = (u64 *) set;
285 283
286 for (i = 0; (u64) i < BITS_TO_U64(size); i++) { 284 for (i = 0; (u64) i < BITS_TO_U64(size); i++) {
@@ -1285,7 +1283,6 @@ static int memory_node__read(struct memory_node *n, unsigned long idx)
1285 return -ENOMEM; 1283 return -ENOMEM;
1286 } 1284 }
1287 1285
1288 bitmap_zero(n->set, size);
1289 n->node = idx; 1286 n->node = idx;
1290 n->size = size; 1287 n->size = size;
1291 1288
@@ -2587,7 +2584,7 @@ static const struct feature_ops feat_ops[HEADER_LAST_FEATURE] = {
2587 FEAT_OPR(NUMA_TOPOLOGY, numa_topology, true), 2584 FEAT_OPR(NUMA_TOPOLOGY, numa_topology, true),
2588 FEAT_OPN(BRANCH_STACK, branch_stack, false), 2585 FEAT_OPN(BRANCH_STACK, branch_stack, false),
2589 FEAT_OPR(PMU_MAPPINGS, pmu_mappings, false), 2586 FEAT_OPR(PMU_MAPPINGS, pmu_mappings, false),
2590 FEAT_OPN(GROUP_DESC, group_desc, false), 2587 FEAT_OPR(GROUP_DESC, group_desc, false),
2591 FEAT_OPN(AUXTRACE, auxtrace, false), 2588 FEAT_OPN(AUXTRACE, auxtrace, false),
2592 FEAT_OPN(STAT, stat, false), 2589 FEAT_OPN(STAT, stat, false),
2593 FEAT_OPN(CACHE, cache, true), 2590 FEAT_OPN(CACHE, cache, true),
@@ -3207,7 +3204,7 @@ static int read_attr(int fd, struct perf_header *ph,
3207} 3204}
3208 3205
3209static int perf_evsel__prepare_tracepoint_event(struct perf_evsel *evsel, 3206static int perf_evsel__prepare_tracepoint_event(struct perf_evsel *evsel,
3210 struct pevent *pevent) 3207 struct tep_handle *pevent)
3211{ 3208{
3212 struct event_format *event; 3209 struct event_format *event;
3213 char bf[128]; 3210 char bf[128];
@@ -3221,7 +3218,7 @@ static int perf_evsel__prepare_tracepoint_event(struct perf_evsel *evsel,
3221 return -1; 3218 return -1;
3222 } 3219 }
3223 3220
3224 event = pevent_find_event(pevent, evsel->attr.config); 3221 event = tep_find_event(pevent, evsel->attr.config);
3225 if (event == NULL) { 3222 if (event == NULL) {
3226 pr_debug("cannot find event format for %d\n", (int)evsel->attr.config); 3223 pr_debug("cannot find event format for %d\n", (int)evsel->attr.config);
3227 return -1; 3224 return -1;
@@ -3239,7 +3236,7 @@ static int perf_evsel__prepare_tracepoint_event(struct perf_evsel *evsel,
3239} 3236}
3240 3237
3241static int perf_evlist__prepare_tracepoint_events(struct perf_evlist *evlist, 3238static int perf_evlist__prepare_tracepoint_events(struct perf_evlist *evlist,
3242 struct pevent *pevent) 3239 struct tep_handle *pevent)
3243{ 3240{
3244 struct perf_evsel *pos; 3241 struct perf_evsel *pos;
3245 3242
diff --git a/tools/perf/util/hist.h b/tools/perf/util/hist.h
index 73049f7f0f60..3badd7f1e1b8 100644
--- a/tools/perf/util/hist.h
+++ b/tools/perf/util/hist.h
@@ -181,7 +181,7 @@ size_t events_stats__fprintf(struct events_stats *stats, FILE *fp);
181 181
182size_t hists__fprintf(struct hists *hists, bool show_header, int max_rows, 182size_t hists__fprintf(struct hists *hists, bool show_header, int max_rows,
183 int max_cols, float min_pcnt, FILE *fp, 183 int max_cols, float min_pcnt, FILE *fp,
184 bool use_callchain); 184 bool ignore_callchains);
185size_t perf_evlist__fprintf_nr_events(struct perf_evlist *evlist, FILE *fp); 185size_t perf_evlist__fprintf_nr_events(struct perf_evlist *evlist, FILE *fp);
186 186
187void hists__filter_by_dso(struct hists *hists); 187void hists__filter_by_dso(struct hists *hists);
diff --git a/tools/perf/util/llvm-utils.c b/tools/perf/util/llvm-utils.c
index 5e94857dfca2..19262f98cd4e 100644
--- a/tools/perf/util/llvm-utils.c
+++ b/tools/perf/util/llvm-utils.c
@@ -22,12 +22,14 @@
22 "$CLANG_OPTIONS $KERNEL_INC_OPTIONS $PERF_BPF_INC_OPTIONS " \ 22 "$CLANG_OPTIONS $KERNEL_INC_OPTIONS $PERF_BPF_INC_OPTIONS " \
23 "-Wno-unused-value -Wno-pointer-sign " \ 23 "-Wno-unused-value -Wno-pointer-sign " \
24 "-working-directory $WORKING_DIR " \ 24 "-working-directory $WORKING_DIR " \
25 "-c \"$CLANG_SOURCE\" -target bpf -O2 -o -" 25 "-c \"$CLANG_SOURCE\" -target bpf $CLANG_EMIT_LLVM -O2 -o - $LLVM_OPTIONS_PIPE"
26 26
27struct llvm_param llvm_param = { 27struct llvm_param llvm_param = {
28 .clang_path = "clang", 28 .clang_path = "clang",
29 .llc_path = "llc",
29 .clang_bpf_cmd_template = CLANG_BPF_CMD_DEFAULT_TEMPLATE, 30 .clang_bpf_cmd_template = CLANG_BPF_CMD_DEFAULT_TEMPLATE,
30 .clang_opt = NULL, 31 .clang_opt = NULL,
32 .opts = NULL,
31 .kbuild_dir = NULL, 33 .kbuild_dir = NULL,
32 .kbuild_opts = NULL, 34 .kbuild_opts = NULL,
33 .user_set_param = false, 35 .user_set_param = false,
@@ -51,6 +53,8 @@ int perf_llvm_config(const char *var, const char *value)
51 llvm_param.kbuild_opts = strdup(value); 53 llvm_param.kbuild_opts = strdup(value);
52 else if (!strcmp(var, "dump-obj")) 54 else if (!strcmp(var, "dump-obj"))
53 llvm_param.dump_obj = !!perf_config_bool(var, value); 55 llvm_param.dump_obj = !!perf_config_bool(var, value);
56 else if (!strcmp(var, "opts"))
57 llvm_param.opts = strdup(value);
54 else { 58 else {
55 pr_debug("Invalid LLVM config option: %s\n", value); 59 pr_debug("Invalid LLVM config option: %s\n", value);
56 return -1; 60 return -1;
@@ -430,11 +434,13 @@ int llvm__compile_bpf(const char *path, void **p_obj_buf,
430 unsigned int kernel_version; 434 unsigned int kernel_version;
431 char linux_version_code_str[64]; 435 char linux_version_code_str[64];
432 const char *clang_opt = llvm_param.clang_opt; 436 const char *clang_opt = llvm_param.clang_opt;
433 char clang_path[PATH_MAX], abspath[PATH_MAX], nr_cpus_avail_str[64]; 437 char clang_path[PATH_MAX], llc_path[PATH_MAX], abspath[PATH_MAX], nr_cpus_avail_str[64];
434 char serr[STRERR_BUFSIZE]; 438 char serr[STRERR_BUFSIZE];
435 char *kbuild_dir = NULL, *kbuild_include_opts = NULL, 439 char *kbuild_dir = NULL, *kbuild_include_opts = NULL,
436 *perf_bpf_include_opts = NULL; 440 *perf_bpf_include_opts = NULL;
437 const char *template = llvm_param.clang_bpf_cmd_template; 441 const char *template = llvm_param.clang_bpf_cmd_template;
442 char *pipe_template = NULL;
443 const char *opts = llvm_param.opts;
438 char *command_echo = NULL, *command_out; 444 char *command_echo = NULL, *command_out;
439 char *perf_include_dir = system_path(PERF_INCLUDE_DIR); 445 char *perf_include_dir = system_path(PERF_INCLUDE_DIR);
440 446
@@ -484,6 +490,26 @@ int llvm__compile_bpf(const char *path, void **p_obj_buf,
484 force_set_env("PERF_BPF_INC_OPTIONS", perf_bpf_include_opts); 490 force_set_env("PERF_BPF_INC_OPTIONS", perf_bpf_include_opts);
485 force_set_env("WORKING_DIR", kbuild_dir ? : "."); 491 force_set_env("WORKING_DIR", kbuild_dir ? : ".");
486 492
493 if (opts) {
494 err = search_program(llvm_param.llc_path, "llc", llc_path);
495 if (err) {
496 pr_err("ERROR:\tunable to find llc.\n"
497 "Hint:\tTry to install latest clang/llvm to support BPF. Check your $PATH\n"
498 " \tand 'llc-path' option in [llvm] section of ~/.perfconfig.\n");
499 version_notice();
500 goto errout;
501 }
502
503 if (asprintf(&pipe_template, "%s -emit-llvm | %s -march=bpf %s -filetype=obj -o -",
504 template, llc_path, opts) < 0) {
505 pr_err("ERROR:\tnot enough memory to setup command line\n");
506 goto errout;
507 }
508
509 template = pipe_template;
510
511 }
512
487 /* 513 /*
488 * Since we may reset clang's working dir, path of source file 514 * Since we may reset clang's working dir, path of source file
489 * should be transferred into absolute path, except we want 515 * should be transferred into absolute path, except we want
@@ -535,6 +561,7 @@ errout:
535 free(obj_buf); 561 free(obj_buf);
536 free(perf_bpf_include_opts); 562 free(perf_bpf_include_opts);
537 free(perf_include_dir); 563 free(perf_include_dir);
564 free(pipe_template);
538 if (p_obj_buf) 565 if (p_obj_buf)
539 *p_obj_buf = NULL; 566 *p_obj_buf = NULL;
540 if (p_obj_buf_sz) 567 if (p_obj_buf_sz)
diff --git a/tools/perf/util/llvm-utils.h b/tools/perf/util/llvm-utils.h
index d3ad8deb5db4..bf3f3f4c4fe2 100644
--- a/tools/perf/util/llvm-utils.h
+++ b/tools/perf/util/llvm-utils.h
@@ -11,6 +11,8 @@
11struct llvm_param { 11struct llvm_param {
12 /* Path of clang executable */ 12 /* Path of clang executable */
13 const char *clang_path; 13 const char *clang_path;
14 /* Path of llc executable */
15 const char *llc_path;
14 /* 16 /*
15 * Template of clang bpf compiling. 5 env variables 17 * Template of clang bpf compiling. 5 env variables
16 * can be used: 18 * can be used:
@@ -23,6 +25,13 @@ struct llvm_param {
23 const char *clang_bpf_cmd_template; 25 const char *clang_bpf_cmd_template;
24 /* Will be filled in $CLANG_OPTIONS */ 26 /* Will be filled in $CLANG_OPTIONS */
25 const char *clang_opt; 27 const char *clang_opt;
28 /*
29 * If present it'll add -emit-llvm to $CLANG_OPTIONS to pipe
30 * the clang output to llc, useful for new llvm options not
31 * yet selectable via 'clang -mllvm option', such as -mattr=dwarfris
32 * in clang 6.0/llvm 7
33 */
34 const char *opts;
26 /* Where to find kbuild system */ 35 /* Where to find kbuild system */
27 const char *kbuild_dir; 36 const char *kbuild_dir;
28 /* 37 /*
diff --git a/tools/perf/util/lzma.c b/tools/perf/util/lzma.c
index 07498eaddc08..b1dd29a9d915 100644
--- a/tools/perf/util/lzma.c
+++ b/tools/perf/util/lzma.c
@@ -3,9 +3,13 @@
3#include <lzma.h> 3#include <lzma.h>
4#include <stdio.h> 4#include <stdio.h>
5#include <linux/compiler.h> 5#include <linux/compiler.h>
6#include <sys/types.h>
7#include <sys/stat.h>
8#include <fcntl.h>
6#include "compress.h" 9#include "compress.h"
7#include "util.h" 10#include "util.h"
8#include "debug.h" 11#include "debug.h"
12#include <unistd.h>
9 13
10#define BUFSIZE 8192 14#define BUFSIZE 8192
11 15
@@ -99,3 +103,19 @@ err_fclose:
99 fclose(infile); 103 fclose(infile);
100 return err; 104 return err;
101} 105}
106
107bool lzma_is_compressed(const char *input)
108{
109 int fd = open(input, O_RDONLY);
110 const uint8_t magic[6] = { 0xFD, '7', 'z', 'X', 'Z', 0x00 };
111 char buf[6] = { 0 };
112 ssize_t rc;
113
114 if (fd < 0)
115 return -1;
116
117 rc = read(fd, buf, sizeof(buf));
118 close(fd);
119 return rc == sizeof(buf) ?
120 memcmp(buf, magic, sizeof(buf)) == 0 : false;
121}
diff --git a/tools/perf/util/machine.c b/tools/perf/util/machine.c
index e7b4a8b513f2..c4acd2001db0 100644
--- a/tools/perf/util/machine.c
+++ b/tools/perf/util/machine.c
@@ -408,23 +408,16 @@ out_err:
408} 408}
409 409
410/* 410/*
411 * Caller must eventually drop thread->refcnt returned with a successful 411 * Front-end cache - TID lookups come in blocks,
412 * lookup/new thread inserted. 412 * so most of the time we dont have to look up
413 * the full rbtree:
413 */ 414 */
414static struct thread *____machine__findnew_thread(struct machine *machine, 415static struct thread*
415 struct threads *threads, 416__threads__get_last_match(struct threads *threads, struct machine *machine,
416 pid_t pid, pid_t tid, 417 int pid, int tid)
417 bool create)
418{ 418{
419 struct rb_node **p = &threads->entries.rb_node;
420 struct rb_node *parent = NULL;
421 struct thread *th; 419 struct thread *th;
422 420
423 /*
424 * Front-end cache - TID lookups come in blocks,
425 * so most of the time we dont have to look up
426 * the full rbtree:
427 */
428 th = threads->last_match; 421 th = threads->last_match;
429 if (th != NULL) { 422 if (th != NULL) {
430 if (th->tid == tid) { 423 if (th->tid == tid) {
@@ -435,12 +428,57 @@ static struct thread *____machine__findnew_thread(struct machine *machine,
435 threads->last_match = NULL; 428 threads->last_match = NULL;
436 } 429 }
437 430
431 return NULL;
432}
433
434static struct thread*
435threads__get_last_match(struct threads *threads, struct machine *machine,
436 int pid, int tid)
437{
438 struct thread *th = NULL;
439
440 if (perf_singlethreaded)
441 th = __threads__get_last_match(threads, machine, pid, tid);
442
443 return th;
444}
445
446static void
447__threads__set_last_match(struct threads *threads, struct thread *th)
448{
449 threads->last_match = th;
450}
451
452static void
453threads__set_last_match(struct threads *threads, struct thread *th)
454{
455 if (perf_singlethreaded)
456 __threads__set_last_match(threads, th);
457}
458
459/*
460 * Caller must eventually drop thread->refcnt returned with a successful
461 * lookup/new thread inserted.
462 */
463static struct thread *____machine__findnew_thread(struct machine *machine,
464 struct threads *threads,
465 pid_t pid, pid_t tid,
466 bool create)
467{
468 struct rb_node **p = &threads->entries.rb_node;
469 struct rb_node *parent = NULL;
470 struct thread *th;
471
472 th = threads__get_last_match(threads, machine, pid, tid);
473 if (th)
474 return th;
475
438 while (*p != NULL) { 476 while (*p != NULL) {
439 parent = *p; 477 parent = *p;
440 th = rb_entry(parent, struct thread, rb_node); 478 th = rb_entry(parent, struct thread, rb_node);
441 479
442 if (th->tid == tid) { 480 if (th->tid == tid) {
443 threads->last_match = th; 481 threads__set_last_match(threads, th);
444 machine__update_thread_pid(machine, th, pid); 482 machine__update_thread_pid(machine, th, pid);
445 return thread__get(th); 483 return thread__get(th);
446 } 484 }
@@ -477,7 +515,7 @@ static struct thread *____machine__findnew_thread(struct machine *machine,
477 * It is now in the rbtree, get a ref 515 * It is now in the rbtree, get a ref
478 */ 516 */
479 thread__get(th); 517 thread__get(th);
480 threads->last_match = th; 518 threads__set_last_match(threads, th);
481 ++threads->nr; 519 ++threads->nr;
482 } 520 }
483 521
@@ -1174,8 +1212,10 @@ static int map_groups__set_module_path(struct map_groups *mg, const char *path,
1174 * Full name could reveal us kmod compression, so 1212 * Full name could reveal us kmod compression, so
1175 * we need to update the symtab_type if needed. 1213 * we need to update the symtab_type if needed.
1176 */ 1214 */
1177 if (m->comp && is_kmod_dso(map->dso)) 1215 if (m->comp && is_kmod_dso(map->dso)) {
1178 map->dso->symtab_type++; 1216 map->dso->symtab_type++;
1217 map->dso->comp = m->comp;
1218 }
1179 1219
1180 return 0; 1220 return 0;
1181} 1221}
@@ -1635,7 +1675,7 @@ static void __machine__remove_thread(struct machine *machine, struct thread *th,
1635 struct threads *threads = machine__threads(machine, th->tid); 1675 struct threads *threads = machine__threads(machine, th->tid);
1636 1676
1637 if (threads->last_match == th) 1677 if (threads->last_match == th)
1638 threads->last_match = NULL; 1678 threads__set_last_match(threads, NULL);
1639 1679
1640 BUG_ON(refcount_read(&th->refcnt) == 0); 1680 BUG_ON(refcount_read(&th->refcnt) == 0);
1641 if (lock) 1681 if (lock)
@@ -2272,6 +2312,7 @@ static int unwind_entry(struct unwind_entry *entry, void *arg)
2272{ 2312{
2273 struct callchain_cursor *cursor = arg; 2313 struct callchain_cursor *cursor = arg;
2274 const char *srcline = NULL; 2314 const char *srcline = NULL;
2315 u64 addr;
2275 2316
2276 if (symbol_conf.hide_unresolved && entry->sym == NULL) 2317 if (symbol_conf.hide_unresolved && entry->sym == NULL)
2277 return 0; 2318 return 0;
@@ -2279,7 +2320,13 @@ static int unwind_entry(struct unwind_entry *entry, void *arg)
2279 if (append_inlines(cursor, entry->map, entry->sym, entry->ip) == 0) 2320 if (append_inlines(cursor, entry->map, entry->sym, entry->ip) == 0)
2280 return 0; 2321 return 0;
2281 2322
2282 srcline = callchain_srcline(entry->map, entry->sym, entry->ip); 2323 /*
2324 * Convert entry->ip from a virtual address to an offset in
2325 * its corresponding binary.
2326 */
2327 addr = map__map_ip(entry->map, entry->ip);
2328
2329 srcline = callchain_srcline(entry->map, entry->sym, addr);
2283 return callchain_cursor_append(cursor, entry->ip, 2330 return callchain_cursor_append(cursor, entry->ip,
2284 entry->map, entry->sym, 2331 entry->map, entry->sym,
2285 false, NULL, 0, 0, 0, srcline); 2332 false, NULL, 0, 0, 0, srcline);
diff --git a/tools/perf/util/machine.h b/tools/perf/util/machine.h
index 1de7660d93e9..d856b85862e2 100644
--- a/tools/perf/util/machine.h
+++ b/tools/perf/util/machine.h
@@ -265,7 +265,7 @@ pid_t machine__get_current_tid(struct machine *machine, int cpu);
265int machine__set_current_tid(struct machine *machine, int cpu, pid_t pid, 265int machine__set_current_tid(struct machine *machine, int cpu, pid_t pid,
266 pid_t tid); 266 pid_t tid);
267/* 267/*
268 * For use with libtraceevent's pevent_set_function_resolver() 268 * For use with libtraceevent's tep_set_function_resolver()
269 */ 269 */
270char *machine__resolve_kernel_addr(void *vmachine, unsigned long long *addrp, char **modp); 270char *machine__resolve_kernel_addr(void *vmachine, unsigned long long *addrp, char **modp);
271 271
diff --git a/tools/perf/util/map.c b/tools/perf/util/map.c
index 89ac5b5dc218..36d0763311ef 100644
--- a/tools/perf/util/map.c
+++ b/tools/perf/util/map.c
@@ -381,20 +381,6 @@ struct map *map__clone(struct map *from)
381 return map; 381 return map;
382} 382}
383 383
384int map__overlap(struct map *l, struct map *r)
385{
386 if (l->start > r->start) {
387 struct map *t = l;
388 l = r;
389 r = t;
390 }
391
392 if (l->end > r->start)
393 return 1;
394
395 return 0;
396}
397
398size_t map__fprintf(struct map *map, FILE *fp) 384size_t map__fprintf(struct map *map, FILE *fp)
399{ 385{
400 return fprintf(fp, " %" PRIx64 "-%" PRIx64 " %" PRIx64 " %s\n", 386 return fprintf(fp, " %" PRIx64 "-%" PRIx64 " %" PRIx64 " %s\n",
@@ -675,20 +661,42 @@ static void __map_groups__insert(struct map_groups *mg, struct map *map)
675static int maps__fixup_overlappings(struct maps *maps, struct map *map, FILE *fp) 661static int maps__fixup_overlappings(struct maps *maps, struct map *map, FILE *fp)
676{ 662{
677 struct rb_root *root; 663 struct rb_root *root;
678 struct rb_node *next; 664 struct rb_node *next, *first;
679 int err = 0; 665 int err = 0;
680 666
681 down_write(&maps->lock); 667 down_write(&maps->lock);
682 668
683 root = &maps->entries; 669 root = &maps->entries;
684 next = rb_first(root);
685 670
671 /*
672 * Find first map where end > map->start.
673 * Same as find_vma() in kernel.
674 */
675 next = root->rb_node;
676 first = NULL;
677 while (next) {
678 struct map *pos = rb_entry(next, struct map, rb_node);
679
680 if (pos->end > map->start) {
681 first = next;
682 if (pos->start <= map->start)
683 break;
684 next = next->rb_left;
685 } else
686 next = next->rb_right;
687 }
688
689 next = first;
686 while (next) { 690 while (next) {
687 struct map *pos = rb_entry(next, struct map, rb_node); 691 struct map *pos = rb_entry(next, struct map, rb_node);
688 next = rb_next(&pos->rb_node); 692 next = rb_next(&pos->rb_node);
689 693
690 if (!map__overlap(pos, map)) 694 /*
691 continue; 695 * Stop if current map starts after map->end.
696 * Maps are ordered by start: next will not overlap for sure.
697 */
698 if (pos->start >= map->end)
699 break;
692 700
693 if (verbose >= 2) { 701 if (verbose >= 2) {
694 702
diff --git a/tools/perf/util/map.h b/tools/perf/util/map.h
index 4cb90f242bed..e0f327b51e66 100644
--- a/tools/perf/util/map.h
+++ b/tools/perf/util/map.h
@@ -166,7 +166,6 @@ static inline void __map__zput(struct map **map)
166 166
167#define map__zput(map) __map__zput(&map) 167#define map__zput(map) __map__zput(&map)
168 168
169int map__overlap(struct map *l, struct map *r);
170size_t map__fprintf(struct map *map, FILE *fp); 169size_t map__fprintf(struct map *map, FILE *fp);
171size_t map__fprintf_dsoname(struct map *map, FILE *fp); 170size_t map__fprintf_dsoname(struct map *map, FILE *fp);
172char *map__srcline(struct map *map, u64 addr, struct symbol *sym); 171char *map__srcline(struct map *map, u64 addr, struct symbol *sym);
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 1ddc3d1d0147..a28f9b5cc4ff 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -326,8 +326,8 @@ void metricgroup__print(bool metrics, bool metricgroups, char *filter,
326 if (raw) 326 if (raw)
327 s = (char *)pe->metric_name; 327 s = (char *)pe->metric_name;
328 else { 328 else {
329 if (asprintf(&s, "%s\n\t[%s]", 329 if (asprintf(&s, "%s\n%*s%s]",
330 pe->metric_name, pe->desc) < 0) 330 pe->metric_name, 8, "[", pe->desc) < 0)
331 return; 331 return;
332 } 332 }
333 333
@@ -490,3 +490,25 @@ out:
490 metricgroup__free_egroups(&group_list); 490 metricgroup__free_egroups(&group_list);
491 return ret; 491 return ret;
492} 492}
493
494bool metricgroup__has_metric(const char *metric)
495{
496 struct pmu_events_map *map = perf_pmu__find_map(NULL);
497 struct pmu_event *pe;
498 int i;
499
500 if (!map)
501 return false;
502
503 for (i = 0; ; i++) {
504 pe = &map->table[i];
505
506 if (!pe->name && !pe->metric_group && !pe->metric_name)
507 break;
508 if (!pe->metric_expr)
509 continue;
510 if (match_metric(pe->metric_name, metric))
511 return true;
512 }
513 return false;
514}
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 06854e125ee7..8a155dba0581 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -28,4 +28,5 @@ int metricgroup__parse_groups(const struct option *opt,
28 struct rblist *metric_events); 28 struct rblist *metric_events);
29 29
30void metricgroup__print(bool metrics, bool groups, char *filter, bool raw); 30void metricgroup__print(bool metrics, bool groups, char *filter, bool raw);
31bool metricgroup__has_metric(const char *metric);
31#endif 32#endif
diff --git a/tools/perf/util/mmap.c b/tools/perf/util/mmap.c
index fc832676a798..215f69f41672 100644
--- a/tools/perf/util/mmap.c
+++ b/tools/perf/util/mmap.c
@@ -164,7 +164,7 @@ void perf_mmap__munmap(struct perf_mmap *map)
164 auxtrace_mmap__munmap(&map->auxtrace_mmap); 164 auxtrace_mmap__munmap(&map->auxtrace_mmap);
165} 165}
166 166
167int perf_mmap__mmap(struct perf_mmap *map, struct mmap_params *mp, int fd) 167int perf_mmap__mmap(struct perf_mmap *map, struct mmap_params *mp, int fd, int cpu)
168{ 168{
169 /* 169 /*
170 * The last one will be done at perf_mmap__consume(), so that we 170 * The last one will be done at perf_mmap__consume(), so that we
@@ -191,6 +191,7 @@ int perf_mmap__mmap(struct perf_mmap *map, struct mmap_params *mp, int fd)
191 return -1; 191 return -1;
192 } 192 }
193 map->fd = fd; 193 map->fd = fd;
194 map->cpu = cpu;
194 195
195 if (auxtrace_mmap__mmap(&map->auxtrace_mmap, 196 if (auxtrace_mmap__mmap(&map->auxtrace_mmap,
196 &mp->auxtrace_mp, map->base, fd)) 197 &mp->auxtrace_mp, map->base, fd))
diff --git a/tools/perf/util/mmap.h b/tools/perf/util/mmap.h
index d82294db1295..05a6d47c7956 100644
--- a/tools/perf/util/mmap.h
+++ b/tools/perf/util/mmap.h
@@ -18,6 +18,7 @@ struct perf_mmap {
18 void *base; 18 void *base;
19 int mask; 19 int mask;
20 int fd; 20 int fd;
21 int cpu;
21 refcount_t refcnt; 22 refcount_t refcnt;
22 u64 prev; 23 u64 prev;
23 u64 start; 24 u64 start;
@@ -60,7 +61,7 @@ struct mmap_params {
60 struct auxtrace_mmap_params auxtrace_mp; 61 struct auxtrace_mmap_params auxtrace_mp;
61}; 62};
62 63
63int perf_mmap__mmap(struct perf_mmap *map, struct mmap_params *mp, int fd); 64int perf_mmap__mmap(struct perf_mmap *map, struct mmap_params *mp, int fd, int cpu);
64void perf_mmap__munmap(struct perf_mmap *map); 65void perf_mmap__munmap(struct perf_mmap *map);
65 66
66void perf_mmap__get(struct perf_mmap *map); 67void perf_mmap__get(struct perf_mmap *map);
diff --git a/tools/perf/util/namespaces.c b/tools/perf/util/namespaces.c
index 5be021701f34..cf8bd123cf73 100644
--- a/tools/perf/util/namespaces.c
+++ b/tools/perf/util/namespaces.c
@@ -139,6 +139,9 @@ struct nsinfo *nsinfo__copy(struct nsinfo *nsi)
139{ 139{
140 struct nsinfo *nnsi; 140 struct nsinfo *nnsi;
141 141
142 if (nsi == NULL)
143 return NULL;
144
142 nnsi = calloc(1, sizeof(*nnsi)); 145 nnsi = calloc(1, sizeof(*nnsi));
143 if (nnsi != NULL) { 146 if (nnsi != NULL) {
144 nnsi->pid = nsi->pid; 147 nnsi->pid = nsi->pid;
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 15eec49e71a1..f8cd3e7c9186 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -1991,8 +1991,11 @@ static int set_filter(struct perf_evsel *evsel, const void *arg)
1991 int nr_addr_filters = 0; 1991 int nr_addr_filters = 0;
1992 struct perf_pmu *pmu = NULL; 1992 struct perf_pmu *pmu = NULL;
1993 1993
1994 if (evsel == NULL) 1994 if (evsel == NULL) {
1995 goto err; 1995 fprintf(stderr,
1996 "--filter option should follow a -e tracepoint or HW tracer option\n");
1997 return -1;
1998 }
1996 1999
1997 if (evsel->attr.type == PERF_TYPE_TRACEPOINT) { 2000 if (evsel->attr.type == PERF_TYPE_TRACEPOINT) {
1998 if (perf_evsel__append_tp_filter(evsel, str) < 0) { 2001 if (perf_evsel__append_tp_filter(evsel, str) < 0) {
@@ -2014,8 +2017,11 @@ static int set_filter(struct perf_evsel *evsel, const void *arg)
2014 perf_pmu__scan_file(pmu, "nr_addr_filters", 2017 perf_pmu__scan_file(pmu, "nr_addr_filters",
2015 "%d", &nr_addr_filters); 2018 "%d", &nr_addr_filters);
2016 2019
2017 if (!nr_addr_filters) 2020 if (!nr_addr_filters) {
2018 goto err; 2021 fprintf(stderr,
2022 "This CPU does not support address filtering\n");
2023 return -1;
2024 }
2019 2025
2020 if (perf_evsel__append_addr_filter(evsel, str) < 0) { 2026 if (perf_evsel__append_addr_filter(evsel, str) < 0) {
2021 fprintf(stderr, 2027 fprintf(stderr,
@@ -2024,12 +2030,6 @@ static int set_filter(struct perf_evsel *evsel, const void *arg)
2024 } 2030 }
2025 2031
2026 return 0; 2032 return 0;
2027
2028err:
2029 fprintf(stderr,
2030 "--filter option should follow a -e tracepoint or HW tracer option\n");
2031
2032 return -1;
2033} 2033}
2034 2034
2035int parse_filter(const struct option *opt, const char *str, 2035int parse_filter(const struct option *opt, const char *str,
diff --git a/tools/perf/util/pmu.c b/tools/perf/util/pmu.c
index 3ba6a1742f91..afd68524ffa9 100644
--- a/tools/perf/util/pmu.c
+++ b/tools/perf/util/pmu.c
@@ -652,12 +652,6 @@ static int is_arm_pmu_core(const char *name)
652 if (stat(path, &st) == 0) 652 if (stat(path, &st) == 0)
653 return 1; 653 return 1;
654 654
655 /* Look for cpu sysfs (specific to s390) */
656 scnprintf(path, PATH_MAX, "%s/bus/event_source/devices/%s",
657 sysfs, name);
658 if (stat(path, &st) == 0 && !strncmp(name, "cpum_", 5))
659 return 1;
660
661 return 0; 655 return 0;
662} 656}
663 657
diff --git a/tools/perf/util/python.c b/tools/perf/util/python.c
index 863b61478edd..ce501ba14b08 100644
--- a/tools/perf/util/python.c
+++ b/tools/perf/util/python.c
@@ -11,6 +11,7 @@
11#include "cpumap.h" 11#include "cpumap.h"
12#include "print_binary.h" 12#include "print_binary.h"
13#include "thread_map.h" 13#include "thread_map.h"
14#include "mmap.h"
14 15
15#if PY_MAJOR_VERSION < 3 16#if PY_MAJOR_VERSION < 3
16#define _PyUnicode_FromString(arg) \ 17#define _PyUnicode_FromString(arg) \
@@ -341,7 +342,7 @@ static bool is_tracepoint(struct pyrf_event *pevent)
341static PyObject* 342static PyObject*
342tracepoint_field(struct pyrf_event *pe, struct format_field *field) 343tracepoint_field(struct pyrf_event *pe, struct format_field *field)
343{ 344{
344 struct pevent *pevent = field->event->pevent; 345 struct tep_handle *pevent = field->event->pevent;
345 void *data = pe->sample.raw_data; 346 void *data = pe->sample.raw_data;
346 PyObject *ret = NULL; 347 PyObject *ret = NULL;
347 unsigned long long val; 348 unsigned long long val;
@@ -351,7 +352,7 @@ tracepoint_field(struct pyrf_event *pe, struct format_field *field)
351 offset = field->offset; 352 offset = field->offset;
352 len = field->size; 353 len = field->size;
353 if (field->flags & FIELD_IS_DYNAMIC) { 354 if (field->flags & FIELD_IS_DYNAMIC) {
354 val = pevent_read_number(pevent, data + offset, len); 355 val = tep_read_number(pevent, data + offset, len);
355 offset = val; 356 offset = val;
356 len = offset >> 16; 357 len = offset >> 16;
357 offset &= 0xffff; 358 offset &= 0xffff;
@@ -364,8 +365,8 @@ tracepoint_field(struct pyrf_event *pe, struct format_field *field)
364 field->flags &= ~FIELD_IS_STRING; 365 field->flags &= ~FIELD_IS_STRING;
365 } 366 }
366 } else { 367 } else {
367 val = pevent_read_number(pevent, data + field->offset, 368 val = tep_read_number(pevent, data + field->offset,
368 field->size); 369 field->size);
369 if (field->flags & FIELD_IS_POINTER) 370 if (field->flags & FIELD_IS_POINTER)
370 ret = PyLong_FromUnsignedLong((unsigned long) val); 371 ret = PyLong_FromUnsignedLong((unsigned long) val);
371 else if (field->flags & FIELD_IS_SIGNED) 372 else if (field->flags & FIELD_IS_SIGNED)
@@ -394,7 +395,7 @@ get_tracepoint_field(struct pyrf_event *pevent, PyObject *attr_name)
394 evsel->tp_format = tp_format; 395 evsel->tp_format = tp_format;
395 } 396 }
396 397
397 field = pevent_find_any_field(evsel->tp_format, str); 398 field = tep_find_any_field(evsel->tp_format, str);
398 if (!field) 399 if (!field)
399 return NULL; 400 return NULL;
400 401
@@ -976,6 +977,20 @@ static PyObject *pyrf_evlist__add(struct pyrf_evlist *pevlist,
976 return Py_BuildValue("i", evlist->nr_entries); 977 return Py_BuildValue("i", evlist->nr_entries);
977} 978}
978 979
980static struct perf_mmap *get_md(struct perf_evlist *evlist, int cpu)
981{
982 int i;
983
984 for (i = 0; i < evlist->nr_mmaps; i++) {
985 struct perf_mmap *md = &evlist->mmap[i];
986
987 if (md->cpu == cpu)
988 return md;
989 }
990
991 return NULL;
992}
993
979static PyObject *pyrf_evlist__read_on_cpu(struct pyrf_evlist *pevlist, 994static PyObject *pyrf_evlist__read_on_cpu(struct pyrf_evlist *pevlist,
980 PyObject *args, PyObject *kwargs) 995 PyObject *args, PyObject *kwargs)
981{ 996{
@@ -990,7 +1005,10 @@ static PyObject *pyrf_evlist__read_on_cpu(struct pyrf_evlist *pevlist,
990 &cpu, &sample_id_all)) 1005 &cpu, &sample_id_all))
991 return NULL; 1006 return NULL;
992 1007
993 md = &evlist->mmap[cpu]; 1008 md = get_md(evlist, cpu);
1009 if (!md)
1010 return NULL;
1011
994 if (perf_mmap__read_init(md) < 0) 1012 if (perf_mmap__read_init(md) < 0)
995 goto end; 1013 goto end;
996 1014
diff --git a/tools/perf/util/s390-cpumsf-kernel.h b/tools/perf/util/s390-cpumsf-kernel.h
new file mode 100644
index 000000000000..de8c7ad0eca8
--- /dev/null
+++ b/tools/perf/util/s390-cpumsf-kernel.h
@@ -0,0 +1,71 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Auxtrace support for s390 CPU measurement sampling facility
4 *
5 * Copyright IBM Corp. 2018
6 * Author(s): Hendrik Brueckner <brueckner@linux.ibm.com>
7 * Thomas Richter <tmricht@linux.ibm.com>
8 */
9#ifndef S390_CPUMSF_KERNEL_H
10#define S390_CPUMSF_KERNEL_H
11
12#define S390_CPUMSF_PAGESZ 4096 /* Size of sample block units */
13#define S390_CPUMSF_DIAG_DEF_FIRST 0x8001 /* Diagnostic entry lowest id */
14
15struct hws_basic_entry {
16 unsigned int def:16; /* 0-15 Data Entry Format */
17 unsigned int R:4; /* 16-19 reserved */
18 unsigned int U:4; /* 20-23 Number of unique instruct. */
19 unsigned int z:2; /* zeros */
20 unsigned int T:1; /* 26 PSW DAT mode */
21 unsigned int W:1; /* 27 PSW wait state */
22 unsigned int P:1; /* 28 PSW Problem state */
23 unsigned int AS:2; /* 29-30 PSW address-space control */
24 unsigned int I:1; /* 31 entry valid or invalid */
25 unsigned int CL:2; /* 32-33 Configuration Level */
26 unsigned int:14;
27 unsigned int prim_asn:16; /* primary ASN */
28 unsigned long long ia; /* Instruction Address */
29 unsigned long long gpp; /* Guest Program Parameter */
30 unsigned long long hpp; /* Host Program Parameter */
31};
32
33struct hws_diag_entry {
34 unsigned int def:16; /* 0-15 Data Entry Format */
35 unsigned int R:15; /* 16-19 and 20-30 reserved */
36 unsigned int I:1; /* 31 entry valid or invalid */
37 u8 data[]; /* Machine-dependent sample data */
38};
39
40struct hws_combined_entry {
41 struct hws_basic_entry basic; /* Basic-sampling data entry */
42 struct hws_diag_entry diag; /* Diagnostic-sampling data entry */
43};
44
45struct hws_trailer_entry {
46 union {
47 struct {
48 unsigned int f:1; /* 0 - Block Full Indicator */
49 unsigned int a:1; /* 1 - Alert request control */
50 unsigned int t:1; /* 2 - Timestamp format */
51 unsigned int:29; /* 3 - 31: Reserved */
52 unsigned int bsdes:16; /* 32-47: size of basic SDE */
53 unsigned int dsdes:16; /* 48-63: size of diagnostic SDE */
54 };
55 unsigned long long flags; /* 0 - 64: All indicators */
56 };
57 unsigned long long overflow; /* 64 - sample Overflow count */
58 unsigned char timestamp[16]; /* 16 - 31 timestamp */
59 unsigned long long reserved1; /* 32 -Reserved */
60 unsigned long long reserved2; /* */
61 union { /* 48 - reserved for programming use */
62 struct {
63 unsigned long long clock_base:1; /* in progusage2 */
64 unsigned long long progusage1:63;
65 unsigned long long progusage2;
66 };
67 unsigned long long progusage[2];
68 };
69};
70
71#endif
diff --git a/tools/perf/util/s390-cpumsf.c b/tools/perf/util/s390-cpumsf.c
new file mode 100644
index 000000000000..d2c78ffd9fee
--- /dev/null
+++ b/tools/perf/util/s390-cpumsf.c
@@ -0,0 +1,945 @@
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright IBM Corp. 2018
4 * Auxtrace support for s390 CPU-Measurement Sampling Facility
5 *
6 * Author(s): Thomas Richter <tmricht@linux.ibm.com>
7 *
8 * Auxiliary traces are collected during 'perf record' using rbd000 event.
9 * Several PERF_RECORD_XXX are generated during recording:
10 *
11 * PERF_RECORD_AUX:
12 * Records that new data landed in the AUX buffer part.
13 * PERF_RECORD_AUXTRACE:
14 * Defines auxtrace data. Followed by the actual data. The contents of
15 * the auxtrace data is dependent on the event and the CPU.
16 * This record is generated by perf record command. For details
17 * see Documentation/perf.data-file-format.txt.
18 * PERF_RECORD_AUXTRACE_INFO:
19 * Defines a table of contains for PERF_RECORD_AUXTRACE records. This
20 * record is generated during 'perf record' command. Each record contains up
21 * to 256 entries describing offset and size of the AUXTRACE data in the
22 * perf.data file.
23 * PERF_RECORD_AUXTRACE_ERROR:
24 * Indicates an error during AUXTRACE collection such as buffer overflow.
25 * PERF_RECORD_FINISHED_ROUND:
26 * Perf events are not necessarily in time stamp order, as they can be
27 * collected in parallel on different CPUs. If the events should be
28 * processed in time order they need to be sorted first.
29 * Perf report guarantees that there is no reordering over a
30 * PERF_RECORD_FINISHED_ROUND boundary event. All perf records with a
31 * time stamp lower than this record are processed (and displayed) before
32 * the succeeding perf record are processed.
33 *
34 * These records are evaluated during perf report command.
35 *
36 * 1. PERF_RECORD_AUXTRACE_INFO is used to set up the infrastructure for
37 * auxiliary trace data processing. See s390_cpumsf_process_auxtrace_info()
38 * below.
39 * Auxiliary trace data is collected per CPU. To merge the data into the report
40 * an auxtrace_queue is created for each CPU. It is assumed that the auxtrace
41 * data is in ascending order.
42 *
43 * Each queue has a double linked list of auxtrace_buffers. This list contains
44 * the offset and size of a CPU's auxtrace data. During auxtrace processing
45 * the data portion is mmap()'ed.
46 *
47 * To sort the queues in chronological order, all queue access is controlled
48 * by the auxtrace_heap. This is basicly a stack, each stack element has two
49 * entries, the queue number and a time stamp. However the stack is sorted by
50 * the time stamps. The highest time stamp is at the bottom the lowest
51 * (nearest) time stamp is at the top. That sort order is maintained at all
52 * times!
53 *
54 * After the auxtrace infrastructure has been setup, the auxtrace queues are
55 * filled with data (offset/size pairs) and the auxtrace_heap is populated.
56 *
57 * 2. PERF_RECORD_XXX processing triggers access to the auxtrace_queues.
58 * Each record is handled by s390_cpumsf_process_event(). The time stamp of
59 * the perf record is compared with the time stamp located on the auxtrace_heap
60 * top element. If that time stamp is lower than the time stamp from the
61 * record sample, the auxtrace queues will be processed. As auxtrace queues
62 * control many auxtrace_buffers and each buffer can be quite large, the
63 * auxtrace buffer might be processed only partially. In this case the
64 * position in the auxtrace_buffer of that queue is remembered and the time
65 * stamp of the last processed entry of the auxtrace_buffer replaces the
66 * current auxtrace_heap top.
67 *
68 * 3. Auxtrace_queues might run of out data and are feeded by the
69 * PERF_RECORD_AUXTRACE handling, see s390_cpumsf_process_auxtrace_event().
70 *
71 * Event Generation
72 * Each sampling-data entry in the auxilary trace data generates a perf sample.
73 * This sample is filled
74 * with data from the auxtrace such as PID/TID, instruction address, CPU state,
75 * etc. This sample is processed with perf_session__deliver_synth_event() to
76 * be included into the GUI.
77 *
78 * 4. PERF_RECORD_FINISHED_ROUND event is used to process all the remaining
79 * auxiliary traces entries until the time stamp of this record is reached
80 * auxtrace_heap top. This is triggered by ordered_event->deliver().
81 *
82 *
83 * Perf event processing.
84 * Event processing of PERF_RECORD_XXX entries relies on time stamp entries.
85 * This is the function call sequence:
86 *
87 * __cmd_report()
88 * |
89 * perf_session__process_events()
90 * |
91 * __perf_session__process_events()
92 * |
93 * perf_session__process_event()
94 * | This functions splits the PERF_RECORD_XXX records.
95 * | - Those generated by perf record command (type number equal or higher
96 * | than PERF_RECORD_USER_TYPE_START) are handled by
97 * | perf_session__process_user_event(see below)
98 * | - Those generated by the kernel are handled by
99 * | perf_evlist__parse_sample_timestamp()
100 * |
101 * perf_evlist__parse_sample_timestamp()
102 * | Extract time stamp from sample data.
103 * |
104 * perf_session__queue_event()
105 * | If timestamp is positive the sample is entered into an ordered_event
106 * | list, sort order is the timestamp. The event processing is deferred until
107 * | later (see perf_session__process_user_event()).
108 * | Other timestamps (0 or -1) are handled immediately by
109 * | perf_session__deliver_event(). These are events generated at start up
110 * | of command perf record. They create PERF_RECORD_COMM and PERF_RECORD_MMAP*
111 * | records. They are needed to create a list of running processes and its
112 * | memory mappings and layout. They are needed at the beginning to enable
113 * | command perf report to create process trees and memory mappings.
114 * |
115 * perf_session__deliver_event()
116 * | Delivers a PERF_RECORD_XXX entry for handling.
117 * |
118 * auxtrace__process_event()
119 * | The timestamp of the PERF_RECORD_XXX entry is taken to correlate with
120 * | time stamps from the auxiliary trace buffers. This enables
121 * | synchronization between auxiliary trace data and the events on the
122 * | perf.data file.
123 * |
124 * machine__deliver_event()
125 * | Handles the PERF_RECORD_XXX event. This depends on the record type.
126 * It might update the process tree, update a process memory map or enter
127 * a sample with IP and call back chain data into GUI data pool.
128 *
129 *
130 * Deferred processing determined by perf_session__process_user_event() is
131 * finally processed when a PERF_RECORD_FINISHED_ROUND is encountered. These
132 * are generated during command perf record.
133 * The timestamp of PERF_RECORD_FINISHED_ROUND event is taken to process all
134 * PERF_RECORD_XXX entries stored in the ordered_event list. This list was
135 * built up while reading the perf.data file.
136 * Each event is now processed by calling perf_session__deliver_event().
137 * This enables time synchronization between the data in the perf.data file and
138 * the data in the auxiliary trace buffers.
139 */
140
141#include <endian.h>
142#include <errno.h>
143#include <byteswap.h>
144#include <inttypes.h>
145#include <linux/kernel.h>
146#include <linux/types.h>
147#include <linux/bitops.h>
148#include <linux/log2.h>
149
150#include "cpumap.h"
151#include "color.h"
152#include "evsel.h"
153#include "evlist.h"
154#include "machine.h"
155#include "session.h"
156#include "util.h"
157#include "thread.h"
158#include "debug.h"
159#include "auxtrace.h"
160#include "s390-cpumsf.h"
161#include "s390-cpumsf-kernel.h"
162
163struct s390_cpumsf {
164 struct auxtrace auxtrace;
165 struct auxtrace_queues queues;
166 struct auxtrace_heap heap;
167 struct perf_session *session;
168 struct machine *machine;
169 u32 auxtrace_type;
170 u32 pmu_type;
171 u16 machine_type;
172 bool data_queued;
173};
174
175struct s390_cpumsf_queue {
176 struct s390_cpumsf *sf;
177 unsigned int queue_nr;
178 struct auxtrace_buffer *buffer;
179 int cpu;
180};
181
182/* Display s390 CPU measurement facility basic-sampling data entry */
183static bool s390_cpumsf_basic_show(const char *color, size_t pos,
184 struct hws_basic_entry *basic)
185{
186 if (basic->def != 1) {
187 pr_err("Invalid AUX trace basic entry [%#08zx]\n", pos);
188 return false;
189 }
190 color_fprintf(stdout, color, " [%#08zx] Basic Def:%04x Inst:%#04x"
191 " %c%c%c%c AS:%d ASN:%#04x IA:%#018llx\n"
192 "\t\tCL:%d HPP:%#018llx GPP:%#018llx\n",
193 pos, basic->def, basic->U,
194 basic->T ? 'T' : ' ',
195 basic->W ? 'W' : ' ',
196 basic->P ? 'P' : ' ',
197 basic->I ? 'I' : ' ',
198 basic->AS, basic->prim_asn, basic->ia, basic->CL,
199 basic->hpp, basic->gpp);
200 return true;
201}
202
203/* Display s390 CPU measurement facility diagnostic-sampling data entry */
204static bool s390_cpumsf_diag_show(const char *color, size_t pos,
205 struct hws_diag_entry *diag)
206{
207 if (diag->def < S390_CPUMSF_DIAG_DEF_FIRST) {
208 pr_err("Invalid AUX trace diagnostic entry [%#08zx]\n", pos);
209 return false;
210 }
211 color_fprintf(stdout, color, " [%#08zx] Diag Def:%04x %c\n",
212 pos, diag->def, diag->I ? 'I' : ' ');
213 return true;
214}
215
216/* Return TOD timestamp contained in an trailer entry */
217static unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
218{
219 /* te->t set: TOD in STCKE format, bytes 8-15
220 * to->t not set: TOD in STCK format, bytes 0-7
221 */
222 unsigned long long ts;
223
224 memcpy(&ts, &te->timestamp[te->t], sizeof(ts));
225 return ts;
226}
227
228/* Display s390 CPU measurement facility trailer entry */
229static bool s390_cpumsf_trailer_show(const char *color, size_t pos,
230 struct hws_trailer_entry *te)
231{
232 if (te->bsdes != sizeof(struct hws_basic_entry)) {
233 pr_err("Invalid AUX trace trailer entry [%#08zx]\n", pos);
234 return false;
235 }
236 color_fprintf(stdout, color, " [%#08zx] Trailer %c%c%c bsdes:%d"
237 " dsdes:%d Overflow:%lld Time:%#llx\n"
238 "\t\tC:%d TOD:%#lx 1:%#llx 2:%#llx\n",
239 pos,
240 te->f ? 'F' : ' ',
241 te->a ? 'A' : ' ',
242 te->t ? 'T' : ' ',
243 te->bsdes, te->dsdes, te->overflow,
244 trailer_timestamp(te), te->clock_base, te->progusage2,
245 te->progusage[0], te->progusage[1]);
246 return true;
247}
248
249/* Test a sample data block. It must be 4KB or a multiple thereof in size and
250 * 4KB page aligned. Each sample data page has a trailer entry at the
251 * end which contains the sample entry data sizes.
252 *
253 * Return true if the sample data block passes the checks and set the
254 * basic set entry size and diagnostic set entry size.
255 *
256 * Return false on failure.
257 *
258 * Note: Old hardware does not set the basic or diagnostic entry sizes
259 * in the trailer entry. Use the type number instead.
260 */
261static bool s390_cpumsf_validate(int machine_type,
262 unsigned char *buf, size_t len,
263 unsigned short *bsdes,
264 unsigned short *dsdes)
265{
266 struct hws_basic_entry *basic = (struct hws_basic_entry *)buf;
267 struct hws_trailer_entry *te;
268
269 *dsdes = *bsdes = 0;
270 if (len & (S390_CPUMSF_PAGESZ - 1)) /* Illegal size */
271 return false;
272 if (basic->def != 1) /* No basic set entry, must be first */
273 return false;
274 /* Check for trailer entry at end of SDB */
275 te = (struct hws_trailer_entry *)(buf + S390_CPUMSF_PAGESZ
276 - sizeof(*te));
277 *bsdes = te->bsdes;
278 *dsdes = te->dsdes;
279 if (!te->bsdes && !te->dsdes) {
280 /* Very old hardware, use CPUID */
281 switch (machine_type) {
282 case 2097:
283 case 2098:
284 *dsdes = 64;
285 *bsdes = 32;
286 break;
287 case 2817:
288 case 2818:
289 *dsdes = 74;
290 *bsdes = 32;
291 break;
292 case 2827:
293 case 2828:
294 *dsdes = 85;
295 *bsdes = 32;
296 break;
297 default:
298 /* Illegal trailer entry */
299 return false;
300 }
301 }
302 return true;
303}
304
305/* Return true if there is room for another entry */
306static bool s390_cpumsf_reached_trailer(size_t entry_sz, size_t pos)
307{
308 size_t payload = S390_CPUMSF_PAGESZ - sizeof(struct hws_trailer_entry);
309
310 if (payload - (pos & (S390_CPUMSF_PAGESZ - 1)) < entry_sz)
311 return false;
312 return true;
313}
314
315/* Dump an auxiliary buffer. These buffers are multiple of
316 * 4KB SDB pages.
317 */
318static void s390_cpumsf_dump(struct s390_cpumsf *sf,
319 unsigned char *buf, size_t len)
320{
321 const char *color = PERF_COLOR_BLUE;
322 struct hws_basic_entry *basic;
323 struct hws_diag_entry *diag;
324 unsigned short bsdes, dsdes;
325 size_t pos = 0;
326
327 color_fprintf(stdout, color,
328 ". ... s390 AUX data: size %zu bytes\n",
329 len);
330
331 if (!s390_cpumsf_validate(sf->machine_type, buf, len, &bsdes,
332 &dsdes)) {
333 pr_err("Invalid AUX trace data block size:%zu"
334 " (type:%d bsdes:%hd dsdes:%hd)\n",
335 len, sf->machine_type, bsdes, dsdes);
336 return;
337 }
338
339 /* s390 kernel always returns 4KB blocks fully occupied,
340 * no partially filled SDBs.
341 */
342 while (pos < len) {
343 /* Handle Basic entry */
344 basic = (struct hws_basic_entry *)(buf + pos);
345 if (s390_cpumsf_basic_show(color, pos, basic))
346 pos += bsdes;
347 else
348 return;
349
350 /* Handle Diagnostic entry */
351 diag = (struct hws_diag_entry *)(buf + pos);
352 if (s390_cpumsf_diag_show(color, pos, diag))
353 pos += dsdes;
354 else
355 return;
356
357 /* Check for trailer entry */
358 if (!s390_cpumsf_reached_trailer(bsdes + dsdes, pos)) {
359 /* Show trailer entry */
360 struct hws_trailer_entry te;
361
362 pos = (pos + S390_CPUMSF_PAGESZ)
363 & ~(S390_CPUMSF_PAGESZ - 1);
364 pos -= sizeof(te);
365 memcpy(&te, buf + pos, sizeof(te));
366 /* Set descriptor sizes in case of old hardware
367 * where these values are not set.
368 */
369 te.bsdes = bsdes;
370 te.dsdes = dsdes;
371 if (s390_cpumsf_trailer_show(color, pos, &te))
372 pos += sizeof(te);
373 else
374 return;
375 }
376 }
377}
378
379static void s390_cpumsf_dump_event(struct s390_cpumsf *sf, unsigned char *buf,
380 size_t len)
381{
382 printf(".\n");
383 s390_cpumsf_dump(sf, buf, len);
384}
385
386#define S390_LPP_PID_MASK 0xffffffff
387
388static bool s390_cpumsf_make_event(size_t pos,
389 struct hws_basic_entry *basic,
390 struct s390_cpumsf_queue *sfq)
391{
392 struct perf_sample sample = {
393 .ip = basic->ia,
394 .pid = basic->hpp & S390_LPP_PID_MASK,
395 .tid = basic->hpp & S390_LPP_PID_MASK,
396 .cpumode = PERF_RECORD_MISC_CPUMODE_UNKNOWN,
397 .cpu = sfq->cpu,
398 .period = 1
399 };
400 union perf_event event;
401
402 memset(&event, 0, sizeof(event));
403 if (basic->CL == 1) /* Native LPAR mode */
404 sample.cpumode = basic->P ? PERF_RECORD_MISC_USER
405 : PERF_RECORD_MISC_KERNEL;
406 else if (basic->CL == 2) /* Guest kernel/user space */
407 sample.cpumode = basic->P ? PERF_RECORD_MISC_GUEST_USER
408 : PERF_RECORD_MISC_GUEST_KERNEL;
409 else if (basic->gpp || basic->prim_asn != 0xffff)
410 /* Use heuristics on old hardware */
411 sample.cpumode = basic->P ? PERF_RECORD_MISC_GUEST_USER
412 : PERF_RECORD_MISC_GUEST_KERNEL;
413 else
414 sample.cpumode = basic->P ? PERF_RECORD_MISC_USER
415 : PERF_RECORD_MISC_KERNEL;
416
417 event.sample.header.type = PERF_RECORD_SAMPLE;
418 event.sample.header.misc = sample.cpumode;
419 event.sample.header.size = sizeof(struct perf_event_header);
420
421 pr_debug4("%s pos:%#zx ip:%#" PRIx64 " P:%d CL:%d pid:%d.%d cpumode:%d cpu:%d\n",
422 __func__, pos, sample.ip, basic->P, basic->CL, sample.pid,
423 sample.tid, sample.cpumode, sample.cpu);
424 if (perf_session__deliver_synth_event(sfq->sf->session, &event,
425 &sample)) {
426 pr_err("s390 Auxiliary Trace: failed to deliver event\n");
427 return false;
428 }
429 return true;
430}
431
432static unsigned long long get_trailer_time(const unsigned char *buf)
433{
434 struct hws_trailer_entry *te;
435 unsigned long long aux_time;
436
437 te = (struct hws_trailer_entry *)(buf + S390_CPUMSF_PAGESZ
438 - sizeof(*te));
439
440 if (!te->clock_base) /* TOD_CLOCK_BASE value missing */
441 return 0;
442
443 /* Correct calculation to convert time stamp in trailer entry to
444 * nano seconds (taken from arch/s390 function tod_to_ns()).
445 * TOD_CLOCK_BASE is stored in trailer entry member progusage2.
446 */
447 aux_time = trailer_timestamp(te) - te->progusage2;
448 aux_time = (aux_time >> 9) * 125 + (((aux_time & 0x1ff) * 125) >> 9);
449 return aux_time;
450}
451
452/* Process the data samples of a single queue. The first parameter is a
453 * pointer to the queue, the second parameter is the time stamp. This
454 * is the time stamp:
455 * - of the event that triggered this processing.
456 * - or the time stamp when the last proccesing of this queue stopped.
457 * In this case it stopped at a 4KB page boundary and record the
458 * position on where to continue processing on the next invocation
459 * (see buffer->use_data and buffer->use_size).
460 *
461 * When this function returns the second parameter is updated to
462 * reflect the time stamp of the last processed auxiliary data entry
463 * (taken from the trailer entry of that page). The caller uses this
464 * returned time stamp to record the last processed entry in this
465 * queue.
466 *
467 * The function returns:
468 * 0: Processing successful. The second parameter returns the
469 * time stamp from the trailer entry until which position
470 * processing took place. Subsequent calls resume from this
471 * position.
472 * <0: An error occurred during processing. The second parameter
473 * returns the maximum time stamp.
474 * >0: Done on this queue. The second parameter returns the
475 * maximum time stamp.
476 */
477static int s390_cpumsf_samples(struct s390_cpumsf_queue *sfq, u64 *ts)
478{
479 struct s390_cpumsf *sf = sfq->sf;
480 unsigned char *buf = sfq->buffer->use_data;
481 size_t len = sfq->buffer->use_size;
482 struct hws_basic_entry *basic;
483 unsigned short bsdes, dsdes;
484 size_t pos = 0;
485 int err = 1;
486 u64 aux_ts;
487
488 if (!s390_cpumsf_validate(sf->machine_type, buf, len, &bsdes,
489 &dsdes)) {
490 *ts = ~0ULL;
491 return -1;
492 }
493
494 /* Get trailer entry time stamp and check if entries in
495 * this auxiliary page are ready for processing. If the
496 * time stamp of the first entry is too high, whole buffer
497 * can be skipped. In this case return time stamp.
498 */
499 aux_ts = get_trailer_time(buf);
500 if (!aux_ts) {
501 pr_err("[%#08" PRIx64 "] Invalid AUX trailer entry TOD clock base\n",
502 sfq->buffer->data_offset);
503 aux_ts = ~0ULL;
504 goto out;
505 }
506 if (aux_ts > *ts) {
507 *ts = aux_ts;
508 return 0;
509 }
510
511 while (pos < len) {
512 /* Handle Basic entry */
513 basic = (struct hws_basic_entry *)(buf + pos);
514 if (s390_cpumsf_make_event(pos, basic, sfq))
515 pos += bsdes;
516 else {
517 err = -EBADF;
518 goto out;
519 }
520
521 pos += dsdes; /* Skip diagnositic entry */
522
523 /* Check for trailer entry */
524 if (!s390_cpumsf_reached_trailer(bsdes + dsdes, pos)) {
525 pos = (pos + S390_CPUMSF_PAGESZ)
526 & ~(S390_CPUMSF_PAGESZ - 1);
527 /* Check existence of next page */
528 if (pos >= len)
529 break;
530 aux_ts = get_trailer_time(buf + pos);
531 if (!aux_ts) {
532 aux_ts = ~0ULL;
533 goto out;
534 }
535 if (aux_ts > *ts) {
536 *ts = aux_ts;
537 sfq->buffer->use_data += pos;
538 sfq->buffer->use_size -= pos;
539 return 0;
540 }
541 }
542 }
543out:
544 *ts = aux_ts;
545 sfq->buffer->use_size = 0;
546 sfq->buffer->use_data = NULL;
547 return err; /* Buffer completely scanned or error */
548}
549
550/* Run the s390 auxiliary trace decoder.
551 * Select the queue buffer to operate on, the caller already selected
552 * the proper queue, depending on second parameter 'ts'.
553 * This is the time stamp until which the auxiliary entries should
554 * be processed. This value is updated by called functions and
555 * returned to the caller.
556 *
557 * Resume processing in the current buffer. If there is no buffer
558 * get a new buffer from the queue and setup start position for
559 * processing.
560 * When a buffer is completely processed remove it from the queue
561 * before returning.
562 *
563 * This function returns
564 * 1: When the queue is empty. Second parameter will be set to
565 * maximum time stamp.
566 * 0: Normal processing done.
567 * <0: Error during queue buffer setup. This causes the caller
568 * to stop processing completely.
569 */
570static int s390_cpumsf_run_decoder(struct s390_cpumsf_queue *sfq,
571 u64 *ts)
572{
573
574 struct auxtrace_buffer *buffer;
575 struct auxtrace_queue *queue;
576 int err;
577
578 queue = &sfq->sf->queues.queue_array[sfq->queue_nr];
579
580 /* Get buffer and last position in buffer to resume
581 * decoding the auxiliary entries. One buffer might be large
582 * and decoding might stop in between. This depends on the time
583 * stamp of the trailer entry in each page of the auxiliary
584 * data and the time stamp of the event triggering the decoding.
585 */
586 if (sfq->buffer == NULL) {
587 sfq->buffer = buffer = auxtrace_buffer__next(queue,
588 sfq->buffer);
589 if (!buffer) {
590 *ts = ~0ULL;
591 return 1; /* Processing done on this queue */
592 }
593 /* Start with a new buffer on this queue */
594 if (buffer->data) {
595 buffer->use_size = buffer->size;
596 buffer->use_data = buffer->data;
597 }
598 } else
599 buffer = sfq->buffer;
600
601 if (!buffer->data) {
602 int fd = perf_data__fd(sfq->sf->session->data);
603
604 buffer->data = auxtrace_buffer__get_data(buffer, fd);
605 if (!buffer->data)
606 return -ENOMEM;
607 buffer->use_size = buffer->size;
608 buffer->use_data = buffer->data;
609 }
610 pr_debug4("%s queue_nr:%d buffer:%" PRId64 " offset:%#" PRIx64 " size:%#zx rest:%#zx\n",
611 __func__, sfq->queue_nr, buffer->buffer_nr, buffer->offset,
612 buffer->size, buffer->use_size);
613 err = s390_cpumsf_samples(sfq, ts);
614
615 /* If non-zero, there is either an error (err < 0) or the buffer is
616 * completely done (err > 0). The error is unrecoverable, usually
617 * some descriptors could not be read successfully, so continue with
618 * the next buffer.
619 * In both cases the parameter 'ts' has been updated.
620 */
621 if (err) {
622 sfq->buffer = NULL;
623 list_del(&buffer->list);
624 auxtrace_buffer__free(buffer);
625 if (err > 0) /* Buffer done, no error */
626 err = 0;
627 }
628 return err;
629}
630
631static struct s390_cpumsf_queue *
632s390_cpumsf_alloc_queue(struct s390_cpumsf *sf, unsigned int queue_nr)
633{
634 struct s390_cpumsf_queue *sfq;
635
636 sfq = zalloc(sizeof(struct s390_cpumsf_queue));
637 if (sfq == NULL)
638 return NULL;
639
640 sfq->sf = sf;
641 sfq->queue_nr = queue_nr;
642 sfq->cpu = -1;
643 return sfq;
644}
645
646static int s390_cpumsf_setup_queue(struct s390_cpumsf *sf,
647 struct auxtrace_queue *queue,
648 unsigned int queue_nr, u64 ts)
649{
650 struct s390_cpumsf_queue *sfq = queue->priv;
651
652 if (list_empty(&queue->head))
653 return 0;
654
655 if (sfq == NULL) {
656 sfq = s390_cpumsf_alloc_queue(sf, queue_nr);
657 if (!sfq)
658 return -ENOMEM;
659 queue->priv = sfq;
660
661 if (queue->cpu != -1)
662 sfq->cpu = queue->cpu;
663 }
664 return auxtrace_heap__add(&sf->heap, queue_nr, ts);
665}
666
667static int s390_cpumsf_setup_queues(struct s390_cpumsf *sf, u64 ts)
668{
669 unsigned int i;
670 int ret = 0;
671
672 for (i = 0; i < sf->queues.nr_queues; i++) {
673 ret = s390_cpumsf_setup_queue(sf, &sf->queues.queue_array[i],
674 i, ts);
675 if (ret)
676 break;
677 }
678 return ret;
679}
680
681static int s390_cpumsf_update_queues(struct s390_cpumsf *sf, u64 ts)
682{
683 if (!sf->queues.new_data)
684 return 0;
685
686 sf->queues.new_data = false;
687 return s390_cpumsf_setup_queues(sf, ts);
688}
689
690static int s390_cpumsf_process_queues(struct s390_cpumsf *sf, u64 timestamp)
691{
692 unsigned int queue_nr;
693 u64 ts;
694 int ret;
695
696 while (1) {
697 struct auxtrace_queue *queue;
698 struct s390_cpumsf_queue *sfq;
699
700 if (!sf->heap.heap_cnt)
701 return 0;
702
703 if (sf->heap.heap_array[0].ordinal >= timestamp)
704 return 0;
705
706 queue_nr = sf->heap.heap_array[0].queue_nr;
707 queue = &sf->queues.queue_array[queue_nr];
708 sfq = queue->priv;
709
710 auxtrace_heap__pop(&sf->heap);
711 if (sf->heap.heap_cnt) {
712 ts = sf->heap.heap_array[0].ordinal + 1;
713 if (ts > timestamp)
714 ts = timestamp;
715 } else {
716 ts = timestamp;
717 }
718
719 ret = s390_cpumsf_run_decoder(sfq, &ts);
720 if (ret < 0) {
721 auxtrace_heap__add(&sf->heap, queue_nr, ts);
722 return ret;
723 }
724 if (!ret) {
725 ret = auxtrace_heap__add(&sf->heap, queue_nr, ts);
726 if (ret < 0)
727 return ret;
728 }
729 }
730 return 0;
731}
732
733static int s390_cpumsf_synth_error(struct s390_cpumsf *sf, int code, int cpu,
734 pid_t pid, pid_t tid, u64 ip)
735{
736 char msg[MAX_AUXTRACE_ERROR_MSG];
737 union perf_event event;
738 int err;
739
740 strncpy(msg, "Lost Auxiliary Trace Buffer", sizeof(msg) - 1);
741 auxtrace_synth_error(&event.auxtrace_error, PERF_AUXTRACE_ERROR_ITRACE,
742 code, cpu, pid, tid, ip, msg);
743
744 err = perf_session__deliver_synth_event(sf->session, &event, NULL);
745 if (err)
746 pr_err("s390 Auxiliary Trace: failed to deliver error event,"
747 "error %d\n", err);
748 return err;
749}
750
751static int s390_cpumsf_lost(struct s390_cpumsf *sf, struct perf_sample *sample)
752{
753 return s390_cpumsf_synth_error(sf, 1, sample->cpu,
754 sample->pid, sample->tid, 0);
755}
756
757static int
758s390_cpumsf_process_event(struct perf_session *session __maybe_unused,
759 union perf_event *event,
760 struct perf_sample *sample,
761 struct perf_tool *tool)
762{
763 struct s390_cpumsf *sf = container_of(session->auxtrace,
764 struct s390_cpumsf,
765 auxtrace);
766 u64 timestamp = sample->time;
767 int err = 0;
768
769 if (dump_trace)
770 return 0;
771
772 if (!tool->ordered_events) {
773 pr_err("s390 Auxiliary Trace requires ordered events\n");
774 return -EINVAL;
775 }
776
777 if (event->header.type == PERF_RECORD_AUX &&
778 event->aux.flags & PERF_AUX_FLAG_TRUNCATED)
779 return s390_cpumsf_lost(sf, sample);
780
781 if (timestamp) {
782 err = s390_cpumsf_update_queues(sf, timestamp);
783 if (!err)
784 err = s390_cpumsf_process_queues(sf, timestamp);
785 }
786 return err;
787}
788
789struct s390_cpumsf_synth {
790 struct perf_tool cpumsf_tool;
791 struct perf_session *session;
792};
793
794static int
795s390_cpumsf_process_auxtrace_event(struct perf_session *session,
796 union perf_event *event __maybe_unused,
797 struct perf_tool *tool __maybe_unused)
798{
799 struct s390_cpumsf *sf = container_of(session->auxtrace,
800 struct s390_cpumsf,
801 auxtrace);
802
803 int fd = perf_data__fd(session->data);
804 struct auxtrace_buffer *buffer;
805 off_t data_offset;
806 int err;
807
808 if (sf->data_queued)
809 return 0;
810
811 if (perf_data__is_pipe(session->data)) {
812 data_offset = 0;
813 } else {
814 data_offset = lseek(fd, 0, SEEK_CUR);
815 if (data_offset == -1)
816 return -errno;
817 }
818
819 err = auxtrace_queues__add_event(&sf->queues, session, event,
820 data_offset, &buffer);
821 if (err)
822 return err;
823
824 /* Dump here after copying piped trace out of the pipe */
825 if (dump_trace) {
826 if (auxtrace_buffer__get_data(buffer, fd)) {
827 s390_cpumsf_dump_event(sf, buffer->data,
828 buffer->size);
829 auxtrace_buffer__put_data(buffer);
830 }
831 }
832 return 0;
833}
834
835static void s390_cpumsf_free_events(struct perf_session *session __maybe_unused)
836{
837}
838
839static int s390_cpumsf_flush(struct perf_session *session __maybe_unused,
840 struct perf_tool *tool __maybe_unused)
841{
842 return 0;
843}
844
845static void s390_cpumsf_free_queues(struct perf_session *session)
846{
847 struct s390_cpumsf *sf = container_of(session->auxtrace,
848 struct s390_cpumsf,
849 auxtrace);
850 struct auxtrace_queues *queues = &sf->queues;
851 unsigned int i;
852
853 for (i = 0; i < queues->nr_queues; i++)
854 zfree(&queues->queue_array[i].priv);
855 auxtrace_queues__free(queues);
856}
857
858static void s390_cpumsf_free(struct perf_session *session)
859{
860 struct s390_cpumsf *sf = container_of(session->auxtrace,
861 struct s390_cpumsf,
862 auxtrace);
863
864 auxtrace_heap__free(&sf->heap);
865 s390_cpumsf_free_queues(session);
866 session->auxtrace = NULL;
867 free(sf);
868}
869
870static int s390_cpumsf_get_type(const char *cpuid)
871{
872 int ret, family = 0;
873
874 ret = sscanf(cpuid, "%*[^,],%u", &family);
875 return (ret == 1) ? family : 0;
876}
877
878/* Check itrace options set on perf report command.
879 * Return true, if none are set or all options specified can be
880 * handled on s390.
881 * Return false otherwise.
882 */
883static bool check_auxtrace_itrace(struct itrace_synth_opts *itops)
884{
885 if (!itops || !itops->set)
886 return true;
887 pr_err("No --itrace options supported\n");
888 return false;
889}
890
891int s390_cpumsf_process_auxtrace_info(union perf_event *event,
892 struct perf_session *session)
893{
894 struct auxtrace_info_event *auxtrace_info = &event->auxtrace_info;
895 struct s390_cpumsf *sf;
896 int err;
897
898 if (auxtrace_info->header.size < sizeof(struct auxtrace_info_event))
899 return -EINVAL;
900
901 sf = zalloc(sizeof(struct s390_cpumsf));
902 if (sf == NULL)
903 return -ENOMEM;
904
905 if (!check_auxtrace_itrace(session->itrace_synth_opts)) {
906 err = -EINVAL;
907 goto err_free;
908 }
909
910 err = auxtrace_queues__init(&sf->queues);
911 if (err)
912 goto err_free;
913
914 sf->session = session;
915 sf->machine = &session->machines.host; /* No kvm support */
916 sf->auxtrace_type = auxtrace_info->type;
917 sf->pmu_type = PERF_TYPE_RAW;
918 sf->machine_type = s390_cpumsf_get_type(session->evlist->env->cpuid);
919
920 sf->auxtrace.process_event = s390_cpumsf_process_event;
921 sf->auxtrace.process_auxtrace_event = s390_cpumsf_process_auxtrace_event;
922 sf->auxtrace.flush_events = s390_cpumsf_flush;
923 sf->auxtrace.free_events = s390_cpumsf_free_events;
924 sf->auxtrace.free = s390_cpumsf_free;
925 session->auxtrace = &sf->auxtrace;
926
927 if (dump_trace)
928 return 0;
929
930 err = auxtrace_queues__process_index(&sf->queues, session);
931 if (err)
932 goto err_free_queues;
933
934 if (sf->queues.populated)
935 sf->data_queued = true;
936
937 return 0;
938
939err_free_queues:
940 auxtrace_queues__free(&sf->queues);
941 session->auxtrace = NULL;
942err_free:
943 free(sf);
944 return err;
945}
diff --git a/tools/perf/util/s390-cpumsf.h b/tools/perf/util/s390-cpumsf.h
new file mode 100644
index 000000000000..fb64d100555c
--- /dev/null
+++ b/tools/perf/util/s390-cpumsf.h
@@ -0,0 +1,21 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright IBM Corp. 2018
4 * Auxtrace support for s390 CPU-Measurement Sampling Facility
5 *
6 * Author(s): Thomas Richter <tmricht@linux.ibm.com>
7 */
8
9#ifndef INCLUDE__PERF_S390_CPUMSF_H
10#define INCLUDE__PERF_S390_CPUMSF_H
11
12union perf_event;
13struct perf_session;
14struct perf_pmu;
15
16struct auxtrace_record *
17s390_cpumsf_recording_init(int *err, struct perf_pmu *s390_cpumsf_pmu);
18
19int s390_cpumsf_process_auxtrace_info(union perf_event *event,
20 struct perf_session *session);
21#endif
diff --git a/tools/perf/util/scripting-engines/trace-event-perl.c b/tools/perf/util/scripting-engines/trace-event-perl.c
index 7b79c413486b..45484f0f7292 100644
--- a/tools/perf/util/scripting-engines/trace-event-perl.c
+++ b/tools/perf/util/scripting-engines/trace-event-perl.c
@@ -535,7 +535,7 @@ static int perl_stop_script(void)
535 return 0; 535 return 0;
536} 536}
537 537
538static int perl_generate_script(struct pevent *pevent, const char *outfile) 538static int perl_generate_script(struct tep_handle *pevent, const char *outfile)
539{ 539{
540 struct event_format *event = NULL; 540 struct event_format *event = NULL;
541 struct format_field *f; 541 struct format_field *f;
diff --git a/tools/perf/util/scripting-engines/trace-event-python.c b/tools/perf/util/scripting-engines/trace-event-python.c
index bc32e57d17be..dfc6093f118c 100644
--- a/tools/perf/util/scripting-engines/trace-event-python.c
+++ b/tools/perf/util/scripting-engines/trace-event-python.c
@@ -871,8 +871,8 @@ static void python_process_tracepoint(struct perf_sample *sample,
871 offset = field->offset; 871 offset = field->offset;
872 len = field->size; 872 len = field->size;
873 if (field->flags & FIELD_IS_DYNAMIC) { 873 if (field->flags & FIELD_IS_DYNAMIC) {
874 val = pevent_read_number(scripting_context->pevent, 874 val = tep_read_number(scripting_context->pevent,
875 data + offset, len); 875 data + offset, len);
876 offset = val; 876 offset = val;
877 len = offset >> 16; 877 len = offset >> 16;
878 offset &= 0xffff; 878 offset &= 0xffff;
@@ -1588,7 +1588,7 @@ static int python_stop_script(void)
1588 return 0; 1588 return 0;
1589} 1589}
1590 1590
1591static int python_generate_script(struct pevent *pevent, const char *outfile) 1591static int python_generate_script(struct tep_handle *pevent, const char *outfile)
1592{ 1592{
1593 struct event_format *event = NULL; 1593 struct event_format *event = NULL;
1594 struct format_field *f; 1594 struct format_field *f;
diff --git a/tools/perf/util/setup.py b/tools/perf/util/setup.py
index 001be4f9d3b9..97efbcad076e 100644
--- a/tools/perf/util/setup.py
+++ b/tools/perf/util/setup.py
@@ -1,12 +1,20 @@
1#!/usr/bin/python 1#!/usr/bin/python
2 2
3from os import getenv 3from os import getenv
4from subprocess import Popen, PIPE
5from re import sub
6
7def clang_has_option(option):
8 return [o for o in Popen(['clang', option], stderr=PIPE).stderr.readlines() if "unknown argument" in o] == [ ]
4 9
5cc = getenv("CC") 10cc = getenv("CC")
6if cc == "clang": 11if cc == "clang":
7 from _sysconfigdata import build_time_vars 12 from _sysconfigdata import build_time_vars
8 from re import sub
9 build_time_vars["CFLAGS"] = sub("-specs=[^ ]+", "", build_time_vars["CFLAGS"]) 13 build_time_vars["CFLAGS"] = sub("-specs=[^ ]+", "", build_time_vars["CFLAGS"])
14 if not clang_has_option("-mcet"):
15 build_time_vars["CFLAGS"] = sub("-mcet", "", build_time_vars["CFLAGS"])
16 if not clang_has_option("-fcf-protection"):
17 build_time_vars["CFLAGS"] = sub("-fcf-protection", "", build_time_vars["CFLAGS"])
10 18
11from distutils.core import setup, Extension 19from distutils.core import setup, Extension
12 20
diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c
index fed2952ab45a..b284276ec963 100644
--- a/tools/perf/util/sort.c
+++ b/tools/perf/util/sort.c
@@ -601,7 +601,7 @@ static char *get_trace_output(struct hist_entry *he)
601{ 601{
602 struct trace_seq seq; 602 struct trace_seq seq;
603 struct perf_evsel *evsel; 603 struct perf_evsel *evsel;
604 struct pevent_record rec = { 604 struct tep_record rec = {
605 .data = he->raw_data, 605 .data = he->raw_data,
606 .size = he->raw_size, 606 .size = he->raw_size,
607 }; 607 };
@@ -610,10 +610,10 @@ static char *get_trace_output(struct hist_entry *he)
610 610
611 trace_seq_init(&seq); 611 trace_seq_init(&seq);
612 if (symbol_conf.raw_trace) { 612 if (symbol_conf.raw_trace) {
613 pevent_print_fields(&seq, he->raw_data, he->raw_size, 613 tep_print_fields(&seq, he->raw_data, he->raw_size,
614 evsel->tp_format); 614 evsel->tp_format);
615 } else { 615 } else {
616 pevent_event_info(&seq, evsel->tp_format, &rec); 616 tep_event_info(&seq, evsel->tp_format, &rec);
617 } 617 }
618 /* 618 /*
619 * Trim the buffer, it starts at 4KB and we're not going to 619 * Trim the buffer, it starts at 4KB and we're not going to
@@ -2047,7 +2047,7 @@ static int __sort__hde_entry(struct perf_hpp_fmt *fmt, struct perf_hpp *hpp,
2047 struct trace_seq seq; 2047 struct trace_seq seq;
2048raw_field: 2048raw_field:
2049 trace_seq_init(&seq); 2049 trace_seq_init(&seq);
2050 pevent_print_field(&seq, he->raw_data, hde->field); 2050 tep_print_field(&seq, he->raw_data, hde->field);
2051 str = seq.buffer; 2051 str = seq.buffer;
2052 } 2052 }
2053 2053
@@ -2074,7 +2074,7 @@ static int64_t __sort__hde_cmp(struct perf_hpp_fmt *fmt,
2074 if (field->flags & FIELD_IS_DYNAMIC) { 2074 if (field->flags & FIELD_IS_DYNAMIC) {
2075 unsigned long long dyn; 2075 unsigned long long dyn;
2076 2076
2077 pevent_read_number_field(field, a->raw_data, &dyn); 2077 tep_read_number_field(field, a->raw_data, &dyn);
2078 offset = dyn & 0xffff; 2078 offset = dyn & 0xffff;
2079 size = (dyn >> 16) & 0xffff; 2079 size = (dyn >> 16) & 0xffff;
2080 2080
@@ -2311,7 +2311,7 @@ static int add_all_matching_fields(struct perf_evlist *evlist,
2311 if (evsel->attr.type != PERF_TYPE_TRACEPOINT) 2311 if (evsel->attr.type != PERF_TYPE_TRACEPOINT)
2312 continue; 2312 continue;
2313 2313
2314 field = pevent_find_any_field(evsel->tp_format, field_name); 2314 field = tep_find_any_field(evsel->tp_format, field_name);
2315 if (field == NULL) 2315 if (field == NULL)
2316 continue; 2316 continue;
2317 2317
@@ -2378,7 +2378,7 @@ static int add_dynamic_entry(struct perf_evlist *evlist, const char *tok,
2378 if (!strcmp(field_name, "*")) { 2378 if (!strcmp(field_name, "*")) {
2379 ret = add_evsel_fields(evsel, raw_trace, level); 2379 ret = add_evsel_fields(evsel, raw_trace, level);
2380 } else { 2380 } else {
2381 field = pevent_find_any_field(evsel->tp_format, field_name); 2381 field = tep_find_any_field(evsel->tp_format, field_name);
2382 if (field == NULL) { 2382 if (field == NULL) {
2383 pr_debug("Cannot find event field for %s.%s\n", 2383 pr_debug("Cannot find event field for %s.%s\n",
2384 event_name, field_name); 2384 event_name, field_name);
diff --git a/tools/perf/util/sort.h b/tools/perf/util/sort.h
index 8bf302cafcec..a97cf8e6be86 100644
--- a/tools/perf/util/sort.h
+++ b/tools/perf/util/sort.h
@@ -276,7 +276,7 @@ extern struct sort_entry sort_thread;
276extern struct list_head hist_entry__sort_list; 276extern struct list_head hist_entry__sort_list;
277 277
278struct perf_evlist; 278struct perf_evlist;
279struct pevent; 279struct tep_handle;
280int setup_sorting(struct perf_evlist *evlist); 280int setup_sorting(struct perf_evlist *evlist);
281int setup_output_field(void); 281int setup_output_field(void);
282void reset_output_field(void); 282void reset_output_field(void);
diff --git a/tools/perf/util/stat-shadow.c b/tools/perf/util/stat-shadow.c
index 594d14a02b67..99990f5f2512 100644
--- a/tools/perf/util/stat-shadow.c
+++ b/tools/perf/util/stat-shadow.c
@@ -913,11 +913,10 @@ void perf_stat__print_shadow_stats(struct perf_evsel *evsel,
913 ratio = total / avg; 913 ratio = total / avg;
914 914
915 print_metric(ctxp, NULL, "%8.0f", "cycles / elision", ratio); 915 print_metric(ctxp, NULL, "%8.0f", "cycles / elision", ratio);
916 } else if (perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK) || 916 } else if (perf_evsel__is_clock(evsel)) {
917 perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK)) {
918 if ((ratio = avg_stats(&walltime_nsecs_stats)) != 0) 917 if ((ratio = avg_stats(&walltime_nsecs_stats)) != 0)
919 print_metric(ctxp, NULL, "%8.3f", "CPUs utilized", 918 print_metric(ctxp, NULL, "%8.3f", "CPUs utilized",
920 avg / ratio); 919 avg / (ratio * evsel->scale));
921 else 920 else
922 print_metric(ctxp, NULL, NULL, "CPUs utilized", 0); 921 print_metric(ctxp, NULL, NULL, "CPUs utilized", 0);
923 } else if (perf_stat_evsel__is(evsel, TOPDOWN_FETCH_BUBBLES)) { 922 } else if (perf_stat_evsel__is(evsel, TOPDOWN_FETCH_BUBBLES)) {
diff --git a/tools/perf/util/syscalltbl.c b/tools/perf/util/syscalltbl.c
index 0ee7f568d60c..3393d7ee9401 100644
--- a/tools/perf/util/syscalltbl.c
+++ b/tools/perf/util/syscalltbl.c
@@ -38,6 +38,10 @@ static const char **syscalltbl_native = syscalltbl_powerpc_64;
38#include <asm/syscalls_32.c> 38#include <asm/syscalls_32.c>
39const int syscalltbl_native_max_id = SYSCALLTBL_POWERPC_32_MAX_ID; 39const int syscalltbl_native_max_id = SYSCALLTBL_POWERPC_32_MAX_ID;
40static const char **syscalltbl_native = syscalltbl_powerpc_32; 40static const char **syscalltbl_native = syscalltbl_powerpc_32;
41#elif defined(__aarch64__)
42#include <asm/syscalls.c>
43const int syscalltbl_native_max_id = SYSCALLTBL_ARM64_MAX_ID;
44static const char **syscalltbl_native = syscalltbl_arm64;
41#endif 45#endif
42 46
43struct syscall { 47struct syscall {
diff --git a/tools/perf/util/trace-event-parse.c b/tools/perf/util/trace-event-parse.c
index e0a6e9a6a053..920b1d58a068 100644
--- a/tools/perf/util/trace-event-parse.c
+++ b/tools/perf/util/trace-event-parse.c
@@ -32,7 +32,7 @@
32static int get_common_field(struct scripting_context *context, 32static int get_common_field(struct scripting_context *context,
33 int *offset, int *size, const char *type) 33 int *offset, int *size, const char *type)
34{ 34{
35 struct pevent *pevent = context->pevent; 35 struct tep_handle *pevent = context->pevent;
36 struct event_format *event; 36 struct event_format *event;
37 struct format_field *field; 37 struct format_field *field;
38 38
@@ -41,14 +41,14 @@ static int get_common_field(struct scripting_context *context,
41 return 0; 41 return 0;
42 42
43 event = pevent->events[0]; 43 event = pevent->events[0];
44 field = pevent_find_common_field(event, type); 44 field = tep_find_common_field(event, type);
45 if (!field) 45 if (!field)
46 return 0; 46 return 0;
47 *offset = field->offset; 47 *offset = field->offset;
48 *size = field->size; 48 *size = field->size;
49 } 49 }
50 50
51 return pevent_read_number(pevent, context->event_data + *offset, *size); 51 return tep_read_number(pevent, context->event_data + *offset, *size);
52} 52}
53 53
54int common_lock_depth(struct scripting_context *context) 54int common_lock_depth(struct scripting_context *context)
@@ -99,24 +99,24 @@ raw_field_value(struct event_format *event, const char *name, void *data)
99 struct format_field *field; 99 struct format_field *field;
100 unsigned long long val; 100 unsigned long long val;
101 101
102 field = pevent_find_any_field(event, name); 102 field = tep_find_any_field(event, name);
103 if (!field) 103 if (!field)
104 return 0ULL; 104 return 0ULL;
105 105
106 pevent_read_number_field(field, data, &val); 106 tep_read_number_field(field, data, &val);
107 107
108 return val; 108 return val;
109} 109}
110 110
111unsigned long long read_size(struct event_format *event, void *ptr, int size) 111unsigned long long read_size(struct event_format *event, void *ptr, int size)
112{ 112{
113 return pevent_read_number(event->pevent, ptr, size); 113 return tep_read_number(event->pevent, ptr, size);
114} 114}
115 115
116void event_format__fprintf(struct event_format *event, 116void event_format__fprintf(struct event_format *event,
117 int cpu, void *data, int size, FILE *fp) 117 int cpu, void *data, int size, FILE *fp)
118{ 118{
119 struct pevent_record record; 119 struct tep_record record;
120 struct trace_seq s; 120 struct trace_seq s;
121 121
122 memset(&record, 0, sizeof(record)); 122 memset(&record, 0, sizeof(record));
@@ -125,7 +125,7 @@ void event_format__fprintf(struct event_format *event,
125 record.data = data; 125 record.data = data;
126 126
127 trace_seq_init(&s); 127 trace_seq_init(&s);
128 pevent_event_info(&s, event, &record); 128 tep_event_info(&s, event, &record);
129 trace_seq_do_fprintf(&s, fp); 129 trace_seq_do_fprintf(&s, fp);
130 trace_seq_destroy(&s); 130 trace_seq_destroy(&s);
131} 131}
@@ -136,7 +136,7 @@ void event_format__print(struct event_format *event,
136 return event_format__fprintf(event, cpu, data, size, stdout); 136 return event_format__fprintf(event, cpu, data, size, stdout);
137} 137}
138 138
139void parse_ftrace_printk(struct pevent *pevent, 139void parse_ftrace_printk(struct tep_handle *pevent,
140 char *file, unsigned int size __maybe_unused) 140 char *file, unsigned int size __maybe_unused)
141{ 141{
142 unsigned long long addr; 142 unsigned long long addr;
@@ -157,11 +157,11 @@ void parse_ftrace_printk(struct pevent *pevent,
157 /* fmt still has a space, skip it */ 157 /* fmt still has a space, skip it */
158 printk = strdup(fmt+1); 158 printk = strdup(fmt+1);
159 line = strtok_r(NULL, "\n", &next); 159 line = strtok_r(NULL, "\n", &next);
160 pevent_register_print_string(pevent, printk, addr); 160 tep_register_print_string(pevent, printk, addr);
161 } 161 }
162} 162}
163 163
164void parse_saved_cmdline(struct pevent *pevent, 164void parse_saved_cmdline(struct tep_handle *pevent,
165 char *file, unsigned int size __maybe_unused) 165 char *file, unsigned int size __maybe_unused)
166{ 166{
167 char *comm; 167 char *comm;
@@ -172,24 +172,24 @@ void parse_saved_cmdline(struct pevent *pevent,
172 line = strtok_r(file, "\n", &next); 172 line = strtok_r(file, "\n", &next);
173 while (line) { 173 while (line) {
174 sscanf(line, "%d %ms", &pid, &comm); 174 sscanf(line, "%d %ms", &pid, &comm);
175 pevent_register_comm(pevent, comm, pid); 175 tep_register_comm(pevent, comm, pid);
176 free(comm); 176 free(comm);
177 line = strtok_r(NULL, "\n", &next); 177 line = strtok_r(NULL, "\n", &next);
178 } 178 }
179} 179}
180 180
181int parse_ftrace_file(struct pevent *pevent, char *buf, unsigned long size) 181int parse_ftrace_file(struct tep_handle *pevent, char *buf, unsigned long size)
182{ 182{
183 return pevent_parse_event(pevent, buf, size, "ftrace"); 183 return tep_parse_event(pevent, buf, size, "ftrace");
184} 184}
185 185
186int parse_event_file(struct pevent *pevent, 186int parse_event_file(struct tep_handle *pevent,
187 char *buf, unsigned long size, char *sys) 187 char *buf, unsigned long size, char *sys)
188{ 188{
189 return pevent_parse_event(pevent, buf, size, sys); 189 return tep_parse_event(pevent, buf, size, sys);
190} 190}
191 191
192struct event_format *trace_find_next_event(struct pevent *pevent, 192struct event_format *trace_find_next_event(struct tep_handle *pevent,
193 struct event_format *event) 193 struct event_format *event)
194{ 194{
195 static int idx; 195 static int idx;
diff --git a/tools/perf/util/trace-event-read.c b/tools/perf/util/trace-event-read.c
index 40b425949aa3..3dfc1db6b25b 100644
--- a/tools/perf/util/trace-event-read.c
+++ b/tools/perf/util/trace-event-read.c
@@ -96,7 +96,7 @@ static void skip(int size)
96 }; 96 };
97} 97}
98 98
99static unsigned int read4(struct pevent *pevent) 99static unsigned int read4(struct tep_handle *pevent)
100{ 100{
101 unsigned int data; 101 unsigned int data;
102 102
@@ -105,7 +105,7 @@ static unsigned int read4(struct pevent *pevent)
105 return __data2host4(pevent, data); 105 return __data2host4(pevent, data);
106} 106}
107 107
108static unsigned long long read8(struct pevent *pevent) 108static unsigned long long read8(struct tep_handle *pevent)
109{ 109{
110 unsigned long long data; 110 unsigned long long data;
111 111
@@ -158,7 +158,7 @@ out:
158 return str; 158 return str;
159} 159}
160 160
161static int read_proc_kallsyms(struct pevent *pevent) 161static int read_proc_kallsyms(struct tep_handle *pevent)
162{ 162{
163 unsigned int size; 163 unsigned int size;
164 164
@@ -181,7 +181,7 @@ static int read_proc_kallsyms(struct pevent *pevent)
181 return 0; 181 return 0;
182} 182}
183 183
184static int read_ftrace_printk(struct pevent *pevent) 184static int read_ftrace_printk(struct tep_handle *pevent)
185{ 185{
186 unsigned int size; 186 unsigned int size;
187 char *buf; 187 char *buf;
@@ -208,7 +208,7 @@ static int read_ftrace_printk(struct pevent *pevent)
208 return 0; 208 return 0;
209} 209}
210 210
211static int read_header_files(struct pevent *pevent) 211static int read_header_files(struct tep_handle *pevent)
212{ 212{
213 unsigned long long size; 213 unsigned long long size;
214 char *header_page; 214 char *header_page;
@@ -235,13 +235,13 @@ static int read_header_files(struct pevent *pevent)
235 return -1; 235 return -1;
236 } 236 }
237 237
238 if (!pevent_parse_header_page(pevent, header_page, size, 238 if (!tep_parse_header_page(pevent, header_page, size,
239 pevent_get_long_size(pevent))) { 239 tep_get_long_size(pevent))) {
240 /* 240 /*
241 * The commit field in the page is of type long, 241 * The commit field in the page is of type long,
242 * use that instead, since it represents the kernel. 242 * use that instead, since it represents the kernel.
243 */ 243 */
244 pevent_set_long_size(pevent, pevent->header_page_size_size); 244 tep_set_long_size(pevent, pevent->header_page_size_size);
245 } 245 }
246 free(header_page); 246 free(header_page);
247 247
@@ -259,7 +259,7 @@ static int read_header_files(struct pevent *pevent)
259 return ret; 259 return ret;
260} 260}
261 261
262static int read_ftrace_file(struct pevent *pevent, unsigned long long size) 262static int read_ftrace_file(struct tep_handle *pevent, unsigned long long size)
263{ 263{
264 int ret; 264 int ret;
265 char *buf; 265 char *buf;
@@ -284,8 +284,8 @@ out:
284 return ret; 284 return ret;
285} 285}
286 286
287static int read_event_file(struct pevent *pevent, char *sys, 287static int read_event_file(struct tep_handle *pevent, char *sys,
288 unsigned long long size) 288 unsigned long long size)
289{ 289{
290 int ret; 290 int ret;
291 char *buf; 291 char *buf;
@@ -310,7 +310,7 @@ out:
310 return ret; 310 return ret;
311} 311}
312 312
313static int read_ftrace_files(struct pevent *pevent) 313static int read_ftrace_files(struct tep_handle *pevent)
314{ 314{
315 unsigned long long size; 315 unsigned long long size;
316 int count; 316 int count;
@@ -328,7 +328,7 @@ static int read_ftrace_files(struct pevent *pevent)
328 return 0; 328 return 0;
329} 329}
330 330
331static int read_event_files(struct pevent *pevent) 331static int read_event_files(struct tep_handle *pevent)
332{ 332{
333 unsigned long long size; 333 unsigned long long size;
334 char *sys; 334 char *sys;
@@ -356,7 +356,7 @@ static int read_event_files(struct pevent *pevent)
356 return 0; 356 return 0;
357} 357}
358 358
359static int read_saved_cmdline(struct pevent *pevent) 359static int read_saved_cmdline(struct tep_handle *pevent)
360{ 360{
361 unsigned long long size; 361 unsigned long long size;
362 char *buf; 362 char *buf;
@@ -399,7 +399,7 @@ ssize_t trace_report(int fd, struct trace_event *tevent, bool __repipe)
399 int host_bigendian; 399 int host_bigendian;
400 int file_long_size; 400 int file_long_size;
401 int file_page_size; 401 int file_page_size;
402 struct pevent *pevent = NULL; 402 struct tep_handle *pevent = NULL;
403 int err; 403 int err;
404 404
405 repipe = __repipe; 405 repipe = __repipe;
@@ -439,9 +439,9 @@ ssize_t trace_report(int fd, struct trace_event *tevent, bool __repipe)
439 439
440 pevent = tevent->pevent; 440 pevent = tevent->pevent;
441 441
442 pevent_set_flag(pevent, PEVENT_NSEC_OUTPUT); 442 tep_set_flag(pevent, TEP_NSEC_OUTPUT);
443 pevent_set_file_bigendian(pevent, file_bigendian); 443 tep_set_file_bigendian(pevent, file_bigendian);
444 pevent_set_host_bigendian(pevent, host_bigendian); 444 tep_set_host_bigendian(pevent, host_bigendian);
445 445
446 if (do_read(buf, 1) < 0) 446 if (do_read(buf, 1) < 0)
447 goto out; 447 goto out;
@@ -451,8 +451,8 @@ ssize_t trace_report(int fd, struct trace_event *tevent, bool __repipe)
451 if (!file_page_size) 451 if (!file_page_size)
452 goto out; 452 goto out;
453 453
454 pevent_set_long_size(pevent, file_long_size); 454 tep_set_long_size(pevent, file_long_size);
455 pevent_set_page_size(pevent, file_page_size); 455 tep_set_page_size(pevent, file_page_size);
456 456
457 err = read_header_files(pevent); 457 err = read_header_files(pevent);
458 if (err) 458 if (err)
@@ -479,9 +479,9 @@ ssize_t trace_report(int fd, struct trace_event *tevent, bool __repipe)
479 repipe = false; 479 repipe = false;
480 480
481 if (show_funcs) { 481 if (show_funcs) {
482 pevent_print_funcs(pevent); 482 tep_print_funcs(pevent);
483 } else if (show_printk) { 483 } else if (show_printk) {
484 pevent_print_printk(pevent); 484 tep_print_printk(pevent);
485 } 485 }
486 486
487 pevent = NULL; 487 pevent = NULL;
diff --git a/tools/perf/util/trace-event-scripting.c b/tools/perf/util/trace-event-scripting.c
index b1e5c3a2b8e3..b749f812ac70 100644
--- a/tools/perf/util/trace-event-scripting.c
+++ b/tools/perf/util/trace-event-scripting.c
@@ -66,7 +66,7 @@ static int python_start_script_unsupported(const char *script __maybe_unused,
66 return -1; 66 return -1;
67} 67}
68 68
69static int python_generate_script_unsupported(struct pevent *pevent 69static int python_generate_script_unsupported(struct tep_handle *pevent
70 __maybe_unused, 70 __maybe_unused,
71 const char *outfile 71 const char *outfile
72 __maybe_unused) 72 __maybe_unused)
@@ -130,7 +130,7 @@ static int perl_start_script_unsupported(const char *script __maybe_unused,
130 return -1; 130 return -1;
131} 131}
132 132
133static int perl_generate_script_unsupported(struct pevent *pevent 133static int perl_generate_script_unsupported(struct tep_handle *pevent
134 __maybe_unused, 134 __maybe_unused,
135 const char *outfile __maybe_unused) 135 const char *outfile __maybe_unused)
136{ 136{
diff --git a/tools/perf/util/trace-event.c b/tools/perf/util/trace-event.c
index 1aa368603268..58bb72f266f3 100644
--- a/tools/perf/util/trace-event.c
+++ b/tools/perf/util/trace-event.c
@@ -28,10 +28,10 @@ static bool tevent_initialized;
28 28
29int trace_event__init(struct trace_event *t) 29int trace_event__init(struct trace_event *t)
30{ 30{
31 struct pevent *pevent = pevent_alloc(); 31 struct tep_handle *pevent = tep_alloc();
32 32
33 if (pevent) { 33 if (pevent) {
34 t->plugin_list = traceevent_load_plugins(pevent); 34 t->plugin_list = tep_load_plugins(pevent);
35 t->pevent = pevent; 35 t->pevent = pevent;
36 } 36 }
37 37
@@ -40,33 +40,33 @@ int trace_event__init(struct trace_event *t)
40 40
41static int trace_event__init2(void) 41static int trace_event__init2(void)
42{ 42{
43 int be = traceevent_host_bigendian(); 43 int be = tep_host_bigendian();
44 struct pevent *pevent; 44 struct tep_handle *pevent;
45 45
46 if (trace_event__init(&tevent)) 46 if (trace_event__init(&tevent))
47 return -1; 47 return -1;
48 48
49 pevent = tevent.pevent; 49 pevent = tevent.pevent;
50 pevent_set_flag(pevent, PEVENT_NSEC_OUTPUT); 50 tep_set_flag(pevent, TEP_NSEC_OUTPUT);
51 pevent_set_file_bigendian(pevent, be); 51 tep_set_file_bigendian(pevent, be);
52 pevent_set_host_bigendian(pevent, be); 52 tep_set_host_bigendian(pevent, be);
53 tevent_initialized = true; 53 tevent_initialized = true;
54 return 0; 54 return 0;
55} 55}
56 56
57int trace_event__register_resolver(struct machine *machine, 57int trace_event__register_resolver(struct machine *machine,
58 pevent_func_resolver_t *func) 58 tep_func_resolver_t *func)
59{ 59{
60 if (!tevent_initialized && trace_event__init2()) 60 if (!tevent_initialized && trace_event__init2())
61 return -1; 61 return -1;
62 62
63 return pevent_set_function_resolver(tevent.pevent, func, machine); 63 return tep_set_function_resolver(tevent.pevent, func, machine);
64} 64}
65 65
66void trace_event__cleanup(struct trace_event *t) 66void trace_event__cleanup(struct trace_event *t)
67{ 67{
68 traceevent_unload_plugins(t->plugin_list, t->pevent); 68 tep_unload_plugins(t->plugin_list, t->pevent);
69 pevent_free(t->pevent); 69 tep_free(t->pevent);
70} 70}
71 71
72/* 72/*
@@ -76,7 +76,7 @@ static struct event_format*
76tp_format(const char *sys, const char *name) 76tp_format(const char *sys, const char *name)
77{ 77{
78 char *tp_dir = get_events_file(sys); 78 char *tp_dir = get_events_file(sys);
79 struct pevent *pevent = tevent.pevent; 79 struct tep_handle *pevent = tevent.pevent;
80 struct event_format *event = NULL; 80 struct event_format *event = NULL;
81 char path[PATH_MAX]; 81 char path[PATH_MAX];
82 size_t size; 82 size_t size;
@@ -93,7 +93,7 @@ tp_format(const char *sys, const char *name)
93 if (err) 93 if (err)
94 return ERR_PTR(err); 94 return ERR_PTR(err);
95 95
96 pevent_parse_format(pevent, &event, data, size, sys); 96 tep_parse_format(pevent, &event, data, size, sys);
97 97
98 free(data); 98 free(data);
99 return event; 99 return event;
@@ -116,5 +116,5 @@ struct event_format *trace_event__tp_format_id(int id)
116 if (!tevent_initialized && trace_event__init2()) 116 if (!tevent_initialized && trace_event__init2())
117 return ERR_PTR(-ENOMEM); 117 return ERR_PTR(-ENOMEM);
118 118
119 return pevent_find_event(tevent.pevent, id); 119 return tep_find_event(tevent.pevent, id);
120} 120}
diff --git a/tools/perf/util/trace-event.h b/tools/perf/util/trace-event.h
index dcbdb53dc702..40204ec3a7a2 100644
--- a/tools/perf/util/trace-event.h
+++ b/tools/perf/util/trace-event.h
@@ -13,14 +13,14 @@ struct thread;
13struct plugin_list; 13struct plugin_list;
14 14
15struct trace_event { 15struct trace_event {
16 struct pevent *pevent; 16 struct tep_handle *pevent;
17 struct plugin_list *plugin_list; 17 struct plugin_list *plugin_list;
18}; 18};
19 19
20int trace_event__init(struct trace_event *t); 20int trace_event__init(struct trace_event *t);
21void trace_event__cleanup(struct trace_event *t); 21void trace_event__cleanup(struct trace_event *t);
22int trace_event__register_resolver(struct machine *machine, 22int trace_event__register_resolver(struct machine *machine,
23 pevent_func_resolver_t *func); 23 tep_func_resolver_t *func);
24struct event_format* 24struct event_format*
25trace_event__tp_format(const char *sys, const char *name); 25trace_event__tp_format(const char *sys, const char *name);
26 26
@@ -34,20 +34,20 @@ void event_format__fprintf(struct event_format *event,
34void event_format__print(struct event_format *event, 34void event_format__print(struct event_format *event,
35 int cpu, void *data, int size); 35 int cpu, void *data, int size);
36 36
37int parse_ftrace_file(struct pevent *pevent, char *buf, unsigned long size); 37int parse_ftrace_file(struct tep_handle *pevent, char *buf, unsigned long size);
38int parse_event_file(struct pevent *pevent, 38int parse_event_file(struct tep_handle *pevent,
39 char *buf, unsigned long size, char *sys); 39 char *buf, unsigned long size, char *sys);
40 40
41unsigned long long 41unsigned long long
42raw_field_value(struct event_format *event, const char *name, void *data); 42raw_field_value(struct event_format *event, const char *name, void *data);
43 43
44void parse_proc_kallsyms(struct pevent *pevent, char *file, unsigned int size); 44void parse_proc_kallsyms(struct tep_handle *pevent, char *file, unsigned int size);
45void parse_ftrace_printk(struct pevent *pevent, char *file, unsigned int size); 45void parse_ftrace_printk(struct tep_handle *pevent, char *file, unsigned int size);
46void parse_saved_cmdline(struct pevent *pevent, char *file, unsigned int size); 46void parse_saved_cmdline(struct tep_handle *pevent, char *file, unsigned int size);
47 47
48ssize_t trace_report(int fd, struct trace_event *tevent, bool repipe); 48ssize_t trace_report(int fd, struct trace_event *tevent, bool repipe);
49 49
50struct event_format *trace_find_next_event(struct pevent *pevent, 50struct event_format *trace_find_next_event(struct tep_handle *pevent,
51 struct event_format *event); 51 struct event_format *event);
52unsigned long long read_size(struct event_format *event, void *ptr, int size); 52unsigned long long read_size(struct event_format *event, void *ptr, int size);
53unsigned long long eval_flag(const char *flag); 53unsigned long long eval_flag(const char *flag);
@@ -83,7 +83,7 @@ struct scripting_ops {
83 void (*process_stat)(struct perf_stat_config *config, 83 void (*process_stat)(struct perf_stat_config *config,
84 struct perf_evsel *evsel, u64 tstamp); 84 struct perf_evsel *evsel, u64 tstamp);
85 void (*process_stat_interval)(u64 tstamp); 85 void (*process_stat_interval)(u64 tstamp);
86 int (*generate_script) (struct pevent *pevent, const char *outfile); 86 int (*generate_script) (struct tep_handle *pevent, const char *outfile);
87}; 87};
88 88
89extern unsigned int scripting_max_stack; 89extern unsigned int scripting_max_stack;
@@ -94,7 +94,7 @@ void setup_perl_scripting(void);
94void setup_python_scripting(void); 94void setup_python_scripting(void);
95 95
96struct scripting_context { 96struct scripting_context {
97 struct pevent *pevent; 97 struct tep_handle *pevent;
98 void *event_data; 98 void *event_data;
99}; 99};
100 100
diff --git a/tools/perf/util/unwind-libdw.c b/tools/perf/util/unwind-libdw.c
index 538db4e5d1e6..6f318b15950e 100644
--- a/tools/perf/util/unwind-libdw.c
+++ b/tools/perf/util/unwind-libdw.c
@@ -77,7 +77,7 @@ static int entry(u64 ip, struct unwind_info *ui)
77 if (__report_module(&al, ip, ui)) 77 if (__report_module(&al, ip, ui))
78 return -1; 78 return -1;
79 79
80 e->ip = al.addr; 80 e->ip = ip;
81 e->map = al.map; 81 e->map = al.map;
82 e->sym = al.sym; 82 e->sym = al.sym;
83 83
diff --git a/tools/perf/util/unwind-libunwind-local.c b/tools/perf/util/unwind-libunwind-local.c
index 6a11bc7e6b27..79f521a552cf 100644
--- a/tools/perf/util/unwind-libunwind-local.c
+++ b/tools/perf/util/unwind-libunwind-local.c
@@ -575,7 +575,7 @@ static int entry(u64 ip, struct thread *thread,
575 struct addr_location al; 575 struct addr_location al;
576 576
577 e.sym = thread__find_symbol(thread, PERF_RECORD_MISC_USER, ip, &al); 577 e.sym = thread__find_symbol(thread, PERF_RECORD_MISC_USER, ip, &al);
578 e.ip = al.addr; 578 e.ip = ip;
579 e.map = al.map; 579 e.map = al.map;
580 580
581 pr_debug("unwind: %s:ip = 0x%" PRIx64 " (0x%" PRIx64 ")\n", 581 pr_debug("unwind: %s:ip = 0x%" PRIx64 " (0x%" PRIx64 ")\n",
diff --git a/tools/perf/util/zlib.c b/tools/perf/util/zlib.c
index a725b958cf31..902ce6384f57 100644
--- a/tools/perf/util/zlib.c
+++ b/tools/perf/util/zlib.c
@@ -5,6 +5,8 @@
5#include <sys/stat.h> 5#include <sys/stat.h>
6#include <sys/mman.h> 6#include <sys/mman.h>
7#include <zlib.h> 7#include <zlib.h>
8#include <linux/compiler.h>
9#include <unistd.h>
8 10
9#include "util/compress.h" 11#include "util/compress.h"
10#include "util/util.h" 12#include "util/util.h"
@@ -79,3 +81,19 @@ out_close:
79 81
80 return ret == Z_STREAM_END ? 0 : -1; 82 return ret == Z_STREAM_END ? 0 : -1;
81} 83}
84
85bool gzip_is_compressed(const char *input)
86{
87 int fd = open(input, O_RDONLY);
88 const uint8_t magic[2] = { 0x1f, 0x8b };
89 char buf[2] = { 0 };
90 ssize_t rc;
91
92 if (fd < 0)
93 return -1;
94
95 rc = read(fd, buf, sizeof(buf));
96 close(fd);
97 return rc == sizeof(buf) ?
98 memcmp(buf, magic, sizeof(buf)) == 0 : false;
99}