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authorAndi Kleen <ak@linux.intel.com>2016-09-17 21:08:45 -0400
committerArnaldo Carvalho de Melo <acme@redhat.com>2017-02-08 14:36:12 -0500
commit7003f00fdb7b44662e8b47ebaf8ff6ce554df4bb (patch)
treea610e7f7276dea657c6f7e9565f2262044d30acc /tools/perf
parent2f7db55579943cb7723e7567bd9b9927d3777d29 (diff)
perf vendor events intel: Add uncore events for Haswell Server processor
This is not a full uncore event list, but a short list of useful and understandable metrics. Signed-off-by: Andi Kleen <ak@linux.intel.com> Cc: Jiri Olsa <jolsa@kernel.org> Link: http://lkml.kernel.org/n/tip-c0cix4eprbldfrx5zf60suvh@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf')
-rw-r--r--tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json317
-rw-r--r--tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json28
-rw-r--r--tools/perf/pmu-events/arch/x86/haswellx/uncore-memory.json83
-rw-r--r--tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json84
4 files changed, 512 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json b/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json
new file mode 100644
index 000000000000..076459c51d4e
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-cache.json
@@ -0,0 +1,317 @@
1[
2 {
3 "BriefDescription": "Uncore cache clock ticks. Derived from unc_c_clockticks",
4 "Counter": "0,1,2,3",
5 "EventName": "UNC_C_CLOCKTICKS",
6 "PerPkg": "1",
7 "Unit": "CBO"
8 },
9 {
10 "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch). Derived from unc_c_llc_lookup.any",
11 "Counter": "0,1,2,3",
12 "EventCode": "0x34",
13 "EventName": "UNC_C_LLC_LOOKUP.ANY",
14 "Filter": "filter_state=0x1",
15 "PerPkg": "1",
16 "ScaleUnit": "64Bytes",
17 "UMask": "0x11",
18 "Unit": "CBO"
19 },
20 {
21 "BriefDescription": "M line evictions from LLC (writebacks to memory). Derived from unc_c_llc_victims.m_state",
22 "Counter": "0,1,2,3",
23 "EventCode": "0x37",
24 "EventName": "UNC_C_LLC_VICTIMS.M_STATE",
25 "PerPkg": "1",
26 "ScaleUnit": "64Bytes",
27 "UMask": "0x1",
28 "Unit": "CBO"
29 },
30 {
31 "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode",
32 "Counter": "0,1,2,3",
33 "EventCode": "0x35",
34 "EventName": "LLC_MISSES.DATA_READ",
35 "Filter": "filter_opc=0x182",
36 "PerPkg": "1",
37 "ScaleUnit": "64Bytes",
38 "UMask": "0x3",
39 "Unit": "CBO"
40 },
41 {
42 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.miss_opcode",
43 "Counter": "0,1,2,3",
44 "EventCode": "0x35",
45 "EventName": "LLC_MISSES.UNCACHEABLE",
46 "Filter": "filter_opc=0x187",
47 "PerPkg": "1",
48 "ScaleUnit": "64Bytes",
49 "UMask": "0x3",
50 "Unit": "CBO"
51 },
52 {
53 "BriefDescription": "MMIO reads. Derived from unc_c_tor_inserts.miss_opcode",
54 "Counter": "0,1,2,3",
55 "EventCode": "0x35",
56 "EventName": "LLC_MISSES.MMIO_READ",
57 "Filter": "filter_opc=0x187,filter_nc=1",
58 "PerPkg": "1",
59 "ScaleUnit": "64Bytes",
60 "UMask": "0x3",
61 "Unit": "CBO"
62 },
63 {
64 "BriefDescription": "MMIO writes. Derived from unc_c_tor_inserts.miss_opcode",
65 "Counter": "0,1,2,3",
66 "EventCode": "0x35",
67 "EventName": "LLC_MISSES.MMIO_WRITE",
68 "Filter": "filter_opc=0x18f,filter_nc=1",
69 "PerPkg": "1",
70 "ScaleUnit": "64Bytes",
71 "UMask": "0x3",
72 "Unit": "CBO"
73 },
74 {
75 "BriefDescription": "LLC prefetch misses for RFO. Derived from unc_c_tor_inserts.miss_opcode",
76 "Counter": "0,1,2,3",
77 "EventCode": "0x35",
78 "EventName": "LLC_MISSES.RFO_LLC_PREFETCH",
79 "Filter": "filter_opc=0x190",
80 "PerPkg": "1",
81 "ScaleUnit": "64Bytes",
82 "UMask": "0x3",
83 "Unit": "CBO"
84 },
85 {
86 "BriefDescription": "LLC prefetch misses for code reads. Derived from unc_c_tor_inserts.miss_opcode",
87 "Counter": "0,1,2,3",
88 "EventCode": "0x35",
89 "EventName": "LLC_MISSES.CODE_LLC_PREFETCH",
90 "Filter": "filter_opc=0x191",
91 "PerPkg": "1",
92 "ScaleUnit": "64Bytes",
93 "UMask": "0x3",
94 "Unit": "CBO"
95 },
96 {
97 "BriefDescription": "LLC prefetch misses for data reads. Derived from unc_c_tor_inserts.miss_opcode",
98 "Counter": "0,1,2,3",
99 "EventCode": "0x35",
100 "EventName": "LLC_MISSES.DATA_LLC_PREFETCH",
101 "Filter": "filter_opc=0x192",
102 "PerPkg": "1",
103 "ScaleUnit": "64Bytes",
104 "UMask": "0x3",
105 "Unit": "CBO"
106 },
107 {
108 "BriefDescription": "LLC misses for PCIe read current. Derived from unc_c_tor_inserts.miss_opcode",
109 "Counter": "0,1,2,3",
110 "EventCode": "0x35",
111 "EventName": "LLC_MISSES.PCIE_READ",
112 "Filter": "filter_opc=0x19e",
113 "PerPkg": "1",
114 "ScaleUnit": "64Bytes",
115 "UMask": "0x3",
116 "Unit": "CBO"
117 },
118 {
119 "BriefDescription": "ItoM write misses (as part of fast string memcpy stores) + PCIe full line writes. Derived from unc_c_tor_inserts.miss_opcode",
120 "Counter": "0,1,2,3",
121 "EventCode": "0x35",
122 "EventName": "LLC_MISSES.PCIE_WRITE",
123 "Filter": "filter_opc=0x1c8",
124 "PerPkg": "1",
125 "ScaleUnit": "64Bytes",
126 "UMask": "0x3",
127 "Unit": "CBO"
128 },
129 {
130 "BriefDescription": "PCIe write misses (full cache line). Derived from unc_c_tor_inserts.miss_opcode",
131 "Counter": "0,1,2,3",
132 "EventCode": "0x35",
133 "EventName": "LLC_MISSES.PCIE_NON_SNOOP_WRITE",
134 "Filter": "filter_opc=0x1c8,filter_tid=0x3e",
135 "PerPkg": "1",
136 "ScaleUnit": "64Bytes",
137 "UMask": "0x3",
138 "Unit": "CBO"
139 },
140 {
141 "BriefDescription": "PCIe writes (partial cache line). Derived from unc_c_tor_inserts.opcode",
142 "Counter": "0,1,2,3",
143 "EventCode": "0x35",
144 "EventName": "LLC_REFERENCES.PCIE_NS_PARTIAL_WRITE",
145 "Filter": "filter_opc=0x180,filter_tid=0x3e",
146 "PerPkg": "1",
147 "UMask": "0x1",
148 "Unit": "CBO"
149 },
150 {
151 "BriefDescription": "L2 demand and L2 prefetch code references to LLC. Derived from unc_c_tor_inserts.opcode",
152 "Counter": "0,1,2,3",
153 "EventCode": "0x35",
154 "EventName": "LLC_REFERENCES.CODE_LLC_PREFETCH",
155 "Filter": "filter_opc=0x181",
156 "PerPkg": "1",
157 "ScaleUnit": "64Bytes",
158 "UMask": "0x1",
159 "Unit": "CBO"
160 },
161 {
162 "BriefDescription": "Streaming stores (full cache line). Derived from unc_c_tor_inserts.opcode",
163 "Counter": "0,1,2,3",
164 "EventCode": "0x35",
165 "EventName": "LLC_REFERENCES.STREAMING_FULL",
166 "Filter": "filter_opc=0x18c",
167 "PerPkg": "1",
168 "ScaleUnit": "64Bytes",
169 "UMask": "0x1",
170 "Unit": "CBO"
171 },
172 {
173 "BriefDescription": "Streaming stores (partial cache line). Derived from unc_c_tor_inserts.opcode",
174 "Counter": "0,1,2,3",
175 "EventCode": "0x35",
176 "EventName": "LLC_REFERENCES.STREAMING_PARTIAL",
177 "Filter": "filter_opc=0x18d",
178 "PerPkg": "1",
179 "ScaleUnit": "64Bytes",
180 "UMask": "0x1",
181 "Unit": "CBO"
182 },
183 {
184 "BriefDescription": "PCIe read current. Derived from unc_c_tor_inserts.opcode",
185 "Counter": "0,1,2,3",
186 "EventCode": "0x35",
187 "EventName": "LLC_REFERENCES.PCIE_READ",
188 "Filter": "filter_opc=0x19e",
189 "PerPkg": "1",
190 "ScaleUnit": "64Bytes",
191 "UMask": "0x1",
192 "Unit": "CBO"
193 },
194 {
195 "BriefDescription": "PCIe write references (full cache line). Derived from unc_c_tor_inserts.opcode",
196 "Counter": "0,1,2,3",
197 "EventCode": "0x35",
198 "EventName": "LLC_REFERENCES.PCIE_WRITE",
199 "Filter": "filter_opc=0x1c8,filter_tid=0x3e",
200 "PerPkg": "1",
201 "ScaleUnit": "64Bytes",
202 "UMask": "0x1",
203 "Unit": "CBO"
204 },
205 {
206 "BriefDescription": "Occupancy counter for LLC data reads (demand and L2 prefetch). Derived from unc_c_tor_occupancy.miss_opcode",
207 "EventCode": "0x36",
208 "EventName": "UNC_C_TOR_OCCUPANCY.LLC_DATA_READ",
209 "Filter": "filter_opc=0x182",
210 "PerPkg": "1",
211 "UMask": "0x3",
212 "Unit": "CBO"
213 },
214 {
215 "BriefDescription": "read requests to home agent. Derived from unc_h_requests.reads",
216 "Counter": "0,1,2,3",
217 "EventCode": "0x1",
218 "EventName": "UNC_H_REQUESTS.READS",
219 "PerPkg": "1",
220 "UMask": "0x3",
221 "Unit": "HA"
222 },
223 {
224 "BriefDescription": "read requests to local home agent. Derived from unc_h_requests.reads_local",
225 "Counter": "0,1,2,3",
226 "EventCode": "0x1",
227 "EventName": "UNC_H_REQUESTS.READS_LOCAL",
228 "PerPkg": "1",
229 "UMask": "0x1",
230 "Unit": "HA"
231 },
232 {
233 "BriefDescription": "read requests to remote home agent. Derived from unc_h_requests.reads_remote",
234 "Counter": "0,1,2,3",
235 "EventCode": "0x1",
236 "EventName": "UNC_H_REQUESTS.READS_REMOTE",
237 "PerPkg": "1",
238 "UMask": "0x2",
239 "Unit": "HA"
240 },
241 {
242 "BriefDescription": "write requests to home agent. Derived from unc_h_requests.writes",
243 "Counter": "0,1,2,3",
244 "EventCode": "0x1",
245 "EventName": "UNC_H_REQUESTS.WRITES",
246 "PerPkg": "1",
247 "UMask": "0xC",
248 "Unit": "HA"
249 },
250 {
251 "BriefDescription": "write requests to local home agent. Derived from unc_h_requests.writes_local",
252 "Counter": "0,1,2,3",
253 "EventCode": "0x1",
254 "EventName": "UNC_H_REQUESTS.WRITES_LOCAL",
255 "PerPkg": "1",
256 "UMask": "0x4",
257 "Unit": "HA"
258 },
259 {
260 "BriefDescription": "write requests to remote home agent. Derived from unc_h_requests.writes_remote",
261 "Counter": "0,1,2,3",
262 "EventCode": "0x1",
263 "EventName": "UNC_H_REQUESTS.WRITES_REMOTE",
264 "PerPkg": "1",
265 "UMask": "0x8",
266 "Unit": "HA"
267 },
268 {
269 "BriefDescription": "Conflict requests (requests for same address from multiple agents simultaneously). Derived from unc_h_snoop_resp.rspcnflct",
270 "Counter": "0,1,2,3",
271 "EventCode": "0x21",
272 "EventName": "UNC_H_SNOOP_RESP.RSPCNFLCT",
273 "PerPkg": "1",
274 "UMask": "0x40",
275 "Unit": "HA"
276 },
277 {
278 "BriefDescription": "M line forwarded from remote cache along with writeback to memory. Derived from unc_h_snoop_resp.rsp_fwd_wb",
279 "Counter": "0,1,2,3",
280 "EventCode": "0x21",
281 "EventName": "UNC_H_SNOOP_RESP.RSP_FWD_WB",
282 "PerPkg": "1",
283 "ScaleUnit": "64Bytes",
284 "UMask": "0x20",
285 "Unit": "HA"
286 },
287 {
288 "BriefDescription": "M line forwarded from remote cache with no writeback to memory. Derived from unc_h_snoop_resp.rspifwd",
289 "Counter": "0,1,2,3",
290 "EventCode": "0x21",
291 "EventName": "UNC_H_SNOOP_RESP.RSPIFWD",
292 "PerPkg": "1",
293 "ScaleUnit": "64Bytes",
294 "UMask": "0x4",
295 "Unit": "HA"
296 },
297 {
298 "BriefDescription": "Shared line response from remote cache. Derived from unc_h_snoop_resp.rsps",
299 "Counter": "0,1,2,3",
300 "EventCode": "0x21",
301 "EventName": "UNC_H_SNOOP_RESP.RSPS",
302 "PerPkg": "1",
303 "ScaleUnit": "64Bytes",
304 "UMask": "0x2",
305 "Unit": "HA"
306 },
307 {
308 "BriefDescription": "Shared line forwarded from remote cache. Derived from unc_h_snoop_resp.rspsfwd",
309 "Counter": "0,1,2,3",
310 "EventCode": "0x21",
311 "EventName": "UNC_H_SNOOP_RESP.RSPSFWD",
312 "PerPkg": "1",
313 "ScaleUnit": "64Bytes",
314 "UMask": "0x8",
315 "Unit": "HA"
316 }
317]
diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json b/tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json
new file mode 100644
index 000000000000..39387f7909b2
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-interconnect.json
@@ -0,0 +1,28 @@
1[
2 {
3 "BriefDescription": "QPI clock ticks. Derived from unc_q_clockticks",
4 "Counter": "0,1,2,3",
5 "EventCode": "0x14",
6 "EventName": "UNC_Q_CLOCKTICKS",
7 "PerPkg": "1",
8 "Unit": "QPI LL"
9 },
10 {
11 "BriefDescription": "Number of data flits transmitted . Derived from unc_q_txl_flits_g0.data",
12 "Counter": "0,1,2,3",
13 "EventName": "UNC_Q_TxL_FLITS_G0.DATA",
14 "PerPkg": "1",
15 "ScaleUnit": "8Bytes",
16 "UMask": "0x2",
17 "Unit": "QPI LL"
18 },
19 {
20 "BriefDescription": "Number of non data (control) flits transmitted . Derived from unc_q_txl_flits_g0.non_data",
21 "Counter": "0,1,2,3",
22 "EventName": "UNC_Q_TxL_FLITS_G0.NON_DATA",
23 "PerPkg": "1",
24 "ScaleUnit": "8Bytes",
25 "UMask": "0x4",
26 "Unit": "QPI LL"
27 }
28]
diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-memory.json b/tools/perf/pmu-events/arch/x86/haswellx/uncore-memory.json
new file mode 100644
index 000000000000..d17dc235f734
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-memory.json
@@ -0,0 +1,83 @@
1[
2 {
3 "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd",
4 "Counter": "0,1,2,3",
5 "EventCode": "0x4",
6 "EventName": "UNC_M_CAS_COUNT.RD",
7 "PerPkg": "1",
8 "ScaleUnit": "64Bytes",
9 "UMask": "0x3",
10 "Unit": "iMC"
11 },
12 {
13 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr",
14 "Counter": "0,1,2,3",
15 "EventCode": "0x4",
16 "EventName": "UNC_M_CAS_COUNT.WR",
17 "PerPkg": "1",
18 "ScaleUnit": "64Bytes",
19 "UMask": "0xC",
20 "Unit": "iMC"
21 },
22 {
23 "BriefDescription": "Memory controller clock ticks. Derived from unc_m_clockticks",
24 "Counter": "0,1,2,3",
25 "EventName": "UNC_M_CLOCKTICKS",
26 "PerPkg": "1",
27 "Unit": "iMC"
28 },
29 {
30 "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode. Derived from unc_m_power_channel_ppd",
31 "Counter": "0,1,2,3",
32 "EventCode": "0x85",
33 "EventName": "UNC_M_POWER_CHANNEL_PPD",
34 "MetricExpr": "(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.",
35 "PerPkg": "1",
36 "Unit": "iMC"
37 },
38 {
39 "BriefDescription": "Cycles all ranks are in critical thermal throttle. Derived from unc_m_power_critical_throttle_cycles",
40 "Counter": "0,1,2,3",
41 "EventCode": "0x86",
42 "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES",
43 "MetricExpr": "(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_CLOCKTICKS) * 100.",
44 "PerPkg": "1",
45 "Unit": "iMC"
46 },
47 {
48 "BriefDescription": "Cycles Memory is in self refresh power mode. Derived from unc_m_power_self_refresh",
49 "Counter": "0,1,2,3",
50 "EventCode": "0x43",
51 "EventName": "UNC_M_POWER_SELF_REFRESH",
52 "MetricExpr": "(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.",
53 "PerPkg": "1",
54 "Unit": "iMC"
55 },
56 {
57 "BriefDescription": "Pre-charges due to page misses. Derived from unc_m_pre_count.page_miss",
58 "Counter": "0,1,2,3",
59 "EventCode": "0x2",
60 "EventName": "UNC_M_PRE_COUNT.PAGE_MISS",
61 "PerPkg": "1",
62 "UMask": "0x1",
63 "Unit": "iMC"
64 },
65 {
66 "BriefDescription": "Pre-charge for reads. Derived from unc_m_pre_count.rd",
67 "Counter": "0,1,2,3",
68 "EventCode": "0x2",
69 "EventName": "UNC_M_PRE_COUNT.RD",
70 "PerPkg": "1",
71 "UMask": "0x4",
72 "Unit": "iMC"
73 },
74 {
75 "BriefDescription": "Pre-charge for writes. Derived from unc_m_pre_count.wr",
76 "Counter": "0,1,2,3",
77 "EventCode": "0x2",
78 "EventName": "UNC_M_PRE_COUNT.WR",
79 "PerPkg": "1",
80 "UMask": "0x8",
81 "Unit": "iMC"
82 }
83]
diff --git a/tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json b/tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json
new file mode 100644
index 000000000000..b44d43088bbb
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/haswellx/uncore-power.json
@@ -0,0 +1,84 @@
1[
2 {
3 "BriefDescription": "PCU clock ticks. Use to get percentages of PCU cycles events. Derived from unc_p_clockticks",
4 "Counter": "0,1,2,3",
5 "EventName": "UNC_P_CLOCKTICKS",
6 "PerPkg": "1",
7 "Unit": "PCU"
8 },
9 {
10 "BriefDescription": "C0 and C1. Derived from unc_p_power_state_occupancy.cores_c0",
11 "Counter": "0,1,2,3",
12 "EventCode": "0x80",
13 "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C0",
14 "Filter": "occ_sel=1",
15 "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C0 / UNC_P_CLOCKTICKS) * 100.",
16 "PerPkg": "1",
17 "Unit": "PCU"
18 },
19 {
20 "BriefDescription": "C3. Derived from unc_p_power_state_occupancy.cores_c3",
21 "Counter": "0,1,2,3",
22 "EventCode": "0x80",
23 "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C3",
24 "Filter": "occ_sel=2",
25 "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C3 / UNC_P_CLOCKTICKS) * 100.",
26 "PerPkg": "1",
27 "Unit": "PCU"
28 },
29 {
30 "BriefDescription": "C6 and C7. Derived from unc_p_power_state_occupancy.cores_c6",
31 "Counter": "0,1,2,3",
32 "EventCode": "0x80",
33 "EventName": "UNC_P_POWER_STATE_OCCUPANCY.CORES_C6",
34 "Filter": "occ_sel=3",
35 "MetricExpr": "(UNC_P_POWER_STATE_OCCUPANCY.CORES_C6 / UNC_P_CLOCKTICKS) * 100.",
36 "PerPkg": "1",
37 "Unit": "PCU"
38 },
39 {
40 "BriefDescription": "External Prochot. Derived from unc_p_prochot_external_cycles",
41 "Counter": "0,1,2,3",
42 "EventCode": "0xA",
43 "EventName": "UNC_P_PROCHOT_EXTERNAL_CYCLES",
44 "MetricExpr": "(UNC_P_PROCHOT_EXTERNAL_CYCLES / UNC_P_CLOCKTICKS) * 100.",
45 "PerPkg": "1",
46 "Unit": "PCU"
47 },
48 {
49 "BriefDescription": "Thermal Strongest Upper Limit Cycles. Derived from unc_p_freq_max_limit_thermal_cycles",
50 "Counter": "0,1,2,3",
51 "EventCode": "0x4",
52 "EventName": "UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES",
53 "MetricExpr": "(UNC_P_FREQ_MAX_LIMIT_THERMAL_CYCLES / UNC_P_CLOCKTICKS) * 100.",
54 "PerPkg": "1",
55 "Unit": "PCU"
56 },
57 {
58 "BriefDescription": "OS Strongest Upper Limit Cycles. Derived from unc_p_freq_max_os_cycles",
59 "Counter": "0,1,2,3",
60 "EventCode": "0x6",
61 "EventName": "UNC_P_FREQ_MAX_OS_CYCLES",
62 "MetricExpr": "(UNC_P_FREQ_MAX_OS_CYCLES / UNC_P_CLOCKTICKS) * 100.",
63 "PerPkg": "1",
64 "Unit": "PCU"
65 },
66 {
67 "BriefDescription": "Power Strongest Upper Limit Cycles. Derived from unc_p_freq_max_power_cycles",
68 "Counter": "0,1,2,3",
69 "EventCode": "0x5",
70 "EventName": "UNC_P_FREQ_MAX_POWER_CYCLES",
71 "MetricExpr": "(UNC_P_FREQ_MAX_POWER_CYCLES / UNC_P_CLOCKTICKS) * 100.",
72 "PerPkg": "1",
73 "Unit": "PCU"
74 },
75 {
76 "BriefDescription": "Cycles spent changing Frequency. Derived from unc_p_freq_trans_cycles",
77 "Counter": "0,1,2,3",
78 "EventCode": "0x74",
79 "EventName": "UNC_P_FREQ_TRANS_CYCLES",
80 "MetricExpr": "(UNC_P_FREQ_TRANS_CYCLES / UNC_P_CLOCKTICKS) * 100.",
81 "PerPkg": "1",
82 "Unit": "PCU"
83 }
84]
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-19 10:06:45 -0400