diff options
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2017-07-25 06:34:02 -0400 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-23 18:56:53 -0400 |
| commit | 1a7da87727acfc201141d67e6edf2fb4ddcab7db (patch) | |
| tree | d7bff74b07e86abef51429c4e8092495cc8681d7 /tools/perf/scripts/python/stackcollapse.py | |
| parent | de2245540ed84c56ba3d71d1ce8e14fdaf332720 (diff) | |
clk: tegra: fix SS control on PLL enable/disable
PLL SS was only controlled when setting the PLL rate, not when the PLL itself
is enabled or disabled.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions