diff options
| author | Tony Lindgren <tony@atomide.com> | 2017-08-30 11:19:53 -0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2017-09-19 13:32:38 -0400 |
| commit | 288cdbbff2dcfc5188a708a9a3e7aaedc41512f1 (patch) | |
| tree | 6c4c42eca081290bf1384a96bee78acd1430be7d /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | cd57dc5a2099a43c99fb39cb7c953246149db816 (diff) | |
ARM: dts: Add missing hwmod related properties for dra7
On dra7 we're missing two "ti,hwmods" properties that the SoC
interconnect code needs. For hdq 1-wire, we need to add the
node for that.
Note that this will only show up as a bug with "doesn't have
mpu register target base" boot errors when the legacy platform
data is removed.
Cc: Nishanth Menon <nm@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions