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| author | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2018-01-12 09:17:36 -0500 |
|---|---|---|
| committer | Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> | 2018-02-14 12:11:32 -0500 |
| commit | 02f0aaaaf03049ac69473015c54bdd46eaebf1e3 (patch) | |
| tree | bfb46a6faa6218383fbd18deeba009296b8f3b42 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 3e5907a17fe4aa42d32015482132475e2b39ad50 (diff) | |
drm: rcar-du: lvds: Fix LVDS clock frequency range
According to the latest versions of both the Gen2 and Gen3 datasheets,
the operating range for the LVDS clock is 31 MHz to 148.5 MHz on all
SoCs. Update the driver accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions