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| author | Thierry Reding <treding@nvidia.com> | 2015-01-26 10:02:48 -0500 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-04-02 12:46:16 -0400 |
| commit | 28fe2076004da062e9affac1cec98c697de53eb1 (patch) | |
| tree | d40639a99dc33d82b6586b2b27c68c36bac18d46 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 28c23373b88bcc244b573ea45596a51e9db73d2c (diff) | |
drm/tegra: sor: Registers are 32-bit
Use a sized unsigned 32-bit data type (u32) to store register contents.
The SOR registers are 32 bits wide irrespective of the architecture's
data width.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions