diff options
| author | Archit Taneja <architt@codeaurora.org> | 2015-03-04 04:49:35 -0500 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-03-23 18:48:43 -0400 |
| commit | 0b21503dbbfa669dbd847b33578d4041513cddb2 (patch) | |
| tree | 82c33048083ebb6e6665d019a2e543e17f79f902 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 0833b5ae69026cf62b5fc6cf83b1f1d1cd36164b (diff) | |
clk: qcom: fix RCG M/N counter configuration
Currently, a RCG's M/N counter (used for fraction division) is
set to either 'bypass' (counter disabled) or 'dual edge' (counter
enabled) based on whether the corresponding rcg struct has a mnd
field specified and a non-zero N.
In the case where M and N are the same value, the M/N counter is
still enabled by code even though no division takes place.
Leaving the RCG in such a state can result in improper behavior.
This was observed with the DSI pixel clock RCG when M and N were
both set to 1.
Add an additional check (M != N) to enable the M/N counter only
when it's needed for fraction division.
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Fixes: bcd61c0f535a (clk: qcom: Add support for root clock
generators (RCGs))
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions