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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2016-04-26 03:58:36 -0400 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2016-04-26 09:10:21 -0400 |
| commit | 728dacc7f4dd5d99b2a7e127b969165f54b6eece (patch) | |
| tree | e9d35c0243434a9d2ae7c4dc80d4d7595bc65729 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | d8b330a3e3135ed4cbc23c672deb7c978a686375 (diff) | |
arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master
This commit adds an initial Device Tree description for the CP110
master that is found in the Armada 7K and 8K SoCs. This initial
description describes:
- the system controller (to provide clocks)
- three PCIe interfaces
- the SATA interface
- the I2C controllers
- the SPI controllers
For the record, the organization of the SoCs is as follows:
- 7020: dual-core AP, one CP110 (master)
- 7040: quad-core AP, one CP110 (master)
- 8020: dual-core AP, two CP110s (master and slave)
- 8040: quad-core AP, two CP110s (master and slave)
For this reason, all of the 7020, 7040, 8020 and 8040 include
armada-cp110-master.dtsi. When support for the second CP110 (slave)
used in 8020 and 8040 will be added, the .dtsi files for those SoCs
will in addition include armada-cp110-slave.dtsi.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions