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authorSimon Horman <horms+renesas@verge.net.au>2016-03-17 19:15:34 -0400
committerSimon Horman <horms+renesas@verge.net.au>2016-03-27 19:55:58 -0400
commit3f6dba702c57908c5f66601ced6ef9f131759611 (patch)
tree4939933e88998ebc344bb61dce7da38f7695eb20 /tools/perf/scripts/python/event_analyzing_sample.py
parent452fc89994c2a81ade92096088b94ecbfef436a8 (diff)
ARM: dts: r8a7779: Remove unnecessary clock-output-names properties
* Fixed rate and fixed factor clocks do not require an clock-output-names property. * Since 07705583e920fef6 ("clk: shmobile: div6: Make clock-output-names optional") Renesas div6 clocks do not require a clock-output-names property. In the above cases there is only one clock output and its name is taken from that of the clock node. Accordingly, remove the unnecessary clock-output-names properties and as necessary update the node names. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
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