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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2017-03-07 00:30:06 -0500
committerSimon Horman <horms+renesas@verge.net.au>2017-03-07 01:51:11 -0500
commitb5a8ffad0eb0c1e5e601253edac163b2da9e855d (patch)
treea818742afceff4a0f37e22197cfefb422515e44f /tools/perf/scripts/python/call-graph-from-postgresql.py
parent7d73a4da2681dc5d04e8ed9f4aa96c1deed2dbc5 (diff)
arm64: dts: r8a7795: Tidyup Audio-DMAC channel for DVC
Current Audio-DMAC is assigned "rx" as Audio-DMAC0, "tx" as Audio-DMAC1. Thus, DVC "tx" should be assigned as Audio-DMAC1, instead of Audio-DMAC0. Because of this, current platform board (using SRC/DVC/SSI) Playback/Capture both will use same Audio-DMAC0 (but it depends on audio data path). First note is that this "rx" and "tx" are from each IP point, it doesn't mean Playback/Capture. Second note is that Audio DMAC assigned on DT is only for Audio-DMAC, Audio-DMAC-peri-peri has no entry. => Audio-DMAC -> Audio-DMAC-peri-peri -- HW connection Playback case [Mem] => [SRC]--[DVC] -> [SSI]--[Codec] rx ~~~~~~~~~~~~ Capture [Mem] <= [DVC]--[SRC] <- [SSI]--[Codec] tx ~~~~~~~~~~~~ Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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