diff options
author | Matt Fleming <matt.fleming@intel.com> | 2015-10-05 10:40:20 -0400 |
---|---|---|
committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2015-10-05 15:55:43 -0400 |
commit | d8b167f9d8af817073ee35cf904e2e527465dbc1 (patch) | |
tree | cb7a68e763eee2c7d1796151738e53c597860b39 /tools/perf/arch/x86/tests/insn-x86-dat-32.c | |
parent | 31b6753f95320260b160935d0e9c0b29f096ab57 (diff) |
perf tests: Move x86 tests into arch directory
Move out the x86-specific tests into tools/perf/arch/x86/tests and
define an 'arch_tests' array, which is the list of tests that only apply
to the build architecture.
We can also now begin to get rid of some of the #ifdef code that is
present in the generic perf tests.
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kanaka Juvva <kanaka.d.juvva@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Vikas Shivappa <vikas.shivappa@intel.com>
Cc: Vince Weaver <vince@deater.net>
Link: http://lkml.kernel.org/n/tip-9s68h4ptg06ah0lgnjz55mqn@git.kernel.org
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/arch/x86/tests/insn-x86-dat-32.c')
-rw-r--r-- | tools/perf/arch/x86/tests/insn-x86-dat-32.c | 658 |
1 files changed, 658 insertions, 0 deletions
diff --git a/tools/perf/arch/x86/tests/insn-x86-dat-32.c b/tools/perf/arch/x86/tests/insn-x86-dat-32.c new file mode 100644 index 000000000000..3b491cfe204e --- /dev/null +++ b/tools/perf/arch/x86/tests/insn-x86-dat-32.c | |||
@@ -0,0 +1,658 @@ | |||
1 | /* | ||
2 | * Generated by gen-insn-x86-dat.sh and gen-insn-x86-dat.awk | ||
3 | * from insn-x86-dat-src.c for inclusion by insn-x86.c | ||
4 | * Do not change this code. | ||
5 | */ | ||
6 | |||
7 | {{0x0f, 0x31, }, 2, 0, "", "", | ||
8 | "0f 31 \trdtsc ",}, | ||
9 | {{0xf3, 0x0f, 0x1b, 0x00, }, 4, 0, "", "", | ||
10 | "f3 0f 1b 00 \tbndmk (%eax),%bnd0",}, | ||
11 | {{0xf3, 0x0f, 0x1b, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
12 | "f3 0f 1b 05 78 56 34 12 \tbndmk 0x12345678,%bnd0",}, | ||
13 | {{0xf3, 0x0f, 0x1b, 0x18, }, 4, 0, "", "", | ||
14 | "f3 0f 1b 18 \tbndmk (%eax),%bnd3",}, | ||
15 | {{0xf3, 0x0f, 0x1b, 0x04, 0x01, }, 5, 0, "", "", | ||
16 | "f3 0f 1b 04 01 \tbndmk (%ecx,%eax,1),%bnd0",}, | ||
17 | {{0xf3, 0x0f, 0x1b, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
18 | "f3 0f 1b 04 05 78 56 34 12 \tbndmk 0x12345678(,%eax,1),%bnd0",}, | ||
19 | {{0xf3, 0x0f, 0x1b, 0x04, 0x08, }, 5, 0, "", "", | ||
20 | "f3 0f 1b 04 08 \tbndmk (%eax,%ecx,1),%bnd0",}, | ||
21 | {{0xf3, 0x0f, 0x1b, 0x04, 0xc8, }, 5, 0, "", "", | ||
22 | "f3 0f 1b 04 c8 \tbndmk (%eax,%ecx,8),%bnd0",}, | ||
23 | {{0xf3, 0x0f, 0x1b, 0x40, 0x12, }, 5, 0, "", "", | ||
24 | "f3 0f 1b 40 12 \tbndmk 0x12(%eax),%bnd0",}, | ||
25 | {{0xf3, 0x0f, 0x1b, 0x45, 0x12, }, 5, 0, "", "", | ||
26 | "f3 0f 1b 45 12 \tbndmk 0x12(%ebp),%bnd0",}, | ||
27 | {{0xf3, 0x0f, 0x1b, 0x44, 0x01, 0x12, }, 6, 0, "", "", | ||
28 | "f3 0f 1b 44 01 12 \tbndmk 0x12(%ecx,%eax,1),%bnd0",}, | ||
29 | {{0xf3, 0x0f, 0x1b, 0x44, 0x05, 0x12, }, 6, 0, "", "", | ||
30 | "f3 0f 1b 44 05 12 \tbndmk 0x12(%ebp,%eax,1),%bnd0",}, | ||
31 | {{0xf3, 0x0f, 0x1b, 0x44, 0x08, 0x12, }, 6, 0, "", "", | ||
32 | "f3 0f 1b 44 08 12 \tbndmk 0x12(%eax,%ecx,1),%bnd0",}, | ||
33 | {{0xf3, 0x0f, 0x1b, 0x44, 0xc8, 0x12, }, 6, 0, "", "", | ||
34 | "f3 0f 1b 44 c8 12 \tbndmk 0x12(%eax,%ecx,8),%bnd0",}, | ||
35 | {{0xf3, 0x0f, 0x1b, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
36 | "f3 0f 1b 80 78 56 34 12 \tbndmk 0x12345678(%eax),%bnd0",}, | ||
37 | {{0xf3, 0x0f, 0x1b, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
38 | "f3 0f 1b 85 78 56 34 12 \tbndmk 0x12345678(%ebp),%bnd0",}, | ||
39 | {{0xf3, 0x0f, 0x1b, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
40 | "f3 0f 1b 84 01 78 56 34 12 \tbndmk 0x12345678(%ecx,%eax,1),%bnd0",}, | ||
41 | {{0xf3, 0x0f, 0x1b, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
42 | "f3 0f 1b 84 05 78 56 34 12 \tbndmk 0x12345678(%ebp,%eax,1),%bnd0",}, | ||
43 | {{0xf3, 0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
44 | "f3 0f 1b 84 08 78 56 34 12 \tbndmk 0x12345678(%eax,%ecx,1),%bnd0",}, | ||
45 | {{0xf3, 0x0f, 0x1b, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
46 | "f3 0f 1b 84 c8 78 56 34 12 \tbndmk 0x12345678(%eax,%ecx,8),%bnd0",}, | ||
47 | {{0xf3, 0x0f, 0x1a, 0x00, }, 4, 0, "", "", | ||
48 | "f3 0f 1a 00 \tbndcl (%eax),%bnd0",}, | ||
49 | {{0xf3, 0x0f, 0x1a, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
50 | "f3 0f 1a 05 78 56 34 12 \tbndcl 0x12345678,%bnd0",}, | ||
51 | {{0xf3, 0x0f, 0x1a, 0x18, }, 4, 0, "", "", | ||
52 | "f3 0f 1a 18 \tbndcl (%eax),%bnd3",}, | ||
53 | {{0xf3, 0x0f, 0x1a, 0x04, 0x01, }, 5, 0, "", "", | ||
54 | "f3 0f 1a 04 01 \tbndcl (%ecx,%eax,1),%bnd0",}, | ||
55 | {{0xf3, 0x0f, 0x1a, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
56 | "f3 0f 1a 04 05 78 56 34 12 \tbndcl 0x12345678(,%eax,1),%bnd0",}, | ||
57 | {{0xf3, 0x0f, 0x1a, 0x04, 0x08, }, 5, 0, "", "", | ||
58 | "f3 0f 1a 04 08 \tbndcl (%eax,%ecx,1),%bnd0",}, | ||
59 | {{0xf3, 0x0f, 0x1a, 0x04, 0xc8, }, 5, 0, "", "", | ||
60 | "f3 0f 1a 04 c8 \tbndcl (%eax,%ecx,8),%bnd0",}, | ||
61 | {{0xf3, 0x0f, 0x1a, 0x40, 0x12, }, 5, 0, "", "", | ||
62 | "f3 0f 1a 40 12 \tbndcl 0x12(%eax),%bnd0",}, | ||
63 | {{0xf3, 0x0f, 0x1a, 0x45, 0x12, }, 5, 0, "", "", | ||
64 | "f3 0f 1a 45 12 \tbndcl 0x12(%ebp),%bnd0",}, | ||
65 | {{0xf3, 0x0f, 0x1a, 0x44, 0x01, 0x12, }, 6, 0, "", "", | ||
66 | "f3 0f 1a 44 01 12 \tbndcl 0x12(%ecx,%eax,1),%bnd0",}, | ||
67 | {{0xf3, 0x0f, 0x1a, 0x44, 0x05, 0x12, }, 6, 0, "", "", | ||
68 | "f3 0f 1a 44 05 12 \tbndcl 0x12(%ebp,%eax,1),%bnd0",}, | ||
69 | {{0xf3, 0x0f, 0x1a, 0x44, 0x08, 0x12, }, 6, 0, "", "", | ||
70 | "f3 0f 1a 44 08 12 \tbndcl 0x12(%eax,%ecx,1),%bnd0",}, | ||
71 | {{0xf3, 0x0f, 0x1a, 0x44, 0xc8, 0x12, }, 6, 0, "", "", | ||
72 | "f3 0f 1a 44 c8 12 \tbndcl 0x12(%eax,%ecx,8),%bnd0",}, | ||
73 | {{0xf3, 0x0f, 0x1a, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
74 | "f3 0f 1a 80 78 56 34 12 \tbndcl 0x12345678(%eax),%bnd0",}, | ||
75 | {{0xf3, 0x0f, 0x1a, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
76 | "f3 0f 1a 85 78 56 34 12 \tbndcl 0x12345678(%ebp),%bnd0",}, | ||
77 | {{0xf3, 0x0f, 0x1a, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
78 | "f3 0f 1a 84 01 78 56 34 12 \tbndcl 0x12345678(%ecx,%eax,1),%bnd0",}, | ||
79 | {{0xf3, 0x0f, 0x1a, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
80 | "f3 0f 1a 84 05 78 56 34 12 \tbndcl 0x12345678(%ebp,%eax,1),%bnd0",}, | ||
81 | {{0xf3, 0x0f, 0x1a, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
82 | "f3 0f 1a 84 08 78 56 34 12 \tbndcl 0x12345678(%eax,%ecx,1),%bnd0",}, | ||
83 | {{0xf3, 0x0f, 0x1a, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
84 | "f3 0f 1a 84 c8 78 56 34 12 \tbndcl 0x12345678(%eax,%ecx,8),%bnd0",}, | ||
85 | {{0xf3, 0x0f, 0x1a, 0xc0, }, 4, 0, "", "", | ||
86 | "f3 0f 1a c0 \tbndcl %eax,%bnd0",}, | ||
87 | {{0xf2, 0x0f, 0x1a, 0x00, }, 4, 0, "", "", | ||
88 | "f2 0f 1a 00 \tbndcu (%eax),%bnd0",}, | ||
89 | {{0xf2, 0x0f, 0x1a, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
90 | "f2 0f 1a 05 78 56 34 12 \tbndcu 0x12345678,%bnd0",}, | ||
91 | {{0xf2, 0x0f, 0x1a, 0x18, }, 4, 0, "", "", | ||
92 | "f2 0f 1a 18 \tbndcu (%eax),%bnd3",}, | ||
93 | {{0xf2, 0x0f, 0x1a, 0x04, 0x01, }, 5, 0, "", "", | ||
94 | "f2 0f 1a 04 01 \tbndcu (%ecx,%eax,1),%bnd0",}, | ||
95 | {{0xf2, 0x0f, 0x1a, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
96 | "f2 0f 1a 04 05 78 56 34 12 \tbndcu 0x12345678(,%eax,1),%bnd0",}, | ||
97 | {{0xf2, 0x0f, 0x1a, 0x04, 0x08, }, 5, 0, "", "", | ||
98 | "f2 0f 1a 04 08 \tbndcu (%eax,%ecx,1),%bnd0",}, | ||
99 | {{0xf2, 0x0f, 0x1a, 0x04, 0xc8, }, 5, 0, "", "", | ||
100 | "f2 0f 1a 04 c8 \tbndcu (%eax,%ecx,8),%bnd0",}, | ||
101 | {{0xf2, 0x0f, 0x1a, 0x40, 0x12, }, 5, 0, "", "", | ||
102 | "f2 0f 1a 40 12 \tbndcu 0x12(%eax),%bnd0",}, | ||
103 | {{0xf2, 0x0f, 0x1a, 0x45, 0x12, }, 5, 0, "", "", | ||
104 | "f2 0f 1a 45 12 \tbndcu 0x12(%ebp),%bnd0",}, | ||
105 | {{0xf2, 0x0f, 0x1a, 0x44, 0x01, 0x12, }, 6, 0, "", "", | ||
106 | "f2 0f 1a 44 01 12 \tbndcu 0x12(%ecx,%eax,1),%bnd0",}, | ||
107 | {{0xf2, 0x0f, 0x1a, 0x44, 0x05, 0x12, }, 6, 0, "", "", | ||
108 | "f2 0f 1a 44 05 12 \tbndcu 0x12(%ebp,%eax,1),%bnd0",}, | ||
109 | {{0xf2, 0x0f, 0x1a, 0x44, 0x08, 0x12, }, 6, 0, "", "", | ||
110 | "f2 0f 1a 44 08 12 \tbndcu 0x12(%eax,%ecx,1),%bnd0",}, | ||
111 | {{0xf2, 0x0f, 0x1a, 0x44, 0xc8, 0x12, }, 6, 0, "", "", | ||
112 | "f2 0f 1a 44 c8 12 \tbndcu 0x12(%eax,%ecx,8),%bnd0",}, | ||
113 | {{0xf2, 0x0f, 0x1a, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
114 | "f2 0f 1a 80 78 56 34 12 \tbndcu 0x12345678(%eax),%bnd0",}, | ||
115 | {{0xf2, 0x0f, 0x1a, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
116 | "f2 0f 1a 85 78 56 34 12 \tbndcu 0x12345678(%ebp),%bnd0",}, | ||
117 | {{0xf2, 0x0f, 0x1a, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
118 | "f2 0f 1a 84 01 78 56 34 12 \tbndcu 0x12345678(%ecx,%eax,1),%bnd0",}, | ||
119 | {{0xf2, 0x0f, 0x1a, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
120 | "f2 0f 1a 84 05 78 56 34 12 \tbndcu 0x12345678(%ebp,%eax,1),%bnd0",}, | ||
121 | {{0xf2, 0x0f, 0x1a, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
122 | "f2 0f 1a 84 08 78 56 34 12 \tbndcu 0x12345678(%eax,%ecx,1),%bnd0",}, | ||
123 | {{0xf2, 0x0f, 0x1a, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
124 | "f2 0f 1a 84 c8 78 56 34 12 \tbndcu 0x12345678(%eax,%ecx,8),%bnd0",}, | ||
125 | {{0xf2, 0x0f, 0x1a, 0xc0, }, 4, 0, "", "", | ||
126 | "f2 0f 1a c0 \tbndcu %eax,%bnd0",}, | ||
127 | {{0xf2, 0x0f, 0x1b, 0x00, }, 4, 0, "", "", | ||
128 | "f2 0f 1b 00 \tbndcn (%eax),%bnd0",}, | ||
129 | {{0xf2, 0x0f, 0x1b, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
130 | "f2 0f 1b 05 78 56 34 12 \tbndcn 0x12345678,%bnd0",}, | ||
131 | {{0xf2, 0x0f, 0x1b, 0x18, }, 4, 0, "", "", | ||
132 | "f2 0f 1b 18 \tbndcn (%eax),%bnd3",}, | ||
133 | {{0xf2, 0x0f, 0x1b, 0x04, 0x01, }, 5, 0, "", "", | ||
134 | "f2 0f 1b 04 01 \tbndcn (%ecx,%eax,1),%bnd0",}, | ||
135 | {{0xf2, 0x0f, 0x1b, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
136 | "f2 0f 1b 04 05 78 56 34 12 \tbndcn 0x12345678(,%eax,1),%bnd0",}, | ||
137 | {{0xf2, 0x0f, 0x1b, 0x04, 0x08, }, 5, 0, "", "", | ||
138 | "f2 0f 1b 04 08 \tbndcn (%eax,%ecx,1),%bnd0",}, | ||
139 | {{0xf2, 0x0f, 0x1b, 0x04, 0xc8, }, 5, 0, "", "", | ||
140 | "f2 0f 1b 04 c8 \tbndcn (%eax,%ecx,8),%bnd0",}, | ||
141 | {{0xf2, 0x0f, 0x1b, 0x40, 0x12, }, 5, 0, "", "", | ||
142 | "f2 0f 1b 40 12 \tbndcn 0x12(%eax),%bnd0",}, | ||
143 | {{0xf2, 0x0f, 0x1b, 0x45, 0x12, }, 5, 0, "", "", | ||
144 | "f2 0f 1b 45 12 \tbndcn 0x12(%ebp),%bnd0",}, | ||
145 | {{0xf2, 0x0f, 0x1b, 0x44, 0x01, 0x12, }, 6, 0, "", "", | ||
146 | "f2 0f 1b 44 01 12 \tbndcn 0x12(%ecx,%eax,1),%bnd0",}, | ||
147 | {{0xf2, 0x0f, 0x1b, 0x44, 0x05, 0x12, }, 6, 0, "", "", | ||
148 | "f2 0f 1b 44 05 12 \tbndcn 0x12(%ebp,%eax,1),%bnd0",}, | ||
149 | {{0xf2, 0x0f, 0x1b, 0x44, 0x08, 0x12, }, 6, 0, "", "", | ||
150 | "f2 0f 1b 44 08 12 \tbndcn 0x12(%eax,%ecx,1),%bnd0",}, | ||
151 | {{0xf2, 0x0f, 0x1b, 0x44, 0xc8, 0x12, }, 6, 0, "", "", | ||
152 | "f2 0f 1b 44 c8 12 \tbndcn 0x12(%eax,%ecx,8),%bnd0",}, | ||
153 | {{0xf2, 0x0f, 0x1b, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
154 | "f2 0f 1b 80 78 56 34 12 \tbndcn 0x12345678(%eax),%bnd0",}, | ||
155 | {{0xf2, 0x0f, 0x1b, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
156 | "f2 0f 1b 85 78 56 34 12 \tbndcn 0x12345678(%ebp),%bnd0",}, | ||
157 | {{0xf2, 0x0f, 0x1b, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
158 | "f2 0f 1b 84 01 78 56 34 12 \tbndcn 0x12345678(%ecx,%eax,1),%bnd0",}, | ||
159 | {{0xf2, 0x0f, 0x1b, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
160 | "f2 0f 1b 84 05 78 56 34 12 \tbndcn 0x12345678(%ebp,%eax,1),%bnd0",}, | ||
161 | {{0xf2, 0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
162 | "f2 0f 1b 84 08 78 56 34 12 \tbndcn 0x12345678(%eax,%ecx,1),%bnd0",}, | ||
163 | {{0xf2, 0x0f, 0x1b, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
164 | "f2 0f 1b 84 c8 78 56 34 12 \tbndcn 0x12345678(%eax,%ecx,8),%bnd0",}, | ||
165 | {{0xf2, 0x0f, 0x1b, 0xc0, }, 4, 0, "", "", | ||
166 | "f2 0f 1b c0 \tbndcn %eax,%bnd0",}, | ||
167 | {{0x66, 0x0f, 0x1a, 0x00, }, 4, 0, "", "", | ||
168 | "66 0f 1a 00 \tbndmov (%eax),%bnd0",}, | ||
169 | {{0x66, 0x0f, 0x1a, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
170 | "66 0f 1a 05 78 56 34 12 \tbndmov 0x12345678,%bnd0",}, | ||
171 | {{0x66, 0x0f, 0x1a, 0x18, }, 4, 0, "", "", | ||
172 | "66 0f 1a 18 \tbndmov (%eax),%bnd3",}, | ||
173 | {{0x66, 0x0f, 0x1a, 0x04, 0x01, }, 5, 0, "", "", | ||
174 | "66 0f 1a 04 01 \tbndmov (%ecx,%eax,1),%bnd0",}, | ||
175 | {{0x66, 0x0f, 0x1a, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
176 | "66 0f 1a 04 05 78 56 34 12 \tbndmov 0x12345678(,%eax,1),%bnd0",}, | ||
177 | {{0x66, 0x0f, 0x1a, 0x04, 0x08, }, 5, 0, "", "", | ||
178 | "66 0f 1a 04 08 \tbndmov (%eax,%ecx,1),%bnd0",}, | ||
179 | {{0x66, 0x0f, 0x1a, 0x04, 0xc8, }, 5, 0, "", "", | ||
180 | "66 0f 1a 04 c8 \tbndmov (%eax,%ecx,8),%bnd0",}, | ||
181 | {{0x66, 0x0f, 0x1a, 0x40, 0x12, }, 5, 0, "", "", | ||
182 | "66 0f 1a 40 12 \tbndmov 0x12(%eax),%bnd0",}, | ||
183 | {{0x66, 0x0f, 0x1a, 0x45, 0x12, }, 5, 0, "", "", | ||
184 | "66 0f 1a 45 12 \tbndmov 0x12(%ebp),%bnd0",}, | ||
185 | {{0x66, 0x0f, 0x1a, 0x44, 0x01, 0x12, }, 6, 0, "", "", | ||
186 | "66 0f 1a 44 01 12 \tbndmov 0x12(%ecx,%eax,1),%bnd0",}, | ||
187 | {{0x66, 0x0f, 0x1a, 0x44, 0x05, 0x12, }, 6, 0, "", "", | ||
188 | "66 0f 1a 44 05 12 \tbndmov 0x12(%ebp,%eax,1),%bnd0",}, | ||
189 | {{0x66, 0x0f, 0x1a, 0x44, 0x08, 0x12, }, 6, 0, "", "", | ||
190 | "66 0f 1a 44 08 12 \tbndmov 0x12(%eax,%ecx,1),%bnd0",}, | ||
191 | {{0x66, 0x0f, 0x1a, 0x44, 0xc8, 0x12, }, 6, 0, "", "", | ||
192 | "66 0f 1a 44 c8 12 \tbndmov 0x12(%eax,%ecx,8),%bnd0",}, | ||
193 | {{0x66, 0x0f, 0x1a, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
194 | "66 0f 1a 80 78 56 34 12 \tbndmov 0x12345678(%eax),%bnd0",}, | ||
195 | {{0x66, 0x0f, 0x1a, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
196 | "66 0f 1a 85 78 56 34 12 \tbndmov 0x12345678(%ebp),%bnd0",}, | ||
197 | {{0x66, 0x0f, 0x1a, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
198 | "66 0f 1a 84 01 78 56 34 12 \tbndmov 0x12345678(%ecx,%eax,1),%bnd0",}, | ||
199 | {{0x66, 0x0f, 0x1a, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
200 | "66 0f 1a 84 05 78 56 34 12 \tbndmov 0x12345678(%ebp,%eax,1),%bnd0",}, | ||
201 | {{0x66, 0x0f, 0x1a, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
202 | "66 0f 1a 84 08 78 56 34 12 \tbndmov 0x12345678(%eax,%ecx,1),%bnd0",}, | ||
203 | {{0x66, 0x0f, 0x1a, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
204 | "66 0f 1a 84 c8 78 56 34 12 \tbndmov 0x12345678(%eax,%ecx,8),%bnd0",}, | ||
205 | {{0x66, 0x0f, 0x1b, 0x00, }, 4, 0, "", "", | ||
206 | "66 0f 1b 00 \tbndmov %bnd0,(%eax)",}, | ||
207 | {{0x66, 0x0f, 0x1b, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
208 | "66 0f 1b 05 78 56 34 12 \tbndmov %bnd0,0x12345678",}, | ||
209 | {{0x66, 0x0f, 0x1b, 0x18, }, 4, 0, "", "", | ||
210 | "66 0f 1b 18 \tbndmov %bnd3,(%eax)",}, | ||
211 | {{0x66, 0x0f, 0x1b, 0x04, 0x01, }, 5, 0, "", "", | ||
212 | "66 0f 1b 04 01 \tbndmov %bnd0,(%ecx,%eax,1)",}, | ||
213 | {{0x66, 0x0f, 0x1b, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
214 | "66 0f 1b 04 05 78 56 34 12 \tbndmov %bnd0,0x12345678(,%eax,1)",}, | ||
215 | {{0x66, 0x0f, 0x1b, 0x04, 0x08, }, 5, 0, "", "", | ||
216 | "66 0f 1b 04 08 \tbndmov %bnd0,(%eax,%ecx,1)",}, | ||
217 | {{0x66, 0x0f, 0x1b, 0x04, 0xc8, }, 5, 0, "", "", | ||
218 | "66 0f 1b 04 c8 \tbndmov %bnd0,(%eax,%ecx,8)",}, | ||
219 | {{0x66, 0x0f, 0x1b, 0x40, 0x12, }, 5, 0, "", "", | ||
220 | "66 0f 1b 40 12 \tbndmov %bnd0,0x12(%eax)",}, | ||
221 | {{0x66, 0x0f, 0x1b, 0x45, 0x12, }, 5, 0, "", "", | ||
222 | "66 0f 1b 45 12 \tbndmov %bnd0,0x12(%ebp)",}, | ||
223 | {{0x66, 0x0f, 0x1b, 0x44, 0x01, 0x12, }, 6, 0, "", "", | ||
224 | "66 0f 1b 44 01 12 \tbndmov %bnd0,0x12(%ecx,%eax,1)",}, | ||
225 | {{0x66, 0x0f, 0x1b, 0x44, 0x05, 0x12, }, 6, 0, "", "", | ||
226 | "66 0f 1b 44 05 12 \tbndmov %bnd0,0x12(%ebp,%eax,1)",}, | ||
227 | {{0x66, 0x0f, 0x1b, 0x44, 0x08, 0x12, }, 6, 0, "", "", | ||
228 | "66 0f 1b 44 08 12 \tbndmov %bnd0,0x12(%eax,%ecx,1)",}, | ||
229 | {{0x66, 0x0f, 0x1b, 0x44, 0xc8, 0x12, }, 6, 0, "", "", | ||
230 | "66 0f 1b 44 c8 12 \tbndmov %bnd0,0x12(%eax,%ecx,8)",}, | ||
231 | {{0x66, 0x0f, 0x1b, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
232 | "66 0f 1b 80 78 56 34 12 \tbndmov %bnd0,0x12345678(%eax)",}, | ||
233 | {{0x66, 0x0f, 0x1b, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
234 | "66 0f 1b 85 78 56 34 12 \tbndmov %bnd0,0x12345678(%ebp)",}, | ||
235 | {{0x66, 0x0f, 0x1b, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
236 | "66 0f 1b 84 01 78 56 34 12 \tbndmov %bnd0,0x12345678(%ecx,%eax,1)",}, | ||
237 | {{0x66, 0x0f, 0x1b, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
238 | "66 0f 1b 84 05 78 56 34 12 \tbndmov %bnd0,0x12345678(%ebp,%eax,1)",}, | ||
239 | {{0x66, 0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
240 | "66 0f 1b 84 08 78 56 34 12 \tbndmov %bnd0,0x12345678(%eax,%ecx,1)",}, | ||
241 | {{0x66, 0x0f, 0x1b, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
242 | "66 0f 1b 84 c8 78 56 34 12 \tbndmov %bnd0,0x12345678(%eax,%ecx,8)",}, | ||
243 | {{0x66, 0x0f, 0x1a, 0xc8, }, 4, 0, "", "", | ||
244 | "66 0f 1a c8 \tbndmov %bnd0,%bnd1",}, | ||
245 | {{0x66, 0x0f, 0x1a, 0xc1, }, 4, 0, "", "", | ||
246 | "66 0f 1a c1 \tbndmov %bnd1,%bnd0",}, | ||
247 | {{0x0f, 0x1a, 0x00, }, 3, 0, "", "", | ||
248 | "0f 1a 00 \tbndldx (%eax),%bnd0",}, | ||
249 | {{0x0f, 0x1a, 0x05, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
250 | "0f 1a 05 78 56 34 12 \tbndldx 0x12345678,%bnd0",}, | ||
251 | {{0x0f, 0x1a, 0x18, }, 3, 0, "", "", | ||
252 | "0f 1a 18 \tbndldx (%eax),%bnd3",}, | ||
253 | {{0x0f, 0x1a, 0x04, 0x01, }, 4, 0, "", "", | ||
254 | "0f 1a 04 01 \tbndldx (%ecx,%eax,1),%bnd0",}, | ||
255 | {{0x0f, 0x1a, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
256 | "0f 1a 04 05 78 56 34 12 \tbndldx 0x12345678(,%eax,1),%bnd0",}, | ||
257 | {{0x0f, 0x1a, 0x04, 0x08, }, 4, 0, "", "", | ||
258 | "0f 1a 04 08 \tbndldx (%eax,%ecx,1),%bnd0",}, | ||
259 | {{0x0f, 0x1a, 0x40, 0x12, }, 4, 0, "", "", | ||
260 | "0f 1a 40 12 \tbndldx 0x12(%eax),%bnd0",}, | ||
261 | {{0x0f, 0x1a, 0x45, 0x12, }, 4, 0, "", "", | ||
262 | "0f 1a 45 12 \tbndldx 0x12(%ebp),%bnd0",}, | ||
263 | {{0x0f, 0x1a, 0x44, 0x01, 0x12, }, 5, 0, "", "", | ||
264 | "0f 1a 44 01 12 \tbndldx 0x12(%ecx,%eax,1),%bnd0",}, | ||
265 | {{0x0f, 0x1a, 0x44, 0x05, 0x12, }, 5, 0, "", "", | ||
266 | "0f 1a 44 05 12 \tbndldx 0x12(%ebp,%eax,1),%bnd0",}, | ||
267 | {{0x0f, 0x1a, 0x44, 0x08, 0x12, }, 5, 0, "", "", | ||
268 | "0f 1a 44 08 12 \tbndldx 0x12(%eax,%ecx,1),%bnd0",}, | ||
269 | {{0x0f, 0x1a, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
270 | "0f 1a 80 78 56 34 12 \tbndldx 0x12345678(%eax),%bnd0",}, | ||
271 | {{0x0f, 0x1a, 0x85, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
272 | "0f 1a 85 78 56 34 12 \tbndldx 0x12345678(%ebp),%bnd0",}, | ||
273 | {{0x0f, 0x1a, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
274 | "0f 1a 84 01 78 56 34 12 \tbndldx 0x12345678(%ecx,%eax,1),%bnd0",}, | ||
275 | {{0x0f, 0x1a, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
276 | "0f 1a 84 05 78 56 34 12 \tbndldx 0x12345678(%ebp,%eax,1),%bnd0",}, | ||
277 | {{0x0f, 0x1a, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
278 | "0f 1a 84 08 78 56 34 12 \tbndldx 0x12345678(%eax,%ecx,1),%bnd0",}, | ||
279 | {{0x0f, 0x1b, 0x00, }, 3, 0, "", "", | ||
280 | "0f 1b 00 \tbndstx %bnd0,(%eax)",}, | ||
281 | {{0x0f, 0x1b, 0x05, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
282 | "0f 1b 05 78 56 34 12 \tbndstx %bnd0,0x12345678",}, | ||
283 | {{0x0f, 0x1b, 0x18, }, 3, 0, "", "", | ||
284 | "0f 1b 18 \tbndstx %bnd3,(%eax)",}, | ||
285 | {{0x0f, 0x1b, 0x04, 0x01, }, 4, 0, "", "", | ||
286 | "0f 1b 04 01 \tbndstx %bnd0,(%ecx,%eax,1)",}, | ||
287 | {{0x0f, 0x1b, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
288 | "0f 1b 04 05 78 56 34 12 \tbndstx %bnd0,0x12345678(,%eax,1)",}, | ||
289 | {{0x0f, 0x1b, 0x04, 0x08, }, 4, 0, "", "", | ||
290 | "0f 1b 04 08 \tbndstx %bnd0,(%eax,%ecx,1)",}, | ||
291 | {{0x0f, 0x1b, 0x40, 0x12, }, 4, 0, "", "", | ||
292 | "0f 1b 40 12 \tbndstx %bnd0,0x12(%eax)",}, | ||
293 | {{0x0f, 0x1b, 0x45, 0x12, }, 4, 0, "", "", | ||
294 | "0f 1b 45 12 \tbndstx %bnd0,0x12(%ebp)",}, | ||
295 | {{0x0f, 0x1b, 0x44, 0x01, 0x12, }, 5, 0, "", "", | ||
296 | "0f 1b 44 01 12 \tbndstx %bnd0,0x12(%ecx,%eax,1)",}, | ||
297 | {{0x0f, 0x1b, 0x44, 0x05, 0x12, }, 5, 0, "", "", | ||
298 | "0f 1b 44 05 12 \tbndstx %bnd0,0x12(%ebp,%eax,1)",}, | ||
299 | {{0x0f, 0x1b, 0x44, 0x08, 0x12, }, 5, 0, "", "", | ||
300 | "0f 1b 44 08 12 \tbndstx %bnd0,0x12(%eax,%ecx,1)",}, | ||
301 | {{0x0f, 0x1b, 0x80, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
302 | "0f 1b 80 78 56 34 12 \tbndstx %bnd0,0x12345678(%eax)",}, | ||
303 | {{0x0f, 0x1b, 0x85, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
304 | "0f 1b 85 78 56 34 12 \tbndstx %bnd0,0x12345678(%ebp)",}, | ||
305 | {{0x0f, 0x1b, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
306 | "0f 1b 84 01 78 56 34 12 \tbndstx %bnd0,0x12345678(%ecx,%eax,1)",}, | ||
307 | {{0x0f, 0x1b, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
308 | "0f 1b 84 05 78 56 34 12 \tbndstx %bnd0,0x12345678(%ebp,%eax,1)",}, | ||
309 | {{0x0f, 0x1b, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
310 | "0f 1b 84 08 78 56 34 12 \tbndstx %bnd0,0x12345678(%eax,%ecx,1)",}, | ||
311 | {{0xf2, 0xe8, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "call", "unconditional", | ||
312 | "f2 e8 fc ff ff ff \tbnd call 3c3 <main+0x3c3>",}, | ||
313 | {{0xf2, 0xff, 0x10, }, 3, 0, "call", "indirect", | ||
314 | "f2 ff 10 \tbnd call *(%eax)",}, | ||
315 | {{0xf2, 0xc3, }, 2, 0, "ret", "indirect", | ||
316 | "f2 c3 \tbnd ret ",}, | ||
317 | {{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional", | ||
318 | "f2 e9 fc ff ff ff \tbnd jmp 3ce <main+0x3ce>",}, | ||
319 | {{0xf2, 0xe9, 0xfc, 0xff, 0xff, 0xff, }, 6, 0xfffffffc, "jmp", "unconditional", | ||
320 | "f2 e9 fc ff ff ff \tbnd jmp 3d4 <main+0x3d4>",}, | ||
321 | {{0xf2, 0xff, 0x21, }, 3, 0, "jmp", "indirect", | ||
322 | "f2 ff 21 \tbnd jmp *(%ecx)",}, | ||
323 | {{0xf2, 0x0f, 0x85, 0xfc, 0xff, 0xff, 0xff, }, 7, 0xfffffffc, "jcc", "conditional", | ||
324 | "f2 0f 85 fc ff ff ff \tbnd jne 3de <main+0x3de>",}, | ||
325 | {{0x0f, 0x3a, 0xcc, 0xc1, 0x00, }, 5, 0, "", "", | ||
326 | "0f 3a cc c1 00 \tsha1rnds4 $0x0,%xmm1,%xmm0",}, | ||
327 | {{0x0f, 0x3a, 0xcc, 0xd7, 0x91, }, 5, 0, "", "", | ||
328 | "0f 3a cc d7 91 \tsha1rnds4 $0x91,%xmm7,%xmm2",}, | ||
329 | {{0x0f, 0x3a, 0xcc, 0x00, 0x91, }, 5, 0, "", "", | ||
330 | "0f 3a cc 00 91 \tsha1rnds4 $0x91,(%eax),%xmm0",}, | ||
331 | {{0x0f, 0x3a, 0xcc, 0x05, 0x78, 0x56, 0x34, 0x12, 0x91, }, 9, 0, "", "", | ||
332 | "0f 3a cc 05 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678,%xmm0",}, | ||
333 | {{0x0f, 0x3a, 0xcc, 0x18, 0x91, }, 5, 0, "", "", | ||
334 | "0f 3a cc 18 91 \tsha1rnds4 $0x91,(%eax),%xmm3",}, | ||
335 | {{0x0f, 0x3a, 0xcc, 0x04, 0x01, 0x91, }, 6, 0, "", "", | ||
336 | "0f 3a cc 04 01 91 \tsha1rnds4 $0x91,(%ecx,%eax,1),%xmm0",}, | ||
337 | {{0x0f, 0x3a, 0xcc, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, 0x91, }, 10, 0, "", "", | ||
338 | "0f 3a cc 04 05 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678(,%eax,1),%xmm0",}, | ||
339 | {{0x0f, 0x3a, 0xcc, 0x04, 0x08, 0x91, }, 6, 0, "", "", | ||
340 | "0f 3a cc 04 08 91 \tsha1rnds4 $0x91,(%eax,%ecx,1),%xmm0",}, | ||
341 | {{0x0f, 0x3a, 0xcc, 0x04, 0xc8, 0x91, }, 6, 0, "", "", | ||
342 | "0f 3a cc 04 c8 91 \tsha1rnds4 $0x91,(%eax,%ecx,8),%xmm0",}, | ||
343 | {{0x0f, 0x3a, 0xcc, 0x40, 0x12, 0x91, }, 6, 0, "", "", | ||
344 | "0f 3a cc 40 12 91 \tsha1rnds4 $0x91,0x12(%eax),%xmm0",}, | ||
345 | {{0x0f, 0x3a, 0xcc, 0x45, 0x12, 0x91, }, 6, 0, "", "", | ||
346 | "0f 3a cc 45 12 91 \tsha1rnds4 $0x91,0x12(%ebp),%xmm0",}, | ||
347 | {{0x0f, 0x3a, 0xcc, 0x44, 0x01, 0x12, 0x91, }, 7, 0, "", "", | ||
348 | "0f 3a cc 44 01 12 91 \tsha1rnds4 $0x91,0x12(%ecx,%eax,1),%xmm0",}, | ||
349 | {{0x0f, 0x3a, 0xcc, 0x44, 0x05, 0x12, 0x91, }, 7, 0, "", "", | ||
350 | "0f 3a cc 44 05 12 91 \tsha1rnds4 $0x91,0x12(%ebp,%eax,1),%xmm0",}, | ||
351 | {{0x0f, 0x3a, 0xcc, 0x44, 0x08, 0x12, 0x91, }, 7, 0, "", "", | ||
352 | "0f 3a cc 44 08 12 91 \tsha1rnds4 $0x91,0x12(%eax,%ecx,1),%xmm0",}, | ||
353 | {{0x0f, 0x3a, 0xcc, 0x44, 0xc8, 0x12, 0x91, }, 7, 0, "", "", | ||
354 | "0f 3a cc 44 c8 12 91 \tsha1rnds4 $0x91,0x12(%eax,%ecx,8),%xmm0",}, | ||
355 | {{0x0f, 0x3a, 0xcc, 0x80, 0x78, 0x56, 0x34, 0x12, 0x91, }, 9, 0, "", "", | ||
356 | "0f 3a cc 80 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678(%eax),%xmm0",}, | ||
357 | {{0x0f, 0x3a, 0xcc, 0x85, 0x78, 0x56, 0x34, 0x12, 0x91, }, 9, 0, "", "", | ||
358 | "0f 3a cc 85 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678(%ebp),%xmm0",}, | ||
359 | {{0x0f, 0x3a, 0xcc, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, 0x91, }, 10, 0, "", "", | ||
360 | "0f 3a cc 84 01 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678(%ecx,%eax,1),%xmm0",}, | ||
361 | {{0x0f, 0x3a, 0xcc, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, 0x91, }, 10, 0, "", "", | ||
362 | "0f 3a cc 84 05 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678(%ebp,%eax,1),%xmm0",}, | ||
363 | {{0x0f, 0x3a, 0xcc, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, 0x91, }, 10, 0, "", "", | ||
364 | "0f 3a cc 84 08 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678(%eax,%ecx,1),%xmm0",}, | ||
365 | {{0x0f, 0x3a, 0xcc, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, 0x91, }, 10, 0, "", "", | ||
366 | "0f 3a cc 84 c8 78 56 34 12 91 \tsha1rnds4 $0x91,0x12345678(%eax,%ecx,8),%xmm0",}, | ||
367 | {{0x0f, 0x38, 0xc8, 0xc1, }, 4, 0, "", "", | ||
368 | "0f 38 c8 c1 \tsha1nexte %xmm1,%xmm0",}, | ||
369 | {{0x0f, 0x38, 0xc8, 0xd7, }, 4, 0, "", "", | ||
370 | "0f 38 c8 d7 \tsha1nexte %xmm7,%xmm2",}, | ||
371 | {{0x0f, 0x38, 0xc8, 0x00, }, 4, 0, "", "", | ||
372 | "0f 38 c8 00 \tsha1nexte (%eax),%xmm0",}, | ||
373 | {{0x0f, 0x38, 0xc8, 0x05, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
374 | "0f 38 c8 05 78 56 34 12 \tsha1nexte 0x12345678,%xmm0",}, | ||
375 | {{0x0f, 0x38, 0xc8, 0x18, }, 4, 0, "", "", | ||
376 | "0f 38 c8 18 \tsha1nexte (%eax),%xmm3",}, | ||
377 | {{0x0f, 0x38, 0xc8, 0x04, 0x01, }, 5, 0, "", "", | ||
378 | "0f 38 c8 04 01 \tsha1nexte (%ecx,%eax,1),%xmm0",}, | ||
379 | {{0x0f, 0x38, 0xc8, 0x04, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
380 | "0f 38 c8 04 05 78 56 34 12 \tsha1nexte 0x12345678(,%eax,1),%xmm0",}, | ||
381 | {{0x0f, 0x38, 0xc8, 0x04, 0x08, }, 5, 0, "", "", | ||
382 | "0f 38 c8 04 08 \tsha1nexte (%eax,%ecx,1),%xmm0",}, | ||
383 | {{0x0f, 0x38, 0xc8, 0x04, 0xc8, }, 5, 0, "", "", | ||
384 | "0f 38 c8 04 c8 \tsha1nexte (%eax,%ecx,8),%xmm0",}, | ||
385 | {{0x0f, 0x38, 0xc8, 0x40, 0x12, }, 5, 0, "", "", | ||
386 | "0f 38 c8 40 12 \tsha1nexte 0x12(%eax),%xmm0",}, | ||
387 | {{0x0f, 0x38, 0xc8, 0x45, 0x12, }, 5, 0, "", "", | ||
388 | "0f 38 c8 45 12 \tsha1nexte 0x12(%ebp),%xmm0",}, | ||
389 | {{0x0f, 0x38, 0xc8, 0x44, 0x01, 0x12, }, 6, 0, "", "", | ||
390 | "0f 38 c8 44 01 12 \tsha1nexte 0x12(%ecx,%eax,1),%xmm0",}, | ||
391 | {{0x0f, 0x38, 0xc8, 0x44, 0x05, 0x12, }, 6, 0, "", "", | ||
392 | "0f 38 c8 44 05 12 \tsha1nexte 0x12(%ebp,%eax,1),%xmm0",}, | ||
393 | {{0x0f, 0x38, 0xc8, 0x44, 0x08, 0x12, }, 6, 0, "", "", | ||
394 | "0f 38 c8 44 08 12 \tsha1nexte 0x12(%eax,%ecx,1),%xmm0",}, | ||
395 | {{0x0f, 0x38, 0xc8, 0x44, 0xc8, 0x12, }, 6, 0, "", "", | ||
396 | "0f 38 c8 44 c8 12 \tsha1nexte 0x12(%eax,%ecx,8),%xmm0",}, | ||
397 | {{0x0f, 0x38, 0xc8, 0x80, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
398 | "0f 38 c8 80 78 56 34 12 \tsha1nexte 0x12345678(%eax),%xmm0",}, | ||
399 | {{0x0f, 0x38, 0xc8, 0x85, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
400 | "0f 38 c8 85 78 56 34 12 \tsha1nexte 0x12345678(%ebp),%xmm0",}, | ||
401 | {{0x0f, 0x38, 0xc8, 0x84, 0x01, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
402 | "0f 38 c8 84 01 78 56 34 12 \tsha1nexte 0x12345678(%ecx,%eax,1),%xmm0",}, | ||
403 | {{0x0f, 0x38, 0xc8, 0x84, 0x05, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
404 | "0f 38 c8 84 05 78 56 34 12 \tsha1nexte 0x12345678(%ebp,%eax,1),%xmm0",}, | ||
405 | {{0x0f, 0x38, 0xc8, 0x84, 0x08, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
406 | "0f 38 c8 84 08 78 56 34 12 \tsha1nexte 0x12345678(%eax,%ecx,1),%xmm0",}, | ||
407 | {{0x0f, 0x38, 0xc8, 0x84, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
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622 | "66 0f ae 3d 78 56 34 12 \tclflushopt 0x12345678",}, | ||
623 | {{0x66, 0x0f, 0xae, 0xbc, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
624 | "66 0f ae bc c8 78 56 34 12 \tclflushopt 0x12345678(%eax,%ecx,8)",}, | ||
625 | {{0x0f, 0xae, 0x38, }, 3, 0, "", "", | ||
626 | "0f ae 38 \tclflush (%eax)",}, | ||
627 | {{0x0f, 0xae, 0xf8, }, 3, 0, "", "", | ||
628 | "0f ae f8 \tsfence ",}, | ||
629 | {{0x66, 0x0f, 0xae, 0x30, }, 4, 0, "", "", | ||
630 | "66 0f ae 30 \tclwb (%eax)",}, | ||
631 | {{0x66, 0x0f, 0xae, 0x35, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
632 | "66 0f ae 35 78 56 34 12 \tclwb 0x12345678",}, | ||
633 | {{0x66, 0x0f, 0xae, 0xb4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "", | ||
634 | "66 0f ae b4 c8 78 56 34 12 \tclwb 0x12345678(%eax,%ecx,8)",}, | ||
635 | {{0x0f, 0xae, 0x30, }, 3, 0, "", "", | ||
636 | "0f ae 30 \txsaveopt (%eax)",}, | ||
637 | {{0x0f, 0xae, 0xf0, }, 3, 0, "", "", | ||
638 | "0f ae f0 \tmfence ",}, | ||
639 | {{0x0f, 0xc7, 0x20, }, 3, 0, "", "", | ||
640 | "0f c7 20 \txsavec (%eax)",}, | ||
641 | {{0x0f, 0xc7, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
642 | "0f c7 25 78 56 34 12 \txsavec 0x12345678",}, | ||
643 | {{0x0f, 0xc7, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
644 | "0f c7 a4 c8 78 56 34 12 \txsavec 0x12345678(%eax,%ecx,8)",}, | ||
645 | {{0x0f, 0xc7, 0x28, }, 3, 0, "", "", | ||
646 | "0f c7 28 \txsaves (%eax)",}, | ||
647 | {{0x0f, 0xc7, 0x2d, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
648 | "0f c7 2d 78 56 34 12 \txsaves 0x12345678",}, | ||
649 | {{0x0f, 0xc7, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
650 | "0f c7 ac c8 78 56 34 12 \txsaves 0x12345678(%eax,%ecx,8)",}, | ||
651 | {{0x0f, 0xc7, 0x18, }, 3, 0, "", "", | ||
652 | "0f c7 18 \txrstors (%eax)",}, | ||
653 | {{0x0f, 0xc7, 0x1d, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "", | ||
654 | "0f c7 1d 78 56 34 12 \txrstors 0x12345678",}, | ||
655 | {{0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "", | ||
656 | "0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%eax,%ecx,8)",}, | ||
657 | {{0x66, 0x0f, 0xae, 0xf8, }, 4, 0, "", "", | ||
658 | "66 0f ae f8 \tpcommit ",}, | ||