diff options
author | Zidan Wang <zidan.wang@freescale.com> | 2015-12-23 22:42:11 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2016-01-05 08:19:11 -0500 |
commit | d44c6114da8c9e83407397d06b5cd909a1cc9135 (patch) | |
tree | 9f0f54fafe6d2293860a1f771be5460a8e8ca0a7 /sound | |
parent | 25e5ef974c33f1e4a07a68bf830e6493ee6dab11 (diff) |
ASoC: fsl_asrc: sound is wrong after suspend/resume
The register ASRCFG is volatile, but some bits need to be recovered
after suspend/resume.
Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/fsl/fsl_asrc.c | 7 | ||||
-rw-r--r-- | sound/soc/fsl/fsl_asrc.h | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 7b811485a8e5..73fd2c683b78 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c | |||
@@ -996,6 +996,9 @@ static int fsl_asrc_suspend(struct device *dev) | |||
996 | { | 996 | { |
997 | struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); | 997 | struct fsl_asrc *asrc_priv = dev_get_drvdata(dev); |
998 | 998 | ||
999 | regmap_read(asrc_priv->regmap, REG_ASRCFG, | ||
1000 | &asrc_priv->regcache_cfg); | ||
1001 | |||
999 | regcache_cache_only(asrc_priv->regmap, true); | 1002 | regcache_cache_only(asrc_priv->regmap, true); |
1000 | regcache_mark_dirty(asrc_priv->regmap); | 1003 | regcache_mark_dirty(asrc_priv->regmap); |
1001 | 1004 | ||
@@ -1016,6 +1019,10 @@ static int fsl_asrc_resume(struct device *dev) | |||
1016 | regcache_cache_only(asrc_priv->regmap, false); | 1019 | regcache_cache_only(asrc_priv->regmap, false); |
1017 | regcache_sync(asrc_priv->regmap); | 1020 | regcache_sync(asrc_priv->regmap); |
1018 | 1021 | ||
1022 | regmap_update_bits(asrc_priv->regmap, REG_ASRCFG, | ||
1023 | ASRCFG_NDPRi_ALL_MASK | ASRCFG_POSTMODi_ALL_MASK | | ||
1024 | ASRCFG_PREMODi_ALL_MASK, asrc_priv->regcache_cfg); | ||
1025 | |||
1019 | /* Restart enabled pairs */ | 1026 | /* Restart enabled pairs */ |
1020 | regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, | 1027 | regmap_update_bits(asrc_priv->regmap, REG_ASRCTR, |
1021 | ASRCTR_ASRCEi_ALL_MASK, asrctr); | 1028 | ASRCTR_ASRCEi_ALL_MASK, asrctr); |
diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h index 68802cdc3f28..0f163abe4ba3 100644 --- a/sound/soc/fsl/fsl_asrc.h +++ b/sound/soc/fsl/fsl_asrc.h | |||
@@ -132,10 +132,13 @@ | |||
132 | #define ASRCFG_INIRQi (1 << ASRCFG_INIRQi_SHIFT(i)) | 132 | #define ASRCFG_INIRQi (1 << ASRCFG_INIRQi_SHIFT(i)) |
133 | #define ASRCFG_NDPRi_SHIFT(i) (18 + i) | 133 | #define ASRCFG_NDPRi_SHIFT(i) (18 + i) |
134 | #define ASRCFG_NDPRi_MASK(i) (1 << ASRCFG_NDPRi_SHIFT(i)) | 134 | #define ASRCFG_NDPRi_MASK(i) (1 << ASRCFG_NDPRi_SHIFT(i)) |
135 | #define ASRCFG_NDPRi_ALL_SHIFT 18 | ||
136 | #define ASRCFG_NDPRi_ALL_MASK (7 << ASRCFG_NDPRi_ALL_SHIFT) | ||
135 | #define ASRCFG_NDPRi (1 << ASRCFG_NDPRi_SHIFT(i)) | 137 | #define ASRCFG_NDPRi (1 << ASRCFG_NDPRi_SHIFT(i)) |
136 | #define ASRCFG_POSTMODi_SHIFT(i) (8 + (i << 2)) | 138 | #define ASRCFG_POSTMODi_SHIFT(i) (8 + (i << 2)) |
137 | #define ASRCFG_POSTMODi_WIDTH 2 | 139 | #define ASRCFG_POSTMODi_WIDTH 2 |
138 | #define ASRCFG_POSTMODi_MASK(i) (((1 << ASRCFG_POSTMODi_WIDTH) - 1) << ASRCFG_POSTMODi_SHIFT(i)) | 140 | #define ASRCFG_POSTMODi_MASK(i) (((1 << ASRCFG_POSTMODi_WIDTH) - 1) << ASRCFG_POSTMODi_SHIFT(i)) |
141 | #define ASRCFG_POSTMODi_ALL_MASK (ASRCFG_POSTMODi_MASK(0) | ASRCFG_POSTMODi_MASK(1) | ASRCFG_POSTMODi_MASK(2)) | ||
139 | #define ASRCFG_POSTMOD(i, v) ((v) << ASRCFG_POSTMODi_SHIFT(i)) | 142 | #define ASRCFG_POSTMOD(i, v) ((v) << ASRCFG_POSTMODi_SHIFT(i)) |
140 | #define ASRCFG_POSTMODi_UP(i) (0 << ASRCFG_POSTMODi_SHIFT(i)) | 143 | #define ASRCFG_POSTMODi_UP(i) (0 << ASRCFG_POSTMODi_SHIFT(i)) |
141 | #define ASRCFG_POSTMODi_DCON(i) (1 << ASRCFG_POSTMODi_SHIFT(i)) | 144 | #define ASRCFG_POSTMODi_DCON(i) (1 << ASRCFG_POSTMODi_SHIFT(i)) |
@@ -143,6 +146,7 @@ | |||
143 | #define ASRCFG_PREMODi_SHIFT(i) (6 + (i << 2)) | 146 | #define ASRCFG_PREMODi_SHIFT(i) (6 + (i << 2)) |
144 | #define ASRCFG_PREMODi_WIDTH 2 | 147 | #define ASRCFG_PREMODi_WIDTH 2 |
145 | #define ASRCFG_PREMODi_MASK(i) (((1 << ASRCFG_PREMODi_WIDTH) - 1) << ASRCFG_PREMODi_SHIFT(i)) | 148 | #define ASRCFG_PREMODi_MASK(i) (((1 << ASRCFG_PREMODi_WIDTH) - 1) << ASRCFG_PREMODi_SHIFT(i)) |
149 | #define ASRCFG_PREMODi_ALL_MASK (ASRCFG_PREMODi_MASK(0) | ASRCFG_PREMODi_MASK(1) | ASRCFG_PREMODi_MASK(2)) | ||
146 | #define ASRCFG_PREMOD(i, v) ((v) << ASRCFG_PREMODi_SHIFT(i)) | 150 | #define ASRCFG_PREMOD(i, v) ((v) << ASRCFG_PREMODi_SHIFT(i)) |
147 | #define ASRCFG_PREMODi_UP(i) (0 << ASRCFG_PREMODi_SHIFT(i)) | 151 | #define ASRCFG_PREMODi_UP(i) (0 << ASRCFG_PREMODi_SHIFT(i)) |
148 | #define ASRCFG_PREMODi_DCON(i) (1 << ASRCFG_PREMODi_SHIFT(i)) | 152 | #define ASRCFG_PREMODi_DCON(i) (1 << ASRCFG_PREMODi_SHIFT(i)) |
@@ -434,6 +438,7 @@ struct fsl_asrc_pair { | |||
434 | * @channel_avail: non-occupied channel numbers | 438 | * @channel_avail: non-occupied channel numbers |
435 | * @asrc_rate: default sample rate for ASoC Back-Ends | 439 | * @asrc_rate: default sample rate for ASoC Back-Ends |
436 | * @asrc_width: default sample width for ASoC Back-Ends | 440 | * @asrc_width: default sample width for ASoC Back-Ends |
441 | * @regcache_cfg: store register value of REG_ASRCFG | ||
437 | */ | 442 | */ |
438 | struct fsl_asrc { | 443 | struct fsl_asrc { |
439 | struct snd_dmaengine_dai_dma_data dma_params_rx; | 444 | struct snd_dmaengine_dai_dma_data dma_params_rx; |
@@ -453,6 +458,8 @@ struct fsl_asrc { | |||
453 | 458 | ||
454 | int asrc_rate; | 459 | int asrc_rate; |
455 | int asrc_width; | 460 | int asrc_width; |
461 | |||
462 | u32 regcache_cfg; | ||
456 | }; | 463 | }; |
457 | 464 | ||
458 | extern struct snd_soc_platform_driver fsl_asrc_platform; | 465 | extern struct snd_soc_platform_driver fsl_asrc_platform; |