diff options
author | Takashi Iwai <tiwai@suse.de> | 2016-03-14 09:03:29 -0400 |
---|---|---|
committer | Takashi Iwai <tiwai@suse.de> | 2016-03-14 09:03:29 -0400 |
commit | ca80e26a5995f078aa442f151b94cf4305e07ac4 (patch) | |
tree | bb1b4a0a6e07f1ed80ff6412eb2a20e621244037 /sound | |
parent | 028cb68ee3d01f5323493cb3c07ba92b0acb2f03 (diff) | |
parent | d4a6360f19c1c551afcba42be98df04651fab31b (diff) |
Merge tag 'asoc-v4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v4.6
The main thing in terms of the core this time around has been some
additional framework work for dynamic topologies (though we *still*
don't appear to have a stable ABI for the topology code, it's probably
worth considering if this will ever happen...). Otherwise the work has
almost all been in the drivers:
- HDMI support for Sky Lake, along with other fixes and enhancements
for the Intel drivers.
- Lots of improvements to the Renesas drivers.
- Capture support for Qualcomm drivers.
- Support for TI DaVinci DRA7xxx devices.
- New machine drivers for Freescale systems with Cirrus CODECs,
Mediatek systems with RT5650 CODECs.
- New CPU drivers for Allwinner S/PDIF controllers
- New CODEC drivers for Maxim MAX9867 and MAX98926 and Realtek RT5514.
Diffstat (limited to 'sound')
119 files changed, 9524 insertions, 1806 deletions
diff --git a/sound/core/pcm_misc.c b/sound/core/pcm_misc.c index ebe8444de6c6..53dc37357bca 100644 --- a/sound/core/pcm_misc.c +++ b/sound/core/pcm_misc.c | |||
@@ -565,3 +565,33 @@ unsigned int snd_pcm_rate_mask_intersect(unsigned int rates_a, | |||
565 | return rates_a & rates_b; | 565 | return rates_a & rates_b; |
566 | } | 566 | } |
567 | EXPORT_SYMBOL_GPL(snd_pcm_rate_mask_intersect); | 567 | EXPORT_SYMBOL_GPL(snd_pcm_rate_mask_intersect); |
568 | |||
569 | /** | ||
570 | * snd_pcm_rate_range_to_bits - converts rate range to SNDRV_PCM_RATE_xxx bit | ||
571 | * @rate_min: the minimum sample rate | ||
572 | * @rate_max: the maximum sample rate | ||
573 | * | ||
574 | * This function has an implicit assumption: the rates in the given range have | ||
575 | * only the pre-defined rates like 44100 or 16000. | ||
576 | * | ||
577 | * Return: The SNDRV_PCM_RATE_xxx flag that corresponds to the given rate range, | ||
578 | * or SNDRV_PCM_RATE_KNOT for an unknown range. | ||
579 | */ | ||
580 | unsigned int snd_pcm_rate_range_to_bits(unsigned int rate_min, | ||
581 | unsigned int rate_max) | ||
582 | { | ||
583 | unsigned int rates = 0; | ||
584 | int i; | ||
585 | |||
586 | for (i = 0; i < snd_pcm_known_rates.count; i++) { | ||
587 | if (snd_pcm_known_rates.list[i] >= rate_min | ||
588 | && snd_pcm_known_rates.list[i] <= rate_max) | ||
589 | rates |= 1 << i; | ||
590 | } | ||
591 | |||
592 | if (!rates) | ||
593 | rates = SNDRV_PCM_RATE_KNOT; | ||
594 | |||
595 | return rates; | ||
596 | } | ||
597 | EXPORT_SYMBOL_GPL(snd_pcm_rate_range_to_bits); | ||
diff --git a/sound/soc/atmel/atmel_ssc_dai.c b/sound/soc/atmel/atmel_ssc_dai.c index ba8def5665c4..276897033639 100644 --- a/sound/soc/atmel/atmel_ssc_dai.c +++ b/sound/soc/atmel/atmel_ssc_dai.c | |||
@@ -285,7 +285,8 @@ static int atmel_ssc_hw_rule_rate(struct snd_pcm_hw_params *params, | |||
285 | static int atmel_ssc_startup(struct snd_pcm_substream *substream, | 285 | static int atmel_ssc_startup(struct snd_pcm_substream *substream, |
286 | struct snd_soc_dai *dai) | 286 | struct snd_soc_dai *dai) |
287 | { | 287 | { |
288 | struct atmel_ssc_info *ssc_p = &ssc_info[dai->id]; | 288 | struct platform_device *pdev = to_platform_device(dai->dev); |
289 | struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id]; | ||
289 | struct atmel_pcm_dma_params *dma_params; | 290 | struct atmel_pcm_dma_params *dma_params; |
290 | int dir, dir_mask; | 291 | int dir, dir_mask; |
291 | int ret; | 292 | int ret; |
@@ -346,7 +347,8 @@ static int atmel_ssc_startup(struct snd_pcm_substream *substream, | |||
346 | static void atmel_ssc_shutdown(struct snd_pcm_substream *substream, | 347 | static void atmel_ssc_shutdown(struct snd_pcm_substream *substream, |
347 | struct snd_soc_dai *dai) | 348 | struct snd_soc_dai *dai) |
348 | { | 349 | { |
349 | struct atmel_ssc_info *ssc_p = &ssc_info[dai->id]; | 350 | struct platform_device *pdev = to_platform_device(dai->dev); |
351 | struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id]; | ||
350 | struct atmel_pcm_dma_params *dma_params; | 352 | struct atmel_pcm_dma_params *dma_params; |
351 | int dir, dir_mask; | 353 | int dir, dir_mask; |
352 | 354 | ||
@@ -392,7 +394,8 @@ static void atmel_ssc_shutdown(struct snd_pcm_substream *substream, | |||
392 | static int atmel_ssc_set_dai_fmt(struct snd_soc_dai *cpu_dai, | 394 | static int atmel_ssc_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
393 | unsigned int fmt) | 395 | unsigned int fmt) |
394 | { | 396 | { |
395 | struct atmel_ssc_info *ssc_p = &ssc_info[cpu_dai->id]; | 397 | struct platform_device *pdev = to_platform_device(cpu_dai->dev); |
398 | struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id]; | ||
396 | 399 | ||
397 | ssc_p->daifmt = fmt; | 400 | ssc_p->daifmt = fmt; |
398 | return 0; | 401 | return 0; |
@@ -404,7 +407,8 @@ static int atmel_ssc_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
404 | static int atmel_ssc_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, | 407 | static int atmel_ssc_set_dai_clkdiv(struct snd_soc_dai *cpu_dai, |
405 | int div_id, int div) | 408 | int div_id, int div) |
406 | { | 409 | { |
407 | struct atmel_ssc_info *ssc_p = &ssc_info[cpu_dai->id]; | 410 | struct platform_device *pdev = to_platform_device(cpu_dai->dev); |
411 | struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id]; | ||
408 | 412 | ||
409 | switch (div_id) { | 413 | switch (div_id) { |
410 | case ATMEL_SSC_CMR_DIV: | 414 | case ATMEL_SSC_CMR_DIV: |
@@ -445,7 +449,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, | |||
445 | struct snd_pcm_hw_params *params, | 449 | struct snd_pcm_hw_params *params, |
446 | struct snd_soc_dai *dai) | 450 | struct snd_soc_dai *dai) |
447 | { | 451 | { |
448 | int id = dai->id; | 452 | struct platform_device *pdev = to_platform_device(dai->dev); |
453 | int id = pdev->id; | ||
449 | struct atmel_ssc_info *ssc_p = &ssc_info[id]; | 454 | struct atmel_ssc_info *ssc_p = &ssc_info[id]; |
450 | struct ssc_device *ssc = ssc_p->ssc; | 455 | struct ssc_device *ssc = ssc_p->ssc; |
451 | struct atmel_pcm_dma_params *dma_params; | 456 | struct atmel_pcm_dma_params *dma_params; |
@@ -772,7 +777,8 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, | |||
772 | static int atmel_ssc_prepare(struct snd_pcm_substream *substream, | 777 | static int atmel_ssc_prepare(struct snd_pcm_substream *substream, |
773 | struct snd_soc_dai *dai) | 778 | struct snd_soc_dai *dai) |
774 | { | 779 | { |
775 | struct atmel_ssc_info *ssc_p = &ssc_info[dai->id]; | 780 | struct platform_device *pdev = to_platform_device(dai->dev); |
781 | struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id]; | ||
776 | struct atmel_pcm_dma_params *dma_params; | 782 | struct atmel_pcm_dma_params *dma_params; |
777 | int dir; | 783 | int dir; |
778 | 784 | ||
@@ -795,7 +801,8 @@ static int atmel_ssc_prepare(struct snd_pcm_substream *substream, | |||
795 | static int atmel_ssc_trigger(struct snd_pcm_substream *substream, | 801 | static int atmel_ssc_trigger(struct snd_pcm_substream *substream, |
796 | int cmd, struct snd_soc_dai *dai) | 802 | int cmd, struct snd_soc_dai *dai) |
797 | { | 803 | { |
798 | struct atmel_ssc_info *ssc_p = &ssc_info[dai->id]; | 804 | struct platform_device *pdev = to_platform_device(dai->dev); |
805 | struct atmel_ssc_info *ssc_p = &ssc_info[pdev->id]; | ||
799 | struct atmel_pcm_dma_params *dma_params; | 806 | struct atmel_pcm_dma_params *dma_params; |
800 | int dir; | 807 | int dir; |
801 | 808 | ||
@@ -824,11 +831,12 @@ static int atmel_ssc_trigger(struct snd_pcm_substream *substream, | |||
824 | static int atmel_ssc_suspend(struct snd_soc_dai *cpu_dai) | 831 | static int atmel_ssc_suspend(struct snd_soc_dai *cpu_dai) |
825 | { | 832 | { |
826 | struct atmel_ssc_info *ssc_p; | 833 | struct atmel_ssc_info *ssc_p; |
834 | struct platform_device *pdev = to_platform_device(cpu_dai->dev); | ||
827 | 835 | ||
828 | if (!cpu_dai->active) | 836 | if (!cpu_dai->active) |
829 | return 0; | 837 | return 0; |
830 | 838 | ||
831 | ssc_p = &ssc_info[cpu_dai->id]; | 839 | ssc_p = &ssc_info[pdev->id]; |
832 | 840 | ||
833 | /* Save the status register before disabling transmit and receive */ | 841 | /* Save the status register before disabling transmit and receive */ |
834 | ssc_p->ssc_state.ssc_sr = ssc_readl(ssc_p->ssc->regs, SR); | 842 | ssc_p->ssc_state.ssc_sr = ssc_readl(ssc_p->ssc->regs, SR); |
@@ -852,12 +860,13 @@ static int atmel_ssc_suspend(struct snd_soc_dai *cpu_dai) | |||
852 | static int atmel_ssc_resume(struct snd_soc_dai *cpu_dai) | 860 | static int atmel_ssc_resume(struct snd_soc_dai *cpu_dai) |
853 | { | 861 | { |
854 | struct atmel_ssc_info *ssc_p; | 862 | struct atmel_ssc_info *ssc_p; |
863 | struct platform_device *pdev = to_platform_device(cpu_dai->dev); | ||
855 | u32 cr; | 864 | u32 cr; |
856 | 865 | ||
857 | if (!cpu_dai->active) | 866 | if (!cpu_dai->active) |
858 | return 0; | 867 | return 0; |
859 | 868 | ||
860 | ssc_p = &ssc_info[cpu_dai->id]; | 869 | ssc_p = &ssc_info[pdev->id]; |
861 | 870 | ||
862 | /* restore SSC register settings */ | 871 | /* restore SSC register settings */ |
863 | ssc_writel(ssc_p->ssc->regs, TFMR, ssc_p->ssc_state.ssc_tfmr); | 872 | ssc_writel(ssc_p->ssc->regs, TFMR, ssc_p->ssc_state.ssc_tfmr); |
diff --git a/sound/soc/bcm/bcm2835-i2s.c b/sound/soc/bcm/bcm2835-i2s.c index 3303d5f58082..1c1f2210387b 100644 --- a/sound/soc/bcm/bcm2835-i2s.c +++ b/sound/soc/bcm/bcm2835-i2s.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <linux/init.h> | 37 | #include <linux/init.h> |
38 | #include <linux/io.h> | 38 | #include <linux/io.h> |
39 | #include <linux/module.h> | 39 | #include <linux/module.h> |
40 | #include <linux/of_address.h> | ||
40 | #include <linux/slab.h> | 41 | #include <linux/slab.h> |
41 | 42 | ||
42 | #include <sound/core.h> | 43 | #include <sound/core.h> |
@@ -46,55 +47,6 @@ | |||
46 | #include <sound/pcm_params.h> | 47 | #include <sound/pcm_params.h> |
47 | #include <sound/soc.h> | 48 | #include <sound/soc.h> |
48 | 49 | ||
49 | /* Clock registers */ | ||
50 | #define BCM2835_CLK_PCMCTL_REG 0x00 | ||
51 | #define BCM2835_CLK_PCMDIV_REG 0x04 | ||
52 | |||
53 | /* Clock register settings */ | ||
54 | #define BCM2835_CLK_PASSWD (0x5a000000) | ||
55 | #define BCM2835_CLK_PASSWD_MASK (0xff000000) | ||
56 | #define BCM2835_CLK_MASH(v) ((v) << 9) | ||
57 | #define BCM2835_CLK_FLIP BIT(8) | ||
58 | #define BCM2835_CLK_BUSY BIT(7) | ||
59 | #define BCM2835_CLK_KILL BIT(5) | ||
60 | #define BCM2835_CLK_ENAB BIT(4) | ||
61 | #define BCM2835_CLK_SRC(v) (v) | ||
62 | |||
63 | #define BCM2835_CLK_SHIFT (12) | ||
64 | #define BCM2835_CLK_DIVI(v) ((v) << BCM2835_CLK_SHIFT) | ||
65 | #define BCM2835_CLK_DIVF(v) (v) | ||
66 | #define BCM2835_CLK_DIVF_MASK (0xFFF) | ||
67 | |||
68 | enum { | ||
69 | BCM2835_CLK_MASH_0 = 0, | ||
70 | BCM2835_CLK_MASH_1, | ||
71 | BCM2835_CLK_MASH_2, | ||
72 | BCM2835_CLK_MASH_3, | ||
73 | }; | ||
74 | |||
75 | enum { | ||
76 | BCM2835_CLK_SRC_GND = 0, | ||
77 | BCM2835_CLK_SRC_OSC, | ||
78 | BCM2835_CLK_SRC_DBG0, | ||
79 | BCM2835_CLK_SRC_DBG1, | ||
80 | BCM2835_CLK_SRC_PLLA, | ||
81 | BCM2835_CLK_SRC_PLLC, | ||
82 | BCM2835_CLK_SRC_PLLD, | ||
83 | BCM2835_CLK_SRC_HDMI, | ||
84 | }; | ||
85 | |||
86 | /* Most clocks are not useable (freq = 0) */ | ||
87 | static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { | ||
88 | [BCM2835_CLK_SRC_GND] = 0, | ||
89 | [BCM2835_CLK_SRC_OSC] = 19200000, | ||
90 | [BCM2835_CLK_SRC_DBG0] = 0, | ||
91 | [BCM2835_CLK_SRC_DBG1] = 0, | ||
92 | [BCM2835_CLK_SRC_PLLA] = 0, | ||
93 | [BCM2835_CLK_SRC_PLLC] = 0, | ||
94 | [BCM2835_CLK_SRC_PLLD] = 500000000, | ||
95 | [BCM2835_CLK_SRC_HDMI] = 0, | ||
96 | }; | ||
97 | |||
98 | /* I2S registers */ | 50 | /* I2S registers */ |
99 | #define BCM2835_I2S_CS_A_REG 0x00 | 51 | #define BCM2835_I2S_CS_A_REG 0x00 |
100 | #define BCM2835_I2S_FIFO_A_REG 0x04 | 52 | #define BCM2835_I2S_FIFO_A_REG 0x04 |
@@ -158,10 +110,6 @@ static const unsigned int bcm2835_clk_freq[BCM2835_CLK_SRC_HDMI+1] = { | |||
158 | #define BCM2835_I2S_INT_RXR BIT(1) | 110 | #define BCM2835_I2S_INT_RXR BIT(1) |
159 | #define BCM2835_I2S_INT_TXW BIT(0) | 111 | #define BCM2835_I2S_INT_TXW BIT(0) |
160 | 112 | ||
161 | /* I2S DMA interface */ | ||
162 | /* FIXME: Needs IOMMU support */ | ||
163 | #define BCM2835_VCMMU_SHIFT (0x7E000000 - 0x20000000) | ||
164 | |||
165 | /* General device struct */ | 113 | /* General device struct */ |
166 | struct bcm2835_i2s_dev { | 114 | struct bcm2835_i2s_dev { |
167 | struct device *dev; | 115 | struct device *dev; |
@@ -169,21 +117,23 @@ struct bcm2835_i2s_dev { | |||
169 | unsigned int fmt; | 117 | unsigned int fmt; |
170 | unsigned int bclk_ratio; | 118 | unsigned int bclk_ratio; |
171 | 119 | ||
172 | struct regmap *i2s_regmap; | 120 | struct regmap *i2s_regmap; |
173 | struct regmap *clk_regmap; | 121 | struct clk *clk; |
122 | bool clk_prepared; | ||
174 | }; | 123 | }; |
175 | 124 | ||
176 | static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) | 125 | static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) |
177 | { | 126 | { |
178 | /* Start the clock if in master mode */ | ||
179 | unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; | 127 | unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; |
180 | 128 | ||
129 | if (dev->clk_prepared) | ||
130 | return; | ||
131 | |||
181 | switch (master) { | 132 | switch (master) { |
182 | case SND_SOC_DAIFMT_CBS_CFS: | 133 | case SND_SOC_DAIFMT_CBS_CFS: |
183 | case SND_SOC_DAIFMT_CBS_CFM: | 134 | case SND_SOC_DAIFMT_CBS_CFM: |
184 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | 135 | clk_prepare_enable(dev->clk); |
185 | BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, | 136 | dev->clk_prepared = true; |
186 | BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); | ||
187 | break; | 137 | break; |
188 | default: | 138 | default: |
189 | break; | 139 | break; |
@@ -192,28 +142,9 @@ static void bcm2835_i2s_start_clock(struct bcm2835_i2s_dev *dev) | |||
192 | 142 | ||
193 | static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) | 143 | static void bcm2835_i2s_stop_clock(struct bcm2835_i2s_dev *dev) |
194 | { | 144 | { |
195 | uint32_t clkreg; | 145 | if (dev->clk_prepared) |
196 | int timeout = 1000; | 146 | clk_disable_unprepare(dev->clk); |
197 | 147 | dev->clk_prepared = false; | |
198 | /* Stop clock */ | ||
199 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | ||
200 | BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, | ||
201 | BCM2835_CLK_PASSWD); | ||
202 | |||
203 | /* Wait for the BUSY flag going down */ | ||
204 | while (--timeout) { | ||
205 | regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); | ||
206 | if (!(clkreg & BCM2835_CLK_BUSY)) | ||
207 | break; | ||
208 | } | ||
209 | |||
210 | if (!timeout) { | ||
211 | /* KILL the clock */ | ||
212 | dev_err(dev->dev, "I2S clock didn't stop. Kill the clock!\n"); | ||
213 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | ||
214 | BCM2835_CLK_KILL | BCM2835_CLK_PASSWD_MASK, | ||
215 | BCM2835_CLK_KILL | BCM2835_CLK_PASSWD); | ||
216 | } | ||
217 | } | 148 | } |
218 | 149 | ||
219 | static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, | 150 | static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, |
@@ -223,8 +154,7 @@ static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, | |||
223 | uint32_t syncval; | 154 | uint32_t syncval; |
224 | uint32_t csreg; | 155 | uint32_t csreg; |
225 | uint32_t i2s_active_state; | 156 | uint32_t i2s_active_state; |
226 | uint32_t clkreg; | 157 | bool clk_was_prepared; |
227 | uint32_t clk_active_state; | ||
228 | uint32_t off; | 158 | uint32_t off; |
229 | uint32_t clr; | 159 | uint32_t clr; |
230 | 160 | ||
@@ -238,15 +168,10 @@ static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, | |||
238 | regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); | 168 | regmap_read(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, &csreg); |
239 | i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); | 169 | i2s_active_state = csreg & (BCM2835_I2S_RXON | BCM2835_I2S_TXON); |
240 | 170 | ||
241 | regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); | ||
242 | clk_active_state = clkreg & BCM2835_CLK_ENAB; | ||
243 | |||
244 | /* Start clock if not running */ | 171 | /* Start clock if not running */ |
245 | if (!clk_active_state) { | 172 | clk_was_prepared = dev->clk_prepared; |
246 | regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, | 173 | if (!clk_was_prepared) |
247 | BCM2835_CLK_PASSWD_MASK | BCM2835_CLK_ENAB, | 174 | bcm2835_i2s_start_clock(dev); |
248 | BCM2835_CLK_PASSWD | BCM2835_CLK_ENAB); | ||
249 | } | ||
250 | 175 | ||
251 | /* Stop I2S module */ | 176 | /* Stop I2S module */ |
252 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0); | 177 | regmap_update_bits(dev->i2s_regmap, BCM2835_I2S_CS_A_REG, off, 0); |
@@ -280,7 +205,7 @@ static void bcm2835_i2s_clear_fifos(struct bcm2835_i2s_dev *dev, | |||
280 | dev_err(dev->dev, "I2S SYNC error!\n"); | 205 | dev_err(dev->dev, "I2S SYNC error!\n"); |
281 | 206 | ||
282 | /* Stop clock if it was not running before */ | 207 | /* Stop clock if it was not running before */ |
283 | if (!clk_active_state) | 208 | if (!clk_was_prepared) |
284 | bcm2835_i2s_stop_clock(dev); | 209 | bcm2835_i2s_stop_clock(dev); |
285 | 210 | ||
286 | /* Restore I2S state */ | 211 | /* Restore I2S state */ |
@@ -309,19 +234,9 @@ static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, | |||
309 | struct snd_soc_dai *dai) | 234 | struct snd_soc_dai *dai) |
310 | { | 235 | { |
311 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); | 236 | struct bcm2835_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); |
312 | |||
313 | unsigned int sampling_rate = params_rate(params); | 237 | unsigned int sampling_rate = params_rate(params); |
314 | unsigned int data_length, data_delay, bclk_ratio; | 238 | unsigned int data_length, data_delay, bclk_ratio; |
315 | unsigned int ch1pos, ch2pos, mode, format; | 239 | unsigned int ch1pos, ch2pos, mode, format; |
316 | unsigned int mash = BCM2835_CLK_MASH_1; | ||
317 | unsigned int divi, divf, target_frequency; | ||
318 | int clk_src = -1; | ||
319 | unsigned int master = dev->fmt & SND_SOC_DAIFMT_MASTER_MASK; | ||
320 | bool bit_master = (master == SND_SOC_DAIFMT_CBS_CFS | ||
321 | || master == SND_SOC_DAIFMT_CBS_CFM); | ||
322 | |||
323 | bool frame_master = (master == SND_SOC_DAIFMT_CBS_CFS | ||
324 | || master == SND_SOC_DAIFMT_CBM_CFS); | ||
325 | uint32_t csreg; | 240 | uint32_t csreg; |
326 | 241 | ||
327 | /* | 242 | /* |
@@ -343,11 +258,9 @@ static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, | |||
343 | switch (params_format(params)) { | 258 | switch (params_format(params)) { |
344 | case SNDRV_PCM_FORMAT_S16_LE: | 259 | case SNDRV_PCM_FORMAT_S16_LE: |
345 | data_length = 16; | 260 | data_length = 16; |
346 | bclk_ratio = 40; | ||
347 | break; | 261 | break; |
348 | case SNDRV_PCM_FORMAT_S32_LE: | 262 | case SNDRV_PCM_FORMAT_S32_LE: |
349 | data_length = 32; | 263 | data_length = 32; |
350 | bclk_ratio = 80; | ||
351 | break; | 264 | break; |
352 | default: | 265 | default: |
353 | return -EINVAL; | 266 | return -EINVAL; |
@@ -356,69 +269,12 @@ static int bcm2835_i2s_hw_params(struct snd_pcm_substream *substream, | |||
356 | /* If bclk_ratio already set, use that one. */ | 269 | /* If bclk_ratio already set, use that one. */ |
357 | if (dev->bclk_ratio) | 270 | if (dev->bclk_ratio) |
358 | bclk_ratio = dev->bclk_ratio; | 271 | bclk_ratio = dev->bclk_ratio; |
272 | else | ||
273 | /* otherwise calculate a fitting block ratio */ | ||
274 | bclk_ratio = 2 * data_length; | ||
359 | 275 | ||
360 | /* | 276 | /* set target clock rate*/ |
361 | * Clock Settings | 277 | clk_set_rate(dev->clk, sampling_rate * bclk_ratio); |
362 | * | ||
363 | * The target frequency of the bit clock is | ||
364 | * sampling rate * frame length | ||
365 | * | ||
366 | * Integer mode: | ||
367 | * Sampling rates that are multiples of 8000 kHz | ||
368 | * can be driven by the oscillator of 19.2 MHz | ||
369 | * with an integer divider as long as the frame length | ||
370 | * is an integer divider of 19200000/8000=2400 as set up above. | ||
371 | * This is no longer possible if the sampling rate | ||
372 | * is too high (e.g. 192 kHz), because the oscillator is too slow. | ||
373 | * | ||
374 | * MASH mode: | ||
375 | * For all other sampling rates, it is not possible to | ||
376 | * have an integer divider. Approximate the clock | ||
377 | * with the MASH module that induces a slight frequency | ||
378 | * variance. To minimize that it is best to have the fastest | ||
379 | * clock here. That is PLLD with 500 MHz. | ||
380 | */ | ||
381 | target_frequency = sampling_rate * bclk_ratio; | ||
382 | clk_src = BCM2835_CLK_SRC_OSC; | ||
383 | mash = BCM2835_CLK_MASH_0; | ||
384 | |||
385 | if (bcm2835_clk_freq[clk_src] % target_frequency == 0 | ||
386 | && bit_master && frame_master) { | ||
387 | divi = bcm2835_clk_freq[clk_src] / target_frequency; | ||
388 | divf = 0; | ||
389 | } else { | ||
390 | uint64_t dividend; | ||
391 | |||
392 | if (!dev->bclk_ratio) { | ||
393 | /* | ||
394 | * Overwrite bclk_ratio, because the | ||
395 | * above trick is not needed or can | ||
396 | * not be used. | ||
397 | */ | ||
398 | bclk_ratio = 2 * data_length; | ||
399 | } | ||
400 | |||
401 | target_frequency = sampling_rate * bclk_ratio; | ||
402 | |||
403 | clk_src = BCM2835_CLK_SRC_PLLD; | ||
404 | mash = BCM2835_CLK_MASH_1; | ||
405 | |||
406 | dividend = bcm2835_clk_freq[clk_src]; | ||
407 | dividend <<= BCM2835_CLK_SHIFT; | ||
408 | do_div(dividend, target_frequency); | ||
409 | divi = dividend >> BCM2835_CLK_SHIFT; | ||
410 | divf = dividend & BCM2835_CLK_DIVF_MASK; | ||
411 | } | ||
412 | |||
413 | /* Set clock divider */ | ||
414 | regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD | ||
415 | | BCM2835_CLK_DIVI(divi) | ||
416 | | BCM2835_CLK_DIVF(divf)); | ||
417 | |||
418 | /* Setup clock, but don't start it yet */ | ||
419 | regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD | ||
420 | | BCM2835_CLK_MASH(mash) | ||
421 | | BCM2835_CLK_SRC(clk_src)); | ||
422 | 278 | ||
423 | /* Setup the frame format */ | 279 | /* Setup the frame format */ |
424 | format = BCM2835_I2S_CHEN; | 280 | format = BCM2835_I2S_CHEN; |
@@ -692,7 +548,7 @@ static const struct snd_soc_dai_ops bcm2835_i2s_dai_ops = { | |||
692 | .trigger = bcm2835_i2s_trigger, | 548 | .trigger = bcm2835_i2s_trigger, |
693 | .hw_params = bcm2835_i2s_hw_params, | 549 | .hw_params = bcm2835_i2s_hw_params, |
694 | .set_fmt = bcm2835_i2s_set_dai_fmt, | 550 | .set_fmt = bcm2835_i2s_set_dai_fmt, |
695 | .set_bclk_ratio = bcm2835_i2s_set_dai_bclk_ratio | 551 | .set_bclk_ratio = bcm2835_i2s_set_dai_bclk_ratio, |
696 | }; | 552 | }; |
697 | 553 | ||
698 | static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) | 554 | static int bcm2835_i2s_dai_probe(struct snd_soc_dai *dai) |
@@ -750,34 +606,14 @@ static bool bcm2835_i2s_precious_reg(struct device *dev, unsigned int reg) | |||
750 | }; | 606 | }; |
751 | } | 607 | } |
752 | 608 | ||
753 | static bool bcm2835_clk_volatile_reg(struct device *dev, unsigned int reg) | 609 | static const struct regmap_config bcm2835_regmap_config = { |
754 | { | 610 | .reg_bits = 32, |
755 | switch (reg) { | 611 | .reg_stride = 4, |
756 | case BCM2835_CLK_PCMCTL_REG: | 612 | .val_bits = 32, |
757 | return true; | 613 | .max_register = BCM2835_I2S_GRAY_REG, |
758 | default: | 614 | .precious_reg = bcm2835_i2s_precious_reg, |
759 | return false; | 615 | .volatile_reg = bcm2835_i2s_volatile_reg, |
760 | }; | 616 | .cache_type = REGCACHE_RBTREE, |
761 | } | ||
762 | |||
763 | static const struct regmap_config bcm2835_regmap_config[] = { | ||
764 | { | ||
765 | .reg_bits = 32, | ||
766 | .reg_stride = 4, | ||
767 | .val_bits = 32, | ||
768 | .max_register = BCM2835_I2S_GRAY_REG, | ||
769 | .precious_reg = bcm2835_i2s_precious_reg, | ||
770 | .volatile_reg = bcm2835_i2s_volatile_reg, | ||
771 | .cache_type = REGCACHE_RBTREE, | ||
772 | }, | ||
773 | { | ||
774 | .reg_bits = 32, | ||
775 | .reg_stride = 4, | ||
776 | .val_bits = 32, | ||
777 | .max_register = BCM2835_CLK_PCMDIV_REG, | ||
778 | .volatile_reg = bcm2835_clk_volatile_reg, | ||
779 | .cache_type = REGCACHE_RBTREE, | ||
780 | }, | ||
781 | }; | 617 | }; |
782 | 618 | ||
783 | static const struct snd_soc_component_driver bcm2835_i2s_component = { | 619 | static const struct snd_soc_component_driver bcm2835_i2s_component = { |
@@ -787,42 +623,50 @@ static const struct snd_soc_component_driver bcm2835_i2s_component = { | |||
787 | static int bcm2835_i2s_probe(struct platform_device *pdev) | 623 | static int bcm2835_i2s_probe(struct platform_device *pdev) |
788 | { | 624 | { |
789 | struct bcm2835_i2s_dev *dev; | 625 | struct bcm2835_i2s_dev *dev; |
790 | int i; | ||
791 | int ret; | 626 | int ret; |
792 | struct regmap *regmap[2]; | 627 | struct resource *mem; |
793 | struct resource *mem[2]; | 628 | void __iomem *base; |
794 | 629 | const __be32 *addr; | |
795 | /* Request both ioareas */ | 630 | dma_addr_t dma_base; |
796 | for (i = 0; i <= 1; i++) { | ||
797 | void __iomem *base; | ||
798 | |||
799 | mem[i] = platform_get_resource(pdev, IORESOURCE_MEM, i); | ||
800 | base = devm_ioremap_resource(&pdev->dev, mem[i]); | ||
801 | if (IS_ERR(base)) | ||
802 | return PTR_ERR(base); | ||
803 | |||
804 | regmap[i] = devm_regmap_init_mmio(&pdev->dev, base, | ||
805 | &bcm2835_regmap_config[i]); | ||
806 | if (IS_ERR(regmap[i])) | ||
807 | return PTR_ERR(regmap[i]); | ||
808 | } | ||
809 | 631 | ||
810 | dev = devm_kzalloc(&pdev->dev, sizeof(*dev), | 632 | dev = devm_kzalloc(&pdev->dev, sizeof(*dev), |
811 | GFP_KERNEL); | 633 | GFP_KERNEL); |
812 | if (!dev) | 634 | if (!dev) |
813 | return -ENOMEM; | 635 | return -ENOMEM; |
814 | 636 | ||
815 | dev->i2s_regmap = regmap[0]; | 637 | /* get the clock */ |
816 | dev->clk_regmap = regmap[1]; | 638 | dev->clk_prepared = false; |
639 | dev->clk = devm_clk_get(&pdev->dev, NULL); | ||
640 | if (IS_ERR(dev->clk)) { | ||
641 | dev_err(&pdev->dev, "could not get clk: %ld\n", | ||
642 | PTR_ERR(dev->clk)); | ||
643 | return PTR_ERR(dev->clk); | ||
644 | } | ||
645 | |||
646 | /* Request ioarea */ | ||
647 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
648 | base = devm_ioremap_resource(&pdev->dev, mem); | ||
649 | if (IS_ERR(base)) | ||
650 | return PTR_ERR(base); | ||
651 | |||
652 | dev->i2s_regmap = devm_regmap_init_mmio(&pdev->dev, base, | ||
653 | &bcm2835_regmap_config); | ||
654 | if (IS_ERR(dev->i2s_regmap)) | ||
655 | return PTR_ERR(dev->i2s_regmap); | ||
656 | |||
657 | /* Set the DMA address - we have to parse DT ourselves */ | ||
658 | addr = of_get_address(pdev->dev.of_node, 0, NULL, NULL); | ||
659 | if (!addr) { | ||
660 | dev_err(&pdev->dev, "could not get DMA-register address\n"); | ||
661 | return -EINVAL; | ||
662 | } | ||
663 | dma_base = be32_to_cpup(addr); | ||
817 | 664 | ||
818 | /* Set the DMA address */ | ||
819 | dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = | 665 | dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr = |
820 | (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG | 666 | dma_base + BCM2835_I2S_FIFO_A_REG; |
821 | + BCM2835_VCMMU_SHIFT; | ||
822 | 667 | ||
823 | dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = | 668 | dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr = |
824 | (dma_addr_t)mem[0]->start + BCM2835_I2S_FIFO_A_REG | 669 | dma_base + BCM2835_I2S_FIFO_A_REG; |
825 | + BCM2835_VCMMU_SHIFT; | ||
826 | 670 | ||
827 | /* Set the bus width */ | 671 | /* Set the bus width */ |
828 | dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = | 672 | dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr_width = |
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 50693c867e71..649e92a252ae 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig | |||
@@ -79,7 +79,9 @@ config SND_SOC_ALL_CODECS | |||
79 | select SND_SOC_MAX98090 if I2C | 79 | select SND_SOC_MAX98090 if I2C |
80 | select SND_SOC_MAX98095 if I2C | 80 | select SND_SOC_MAX98095 if I2C |
81 | select SND_SOC_MAX98357A if GPIOLIB | 81 | select SND_SOC_MAX98357A if GPIOLIB |
82 | select SND_SOC_MAX9867 if I2C | ||
82 | select SND_SOC_MAX98925 if I2C | 83 | select SND_SOC_MAX98925 if I2C |
84 | select SND_SOC_MAX98926 if I2C | ||
83 | select SND_SOC_MAX9850 if I2C | 85 | select SND_SOC_MAX9850 if I2C |
84 | select SND_SOC_MAX9768 if I2C | 86 | select SND_SOC_MAX9768 if I2C |
85 | select SND_SOC_MAX9877 if I2C | 87 | select SND_SOC_MAX9877 if I2C |
@@ -87,7 +89,8 @@ config SND_SOC_ALL_CODECS | |||
87 | select SND_SOC_ML26124 if I2C | 89 | select SND_SOC_ML26124 if I2C |
88 | select SND_SOC_NAU8825 if I2C | 90 | select SND_SOC_NAU8825 if I2C |
89 | select SND_SOC_PCM1681 if I2C | 91 | select SND_SOC_PCM1681 if I2C |
90 | select SND_SOC_PCM179X if SPI_MASTER | 92 | select SND_SOC_PCM179X_I2C if I2C |
93 | select SND_SOC_PCM179X_SPI if SPI_MASTER | ||
91 | select SND_SOC_PCM3008 | 94 | select SND_SOC_PCM3008 |
92 | select SND_SOC_PCM3168A_I2C if I2C | 95 | select SND_SOC_PCM3168A_I2C if I2C |
93 | select SND_SOC_PCM3168A_SPI if SPI_MASTER | 96 | select SND_SOC_PCM3168A_SPI if SPI_MASTER |
@@ -95,6 +98,7 @@ config SND_SOC_ALL_CODECS | |||
95 | select SND_SOC_PCM512x_SPI if SPI_MASTER | 98 | select SND_SOC_PCM512x_SPI if SPI_MASTER |
96 | select SND_SOC_RT286 if I2C | 99 | select SND_SOC_RT286 if I2C |
97 | select SND_SOC_RT298 if I2C | 100 | select SND_SOC_RT298 if I2C |
101 | select SND_SOC_RT5514 if I2C | ||
98 | select SND_SOC_RT5616 if I2C | 102 | select SND_SOC_RT5616 if I2C |
99 | select SND_SOC_RT5631 if I2C | 103 | select SND_SOC_RT5631 if I2C |
100 | select SND_SOC_RT5640 if I2C | 104 | select SND_SOC_RT5640 if I2C |
@@ -490,6 +494,7 @@ config SND_SOC_GTM601 | |||
490 | config SND_SOC_HDAC_HDMI | 494 | config SND_SOC_HDAC_HDMI |
491 | tristate | 495 | tristate |
492 | select SND_HDA_EXT_CORE | 496 | select SND_HDA_EXT_CORE |
497 | select SND_PCM_ELD | ||
493 | select HDMI | 498 | select HDMI |
494 | 499 | ||
495 | config SND_SOC_ICS43432 | 500 | config SND_SOC_ICS43432 |
@@ -497,6 +502,7 @@ config SND_SOC_ICS43432 | |||
497 | 502 | ||
498 | config SND_SOC_INNO_RK3036 | 503 | config SND_SOC_INNO_RK3036 |
499 | tristate "Inno codec driver for RK3036 SoC" | 504 | tristate "Inno codec driver for RK3036 SoC" |
505 | select REGMAP_MMIO | ||
500 | 506 | ||
501 | config SND_SOC_ISABELLE | 507 | config SND_SOC_ISABELLE |
502 | tristate | 508 | tristate |
@@ -516,9 +522,15 @@ config SND_SOC_MAX98095 | |||
516 | config SND_SOC_MAX98357A | 522 | config SND_SOC_MAX98357A |
517 | tristate | 523 | tristate |
518 | 524 | ||
525 | config SND_SOC_MAX9867 | ||
526 | tristate | ||
527 | |||
519 | config SND_SOC_MAX98925 | 528 | config SND_SOC_MAX98925 |
520 | tristate | 529 | tristate |
521 | 530 | ||
531 | config SND_SOC_MAX98926 | ||
532 | tristate | ||
533 | |||
522 | config SND_SOC_MAX9850 | 534 | config SND_SOC_MAX9850 |
523 | tristate | 535 | tristate |
524 | 536 | ||
@@ -527,8 +539,23 @@ config SND_SOC_PCM1681 | |||
527 | depends on I2C | 539 | depends on I2C |
528 | 540 | ||
529 | config SND_SOC_PCM179X | 541 | config SND_SOC_PCM179X |
530 | tristate "Texas Instruments PCM179X CODEC" | 542 | tristate |
543 | |||
544 | config SND_SOC_PCM179X_I2C | ||
545 | tristate "Texas Instruments PCM179X CODEC (I2C)" | ||
546 | depends on I2C | ||
547 | select SND_SOC_PCM179X | ||
548 | help | ||
549 | Enable support for Texas Instruments PCM179x CODEC. | ||
550 | Select this if your PCM179x is connected via an I2C bus. | ||
551 | |||
552 | config SND_SOC_PCM179X_SPI | ||
553 | tristate "Texas Instruments PCM179X CODEC (SPI)" | ||
531 | depends on SPI_MASTER | 554 | depends on SPI_MASTER |
555 | select SND_SOC_PCM179X | ||
556 | help | ||
557 | Enable support for Texas Instruments PCM179x CODEC. | ||
558 | Select this if your PCM179x is connected via an SPI bus. | ||
532 | 559 | ||
533 | config SND_SOC_PCM3008 | 560 | config SND_SOC_PCM3008 |
534 | tristate | 561 | tristate |
@@ -565,6 +592,7 @@ config SND_SOC_PCM512x_SPI | |||
565 | 592 | ||
566 | config SND_SOC_RL6231 | 593 | config SND_SOC_RL6231 |
567 | tristate | 594 | tristate |
595 | default y if SND_SOC_RT5514=y | ||
568 | default y if SND_SOC_RT5616=y | 596 | default y if SND_SOC_RT5616=y |
569 | default y if SND_SOC_RT5640=y | 597 | default y if SND_SOC_RT5640=y |
570 | default y if SND_SOC_RT5645=y | 598 | default y if SND_SOC_RT5645=y |
@@ -572,6 +600,7 @@ config SND_SOC_RL6231 | |||
572 | default y if SND_SOC_RT5659=y | 600 | default y if SND_SOC_RT5659=y |
573 | default y if SND_SOC_RT5670=y | 601 | default y if SND_SOC_RT5670=y |
574 | default y if SND_SOC_RT5677=y | 602 | default y if SND_SOC_RT5677=y |
603 | default m if SND_SOC_RT5514=m | ||
575 | default m if SND_SOC_RT5616=m | 604 | default m if SND_SOC_RT5616=m |
576 | default m if SND_SOC_RT5640=m | 605 | default m if SND_SOC_RT5640=m |
577 | default m if SND_SOC_RT5645=m | 606 | default m if SND_SOC_RT5645=m |
@@ -595,9 +624,12 @@ config SND_SOC_RT298 | |||
595 | tristate | 624 | tristate |
596 | depends on I2C | 625 | depends on I2C |
597 | 626 | ||
598 | config SND_SOC_RT5616 | 627 | config SND_SOC_RT5514 |
599 | tristate | 628 | tristate |
600 | 629 | ||
630 | config SND_SOC_RT5616 | ||
631 | tristate "Realtek RT5616 CODEC" | ||
632 | |||
601 | config SND_SOC_RT5631 | 633 | config SND_SOC_RT5631 |
602 | tristate "Realtek ALC5631/RT5631 CODEC" | 634 | tristate "Realtek ALC5631/RT5631 CODEC" |
603 | depends on I2C | 635 | depends on I2C |
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index d44f7d347183..185a712a7fe7 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile | |||
@@ -74,13 +74,17 @@ snd-soc-max98088-objs := max98088.o | |||
74 | snd-soc-max98090-objs := max98090.o | 74 | snd-soc-max98090-objs := max98090.o |
75 | snd-soc-max98095-objs := max98095.o | 75 | snd-soc-max98095-objs := max98095.o |
76 | snd-soc-max98357a-objs := max98357a.o | 76 | snd-soc-max98357a-objs := max98357a.o |
77 | snd-soc-max9867-objs := max9867.o | ||
77 | snd-soc-max98925-objs := max98925.o | 78 | snd-soc-max98925-objs := max98925.o |
79 | snd-soc-max98926-objs := max98926.o | ||
78 | snd-soc-max9850-objs := max9850.o | 80 | snd-soc-max9850-objs := max9850.o |
79 | snd-soc-mc13783-objs := mc13783.o | 81 | snd-soc-mc13783-objs := mc13783.o |
80 | snd-soc-ml26124-objs := ml26124.o | 82 | snd-soc-ml26124-objs := ml26124.o |
81 | snd-soc-nau8825-objs := nau8825.o | 83 | snd-soc-nau8825-objs := nau8825.o |
82 | snd-soc-pcm1681-objs := pcm1681.o | 84 | snd-soc-pcm1681-objs := pcm1681.o |
83 | snd-soc-pcm179x-codec-objs := pcm179x.o | 85 | snd-soc-pcm179x-codec-objs := pcm179x.o |
86 | snd-soc-pcm179x-i2c-objs := pcm179x-i2c.o | ||
87 | snd-soc-pcm179x-spi-objs := pcm179x-spi.o | ||
84 | snd-soc-pcm3008-objs := pcm3008.o | 88 | snd-soc-pcm3008-objs := pcm3008.o |
85 | snd-soc-pcm3168a-objs := pcm3168a.o | 89 | snd-soc-pcm3168a-objs := pcm3168a.o |
86 | snd-soc-pcm3168a-i2c-objs := pcm3168a-i2c.o | 90 | snd-soc-pcm3168a-i2c-objs := pcm3168a-i2c.o |
@@ -92,6 +96,7 @@ snd-soc-rl6231-objs := rl6231.o | |||
92 | snd-soc-rl6347a-objs := rl6347a.o | 96 | snd-soc-rl6347a-objs := rl6347a.o |
93 | snd-soc-rt286-objs := rt286.o | 97 | snd-soc-rt286-objs := rt286.o |
94 | snd-soc-rt298-objs := rt298.o | 98 | snd-soc-rt298-objs := rt298.o |
99 | snd-soc-rt5514-objs := rt5514.o | ||
95 | snd-soc-rt5616-objs := rt5616.o | 100 | snd-soc-rt5616-objs := rt5616.o |
96 | snd-soc-rt5631-objs := rt5631.o | 101 | snd-soc-rt5631-objs := rt5631.o |
97 | snd-soc-rt5640-objs := rt5640.o | 102 | snd-soc-rt5640-objs := rt5640.o |
@@ -278,13 +283,17 @@ obj-$(CONFIG_SND_SOC_MAX98088) += snd-soc-max98088.o | |||
278 | obj-$(CONFIG_SND_SOC_MAX98090) += snd-soc-max98090.o | 283 | obj-$(CONFIG_SND_SOC_MAX98090) += snd-soc-max98090.o |
279 | obj-$(CONFIG_SND_SOC_MAX98095) += snd-soc-max98095.o | 284 | obj-$(CONFIG_SND_SOC_MAX98095) += snd-soc-max98095.o |
280 | obj-$(CONFIG_SND_SOC_MAX98357A) += snd-soc-max98357a.o | 285 | obj-$(CONFIG_SND_SOC_MAX98357A) += snd-soc-max98357a.o |
286 | obj-$(CONFIG_SND_SOC_MAX9867) += snd-soc-max9867.o | ||
281 | obj-$(CONFIG_SND_SOC_MAX98925) += snd-soc-max98925.o | 287 | obj-$(CONFIG_SND_SOC_MAX98925) += snd-soc-max98925.o |
288 | obj-$(CONFIG_SND_SOC_MAX98926) += snd-soc-max98926.o | ||
282 | obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o | 289 | obj-$(CONFIG_SND_SOC_MAX9850) += snd-soc-max9850.o |
283 | obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o | 290 | obj-$(CONFIG_SND_SOC_MC13783) += snd-soc-mc13783.o |
284 | obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o | 291 | obj-$(CONFIG_SND_SOC_ML26124) += snd-soc-ml26124.o |
285 | obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o | 292 | obj-$(CONFIG_SND_SOC_NAU8825) += snd-soc-nau8825.o |
286 | obj-$(CONFIG_SND_SOC_PCM1681) += snd-soc-pcm1681.o | 293 | obj-$(CONFIG_SND_SOC_PCM1681) += snd-soc-pcm1681.o |
287 | obj-$(CONFIG_SND_SOC_PCM179X) += snd-soc-pcm179x-codec.o | 294 | obj-$(CONFIG_SND_SOC_PCM179X) += snd-soc-pcm179x-codec.o |
295 | obj-$(CONFIG_SND_SOC_PCM179X_I2C) += snd-soc-pcm179x-i2c.o | ||
296 | obj-$(CONFIG_SND_SOC_PCM179X_SPI) += snd-soc-pcm179x-spi.o | ||
288 | obj-$(CONFIG_SND_SOC_PCM3008) += snd-soc-pcm3008.o | 297 | obj-$(CONFIG_SND_SOC_PCM3008) += snd-soc-pcm3008.o |
289 | obj-$(CONFIG_SND_SOC_PCM3168A) += snd-soc-pcm3168a.o | 298 | obj-$(CONFIG_SND_SOC_PCM3168A) += snd-soc-pcm3168a.o |
290 | obj-$(CONFIG_SND_SOC_PCM3168A_I2C) += snd-soc-pcm3168a-i2c.o | 299 | obj-$(CONFIG_SND_SOC_PCM3168A_I2C) += snd-soc-pcm3168a-i2c.o |
@@ -296,6 +305,7 @@ obj-$(CONFIG_SND_SOC_RL6231) += snd-soc-rl6231.o | |||
296 | obj-$(CONFIG_SND_SOC_RL6347A) += snd-soc-rl6347a.o | 305 | obj-$(CONFIG_SND_SOC_RL6347A) += snd-soc-rl6347a.o |
297 | obj-$(CONFIG_SND_SOC_RT286) += snd-soc-rt286.o | 306 | obj-$(CONFIG_SND_SOC_RT286) += snd-soc-rt286.o |
298 | obj-$(CONFIG_SND_SOC_RT298) += snd-soc-rt298.o | 307 | obj-$(CONFIG_SND_SOC_RT298) += snd-soc-rt298.o |
308 | obj-$(CONFIG_SND_SOC_RT5514) += snd-soc-rt5514.o | ||
299 | obj-$(CONFIG_SND_SOC_RT5616) += snd-soc-rt5616.o | 309 | obj-$(CONFIG_SND_SOC_RT5616) += snd-soc-rt5616.o |
300 | obj-$(CONFIG_SND_SOC_RT5631) += snd-soc-rt5631.o | 310 | obj-$(CONFIG_SND_SOC_RT5631) += snd-soc-rt5631.o |
301 | obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o | 311 | obj-$(CONFIG_SND_SOC_RT5640) += snd-soc-rt5640.o |
diff --git a/sound/soc/codecs/ab8500-codec.c b/sound/soc/codecs/ab8500-codec.c index faae6936bae4..8b1d0c1a7839 100644 --- a/sound/soc/codecs/ab8500-codec.c +++ b/sound/soc/codecs/ab8500-codec.c | |||
@@ -2134,7 +2134,6 @@ static int ab8500_codec_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
2134 | "%s: ERROR: Unsupporter master mask 0x%x\n", | 2134 | "%s: ERROR: Unsupporter master mask 0x%x\n", |
2135 | __func__, fmt & SND_SOC_DAIFMT_MASTER_MASK); | 2135 | __func__, fmt & SND_SOC_DAIFMT_MASTER_MASK); |
2136 | return -EINVAL; | 2136 | return -EINVAL; |
2137 | break; | ||
2138 | } | 2137 | } |
2139 | 2138 | ||
2140 | snd_soc_update_bits(codec, AB8500_DIGIFCONF3, mask, val); | 2139 | snd_soc_update_bits(codec, AB8500_DIGIFCONF3, mask, val); |
diff --git a/sound/soc/codecs/adau1761-i2c.c b/sound/soc/codecs/adau1761-i2c.c index 348ccb17d3cc..8de010f758cd 100644 --- a/sound/soc/codecs/adau1761-i2c.c +++ b/sound/soc/codecs/adau1761-i2c.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961 codec | 2 | * Driver for ADAU1361/ADAU1461/ADAU1761/ADAU1961 codec |
3 | * | 3 | * |
4 | * Copyright 2014 Analog Devices Inc. | 4 | * Copyright 2014 Analog Devices Inc. |
5 | * Author: Lars-Peter Clausen <lars@metafoo.de> | 5 | * Author: Lars-Peter Clausen <lars@metafoo.de> |
@@ -44,9 +44,21 @@ static const struct i2c_device_id adau1761_i2c_ids[] = { | |||
44 | }; | 44 | }; |
45 | MODULE_DEVICE_TABLE(i2c, adau1761_i2c_ids); | 45 | MODULE_DEVICE_TABLE(i2c, adau1761_i2c_ids); |
46 | 46 | ||
47 | #if defined(CONFIG_OF) | ||
48 | static const struct of_device_id adau1761_i2c_dt_ids[] = { | ||
49 | { .compatible = "adi,adau1361", }, | ||
50 | { .compatible = "adi,adau1461", }, | ||
51 | { .compatible = "adi,adau1761", }, | ||
52 | { .compatible = "adi,adau1961", }, | ||
53 | { }, | ||
54 | }; | ||
55 | MODULE_DEVICE_TABLE(of, adau1761_i2c_dt_ids); | ||
56 | #endif | ||
57 | |||
47 | static struct i2c_driver adau1761_i2c_driver = { | 58 | static struct i2c_driver adau1761_i2c_driver = { |
48 | .driver = { | 59 | .driver = { |
49 | .name = "adau1761", | 60 | .name = "adau1761", |
61 | .of_match_table = of_match_ptr(adau1761_i2c_dt_ids), | ||
50 | }, | 62 | }, |
51 | .probe = adau1761_i2c_probe, | 63 | .probe = adau1761_i2c_probe, |
52 | .remove = adau1761_i2c_remove, | 64 | .remove = adau1761_i2c_remove, |
diff --git a/sound/soc/codecs/adau1761-spi.c b/sound/soc/codecs/adau1761-spi.c index 8bc1fbd25fcc..d9171245bd9f 100644 --- a/sound/soc/codecs/adau1761-spi.c +++ b/sound/soc/codecs/adau1761-spi.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961 codec | 2 | * Driver for ADAU1361/ADAU1461/ADAU1761/ADAU1961 codec |
3 | * | 3 | * |
4 | * Copyright 2014 Analog Devices Inc. | 4 | * Copyright 2014 Analog Devices Inc. |
5 | * Author: Lars-Peter Clausen <lars@metafoo.de> | 5 | * Author: Lars-Peter Clausen <lars@metafoo.de> |
@@ -61,9 +61,21 @@ static const struct spi_device_id adau1761_spi_id[] = { | |||
61 | }; | 61 | }; |
62 | MODULE_DEVICE_TABLE(spi, adau1761_spi_id); | 62 | MODULE_DEVICE_TABLE(spi, adau1761_spi_id); |
63 | 63 | ||
64 | #if defined(CONFIG_OF) | ||
65 | static const struct of_device_id adau1761_spi_dt_ids[] = { | ||
66 | { .compatible = "adi,adau1361", }, | ||
67 | { .compatible = "adi,adau1461", }, | ||
68 | { .compatible = "adi,adau1761", }, | ||
69 | { .compatible = "adi,adau1961", }, | ||
70 | { }, | ||
71 | }; | ||
72 | MODULE_DEVICE_TABLE(of, adau1761_spi_dt_ids); | ||
73 | #endif | ||
74 | |||
64 | static struct spi_driver adau1761_spi_driver = { | 75 | static struct spi_driver adau1761_spi_driver = { |
65 | .driver = { | 76 | .driver = { |
66 | .name = "adau1761", | 77 | .name = "adau1761", |
78 | .of_match_table = of_match_ptr(adau1761_spi_dt_ids), | ||
67 | }, | 79 | }, |
68 | .probe = adau1761_spi_probe, | 80 | .probe = adau1761_spi_probe, |
69 | .remove = adau1761_spi_remove, | 81 | .remove = adau1761_spi_remove, |
diff --git a/sound/soc/codecs/adau1761.c b/sound/soc/codecs/adau1761.c index 2f12477e539e..b95d29dbd13d 100644 --- a/sound/soc/codecs/adau1761.c +++ b/sound/soc/codecs/adau1761.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for ADAU1761/ADAU1461/ADAU1761/ADAU1961 codec | 2 | * Driver for ADAU1361/ADAU1461/ADAU1761/ADAU1961 codec |
3 | * | 3 | * |
4 | * Copyright 2011-2013 Analog Devices Inc. | 4 | * Copyright 2011-2013 Analog Devices Inc. |
5 | * Author: Lars-Peter Clausen <lars@metafoo.de> | 5 | * Author: Lars-Peter Clausen <lars@metafoo.de> |
@@ -456,13 +456,17 @@ static int adau1761_set_bias_level(struct snd_soc_codec *codec, | |||
456 | case SND_SOC_BIAS_PREPARE: | 456 | case SND_SOC_BIAS_PREPARE: |
457 | break; | 457 | break; |
458 | case SND_SOC_BIAS_STANDBY: | 458 | case SND_SOC_BIAS_STANDBY: |
459 | regcache_cache_only(adau->regmap, false); | ||
459 | regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, | 460 | regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, |
460 | ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, | 461 | ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, |
461 | ADAU17X1_CLOCK_CONTROL_SYSCLK_EN); | 462 | ADAU17X1_CLOCK_CONTROL_SYSCLK_EN); |
463 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) | ||
464 | regcache_sync(adau->regmap); | ||
462 | break; | 465 | break; |
463 | case SND_SOC_BIAS_OFF: | 466 | case SND_SOC_BIAS_OFF: |
464 | regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, | 467 | regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL, |
465 | ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0); | 468 | ADAU17X1_CLOCK_CONTROL_SYSCLK_EN, 0); |
469 | regcache_cache_only(adau->regmap, true); | ||
466 | break; | 470 | break; |
467 | 471 | ||
468 | } | 472 | } |
@@ -783,6 +787,10 @@ int adau1761_probe(struct device *dev, struct regmap *regmap, | |||
783 | if (ret) | 787 | if (ret) |
784 | return ret; | 788 | return ret; |
785 | 789 | ||
790 | /* Enable cache only mode as we could miss writes before bias level | ||
791 | * reaches standby and the core clock is enabled */ | ||
792 | regcache_cache_only(regmap, true); | ||
793 | |||
786 | return snd_soc_register_codec(dev, &adau1761_codec_driver, dai_drv, 1); | 794 | return snd_soc_register_codec(dev, &adau1761_codec_driver, dai_drv, 1); |
787 | } | 795 | } |
788 | EXPORT_SYMBOL_GPL(adau1761_probe); | 796 | EXPORT_SYMBOL_GPL(adau1761_probe); |
diff --git a/sound/soc/codecs/adau1781-i2c.c b/sound/soc/codecs/adau1781-i2c.c index 0e32bba92339..06cbca84cf02 100644 --- a/sound/soc/codecs/adau1781-i2c.c +++ b/sound/soc/codecs/adau1781-i2c.c | |||
@@ -42,9 +42,19 @@ static const struct i2c_device_id adau1781_i2c_ids[] = { | |||
42 | }; | 42 | }; |
43 | MODULE_DEVICE_TABLE(i2c, adau1781_i2c_ids); | 43 | MODULE_DEVICE_TABLE(i2c, adau1781_i2c_ids); |
44 | 44 | ||
45 | #if defined(CONFIG_OF) | ||
46 | static const struct of_device_id adau1781_i2c_dt_ids[] = { | ||
47 | { .compatible = "adi,adau1381", }, | ||
48 | { .compatible = "adi,adau1781", }, | ||
49 | { }, | ||
50 | }; | ||
51 | MODULE_DEVICE_TABLE(of, adau1781_i2c_dt_ids); | ||
52 | #endif | ||
53 | |||
45 | static struct i2c_driver adau1781_i2c_driver = { | 54 | static struct i2c_driver adau1781_i2c_driver = { |
46 | .driver = { | 55 | .driver = { |
47 | .name = "adau1781", | 56 | .name = "adau1781", |
57 | .of_match_table = of_match_ptr(adau1781_i2c_dt_ids), | ||
48 | }, | 58 | }, |
49 | .probe = adau1781_i2c_probe, | 59 | .probe = adau1781_i2c_probe, |
50 | .remove = adau1781_i2c_remove, | 60 | .remove = adau1781_i2c_remove, |
diff --git a/sound/soc/codecs/adau1781-spi.c b/sound/soc/codecs/adau1781-spi.c index 33a73ff78de4..3d965a01b99c 100644 --- a/sound/soc/codecs/adau1781-spi.c +++ b/sound/soc/codecs/adau1781-spi.c | |||
@@ -59,9 +59,19 @@ static const struct spi_device_id adau1781_spi_id[] = { | |||
59 | }; | 59 | }; |
60 | MODULE_DEVICE_TABLE(spi, adau1781_spi_id); | 60 | MODULE_DEVICE_TABLE(spi, adau1781_spi_id); |
61 | 61 | ||
62 | #if defined(CONFIG_OF) | ||
63 | static const struct of_device_id adau1781_spi_dt_ids[] = { | ||
64 | { .compatible = "adi,adau1381", }, | ||
65 | { .compatible = "adi,adau1781", }, | ||
66 | { }, | ||
67 | }; | ||
68 | MODULE_DEVICE_TABLE(of, adau1781_spi_dt_ids); | ||
69 | #endif | ||
70 | |||
62 | static struct spi_driver adau1781_spi_driver = { | 71 | static struct spi_driver adau1781_spi_driver = { |
63 | .driver = { | 72 | .driver = { |
64 | .name = "adau1781", | 73 | .name = "adau1781", |
74 | .of_match_table = of_match_ptr(adau1781_spi_dt_ids), | ||
65 | }, | 75 | }, |
66 | .probe = adau1781_spi_probe, | 76 | .probe = adau1781_spi_probe, |
67 | .remove = adau1781_spi_remove, | 77 | .remove = adau1781_spi_remove, |
diff --git a/sound/soc/codecs/adau1781.c b/sound/soc/codecs/adau1781.c index fde9068550a6..bc1bb56dae63 100644 --- a/sound/soc/codecs/adau1781.c +++ b/sound/soc/codecs/adau1781.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for ADAU1781/ADAU1781 codec | 2 | * Driver for ADAU1381/ADAU1781 codec |
3 | * | 3 | * |
4 | * Copyright 2011-2013 Analog Devices Inc. | 4 | * Copyright 2011-2013 Analog Devices Inc. |
5 | * Author: Lars-Peter Clausen <lars@metafoo.de> | 5 | * Author: Lars-Peter Clausen <lars@metafoo.de> |
diff --git a/sound/soc/codecs/ads117x.c b/sound/soc/codecs/ads117x.c index 1222282e93c3..c5be1bdc2c9a 100644 --- a/sound/soc/codecs/ads117x.c +++ b/sound/soc/codecs/ads117x.c | |||
@@ -20,6 +20,8 @@ | |||
20 | #include <sound/initval.h> | 20 | #include <sound/initval.h> |
21 | #include <sound/soc.h> | 21 | #include <sound/soc.h> |
22 | 22 | ||
23 | #include <linux/of.h> | ||
24 | |||
23 | #define ADS117X_RATES (SNDRV_PCM_RATE_8000_48000) | 25 | #define ADS117X_RATES (SNDRV_PCM_RATE_8000_48000) |
24 | #define ADS117X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) | 26 | #define ADS117X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) |
25 | 27 | ||
@@ -75,9 +77,19 @@ static int ads117x_remove(struct platform_device *pdev) | |||
75 | return 0; | 77 | return 0; |
76 | } | 78 | } |
77 | 79 | ||
80 | #if defined(CONFIG_OF) | ||
81 | static const struct of_device_id ads117x_dt_ids[] = { | ||
82 | { .compatible = "ti,ads1174" }, | ||
83 | { .compatible = "ti,ads1178" }, | ||
84 | { }, | ||
85 | }; | ||
86 | MODULE_DEVICE_TABLE(of, ads117x_dt_ids); | ||
87 | #endif | ||
88 | |||
78 | static struct platform_driver ads117x_codec_driver = { | 89 | static struct platform_driver ads117x_codec_driver = { |
79 | .driver = { | 90 | .driver = { |
80 | .name = "ads117x-codec", | 91 | .name = "ads117x-codec", |
92 | .of_match_table = of_match_ptr(ads117x_dt_ids), | ||
81 | }, | 93 | }, |
82 | 94 | ||
83 | .probe = ads117x_probe, | 95 | .probe = ads117x_probe, |
diff --git a/sound/soc/codecs/arizona.c b/sound/soc/codecs/arizona.c index 91785318b283..92d22a018d68 100644 --- a/sound/soc/codecs/arizona.c +++ b/sound/soc/codecs/arizona.c | |||
@@ -1398,29 +1398,6 @@ static const int arizona_48k_bclk_rates[] = { | |||
1398 | 24576000, | 1398 | 24576000, |
1399 | }; | 1399 | }; |
1400 | 1400 | ||
1401 | static const unsigned int arizona_48k_rates[] = { | ||
1402 | 12000, | ||
1403 | 24000, | ||
1404 | 48000, | ||
1405 | 96000, | ||
1406 | 192000, | ||
1407 | 384000, | ||
1408 | 768000, | ||
1409 | 4000, | ||
1410 | 8000, | ||
1411 | 16000, | ||
1412 | 32000, | ||
1413 | 64000, | ||
1414 | 128000, | ||
1415 | 256000, | ||
1416 | 512000, | ||
1417 | }; | ||
1418 | |||
1419 | static const struct snd_pcm_hw_constraint_list arizona_48k_constraint = { | ||
1420 | .count = ARRAY_SIZE(arizona_48k_rates), | ||
1421 | .list = arizona_48k_rates, | ||
1422 | }; | ||
1423 | |||
1424 | static const int arizona_44k1_bclk_rates[] = { | 1401 | static const int arizona_44k1_bclk_rates[] = { |
1425 | -1, | 1402 | -1, |
1426 | 44100, | 1403 | 44100, |
@@ -1443,22 +1420,7 @@ static const int arizona_44k1_bclk_rates[] = { | |||
1443 | 22579200, | 1420 | 22579200, |
1444 | }; | 1421 | }; |
1445 | 1422 | ||
1446 | static const unsigned int arizona_44k1_rates[] = { | 1423 | static const unsigned int arizona_sr_vals[] = { |
1447 | 11025, | ||
1448 | 22050, | ||
1449 | 44100, | ||
1450 | 88200, | ||
1451 | 176400, | ||
1452 | 352800, | ||
1453 | 705600, | ||
1454 | }; | ||
1455 | |||
1456 | static const struct snd_pcm_hw_constraint_list arizona_44k1_constraint = { | ||
1457 | .count = ARRAY_SIZE(arizona_44k1_rates), | ||
1458 | .list = arizona_44k1_rates, | ||
1459 | }; | ||
1460 | |||
1461 | static int arizona_sr_vals[] = { | ||
1462 | 0, | 1424 | 0, |
1463 | 12000, | 1425 | 12000, |
1464 | 24000, | 1426 | 24000, |
@@ -1485,13 +1447,21 @@ static int arizona_sr_vals[] = { | |||
1485 | 512000, | 1447 | 512000, |
1486 | }; | 1448 | }; |
1487 | 1449 | ||
1450 | #define ARIZONA_48K_RATE_MASK 0x0F003E | ||
1451 | #define ARIZONA_44K1_RATE_MASK 0x003E00 | ||
1452 | #define ARIZONA_RATE_MASK (ARIZONA_48K_RATE_MASK | ARIZONA_44K1_RATE_MASK) | ||
1453 | |||
1454 | static const struct snd_pcm_hw_constraint_list arizona_constraint = { | ||
1455 | .count = ARRAY_SIZE(arizona_sr_vals), | ||
1456 | .list = arizona_sr_vals, | ||
1457 | }; | ||
1458 | |||
1488 | static int arizona_startup(struct snd_pcm_substream *substream, | 1459 | static int arizona_startup(struct snd_pcm_substream *substream, |
1489 | struct snd_soc_dai *dai) | 1460 | struct snd_soc_dai *dai) |
1490 | { | 1461 | { |
1491 | struct snd_soc_codec *codec = dai->codec; | 1462 | struct snd_soc_codec *codec = dai->codec; |
1492 | struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); | 1463 | struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec); |
1493 | struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; | 1464 | struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1]; |
1494 | const struct snd_pcm_hw_constraint_list *constraint; | ||
1495 | unsigned int base_rate; | 1465 | unsigned int base_rate; |
1496 | 1466 | ||
1497 | if (!substream->runtime) | 1467 | if (!substream->runtime) |
@@ -1509,16 +1479,15 @@ static int arizona_startup(struct snd_pcm_substream *substream, | |||
1509 | } | 1479 | } |
1510 | 1480 | ||
1511 | if (base_rate == 0) | 1481 | if (base_rate == 0) |
1512 | return 0; | 1482 | dai_priv->constraint.mask = ARIZONA_RATE_MASK; |
1513 | 1483 | else if (base_rate % 8000) | |
1514 | if (base_rate % 8000) | 1484 | dai_priv->constraint.mask = ARIZONA_44K1_RATE_MASK; |
1515 | constraint = &arizona_44k1_constraint; | ||
1516 | else | 1485 | else |
1517 | constraint = &arizona_48k_constraint; | 1486 | dai_priv->constraint.mask = ARIZONA_48K_RATE_MASK; |
1518 | 1487 | ||
1519 | return snd_pcm_hw_constraint_list(substream->runtime, 0, | 1488 | return snd_pcm_hw_constraint_list(substream->runtime, 0, |
1520 | SNDRV_PCM_HW_PARAM_RATE, | 1489 | SNDRV_PCM_HW_PARAM_RATE, |
1521 | constraint); | 1490 | &dai_priv->constraint); |
1522 | } | 1491 | } |
1523 | 1492 | ||
1524 | static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec, | 1493 | static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec, |
@@ -1911,6 +1880,7 @@ int arizona_init_dai(struct arizona_priv *priv, int id) | |||
1911 | struct arizona_dai_priv *dai_priv = &priv->dai[id]; | 1880 | struct arizona_dai_priv *dai_priv = &priv->dai[id]; |
1912 | 1881 | ||
1913 | dai_priv->clk = ARIZONA_CLK_SYSCLK; | 1882 | dai_priv->clk = ARIZONA_CLK_SYSCLK; |
1883 | dai_priv->constraint = arizona_constraint; | ||
1914 | 1884 | ||
1915 | return 0; | 1885 | return 0; |
1916 | } | 1886 | } |
@@ -2179,11 +2149,12 @@ static int arizona_calc_fll(struct arizona_fll *fll, | |||
2179 | return -EINVAL; | 2149 | return -EINVAL; |
2180 | } | 2150 | } |
2181 | 2151 | ||
2182 | arizona_fll_dbg(fll, "N=%x THETA=%x LAMBDA=%x\n", | 2152 | arizona_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n", |
2183 | cfg->n, cfg->theta, cfg->lambda); | 2153 | cfg->n, cfg->theta, cfg->lambda); |
2184 | arizona_fll_dbg(fll, "FRATIO=%x(%d) OUTDIV=%x REFCLK_DIV=%x\n", | 2154 | arizona_fll_dbg(fll, "FRATIO=0x%x(%d) OUTDIV=%d REFCLK_DIV=0x%x(%d)\n", |
2185 | cfg->fratio, cfg->fratio, cfg->outdiv, cfg->refdiv); | 2155 | cfg->fratio, ratio, cfg->outdiv, |
2186 | arizona_fll_dbg(fll, "GAIN=%d\n", cfg->gain); | 2156 | cfg->refdiv, 1 << cfg->refdiv); |
2157 | arizona_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain); | ||
2187 | 2158 | ||
2188 | return 0; | 2159 | return 0; |
2189 | 2160 | ||
diff --git a/sound/soc/codecs/arizona.h b/sound/soc/codecs/arizona.h index 8b6adb5419bb..1ea8e4ecf8d4 100644 --- a/sound/soc/codecs/arizona.h +++ b/sound/soc/codecs/arizona.h | |||
@@ -57,7 +57,7 @@ | |||
57 | #define ARIZONA_CLK_98MHZ 5 | 57 | #define ARIZONA_CLK_98MHZ 5 |
58 | #define ARIZONA_CLK_147MHZ 6 | 58 | #define ARIZONA_CLK_147MHZ 6 |
59 | 59 | ||
60 | #define ARIZONA_MAX_DAI 8 | 60 | #define ARIZONA_MAX_DAI 10 |
61 | #define ARIZONA_MAX_ADSP 4 | 61 | #define ARIZONA_MAX_ADSP 4 |
62 | 62 | ||
63 | #define ARIZONA_DVFS_SR1_RQ 0x001 | 63 | #define ARIZONA_DVFS_SR1_RQ 0x001 |
@@ -68,6 +68,8 @@ struct wm_adsp; | |||
68 | 68 | ||
69 | struct arizona_dai_priv { | 69 | struct arizona_dai_priv { |
70 | int clk; | 70 | int clk; |
71 | |||
72 | struct snd_pcm_hw_constraint_list constraint; | ||
71 | }; | 73 | }; |
72 | 74 | ||
73 | struct arizona_priv { | 75 | struct arizona_priv { |
diff --git a/sound/soc/codecs/cs42xx8.c b/sound/soc/codecs/cs42xx8.c index d562e1b9a5d1..1179101b2b05 100644 --- a/sound/soc/codecs/cs42xx8.c +++ b/sound/soc/codecs/cs42xx8.c | |||
@@ -44,6 +44,7 @@ struct cs42xx8_priv { | |||
44 | 44 | ||
45 | bool slave_mode; | 45 | bool slave_mode; |
46 | unsigned long sysclk; | 46 | unsigned long sysclk; |
47 | u32 tx_channels; | ||
47 | }; | 48 | }; |
48 | 49 | ||
49 | /* -127.5dB to 0dB with step of 0.5dB */ | 50 | /* -127.5dB to 0dB with step of 0.5dB */ |
@@ -257,6 +258,9 @@ static int cs42xx8_hw_params(struct snd_pcm_substream *substream, | |||
257 | u32 ratio = cs42xx8->sysclk / params_rate(params); | 258 | u32 ratio = cs42xx8->sysclk / params_rate(params); |
258 | u32 i, fm, val, mask; | 259 | u32 i, fm, val, mask; |
259 | 260 | ||
261 | if (tx) | ||
262 | cs42xx8->tx_channels = params_channels(params); | ||
263 | |||
260 | for (i = 0; i < ARRAY_SIZE(cs42xx8_ratios); i++) { | 264 | for (i = 0; i < ARRAY_SIZE(cs42xx8_ratios); i++) { |
261 | if (cs42xx8_ratios[i].ratio == ratio) | 265 | if (cs42xx8_ratios[i].ratio == ratio) |
262 | break; | 266 | break; |
@@ -283,9 +287,11 @@ static int cs42xx8_digital_mute(struct snd_soc_dai *dai, int mute) | |||
283 | { | 287 | { |
284 | struct snd_soc_codec *codec = dai->codec; | 288 | struct snd_soc_codec *codec = dai->codec; |
285 | struct cs42xx8_priv *cs42xx8 = snd_soc_codec_get_drvdata(codec); | 289 | struct cs42xx8_priv *cs42xx8 = snd_soc_codec_get_drvdata(codec); |
290 | u8 dac_unmute = cs42xx8->tx_channels ? | ||
291 | ~((0x1 << cs42xx8->tx_channels) - 1) : 0; | ||
286 | 292 | ||
287 | regmap_update_bits(cs42xx8->regmap, CS42XX8_DACMUTE, | 293 | regmap_write(cs42xx8->regmap, CS42XX8_DACMUTE, |
288 | CS42XX8_DACMUTE_ALL, mute ? CS42XX8_DACMUTE_ALL : 0); | 294 | mute ? CS42XX8_DACMUTE_ALL : dac_unmute); |
289 | 295 | ||
290 | return 0; | 296 | return 0; |
291 | } | 297 | } |
diff --git a/sound/soc/codecs/cs47l24.c b/sound/soc/codecs/cs47l24.c index dc5ae7f7a1bd..576087bda330 100644 --- a/sound/soc/codecs/cs47l24.c +++ b/sound/soc/codecs/cs47l24.c | |||
@@ -57,6 +57,25 @@ static const struct wm_adsp_region *cs47l24_dsp_regions[] = { | |||
57 | cs47l24_dsp3_regions, | 57 | cs47l24_dsp3_regions, |
58 | }; | 58 | }; |
59 | 59 | ||
60 | static int cs47l24_adsp_power_ev(struct snd_soc_dapm_widget *w, | ||
61 | struct snd_kcontrol *kcontrol, int event) | ||
62 | { | ||
63 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | ||
64 | struct arizona *arizona = dev_get_drvdata(codec->dev->parent); | ||
65 | unsigned int v; | ||
66 | int ret; | ||
67 | |||
68 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); | ||
69 | if (ret != 0) { | ||
70 | dev_err(codec->dev, "Failed to read SYSCLK state: %d\n", ret); | ||
71 | return ret; | ||
72 | } | ||
73 | |||
74 | v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; | ||
75 | |||
76 | return wm_adsp2_early_event(w, kcontrol, event, v); | ||
77 | } | ||
78 | |||
60 | static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); | 79 | static DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); |
61 | static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); | 80 | static DECLARE_TLV_DB_SCALE(digital_tlv, -6400, 50, 0); |
62 | static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); | 81 | static DECLARE_TLV_DB_SCALE(noise_tlv, -13200, 600, 0); |
@@ -405,8 +424,8 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, | |||
405 | SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, | 424 | SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, |
406 | NULL, 0), | 425 | NULL, 0), |
407 | 426 | ||
408 | WM_ADSP2("DSP2", 1), | 427 | WM_ADSP2("DSP2", 1, cs47l24_adsp_power_ev), |
409 | WM_ADSP2("DSP3", 2), | 428 | WM_ADSP2("DSP3", 2, cs47l24_adsp_power_ev), |
410 | 429 | ||
411 | SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, | 430 | SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, |
412 | ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), | 431 | ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), |
@@ -779,6 +798,9 @@ static const struct snd_soc_dapm_route cs47l24_dapm_routes[] = { | |||
779 | { "AIF2 Capture", NULL, "SYSCLK" }, | 798 | { "AIF2 Capture", NULL, "SYSCLK" }, |
780 | { "AIF3 Capture", NULL, "SYSCLK" }, | 799 | { "AIF3 Capture", NULL, "SYSCLK" }, |
781 | 800 | ||
801 | { "Voice Control DSP", NULL, "DSP3" }, | ||
802 | { "Voice Control DSP", NULL, "SYSCLK" }, | ||
803 | |||
782 | { "IN1L PGA", NULL, "IN1L" }, | 804 | { "IN1L PGA", NULL, "IN1L" }, |
783 | { "IN1R PGA", NULL, "IN1R" }, | 805 | { "IN1R PGA", NULL, "IN1R" }, |
784 | 806 | ||
@@ -901,7 +923,7 @@ static int cs47l24_set_fll(struct snd_soc_codec *codec, int fll_id, int source, | |||
901 | } | 923 | } |
902 | } | 924 | } |
903 | 925 | ||
904 | #define CS47L24_RATES SNDRV_PCM_RATE_8000_192000 | 926 | #define CS47L24_RATES SNDRV_PCM_RATE_KNOT |
905 | 927 | ||
906 | #define CS47L24_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | 928 | #define CS47L24_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
907 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | 929 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
@@ -973,12 +995,68 @@ static struct snd_soc_dai_driver cs47l24_dai[] = { | |||
973 | .symmetric_rates = 1, | 995 | .symmetric_rates = 1, |
974 | .symmetric_samplebits = 1, | 996 | .symmetric_samplebits = 1, |
975 | }, | 997 | }, |
998 | { | ||
999 | .name = "cs47l24-cpu-voicectrl", | ||
1000 | .capture = { | ||
1001 | .stream_name = "Voice Control CPU", | ||
1002 | .channels_min = 1, | ||
1003 | .channels_max = 1, | ||
1004 | .rates = CS47L24_RATES, | ||
1005 | .formats = CS47L24_FORMATS, | ||
1006 | }, | ||
1007 | .compress_new = snd_soc_new_compress, | ||
1008 | }, | ||
1009 | { | ||
1010 | .name = "cs47l24-dsp-voicectrl", | ||
1011 | .capture = { | ||
1012 | .stream_name = "Voice Control DSP", | ||
1013 | .channels_min = 1, | ||
1014 | .channels_max = 1, | ||
1015 | .rates = CS47L24_RATES, | ||
1016 | .formats = CS47L24_FORMATS, | ||
1017 | }, | ||
1018 | }, | ||
976 | }; | 1019 | }; |
977 | 1020 | ||
1021 | static int cs47l24_open(struct snd_compr_stream *stream) | ||
1022 | { | ||
1023 | struct snd_soc_pcm_runtime *rtd = stream->private_data; | ||
1024 | struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(rtd->codec); | ||
1025 | struct arizona *arizona = priv->core.arizona; | ||
1026 | int n_adsp; | ||
1027 | |||
1028 | if (strcmp(rtd->codec_dai->name, "cs47l24-dsp-voicectrl") == 0) { | ||
1029 | n_adsp = 2; | ||
1030 | } else { | ||
1031 | dev_err(arizona->dev, | ||
1032 | "No suitable compressed stream for DAI '%s'\n", | ||
1033 | rtd->codec_dai->name); | ||
1034 | return -EINVAL; | ||
1035 | } | ||
1036 | |||
1037 | return wm_adsp_compr_open(&priv->core.adsp[n_adsp], stream); | ||
1038 | } | ||
1039 | |||
1040 | static irqreturn_t cs47l24_adsp2_irq(int irq, void *data) | ||
1041 | { | ||
1042 | struct cs47l24_priv *priv = data; | ||
1043 | struct arizona *arizona = priv->core.arizona; | ||
1044 | int ret; | ||
1045 | |||
1046 | ret = wm_adsp_compr_handle_irq(&priv->core.adsp[2]); | ||
1047 | if (ret == -ENODEV) { | ||
1048 | dev_err(arizona->dev, "Spurious compressed data IRQ\n"); | ||
1049 | return IRQ_NONE; | ||
1050 | } | ||
1051 | |||
1052 | return IRQ_HANDLED; | ||
1053 | } | ||
1054 | |||
978 | static int cs47l24_codec_probe(struct snd_soc_codec *codec) | 1055 | static int cs47l24_codec_probe(struct snd_soc_codec *codec) |
979 | { | 1056 | { |
980 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); | 1057 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
981 | struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); | 1058 | struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); |
1059 | struct arizona *arizona = priv->core.arizona; | ||
982 | int ret; | 1060 | int ret; |
983 | 1061 | ||
984 | priv->core.arizona->dapm = dapm; | 1062 | priv->core.arizona->dapm = dapm; |
@@ -987,6 +1065,14 @@ static int cs47l24_codec_probe(struct snd_soc_codec *codec) | |||
987 | arizona_init_gpio(codec); | 1065 | arizona_init_gpio(codec); |
988 | arizona_init_mono(codec); | 1066 | arizona_init_mono(codec); |
989 | 1067 | ||
1068 | ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, | ||
1069 | "ADSP2 Compressed IRQ", cs47l24_adsp2_irq, | ||
1070 | priv); | ||
1071 | if (ret != 0) { | ||
1072 | dev_err(codec->dev, "Failed to request DSP IRQ: %d\n", ret); | ||
1073 | return ret; | ||
1074 | } | ||
1075 | |||
990 | ret = wm_adsp2_codec_probe(&priv->core.adsp[1], codec); | 1076 | ret = wm_adsp2_codec_probe(&priv->core.adsp[1], codec); |
991 | if (ret) | 1077 | if (ret) |
992 | goto err_adsp2_codec_probe; | 1078 | goto err_adsp2_codec_probe; |
@@ -1014,13 +1100,14 @@ err_adsp2_codec_probe: | |||
1014 | static int cs47l24_codec_remove(struct snd_soc_codec *codec) | 1100 | static int cs47l24_codec_remove(struct snd_soc_codec *codec) |
1015 | { | 1101 | { |
1016 | struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); | 1102 | struct cs47l24_priv *priv = snd_soc_codec_get_drvdata(codec); |
1017 | 1103 | struct arizona *arizona = priv->core.arizona; | |
1018 | 1104 | ||
1019 | wm_adsp2_codec_remove(&priv->core.adsp[1], codec); | 1105 | wm_adsp2_codec_remove(&priv->core.adsp[1], codec); |
1020 | wm_adsp2_codec_remove(&priv->core.adsp[2], codec); | 1106 | wm_adsp2_codec_remove(&priv->core.adsp[2], codec); |
1021 | 1107 | ||
1022 | priv->core.arizona->dapm = NULL; | 1108 | priv->core.arizona->dapm = NULL; |
1023 | 1109 | ||
1110 | arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv); | ||
1024 | return 0; | 1111 | return 0; |
1025 | } | 1112 | } |
1026 | 1113 | ||
@@ -1057,6 +1144,19 @@ static struct snd_soc_codec_driver soc_codec_dev_cs47l24 = { | |||
1057 | .num_dapm_routes = ARRAY_SIZE(cs47l24_dapm_routes), | 1144 | .num_dapm_routes = ARRAY_SIZE(cs47l24_dapm_routes), |
1058 | }; | 1145 | }; |
1059 | 1146 | ||
1147 | static struct snd_compr_ops cs47l24_compr_ops = { | ||
1148 | .open = cs47l24_open, | ||
1149 | .free = wm_adsp_compr_free, | ||
1150 | .set_params = wm_adsp_compr_set_params, | ||
1151 | .get_caps = wm_adsp_compr_get_caps, | ||
1152 | .trigger = wm_adsp_compr_trigger, | ||
1153 | .pointer = wm_adsp_compr_pointer, | ||
1154 | .copy = wm_adsp_compr_copy, | ||
1155 | }; | ||
1156 | |||
1157 | static struct snd_soc_platform_driver cs47l24_compr_platform = { | ||
1158 | .compr_ops = &cs47l24_compr_ops, | ||
1159 | }; | ||
1060 | static int cs47l24_probe(struct platform_device *pdev) | 1160 | static int cs47l24_probe(struct platform_device *pdev) |
1061 | { | 1161 | { |
1062 | struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); | 1162 | struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); |
@@ -1120,12 +1220,25 @@ static int cs47l24_probe(struct platform_device *pdev) | |||
1120 | pm_runtime_enable(&pdev->dev); | 1220 | pm_runtime_enable(&pdev->dev); |
1121 | pm_runtime_idle(&pdev->dev); | 1221 | pm_runtime_idle(&pdev->dev); |
1122 | 1222 | ||
1123 | return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l24, | 1223 | ret = snd_soc_register_platform(&pdev->dev, &cs47l24_compr_platform); |
1224 | if (ret < 0) { | ||
1225 | dev_err(&pdev->dev, "Failed to register platform: %d\n", ret); | ||
1226 | return ret; | ||
1227 | } | ||
1228 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l24, | ||
1124 | cs47l24_dai, ARRAY_SIZE(cs47l24_dai)); | 1229 | cs47l24_dai, ARRAY_SIZE(cs47l24_dai)); |
1230 | |||
1231 | if (ret < 0) { | ||
1232 | dev_err(&pdev->dev, "Failed to register codec: %d\n", ret); | ||
1233 | snd_soc_unregister_platform(&pdev->dev); | ||
1234 | } | ||
1235 | |||
1236 | return ret; | ||
1125 | } | 1237 | } |
1126 | 1238 | ||
1127 | static int cs47l24_remove(struct platform_device *pdev) | 1239 | static int cs47l24_remove(struct platform_device *pdev) |
1128 | { | 1240 | { |
1241 | snd_soc_unregister_platform(&pdev->dev); | ||
1129 | snd_soc_unregister_codec(&pdev->dev); | 1242 | snd_soc_unregister_codec(&pdev->dev); |
1130 | pm_runtime_disable(&pdev->dev); | 1243 | pm_runtime_disable(&pdev->dev); |
1131 | 1244 | ||
diff --git a/sound/soc/codecs/hdac_hdmi.c b/sound/soc/codecs/hdac_hdmi.c index 5a1ec0f7a1a6..26f9459cb3bc 100644 --- a/sound/soc/codecs/hdac_hdmi.c +++ b/sound/soc/codecs/hdac_hdmi.c | |||
@@ -22,11 +22,17 @@ | |||
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/pm_runtime.h> | 23 | #include <linux/pm_runtime.h> |
24 | #include <linux/hdmi.h> | 24 | #include <linux/hdmi.h> |
25 | #include <drm/drm_edid.h> | ||
25 | #include <sound/pcm_params.h> | 26 | #include <sound/pcm_params.h> |
27 | #include <sound/jack.h> | ||
26 | #include <sound/soc.h> | 28 | #include <sound/soc.h> |
27 | #include <sound/hdaudio_ext.h> | 29 | #include <sound/hdaudio_ext.h> |
28 | #include <sound/hda_i915.h> | 30 | #include <sound/hda_i915.h> |
31 | #include <sound/pcm_drm_eld.h> | ||
29 | #include "../../hda/local.h" | 32 | #include "../../hda/local.h" |
33 | #include "hdac_hdmi.h" | ||
34 | |||
35 | #define NAME_SIZE 32 | ||
30 | 36 | ||
31 | #define AMP_OUT_MUTE 0xb080 | 37 | #define AMP_OUT_MUTE 0xb080 |
32 | #define AMP_OUT_UNMUTE 0xb000 | 38 | #define AMP_OUT_UNMUTE 0xb000 |
@@ -34,6 +40,11 @@ | |||
34 | 40 | ||
35 | #define HDA_MAX_CONNECTIONS 32 | 41 | #define HDA_MAX_CONNECTIONS 32 |
36 | 42 | ||
43 | #define HDA_MAX_CVTS 3 | ||
44 | |||
45 | #define ELD_MAX_SIZE 256 | ||
46 | #define ELD_FIXED_BYTES 20 | ||
47 | |||
37 | struct hdac_hdmi_cvt_params { | 48 | struct hdac_hdmi_cvt_params { |
38 | unsigned int channels_min; | 49 | unsigned int channels_min; |
39 | unsigned int channels_max; | 50 | unsigned int channels_max; |
@@ -45,14 +56,34 @@ struct hdac_hdmi_cvt_params { | |||
45 | struct hdac_hdmi_cvt { | 56 | struct hdac_hdmi_cvt { |
46 | struct list_head head; | 57 | struct list_head head; |
47 | hda_nid_t nid; | 58 | hda_nid_t nid; |
59 | const char *name; | ||
48 | struct hdac_hdmi_cvt_params params; | 60 | struct hdac_hdmi_cvt_params params; |
49 | }; | 61 | }; |
50 | 62 | ||
63 | struct hdac_hdmi_eld { | ||
64 | bool monitor_present; | ||
65 | bool eld_valid; | ||
66 | int eld_size; | ||
67 | char eld_buffer[ELD_MAX_SIZE]; | ||
68 | }; | ||
69 | |||
51 | struct hdac_hdmi_pin { | 70 | struct hdac_hdmi_pin { |
52 | struct list_head head; | 71 | struct list_head head; |
53 | hda_nid_t nid; | 72 | hda_nid_t nid; |
54 | int num_mux_nids; | 73 | int num_mux_nids; |
55 | hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; | 74 | hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; |
75 | struct hdac_hdmi_eld eld; | ||
76 | struct hdac_ext_device *edev; | ||
77 | int repoll_count; | ||
78 | struct delayed_work work; | ||
79 | }; | ||
80 | |||
81 | struct hdac_hdmi_pcm { | ||
82 | struct list_head head; | ||
83 | int pcm_id; | ||
84 | struct hdac_hdmi_pin *pin; | ||
85 | struct hdac_hdmi_cvt *cvt; | ||
86 | struct snd_jack *jack; | ||
56 | }; | 87 | }; |
57 | 88 | ||
58 | struct hdac_hdmi_dai_pin_map { | 89 | struct hdac_hdmi_dai_pin_map { |
@@ -62,11 +93,13 @@ struct hdac_hdmi_dai_pin_map { | |||
62 | }; | 93 | }; |
63 | 94 | ||
64 | struct hdac_hdmi_priv { | 95 | struct hdac_hdmi_priv { |
65 | struct hdac_hdmi_dai_pin_map dai_map[3]; | 96 | struct hdac_hdmi_dai_pin_map dai_map[HDA_MAX_CVTS]; |
66 | struct list_head pin_list; | 97 | struct list_head pin_list; |
67 | struct list_head cvt_list; | 98 | struct list_head cvt_list; |
99 | struct list_head pcm_list; | ||
68 | int num_pin; | 100 | int num_pin; |
69 | int num_cvt; | 101 | int num_cvt; |
102 | struct mutex pin_mutex; | ||
70 | }; | 103 | }; |
71 | 104 | ||
72 | static inline struct hdac_ext_device *to_hda_ext_device(struct device *dev) | 105 | static inline struct hdac_ext_device *to_hda_ext_device(struct device *dev) |
@@ -76,6 +109,119 @@ static inline struct hdac_ext_device *to_hda_ext_device(struct device *dev) | |||
76 | return to_ehdac_device(hdac); | 109 | return to_ehdac_device(hdac); |
77 | } | 110 | } |
78 | 111 | ||
112 | static unsigned int sad_format(const u8 *sad) | ||
113 | { | ||
114 | return ((sad[0] >> 0x3) & 0x1f); | ||
115 | } | ||
116 | |||
117 | static unsigned int sad_sample_bits_lpcm(const u8 *sad) | ||
118 | { | ||
119 | return (sad[2] & 7); | ||
120 | } | ||
121 | |||
122 | static int hdac_hdmi_eld_limit_formats(struct snd_pcm_runtime *runtime, | ||
123 | void *eld) | ||
124 | { | ||
125 | u64 formats = SNDRV_PCM_FMTBIT_S16; | ||
126 | int i; | ||
127 | const u8 *sad, *eld_buf = eld; | ||
128 | |||
129 | sad = drm_eld_sad(eld_buf); | ||
130 | if (!sad) | ||
131 | goto format_constraint; | ||
132 | |||
133 | for (i = drm_eld_sad_count(eld_buf); i > 0; i--, sad += 3) { | ||
134 | if (sad_format(sad) == 1) { /* AUDIO_CODING_TYPE_LPCM */ | ||
135 | |||
136 | /* | ||
137 | * the controller support 20 and 24 bits in 32 bit | ||
138 | * container so we set S32 | ||
139 | */ | ||
140 | if (sad_sample_bits_lpcm(sad) & 0x6) | ||
141 | formats |= SNDRV_PCM_FMTBIT_S32; | ||
142 | } | ||
143 | } | ||
144 | |||
145 | format_constraint: | ||
146 | return snd_pcm_hw_constraint_mask64(runtime, SNDRV_PCM_HW_PARAM_FORMAT, | ||
147 | formats); | ||
148 | |||
149 | } | ||
150 | |||
151 | /* HDMI ELD routines */ | ||
152 | static unsigned int hdac_hdmi_get_eld_data(struct hdac_device *codec, | ||
153 | hda_nid_t nid, int byte_index) | ||
154 | { | ||
155 | unsigned int val; | ||
156 | |||
157 | val = snd_hdac_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_ELDD, | ||
158 | byte_index); | ||
159 | |||
160 | dev_dbg(&codec->dev, "HDMI: ELD data byte %d: 0x%x\n", | ||
161 | byte_index, val); | ||
162 | |||
163 | return val; | ||
164 | } | ||
165 | |||
166 | static int hdac_hdmi_get_eld_size(struct hdac_device *codec, hda_nid_t nid) | ||
167 | { | ||
168 | return snd_hdac_codec_read(codec, nid, 0, AC_VERB_GET_HDMI_DIP_SIZE, | ||
169 | AC_DIPSIZE_ELD_BUF); | ||
170 | } | ||
171 | |||
172 | /* | ||
173 | * This function queries the ELD size and ELD data and fills in the buffer | ||
174 | * passed by user | ||
175 | */ | ||
176 | static int hdac_hdmi_get_eld(struct hdac_device *codec, hda_nid_t nid, | ||
177 | unsigned char *buf, int *eld_size) | ||
178 | { | ||
179 | int i, size, ret = 0; | ||
180 | |||
181 | /* | ||
182 | * ELD size is initialized to zero in caller function. If no errors and | ||
183 | * ELD is valid, actual eld_size is assigned. | ||
184 | */ | ||
185 | |||
186 | size = hdac_hdmi_get_eld_size(codec, nid); | ||
187 | if (size < ELD_FIXED_BYTES || size > ELD_MAX_SIZE) { | ||
188 | dev_err(&codec->dev, "HDMI: invalid ELD buf size %d\n", size); | ||
189 | return -ERANGE; | ||
190 | } | ||
191 | |||
192 | /* set ELD buffer */ | ||
193 | for (i = 0; i < size; i++) { | ||
194 | unsigned int val = hdac_hdmi_get_eld_data(codec, nid, i); | ||
195 | /* | ||
196 | * Graphics driver might be writing to ELD buffer right now. | ||
197 | * Just abort. The caller will repoll after a while. | ||
198 | */ | ||
199 | if (!(val & AC_ELDD_ELD_VALID)) { | ||
200 | dev_err(&codec->dev, | ||
201 | "HDMI: invalid ELD data byte %d\n", i); | ||
202 | ret = -EINVAL; | ||
203 | goto error; | ||
204 | } | ||
205 | val &= AC_ELDD_ELD_DATA; | ||
206 | /* | ||
207 | * The first byte cannot be zero. This can happen on some DVI | ||
208 | * connections. Some Intel chips may also need some 250ms delay | ||
209 | * to return non-zero ELD data, even when the graphics driver | ||
210 | * correctly writes ELD content before setting ELD_valid bit. | ||
211 | */ | ||
212 | if (!val && !i) { | ||
213 | dev_err(&codec->dev, "HDMI: 0 ELD data\n"); | ||
214 | ret = -EINVAL; | ||
215 | goto error; | ||
216 | } | ||
217 | buf[i] = val; | ||
218 | } | ||
219 | |||
220 | *eld_size = size; | ||
221 | error: | ||
222 | return ret; | ||
223 | } | ||
224 | |||
79 | static int hdac_hdmi_setup_stream(struct hdac_ext_device *hdac, | 225 | static int hdac_hdmi_setup_stream(struct hdac_ext_device *hdac, |
80 | hda_nid_t cvt_nid, hda_nid_t pin_nid, | 226 | hda_nid_t cvt_nid, hda_nid_t pin_nid, |
81 | u32 stream_tag, int format) | 227 | u32 stream_tag, int format) |
@@ -107,27 +253,74 @@ hdac_hdmi_set_dip_index(struct hdac_ext_device *hdac, hda_nid_t pin_nid, | |||
107 | AC_VERB_SET_HDMI_DIP_INDEX, val); | 253 | AC_VERB_SET_HDMI_DIP_INDEX, val); |
108 | } | 254 | } |
109 | 255 | ||
256 | struct dp_audio_infoframe { | ||
257 | u8 type; /* 0x84 */ | ||
258 | u8 len; /* 0x1b */ | ||
259 | u8 ver; /* 0x11 << 2 */ | ||
260 | |||
261 | u8 CC02_CT47; /* match with HDMI infoframe from this on */ | ||
262 | u8 SS01_SF24; | ||
263 | u8 CXT04; | ||
264 | u8 CA; | ||
265 | u8 LFEPBL01_LSV36_DM_INH7; | ||
266 | }; | ||
267 | |||
110 | static int hdac_hdmi_setup_audio_infoframe(struct hdac_ext_device *hdac, | 268 | static int hdac_hdmi_setup_audio_infoframe(struct hdac_ext_device *hdac, |
111 | hda_nid_t cvt_nid, hda_nid_t pin_nid) | 269 | hda_nid_t cvt_nid, hda_nid_t pin_nid) |
112 | { | 270 | { |
113 | uint8_t buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE]; | 271 | uint8_t buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AUDIO_INFOFRAME_SIZE]; |
114 | struct hdmi_audio_infoframe frame; | 272 | struct hdmi_audio_infoframe frame; |
115 | u8 *dip = (u8 *)&frame; | 273 | struct dp_audio_infoframe dp_ai; |
274 | struct hdac_hdmi_priv *hdmi = hdac->private_data; | ||
275 | struct hdac_hdmi_pin *pin; | ||
276 | u8 *dip; | ||
116 | int ret; | 277 | int ret; |
117 | int i; | 278 | int i; |
279 | const u8 *eld_buf; | ||
280 | u8 conn_type; | ||
281 | int channels = 2; | ||
118 | 282 | ||
119 | hdmi_audio_infoframe_init(&frame); | 283 | list_for_each_entry(pin, &hdmi->pin_list, head) { |
284 | if (pin->nid == pin_nid) | ||
285 | break; | ||
286 | } | ||
120 | 287 | ||
121 | /* Default stereo for now */ | 288 | eld_buf = pin->eld.eld_buffer; |
122 | frame.channels = 2; | 289 | conn_type = drm_eld_get_conn_type(eld_buf); |
123 | 290 | ||
124 | /* setup channel count */ | 291 | /* setup channel count */ |
125 | snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0, | 292 | snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0, |
126 | AC_VERB_SET_CVT_CHAN_COUNT, frame.channels - 1); | 293 | AC_VERB_SET_CVT_CHAN_COUNT, channels - 1); |
127 | 294 | ||
128 | ret = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer)); | 295 | switch (conn_type) { |
129 | if (ret < 0) | 296 | case DRM_ELD_CONN_TYPE_HDMI: |
130 | return ret; | 297 | hdmi_audio_infoframe_init(&frame); |
298 | |||
299 | /* Default stereo for now */ | ||
300 | frame.channels = channels; | ||
301 | |||
302 | ret = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer)); | ||
303 | if (ret < 0) | ||
304 | return ret; | ||
305 | |||
306 | break; | ||
307 | |||
308 | case DRM_ELD_CONN_TYPE_DP: | ||
309 | memset(&dp_ai, 0, sizeof(dp_ai)); | ||
310 | dp_ai.type = 0x84; | ||
311 | dp_ai.len = 0x1b; | ||
312 | dp_ai.ver = 0x11 << 2; | ||
313 | dp_ai.CC02_CT47 = channels - 1; | ||
314 | dp_ai.CA = 0; | ||
315 | |||
316 | dip = (u8 *)&dp_ai; | ||
317 | break; | ||
318 | |||
319 | default: | ||
320 | dev_err(&hdac->hdac.dev, "Invalid connection type: %d\n", | ||
321 | conn_type); | ||
322 | return -EIO; | ||
323 | } | ||
131 | 324 | ||
132 | /* stop infoframe transmission */ | 325 | /* stop infoframe transmission */ |
133 | hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0); | 326 | hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0); |
@@ -137,9 +330,15 @@ static int hdac_hdmi_setup_audio_infoframe(struct hdac_ext_device *hdac, | |||
137 | 330 | ||
138 | /* Fill infoframe. Index auto-incremented */ | 331 | /* Fill infoframe. Index auto-incremented */ |
139 | hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0); | 332 | hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0); |
140 | for (i = 0; i < sizeof(frame); i++) | 333 | if (conn_type == DRM_ELD_CONN_TYPE_HDMI) { |
141 | snd_hdac_codec_write(&hdac->hdac, pin_nid, 0, | 334 | for (i = 0; i < sizeof(buffer); i++) |
335 | snd_hdac_codec_write(&hdac->hdac, pin_nid, 0, | ||
336 | AC_VERB_SET_HDMI_DIP_DATA, buffer[i]); | ||
337 | } else { | ||
338 | for (i = 0; i < sizeof(dp_ai); i++) | ||
339 | snd_hdac_codec_write(&hdac->hdac, pin_nid, 0, | ||
142 | AC_VERB_SET_HDMI_DIP_DATA, dip[i]); | 340 | AC_VERB_SET_HDMI_DIP_DATA, dip[i]); |
341 | } | ||
143 | 342 | ||
144 | /* Start infoframe */ | 343 | /* Start infoframe */ |
145 | hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0); | 344 | hdac_hdmi_set_dip_index(hdac, pin_nid, 0x0, 0x0); |
@@ -174,11 +373,6 @@ static int hdac_hdmi_playback_prepare(struct snd_pcm_substream *substream, | |||
174 | struct hdac_ext_dma_params *dd; | 373 | struct hdac_ext_dma_params *dd; |
175 | int ret; | 374 | int ret; |
176 | 375 | ||
177 | if (dai->id > 0) { | ||
178 | dev_err(&hdac->hdac.dev, "Only one dai supported as of now\n"); | ||
179 | return -ENODEV; | ||
180 | } | ||
181 | |||
182 | dai_map = &hdmi->dai_map[dai->id]; | 376 | dai_map = &hdmi->dai_map[dai->id]; |
183 | 377 | ||
184 | dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream); | 378 | dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream); |
@@ -198,16 +392,30 @@ static int hdac_hdmi_set_hw_params(struct snd_pcm_substream *substream, | |||
198 | struct snd_pcm_hw_params *hparams, struct snd_soc_dai *dai) | 392 | struct snd_pcm_hw_params *hparams, struct snd_soc_dai *dai) |
199 | { | 393 | { |
200 | struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai); | 394 | struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai); |
395 | struct hdac_hdmi_priv *hdmi = hdac->private_data; | ||
396 | struct hdac_hdmi_dai_pin_map *dai_map; | ||
397 | struct hdac_hdmi_pin *pin; | ||
201 | struct hdac_ext_dma_params *dd; | 398 | struct hdac_ext_dma_params *dd; |
202 | 399 | ||
203 | if (dai->id > 0) { | 400 | dai_map = &hdmi->dai_map[dai->id]; |
204 | dev_err(&hdac->hdac.dev, "Only one dai supported as of now\n"); | 401 | pin = dai_map->pin; |
402 | |||
403 | if (!pin) | ||
404 | return -ENODEV; | ||
405 | |||
406 | if ((!pin->eld.monitor_present) || (!pin->eld.eld_valid)) { | ||
407 | dev_err(&hdac->hdac.dev, "device is not configured for this pin: %d\n", | ||
408 | pin->nid); | ||
205 | return -ENODEV; | 409 | return -ENODEV; |
206 | } | 410 | } |
207 | 411 | ||
208 | dd = kzalloc(sizeof(*dd), GFP_KERNEL); | 412 | dd = snd_soc_dai_get_dma_data(dai, substream); |
209 | if (!dd) | 413 | if (!dd) { |
210 | return -ENOMEM; | 414 | dd = kzalloc(sizeof(*dd), GFP_KERNEL); |
415 | if (!dd) | ||
416 | return -ENOMEM; | ||
417 | } | ||
418 | |||
211 | dd->format = snd_hdac_calc_stream_format(params_rate(hparams), | 419 | dd->format = snd_hdac_calc_stream_format(params_rate(hparams), |
212 | params_channels(hparams), params_format(hparams), | 420 | params_channels(hparams), params_format(hparams), |
213 | 24, 0); | 421 | 24, 0); |
@@ -227,50 +435,187 @@ static int hdac_hdmi_playback_cleanup(struct snd_pcm_substream *substream, | |||
227 | 435 | ||
228 | dai_map = &hdmi->dai_map[dai->id]; | 436 | dai_map = &hdmi->dai_map[dai->id]; |
229 | 437 | ||
438 | dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream); | ||
439 | |||
440 | if (dd) { | ||
441 | snd_soc_dai_set_dma_data(dai, substream, NULL); | ||
442 | kfree(dd); | ||
443 | } | ||
444 | |||
445 | return 0; | ||
446 | } | ||
447 | |||
448 | static void hdac_hdmi_enable_cvt(struct hdac_ext_device *edev, | ||
449 | struct hdac_hdmi_dai_pin_map *dai_map) | ||
450 | { | ||
451 | /* Enable transmission */ | ||
230 | snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0, | 452 | snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0, |
231 | AC_VERB_SET_CHANNEL_STREAMID, 0); | 453 | AC_VERB_SET_DIGI_CONVERT_1, 1); |
454 | |||
455 | /* Category Code (CC) to zero */ | ||
232 | snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0, | 456 | snd_hdac_codec_write(&edev->hdac, dai_map->cvt->nid, 0, |
233 | AC_VERB_SET_STREAM_FORMAT, 0); | 457 | AC_VERB_SET_DIGI_CONVERT_2, 0); |
458 | } | ||
234 | 459 | ||
235 | dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream); | 460 | static int hdac_hdmi_enable_pin(struct hdac_ext_device *hdac, |
236 | snd_soc_dai_set_dma_data(dai, substream, NULL); | 461 | struct hdac_hdmi_dai_pin_map *dai_map) |
462 | { | ||
463 | int mux_idx; | ||
464 | struct hdac_hdmi_pin *pin = dai_map->pin; | ||
465 | |||
466 | for (mux_idx = 0; mux_idx < pin->num_mux_nids; mux_idx++) { | ||
467 | if (pin->mux_nids[mux_idx] == dai_map->cvt->nid) { | ||
468 | snd_hdac_codec_write(&hdac->hdac, pin->nid, 0, | ||
469 | AC_VERB_SET_CONNECT_SEL, mux_idx); | ||
470 | break; | ||
471 | } | ||
472 | } | ||
473 | |||
474 | if (mux_idx == pin->num_mux_nids) | ||
475 | return -EIO; | ||
476 | |||
477 | /* Enable out path for this pin widget */ | ||
478 | snd_hdac_codec_write(&hdac->hdac, pin->nid, 0, | ||
479 | AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); | ||
237 | 480 | ||
238 | kfree(dd); | 481 | hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D0); |
482 | |||
483 | snd_hdac_codec_write(&hdac->hdac, pin->nid, 0, | ||
484 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); | ||
239 | 485 | ||
240 | return 0; | 486 | return 0; |
241 | } | 487 | } |
242 | 488 | ||
489 | static int hdac_hdmi_query_pin_connlist(struct hdac_ext_device *hdac, | ||
490 | struct hdac_hdmi_pin *pin) | ||
491 | { | ||
492 | if (!(get_wcaps(&hdac->hdac, pin->nid) & AC_WCAP_CONN_LIST)) { | ||
493 | dev_warn(&hdac->hdac.dev, | ||
494 | "HDMI: pin %d wcaps %#x does not support connection list\n", | ||
495 | pin->nid, get_wcaps(&hdac->hdac, pin->nid)); | ||
496 | return -EINVAL; | ||
497 | } | ||
498 | |||
499 | pin->num_mux_nids = snd_hdac_get_connections(&hdac->hdac, pin->nid, | ||
500 | pin->mux_nids, HDA_MAX_CONNECTIONS); | ||
501 | if (pin->num_mux_nids == 0) | ||
502 | dev_warn(&hdac->hdac.dev, "No connections found for pin: %d\n", | ||
503 | pin->nid); | ||
504 | |||
505 | dev_dbg(&hdac->hdac.dev, "num_mux_nids %d for pin: %d\n", | ||
506 | pin->num_mux_nids, pin->nid); | ||
507 | |||
508 | return pin->num_mux_nids; | ||
509 | } | ||
510 | |||
511 | /* | ||
512 | * Query pcm list and return pin widget to which stream is routed. | ||
513 | * | ||
514 | * Also query connection list of the pin, to validate the cvt to pin map. | ||
515 | * | ||
516 | * Same stream rendering to multiple pins simultaneously can be done | ||
517 | * possibly, but not supported for now in driver. So return the first pin | ||
518 | * connected. | ||
519 | */ | ||
520 | static struct hdac_hdmi_pin *hdac_hdmi_get_pin_from_cvt( | ||
521 | struct hdac_ext_device *edev, | ||
522 | struct hdac_hdmi_priv *hdmi, | ||
523 | struct hdac_hdmi_cvt *cvt) | ||
524 | { | ||
525 | struct hdac_hdmi_pcm *pcm; | ||
526 | struct hdac_hdmi_pin *pin = NULL; | ||
527 | int ret, i; | ||
528 | |||
529 | list_for_each_entry(pcm, &hdmi->pcm_list, head) { | ||
530 | if (pcm->cvt == cvt) { | ||
531 | pin = pcm->pin; | ||
532 | break; | ||
533 | } | ||
534 | } | ||
535 | |||
536 | if (pin) { | ||
537 | ret = hdac_hdmi_query_pin_connlist(edev, pin); | ||
538 | if (ret < 0) | ||
539 | return NULL; | ||
540 | |||
541 | for (i = 0; i < pin->num_mux_nids; i++) { | ||
542 | if (pin->mux_nids[i] == cvt->nid) | ||
543 | return pin; | ||
544 | } | ||
545 | } | ||
546 | |||
547 | return NULL; | ||
548 | } | ||
549 | |||
550 | /* | ||
551 | * This tries to get a valid pin and set the HW constraints based on the | ||
552 | * ELD. Even if a valid pin is not found return success so that device open | ||
553 | * doesn't fail. | ||
554 | */ | ||
243 | static int hdac_hdmi_pcm_open(struct snd_pcm_substream *substream, | 555 | static int hdac_hdmi_pcm_open(struct snd_pcm_substream *substream, |
244 | struct snd_soc_dai *dai) | 556 | struct snd_soc_dai *dai) |
245 | { | 557 | { |
246 | struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai); | 558 | struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai); |
247 | struct hdac_hdmi_priv *hdmi = hdac->private_data; | 559 | struct hdac_hdmi_priv *hdmi = hdac->private_data; |
248 | struct hdac_hdmi_dai_pin_map *dai_map; | 560 | struct hdac_hdmi_dai_pin_map *dai_map; |
249 | int val; | 561 | struct hdac_hdmi_cvt *cvt; |
250 | 562 | struct hdac_hdmi_pin *pin; | |
251 | if (dai->id > 0) { | 563 | int ret; |
252 | dev_err(&hdac->hdac.dev, "Only one dai supported as of now\n"); | ||
253 | return -ENODEV; | ||
254 | } | ||
255 | 564 | ||
256 | dai_map = &hdmi->dai_map[dai->id]; | 565 | dai_map = &hdmi->dai_map[dai->id]; |
257 | 566 | ||
258 | val = snd_hdac_codec_read(&hdac->hdac, dai_map->pin->nid, 0, | 567 | cvt = dai_map->cvt; |
259 | AC_VERB_GET_PIN_SENSE, 0); | 568 | pin = hdac_hdmi_get_pin_from_cvt(hdac, hdmi, cvt); |
260 | dev_info(&hdac->hdac.dev, "Val for AC_VERB_GET_PIN_SENSE: %x\n", val); | ||
261 | 569 | ||
262 | if ((!(val & AC_PINSENSE_PRESENCE)) || (!(val & AC_PINSENSE_ELDV))) { | 570 | /* |
263 | dev_err(&hdac->hdac.dev, "Monitor presence invalid with val: %x\n", val); | 571 | * To make PA and other userland happy. |
264 | return -ENODEV; | 572 | * userland scans devices so returning error does not help. |
573 | */ | ||
574 | if (!pin) | ||
575 | return 0; | ||
576 | |||
577 | if ((!pin->eld.monitor_present) || | ||
578 | (!pin->eld.eld_valid)) { | ||
579 | |||
580 | dev_warn(&hdac->hdac.dev, | ||
581 | "Failed: montior present? %d ELD valid?: %d for pin: %d\n", | ||
582 | pin->eld.monitor_present, pin->eld.eld_valid, pin->nid); | ||
583 | |||
584 | return 0; | ||
265 | } | 585 | } |
266 | 586 | ||
267 | hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D0); | 587 | dai_map->pin = pin; |
268 | 588 | ||
269 | snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0, | 589 | hdac_hdmi_enable_cvt(hdac, dai_map); |
270 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); | 590 | ret = hdac_hdmi_enable_pin(hdac, dai_map); |
591 | if (ret < 0) | ||
592 | return ret; | ||
271 | 593 | ||
272 | snd_pcm_hw_constraint_step(substream->runtime, 0, | 594 | ret = hdac_hdmi_eld_limit_formats(substream->runtime, |
273 | SNDRV_PCM_HW_PARAM_CHANNELS, 2); | 595 | pin->eld.eld_buffer); |
596 | if (ret < 0) | ||
597 | return ret; | ||
598 | |||
599 | return snd_pcm_hw_constraint_eld(substream->runtime, | ||
600 | pin->eld.eld_buffer); | ||
601 | } | ||
602 | |||
603 | static int hdac_hdmi_trigger(struct snd_pcm_substream *substream, int cmd, | ||
604 | struct snd_soc_dai *dai) | ||
605 | { | ||
606 | struct hdac_hdmi_dai_pin_map *dai_map; | ||
607 | struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai); | ||
608 | struct hdac_hdmi_priv *hdmi = hdac->private_data; | ||
609 | int ret; | ||
610 | |||
611 | dai_map = &hdmi->dai_map[dai->id]; | ||
612 | if (cmd == SNDRV_PCM_TRIGGER_RESUME) { | ||
613 | ret = hdac_hdmi_enable_pin(hdac, dai_map); | ||
614 | if (ret < 0) | ||
615 | return ret; | ||
616 | |||
617 | return hdac_hdmi_playback_prepare(substream, dai); | ||
618 | } | ||
274 | 619 | ||
275 | return 0; | 620 | return 0; |
276 | } | 621 | } |
@@ -284,10 +629,19 @@ static void hdac_hdmi_pcm_close(struct snd_pcm_substream *substream, | |||
284 | 629 | ||
285 | dai_map = &hdmi->dai_map[dai->id]; | 630 | dai_map = &hdmi->dai_map[dai->id]; |
286 | 631 | ||
287 | hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D3); | 632 | if (dai_map->pin) { |
633 | snd_hdac_codec_write(&hdac->hdac, dai_map->cvt->nid, 0, | ||
634 | AC_VERB_SET_CHANNEL_STREAMID, 0); | ||
635 | snd_hdac_codec_write(&hdac->hdac, dai_map->cvt->nid, 0, | ||
636 | AC_VERB_SET_STREAM_FORMAT, 0); | ||
637 | |||
638 | hdac_hdmi_set_power_state(hdac, dai_map, AC_PWRST_D3); | ||
288 | 639 | ||
289 | snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0, | 640 | snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0, |
290 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE); | 641 | AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE); |
642 | |||
643 | dai_map->pin = NULL; | ||
644 | } | ||
291 | } | 645 | } |
292 | 646 | ||
293 | static int | 647 | static int |
@@ -310,85 +664,326 @@ hdac_hdmi_query_cvt_params(struct hdac_device *hdac, struct hdac_hdmi_cvt *cvt) | |||
310 | return err; | 664 | return err; |
311 | } | 665 | } |
312 | 666 | ||
313 | static void hdac_hdmi_fill_widget_info(struct snd_soc_dapm_widget *w, | 667 | static int hdac_hdmi_fill_widget_info(struct device *dev, |
314 | enum snd_soc_dapm_type id, | 668 | struct snd_soc_dapm_widget *w, |
315 | const char *wname, const char *stream) | 669 | enum snd_soc_dapm_type id, void *priv, |
670 | const char *wname, const char *stream, | ||
671 | struct snd_kcontrol_new *wc, int numkc) | ||
316 | { | 672 | { |
317 | w->id = id; | 673 | w->id = id; |
318 | w->name = wname; | 674 | w->name = devm_kstrdup(dev, wname, GFP_KERNEL); |
675 | if (!w->name) | ||
676 | return -ENOMEM; | ||
677 | |||
319 | w->sname = stream; | 678 | w->sname = stream; |
320 | w->reg = SND_SOC_NOPM; | 679 | w->reg = SND_SOC_NOPM; |
321 | w->shift = 0; | 680 | w->shift = 0; |
322 | w->kcontrol_news = NULL; | 681 | w->kcontrol_news = wc; |
323 | w->num_kcontrols = 0; | 682 | w->num_kcontrols = numkc; |
324 | w->priv = NULL; | 683 | w->priv = priv; |
684 | |||
685 | return 0; | ||
325 | } | 686 | } |
326 | 687 | ||
327 | static void hdac_hdmi_fill_route(struct snd_soc_dapm_route *route, | 688 | static void hdac_hdmi_fill_route(struct snd_soc_dapm_route *route, |
328 | const char *sink, const char *control, const char *src) | 689 | const char *sink, const char *control, const char *src, |
690 | int (*handler)(struct snd_soc_dapm_widget *src, | ||
691 | struct snd_soc_dapm_widget *sink)) | ||
329 | { | 692 | { |
330 | route->sink = sink; | 693 | route->sink = sink; |
331 | route->source = src; | 694 | route->source = src; |
332 | route->control = control; | 695 | route->control = control; |
333 | route->connected = NULL; | 696 | route->connected = handler; |
334 | } | 697 | } |
335 | 698 | ||
336 | static void create_fill_widget_route_map(struct snd_soc_dapm_context *dapm, | 699 | static struct hdac_hdmi_pcm *hdac_hdmi_get_pcm(struct hdac_ext_device *edev, |
337 | struct hdac_hdmi_dai_pin_map *dai_map) | 700 | struct hdac_hdmi_pin *pin) |
338 | { | 701 | { |
339 | struct snd_soc_dapm_route route[1]; | 702 | struct hdac_hdmi_priv *hdmi = edev->private_data; |
340 | struct snd_soc_dapm_widget widgets[2] = { {0} }; | 703 | struct hdac_hdmi_pcm *pcm = NULL; |
341 | 704 | ||
342 | memset(&route, 0, sizeof(route)); | 705 | list_for_each_entry(pcm, &hdmi->pcm_list, head) { |
706 | if (pcm->pin == pin) | ||
707 | return pcm; | ||
708 | } | ||
343 | 709 | ||
344 | hdac_hdmi_fill_widget_info(&widgets[0], snd_soc_dapm_output, | 710 | return NULL; |
345 | "hif1 Output", NULL); | 711 | } |
346 | hdac_hdmi_fill_widget_info(&widgets[1], snd_soc_dapm_aif_in, | ||
347 | "Coverter 1", "hif1"); | ||
348 | 712 | ||
349 | hdac_hdmi_fill_route(&route[0], "hif1 Output", NULL, "Coverter 1"); | 713 | /* |
714 | * Based on user selection, map the PINs with the PCMs. | ||
715 | */ | ||
716 | static int hdac_hdmi_set_pin_mux(struct snd_kcontrol *kcontrol, | ||
717 | struct snd_ctl_elem_value *ucontrol) | ||
718 | { | ||
719 | int ret; | ||
720 | struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; | ||
721 | struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol); | ||
722 | struct snd_soc_dapm_context *dapm = w->dapm; | ||
723 | struct hdac_hdmi_pin *pin = w->priv; | ||
724 | struct hdac_ext_device *edev = to_hda_ext_device(dapm->dev); | ||
725 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
726 | struct hdac_hdmi_pcm *pcm = NULL; | ||
727 | const char *cvt_name = e->texts[ucontrol->value.enumerated.item[0]]; | ||
350 | 728 | ||
351 | snd_soc_dapm_new_controls(dapm, widgets, ARRAY_SIZE(widgets)); | 729 | ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol); |
352 | snd_soc_dapm_add_routes(dapm, route, ARRAY_SIZE(route)); | 730 | if (ret < 0) |
731 | return ret; | ||
732 | |||
733 | mutex_lock(&hdmi->pin_mutex); | ||
734 | list_for_each_entry(pcm, &hdmi->pcm_list, head) { | ||
735 | if (pcm->pin == pin) | ||
736 | pcm->pin = NULL; | ||
737 | |||
738 | /* | ||
739 | * Jack status is not reported during device probe as the | ||
740 | * PCMs are not registered by then. So report it here. | ||
741 | */ | ||
742 | if (!strcmp(cvt_name, pcm->cvt->name) && !pcm->pin) { | ||
743 | pcm->pin = pin; | ||
744 | if (pin->eld.monitor_present && pin->eld.eld_valid) { | ||
745 | dev_dbg(&edev->hdac.dev, | ||
746 | "jack report for pcm=%d\n", | ||
747 | pcm->pcm_id); | ||
748 | |||
749 | snd_jack_report(pcm->jack, SND_JACK_AVOUT); | ||
750 | } | ||
751 | mutex_unlock(&hdmi->pin_mutex); | ||
752 | return ret; | ||
753 | } | ||
754 | } | ||
755 | mutex_unlock(&hdmi->pin_mutex); | ||
756 | |||
757 | return ret; | ||
353 | } | 758 | } |
354 | 759 | ||
355 | static int hdac_hdmi_init_dai_map(struct hdac_ext_device *edev) | 760 | /* |
761 | * Ideally the Mux inputs should be based on the num_muxs enumerated, but | ||
762 | * the display driver seem to be programming the connection list for the pin | ||
763 | * widget runtime. | ||
764 | * | ||
765 | * So programming all the possible inputs for the mux, the user has to take | ||
766 | * care of selecting the right one and leaving all other inputs selected to | ||
767 | * "NONE" | ||
768 | */ | ||
769 | static int hdac_hdmi_create_pin_muxs(struct hdac_ext_device *edev, | ||
770 | struct hdac_hdmi_pin *pin, | ||
771 | struct snd_soc_dapm_widget *widget, | ||
772 | const char *widget_name) | ||
773 | { | ||
774 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
775 | struct snd_kcontrol_new *kc; | ||
776 | struct hdac_hdmi_cvt *cvt; | ||
777 | struct soc_enum *se; | ||
778 | char kc_name[NAME_SIZE]; | ||
779 | char mux_items[NAME_SIZE]; | ||
780 | /* To hold inputs to the Pin mux */ | ||
781 | char *items[HDA_MAX_CONNECTIONS]; | ||
782 | int i = 0; | ||
783 | int num_items = hdmi->num_cvt + 1; | ||
784 | |||
785 | kc = devm_kzalloc(&edev->hdac.dev, sizeof(*kc), GFP_KERNEL); | ||
786 | if (!kc) | ||
787 | return -ENOMEM; | ||
788 | |||
789 | se = devm_kzalloc(&edev->hdac.dev, sizeof(*se), GFP_KERNEL); | ||
790 | if (!se) | ||
791 | return -ENOMEM; | ||
792 | |||
793 | sprintf(kc_name, "Pin %d Input", pin->nid); | ||
794 | kc->name = devm_kstrdup(&edev->hdac.dev, kc_name, GFP_KERNEL); | ||
795 | if (!kc->name) | ||
796 | return -ENOMEM; | ||
797 | |||
798 | kc->private_value = (long)se; | ||
799 | kc->iface = SNDRV_CTL_ELEM_IFACE_MIXER; | ||
800 | kc->access = 0; | ||
801 | kc->info = snd_soc_info_enum_double; | ||
802 | kc->put = hdac_hdmi_set_pin_mux; | ||
803 | kc->get = snd_soc_dapm_get_enum_double; | ||
804 | |||
805 | se->reg = SND_SOC_NOPM; | ||
806 | |||
807 | /* enum texts: ["NONE", "cvt #", "cvt #", ...] */ | ||
808 | se->items = num_items; | ||
809 | se->mask = roundup_pow_of_two(se->items) - 1; | ||
810 | |||
811 | sprintf(mux_items, "NONE"); | ||
812 | items[i] = devm_kstrdup(&edev->hdac.dev, mux_items, GFP_KERNEL); | ||
813 | if (!items[i]) | ||
814 | return -ENOMEM; | ||
815 | |||
816 | list_for_each_entry(cvt, &hdmi->cvt_list, head) { | ||
817 | i++; | ||
818 | sprintf(mux_items, "cvt %d", cvt->nid); | ||
819 | items[i] = devm_kstrdup(&edev->hdac.dev, mux_items, GFP_KERNEL); | ||
820 | if (!items[i]) | ||
821 | return -ENOMEM; | ||
822 | } | ||
823 | |||
824 | se->texts = devm_kmemdup(&edev->hdac.dev, items, | ||
825 | (num_items * sizeof(char *)), GFP_KERNEL); | ||
826 | if (!se->texts) | ||
827 | return -ENOMEM; | ||
828 | |||
829 | return hdac_hdmi_fill_widget_info(&edev->hdac.dev, widget, | ||
830 | snd_soc_dapm_mux, pin, widget_name, NULL, kc, 1); | ||
831 | } | ||
832 | |||
833 | /* Add cvt <- input <- mux route map */ | ||
834 | static void hdac_hdmi_add_pinmux_cvt_route(struct hdac_ext_device *edev, | ||
835 | struct snd_soc_dapm_widget *widgets, | ||
836 | struct snd_soc_dapm_route *route, int rindex) | ||
837 | { | ||
838 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
839 | const struct snd_kcontrol_new *kc; | ||
840 | struct soc_enum *se; | ||
841 | int mux_index = hdmi->num_cvt + hdmi->num_pin; | ||
842 | int i, j; | ||
843 | |||
844 | for (i = 0; i < hdmi->num_pin; i++) { | ||
845 | kc = widgets[mux_index].kcontrol_news; | ||
846 | se = (struct soc_enum *)kc->private_value; | ||
847 | for (j = 0; j < hdmi->num_cvt; j++) { | ||
848 | hdac_hdmi_fill_route(&route[rindex], | ||
849 | widgets[mux_index].name, | ||
850 | se->texts[j + 1], | ||
851 | widgets[j].name, NULL); | ||
852 | |||
853 | rindex++; | ||
854 | } | ||
855 | |||
856 | mux_index++; | ||
857 | } | ||
858 | } | ||
859 | |||
860 | /* | ||
861 | * Widgets are added in the below sequence | ||
862 | * Converter widgets for num converters enumerated | ||
863 | * Pin widgets for num pins enumerated | ||
864 | * Pin mux widgets to represent connenction list of pin widget | ||
865 | * | ||
866 | * Total widgets elements = num_cvt + num_pin + num_pin; | ||
867 | * | ||
868 | * Routes are added as below: | ||
869 | * pin mux -> pin (based on num_pins) | ||
870 | * cvt -> "Input sel control" -> pin_mux | ||
871 | * | ||
872 | * Total route elements: | ||
873 | * num_pins + (pin_muxes * num_cvt) | ||
874 | */ | ||
875 | static int create_fill_widget_route_map(struct snd_soc_dapm_context *dapm) | ||
356 | { | 876 | { |
877 | struct snd_soc_dapm_widget *widgets; | ||
878 | struct snd_soc_dapm_route *route; | ||
879 | struct hdac_ext_device *edev = to_hda_ext_device(dapm->dev); | ||
357 | struct hdac_hdmi_priv *hdmi = edev->private_data; | 880 | struct hdac_hdmi_priv *hdmi = edev->private_data; |
358 | struct hdac_hdmi_dai_pin_map *dai_map = &hdmi->dai_map[0]; | 881 | struct snd_soc_dai_driver *dai_drv = dapm->component->dai_drv; |
882 | char widget_name[NAME_SIZE]; | ||
359 | struct hdac_hdmi_cvt *cvt; | 883 | struct hdac_hdmi_cvt *cvt; |
360 | struct hdac_hdmi_pin *pin; | 884 | struct hdac_hdmi_pin *pin; |
885 | int ret, i = 0, num_routes = 0; | ||
361 | 886 | ||
362 | if (list_empty(&hdmi->cvt_list) || list_empty(&hdmi->pin_list)) | 887 | if (list_empty(&hdmi->cvt_list) || list_empty(&hdmi->pin_list)) |
363 | return -EINVAL; | 888 | return -EINVAL; |
364 | 889 | ||
365 | /* | 890 | widgets = devm_kzalloc(dapm->dev, |
366 | * Currently on board only 1 pin and 1 converter is enabled for | 891 | (sizeof(*widgets) * ((2 * hdmi->num_pin) + hdmi->num_cvt)), |
367 | * simplification, more will be added eventually | 892 | GFP_KERNEL); |
368 | * So using fixed map for dai_id:pin:cvt | ||
369 | */ | ||
370 | cvt = list_first_entry(&hdmi->cvt_list, struct hdac_hdmi_cvt, head); | ||
371 | pin = list_first_entry(&hdmi->pin_list, struct hdac_hdmi_pin, head); | ||
372 | 893 | ||
373 | dai_map->dai_id = 0; | 894 | if (!widgets) |
374 | dai_map->pin = pin; | 895 | return -ENOMEM; |
375 | 896 | ||
376 | dai_map->cvt = cvt; | 897 | /* DAPM widgets to represent each converter widget */ |
898 | list_for_each_entry(cvt, &hdmi->cvt_list, head) { | ||
899 | sprintf(widget_name, "Converter %d", cvt->nid); | ||
900 | ret = hdac_hdmi_fill_widget_info(dapm->dev, &widgets[i], | ||
901 | snd_soc_dapm_aif_in, &cvt->nid, | ||
902 | widget_name, dai_drv[i].playback.stream_name, NULL, 0); | ||
903 | if (ret < 0) | ||
904 | return ret; | ||
905 | i++; | ||
906 | } | ||
377 | 907 | ||
378 | /* Enable out path for this pin widget */ | 908 | list_for_each_entry(pin, &hdmi->pin_list, head) { |
379 | snd_hdac_codec_write(&edev->hdac, pin->nid, 0, | 909 | sprintf(widget_name, "hif%d Output", pin->nid); |
380 | AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); | 910 | ret = hdac_hdmi_fill_widget_info(dapm->dev, &widgets[i], |
911 | snd_soc_dapm_output, &pin->nid, | ||
912 | widget_name, NULL, NULL, 0); | ||
913 | if (ret < 0) | ||
914 | return ret; | ||
915 | i++; | ||
916 | } | ||
381 | 917 | ||
382 | /* Enable transmission */ | 918 | /* DAPM widgets to represent the connection list to pin widget */ |
383 | snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, | 919 | list_for_each_entry(pin, &hdmi->pin_list, head) { |
384 | AC_VERB_SET_DIGI_CONVERT_1, 1); | 920 | sprintf(widget_name, "Pin %d Mux", pin->nid); |
921 | ret = hdac_hdmi_create_pin_muxs(edev, pin, &widgets[i], | ||
922 | widget_name); | ||
923 | if (ret < 0) | ||
924 | return ret; | ||
925 | i++; | ||
385 | 926 | ||
386 | /* Category Code (CC) to zero */ | 927 | /* For cvt to pin_mux mapping */ |
387 | snd_hdac_codec_write(&edev->hdac, cvt->nid, 0, | 928 | num_routes += hdmi->num_cvt; |
388 | AC_VERB_SET_DIGI_CONVERT_2, 0); | 929 | |
930 | /* For pin_mux to pin mapping */ | ||
931 | num_routes++; | ||
932 | } | ||
389 | 933 | ||
390 | snd_hdac_codec_write(&edev->hdac, pin->nid, 0, | 934 | route = devm_kzalloc(dapm->dev, (sizeof(*route) * num_routes), |
391 | AC_VERB_SET_CONNECT_SEL, 0); | 935 | GFP_KERNEL); |
936 | if (!route) | ||
937 | return -ENOMEM; | ||
938 | |||
939 | i = 0; | ||
940 | /* Add pin <- NULL <- mux route map */ | ||
941 | list_for_each_entry(pin, &hdmi->pin_list, head) { | ||
942 | int sink_index = i + hdmi->num_cvt; | ||
943 | int src_index = sink_index + hdmi->num_pin; | ||
944 | |||
945 | hdac_hdmi_fill_route(&route[i], | ||
946 | widgets[sink_index].name, NULL, | ||
947 | widgets[src_index].name, NULL); | ||
948 | i++; | ||
949 | |||
950 | } | ||
951 | |||
952 | hdac_hdmi_add_pinmux_cvt_route(edev, widgets, route, i); | ||
953 | |||
954 | snd_soc_dapm_new_controls(dapm, widgets, | ||
955 | ((2 * hdmi->num_pin) + hdmi->num_cvt)); | ||
956 | |||
957 | snd_soc_dapm_add_routes(dapm, route, num_routes); | ||
958 | snd_soc_dapm_new_widgets(dapm->card); | ||
959 | |||
960 | return 0; | ||
961 | |||
962 | } | ||
963 | |||
964 | static int hdac_hdmi_init_dai_map(struct hdac_ext_device *edev) | ||
965 | { | ||
966 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
967 | struct hdac_hdmi_dai_pin_map *dai_map; | ||
968 | struct hdac_hdmi_cvt *cvt; | ||
969 | int dai_id = 0; | ||
970 | |||
971 | if (list_empty(&hdmi->cvt_list)) | ||
972 | return -EINVAL; | ||
973 | |||
974 | list_for_each_entry(cvt, &hdmi->cvt_list, head) { | ||
975 | dai_map = &hdmi->dai_map[dai_id]; | ||
976 | dai_map->dai_id = dai_id; | ||
977 | dai_map->cvt = cvt; | ||
978 | |||
979 | dai_id++; | ||
980 | |||
981 | if (dai_id == HDA_MAX_CVTS) { | ||
982 | dev_warn(&edev->hdac.dev, | ||
983 | "Max dais supported: %d\n", dai_id); | ||
984 | break; | ||
985 | } | ||
986 | } | ||
392 | 987 | ||
393 | return 0; | 988 | return 0; |
394 | } | 989 | } |
@@ -397,12 +992,15 @@ static int hdac_hdmi_add_cvt(struct hdac_ext_device *edev, hda_nid_t nid) | |||
397 | { | 992 | { |
398 | struct hdac_hdmi_priv *hdmi = edev->private_data; | 993 | struct hdac_hdmi_priv *hdmi = edev->private_data; |
399 | struct hdac_hdmi_cvt *cvt; | 994 | struct hdac_hdmi_cvt *cvt; |
995 | char name[NAME_SIZE]; | ||
400 | 996 | ||
401 | cvt = kzalloc(sizeof(*cvt), GFP_KERNEL); | 997 | cvt = kzalloc(sizeof(*cvt), GFP_KERNEL); |
402 | if (!cvt) | 998 | if (!cvt) |
403 | return -ENOMEM; | 999 | return -ENOMEM; |
404 | 1000 | ||
405 | cvt->nid = nid; | 1001 | cvt->nid = nid; |
1002 | sprintf(name, "cvt %d", cvt->nid); | ||
1003 | cvt->name = kstrdup(name, GFP_KERNEL); | ||
406 | 1004 | ||
407 | list_add_tail(&cvt->head, &hdmi->cvt_list); | 1005 | list_add_tail(&cvt->head, &hdmi->cvt_list); |
408 | hdmi->num_cvt++; | 1006 | hdmi->num_cvt++; |
@@ -410,6 +1008,106 @@ static int hdac_hdmi_add_cvt(struct hdac_ext_device *edev, hda_nid_t nid) | |||
410 | return hdac_hdmi_query_cvt_params(&edev->hdac, cvt); | 1008 | return hdac_hdmi_query_cvt_params(&edev->hdac, cvt); |
411 | } | 1009 | } |
412 | 1010 | ||
1011 | static void hdac_hdmi_present_sense(struct hdac_hdmi_pin *pin, int repoll) | ||
1012 | { | ||
1013 | struct hdac_ext_device *edev = pin->edev; | ||
1014 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
1015 | struct hdac_hdmi_pcm *pcm; | ||
1016 | int val; | ||
1017 | |||
1018 | pin->repoll_count = repoll; | ||
1019 | |||
1020 | pm_runtime_get_sync(&edev->hdac.dev); | ||
1021 | val = snd_hdac_codec_read(&edev->hdac, pin->nid, 0, | ||
1022 | AC_VERB_GET_PIN_SENSE, 0); | ||
1023 | |||
1024 | dev_dbg(&edev->hdac.dev, "Pin sense val %x for pin: %d\n", | ||
1025 | val, pin->nid); | ||
1026 | |||
1027 | |||
1028 | mutex_lock(&hdmi->pin_mutex); | ||
1029 | pin->eld.monitor_present = !!(val & AC_PINSENSE_PRESENCE); | ||
1030 | pin->eld.eld_valid = !!(val & AC_PINSENSE_ELDV); | ||
1031 | |||
1032 | pcm = hdac_hdmi_get_pcm(edev, pin); | ||
1033 | |||
1034 | if (!pin->eld.monitor_present || !pin->eld.eld_valid) { | ||
1035 | |||
1036 | dev_dbg(&edev->hdac.dev, "%s: disconnect for pin %d\n", | ||
1037 | __func__, pin->nid); | ||
1038 | |||
1039 | /* | ||
1040 | * PCMs are not registered during device probe, so don't | ||
1041 | * report jack here. It will be done in usermode mux | ||
1042 | * control select. | ||
1043 | */ | ||
1044 | if (pcm) { | ||
1045 | dev_dbg(&edev->hdac.dev, | ||
1046 | "jack report for pcm=%d\n", pcm->pcm_id); | ||
1047 | |||
1048 | snd_jack_report(pcm->jack, 0); | ||
1049 | } | ||
1050 | |||
1051 | mutex_unlock(&hdmi->pin_mutex); | ||
1052 | goto put_hdac_device; | ||
1053 | } | ||
1054 | |||
1055 | if (pin->eld.monitor_present && pin->eld.eld_valid) { | ||
1056 | /* TODO: use i915 component for reading ELD later */ | ||
1057 | if (hdac_hdmi_get_eld(&edev->hdac, pin->nid, | ||
1058 | pin->eld.eld_buffer, | ||
1059 | &pin->eld.eld_size) == 0) { | ||
1060 | |||
1061 | if (pcm) { | ||
1062 | dev_dbg(&edev->hdac.dev, | ||
1063 | "jack report for pcm=%d\n", | ||
1064 | pcm->pcm_id); | ||
1065 | |||
1066 | snd_jack_report(pcm->jack, SND_JACK_AVOUT); | ||
1067 | } | ||
1068 | |||
1069 | print_hex_dump_bytes("ELD: ", DUMP_PREFIX_OFFSET, | ||
1070 | pin->eld.eld_buffer, pin->eld.eld_size); | ||
1071 | } else { | ||
1072 | pin->eld.monitor_present = false; | ||
1073 | pin->eld.eld_valid = false; | ||
1074 | |||
1075 | if (pcm) { | ||
1076 | dev_dbg(&edev->hdac.dev, | ||
1077 | "jack report for pcm=%d\n", | ||
1078 | pcm->pcm_id); | ||
1079 | |||
1080 | snd_jack_report(pcm->jack, 0); | ||
1081 | } | ||
1082 | } | ||
1083 | } | ||
1084 | |||
1085 | mutex_unlock(&hdmi->pin_mutex); | ||
1086 | |||
1087 | /* | ||
1088 | * Sometimes the pin_sense may present invalid monitor | ||
1089 | * present and eld_valid. If ELD data is not valid, loop few | ||
1090 | * more times to get correct pin sense and valid ELD. | ||
1091 | */ | ||
1092 | if ((!pin->eld.monitor_present || !pin->eld.eld_valid) && repoll) | ||
1093 | schedule_delayed_work(&pin->work, msecs_to_jiffies(300)); | ||
1094 | |||
1095 | put_hdac_device: | ||
1096 | pm_runtime_put_sync(&edev->hdac.dev); | ||
1097 | } | ||
1098 | |||
1099 | static void hdac_hdmi_repoll_eld(struct work_struct *work) | ||
1100 | { | ||
1101 | struct hdac_hdmi_pin *pin = | ||
1102 | container_of(to_delayed_work(work), struct hdac_hdmi_pin, work); | ||
1103 | |||
1104 | /* picked from legacy HDA driver */ | ||
1105 | if (pin->repoll_count++ > 6) | ||
1106 | pin->repoll_count = 0; | ||
1107 | |||
1108 | hdac_hdmi_present_sense(pin, pin->repoll_count); | ||
1109 | } | ||
1110 | |||
413 | static int hdac_hdmi_add_pin(struct hdac_ext_device *edev, hda_nid_t nid) | 1111 | static int hdac_hdmi_add_pin(struct hdac_ext_device *edev, hda_nid_t nid) |
414 | { | 1112 | { |
415 | struct hdac_hdmi_priv *hdmi = edev->private_data; | 1113 | struct hdac_hdmi_priv *hdmi = edev->private_data; |
@@ -424,6 +1122,120 @@ static int hdac_hdmi_add_pin(struct hdac_ext_device *edev, hda_nid_t nid) | |||
424 | list_add_tail(&pin->head, &hdmi->pin_list); | 1122 | list_add_tail(&pin->head, &hdmi->pin_list); |
425 | hdmi->num_pin++; | 1123 | hdmi->num_pin++; |
426 | 1124 | ||
1125 | pin->edev = edev; | ||
1126 | INIT_DELAYED_WORK(&pin->work, hdac_hdmi_repoll_eld); | ||
1127 | |||
1128 | return 0; | ||
1129 | } | ||
1130 | |||
1131 | #define INTEL_VENDOR_NID 0x08 | ||
1132 | #define INTEL_GET_VENDOR_VERB 0xf81 | ||
1133 | #define INTEL_SET_VENDOR_VERB 0x781 | ||
1134 | #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */ | ||
1135 | #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */ | ||
1136 | |||
1137 | static void hdac_hdmi_skl_enable_all_pins(struct hdac_device *hdac) | ||
1138 | { | ||
1139 | unsigned int vendor_param; | ||
1140 | |||
1141 | vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0, | ||
1142 | INTEL_GET_VENDOR_VERB, 0); | ||
1143 | if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS) | ||
1144 | return; | ||
1145 | |||
1146 | vendor_param |= INTEL_EN_ALL_PIN_CVTS; | ||
1147 | vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0, | ||
1148 | INTEL_SET_VENDOR_VERB, vendor_param); | ||
1149 | if (vendor_param == -1) | ||
1150 | return; | ||
1151 | } | ||
1152 | |||
1153 | static void hdac_hdmi_skl_enable_dp12(struct hdac_device *hdac) | ||
1154 | { | ||
1155 | unsigned int vendor_param; | ||
1156 | |||
1157 | vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0, | ||
1158 | INTEL_GET_VENDOR_VERB, 0); | ||
1159 | if (vendor_param == -1 || vendor_param & INTEL_EN_DP12) | ||
1160 | return; | ||
1161 | |||
1162 | /* enable DP1.2 mode */ | ||
1163 | vendor_param |= INTEL_EN_DP12; | ||
1164 | vendor_param = snd_hdac_codec_read(hdac, INTEL_VENDOR_NID, 0, | ||
1165 | INTEL_SET_VENDOR_VERB, vendor_param); | ||
1166 | if (vendor_param == -1) | ||
1167 | return; | ||
1168 | |||
1169 | } | ||
1170 | |||
1171 | static struct snd_soc_dai_ops hdmi_dai_ops = { | ||
1172 | .startup = hdac_hdmi_pcm_open, | ||
1173 | .shutdown = hdac_hdmi_pcm_close, | ||
1174 | .hw_params = hdac_hdmi_set_hw_params, | ||
1175 | .prepare = hdac_hdmi_playback_prepare, | ||
1176 | .trigger = hdac_hdmi_trigger, | ||
1177 | .hw_free = hdac_hdmi_playback_cleanup, | ||
1178 | }; | ||
1179 | |||
1180 | /* | ||
1181 | * Each converter can support a stream independently. So a dai is created | ||
1182 | * based on the number of converter queried. | ||
1183 | */ | ||
1184 | static int hdac_hdmi_create_dais(struct hdac_device *hdac, | ||
1185 | struct snd_soc_dai_driver **dais, | ||
1186 | struct hdac_hdmi_priv *hdmi, int num_dais) | ||
1187 | { | ||
1188 | struct snd_soc_dai_driver *hdmi_dais; | ||
1189 | struct hdac_hdmi_cvt *cvt; | ||
1190 | char name[NAME_SIZE], dai_name[NAME_SIZE]; | ||
1191 | int i = 0; | ||
1192 | u32 rates, bps; | ||
1193 | unsigned int rate_max = 384000, rate_min = 8000; | ||
1194 | u64 formats; | ||
1195 | int ret; | ||
1196 | |||
1197 | hdmi_dais = devm_kzalloc(&hdac->dev, | ||
1198 | (sizeof(*hdmi_dais) * num_dais), | ||
1199 | GFP_KERNEL); | ||
1200 | if (!hdmi_dais) | ||
1201 | return -ENOMEM; | ||
1202 | |||
1203 | list_for_each_entry(cvt, &hdmi->cvt_list, head) { | ||
1204 | ret = snd_hdac_query_supported_pcm(hdac, cvt->nid, | ||
1205 | &rates, &formats, &bps); | ||
1206 | if (ret) | ||
1207 | return ret; | ||
1208 | |||
1209 | sprintf(dai_name, "intel-hdmi-hifi%d", i+1); | ||
1210 | hdmi_dais[i].name = devm_kstrdup(&hdac->dev, | ||
1211 | dai_name, GFP_KERNEL); | ||
1212 | |||
1213 | if (!hdmi_dais[i].name) | ||
1214 | return -ENOMEM; | ||
1215 | |||
1216 | snprintf(name, sizeof(name), "hifi%d", i+1); | ||
1217 | hdmi_dais[i].playback.stream_name = | ||
1218 | devm_kstrdup(&hdac->dev, name, GFP_KERNEL); | ||
1219 | if (!hdmi_dais[i].playback.stream_name) | ||
1220 | return -ENOMEM; | ||
1221 | |||
1222 | /* | ||
1223 | * Set caps based on capability queried from the converter. | ||
1224 | * It will be constrained runtime based on ELD queried. | ||
1225 | */ | ||
1226 | hdmi_dais[i].playback.formats = formats; | ||
1227 | hdmi_dais[i].playback.rates = rates; | ||
1228 | hdmi_dais[i].playback.rate_max = rate_max; | ||
1229 | hdmi_dais[i].playback.rate_min = rate_min; | ||
1230 | hdmi_dais[i].playback.channels_min = 2; | ||
1231 | hdmi_dais[i].playback.channels_max = 2; | ||
1232 | hdmi_dais[i].ops = &hdmi_dai_ops; | ||
1233 | |||
1234 | i++; | ||
1235 | } | ||
1236 | |||
1237 | *dais = hdmi_dais; | ||
1238 | |||
427 | return 0; | 1239 | return 0; |
428 | } | 1240 | } |
429 | 1241 | ||
@@ -431,7 +1243,8 @@ static int hdac_hdmi_add_pin(struct hdac_ext_device *edev, hda_nid_t nid) | |||
431 | * Parse all nodes and store the cvt/pin nids in array | 1243 | * Parse all nodes and store the cvt/pin nids in array |
432 | * Add one time initialization for pin and cvt widgets | 1244 | * Add one time initialization for pin and cvt widgets |
433 | */ | 1245 | */ |
434 | static int hdac_hdmi_parse_and_map_nid(struct hdac_ext_device *edev) | 1246 | static int hdac_hdmi_parse_and_map_nid(struct hdac_ext_device *edev, |
1247 | struct snd_soc_dai_driver **dais, int *num_dais) | ||
435 | { | 1248 | { |
436 | hda_nid_t nid; | 1249 | hda_nid_t nid; |
437 | int i, num_nodes; | 1250 | int i, num_nodes; |
@@ -439,6 +1252,9 @@ static int hdac_hdmi_parse_and_map_nid(struct hdac_ext_device *edev) | |||
439 | struct hdac_hdmi_priv *hdmi = edev->private_data; | 1252 | struct hdac_hdmi_priv *hdmi = edev->private_data; |
440 | int ret; | 1253 | int ret; |
441 | 1254 | ||
1255 | hdac_hdmi_skl_enable_all_pins(hdac); | ||
1256 | hdac_hdmi_skl_enable_dp12(hdac); | ||
1257 | |||
442 | num_nodes = snd_hdac_get_sub_nodes(hdac, hdac->afg, &nid); | 1258 | num_nodes = snd_hdac_get_sub_nodes(hdac, hdac->afg, &nid); |
443 | if (!nid || num_nodes <= 0) { | 1259 | if (!nid || num_nodes <= 0) { |
444 | dev_warn(&hdac->dev, "HDMI: failed to get afg sub nodes\n"); | 1260 | dev_warn(&hdac->dev, "HDMI: failed to get afg sub nodes\n"); |
@@ -479,19 +1295,107 @@ static int hdac_hdmi_parse_and_map_nid(struct hdac_ext_device *edev) | |||
479 | if (!hdmi->num_pin || !hdmi->num_cvt) | 1295 | if (!hdmi->num_pin || !hdmi->num_cvt) |
480 | return -EIO; | 1296 | return -EIO; |
481 | 1297 | ||
1298 | ret = hdac_hdmi_create_dais(hdac, dais, hdmi, hdmi->num_cvt); | ||
1299 | if (ret) { | ||
1300 | dev_err(&hdac->dev, "Failed to create dais with err: %d\n", | ||
1301 | ret); | ||
1302 | return ret; | ||
1303 | } | ||
1304 | |||
1305 | *num_dais = hdmi->num_cvt; | ||
1306 | |||
482 | return hdac_hdmi_init_dai_map(edev); | 1307 | return hdac_hdmi_init_dai_map(edev); |
483 | } | 1308 | } |
484 | 1309 | ||
1310 | static void hdac_hdmi_eld_notify_cb(void *aptr, int port) | ||
1311 | { | ||
1312 | struct hdac_ext_device *edev = aptr; | ||
1313 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
1314 | struct hdac_hdmi_pin *pin; | ||
1315 | struct snd_soc_codec *codec = edev->scodec; | ||
1316 | |||
1317 | /* Don't know how this mapping is derived */ | ||
1318 | hda_nid_t pin_nid = port + 0x04; | ||
1319 | |||
1320 | dev_dbg(&edev->hdac.dev, "%s: for pin: %d\n", __func__, pin_nid); | ||
1321 | |||
1322 | /* | ||
1323 | * skip notification during system suspend (but not in runtime PM); | ||
1324 | * the state will be updated at resume. Also since the ELD and | ||
1325 | * connection states are updated in anyway at the end of the resume, | ||
1326 | * we can skip it when received during PM process. | ||
1327 | */ | ||
1328 | if (snd_power_get_state(codec->component.card->snd_card) != | ||
1329 | SNDRV_CTL_POWER_D0) | ||
1330 | return; | ||
1331 | |||
1332 | if (atomic_read(&edev->hdac.in_pm)) | ||
1333 | return; | ||
1334 | |||
1335 | list_for_each_entry(pin, &hdmi->pin_list, head) { | ||
1336 | if (pin->nid == pin_nid) | ||
1337 | hdac_hdmi_present_sense(pin, 1); | ||
1338 | } | ||
1339 | } | ||
1340 | |||
1341 | static struct i915_audio_component_audio_ops aops = { | ||
1342 | .pin_eld_notify = hdac_hdmi_eld_notify_cb, | ||
1343 | }; | ||
1344 | |||
1345 | int hdac_hdmi_jack_init(struct snd_soc_dai *dai, int device) | ||
1346 | { | ||
1347 | char jack_name[NAME_SIZE]; | ||
1348 | struct snd_soc_codec *codec = dai->codec; | ||
1349 | struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec); | ||
1350 | struct snd_soc_dapm_context *dapm = | ||
1351 | snd_soc_component_get_dapm(&codec->component); | ||
1352 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
1353 | struct hdac_hdmi_pcm *pcm; | ||
1354 | |||
1355 | /* | ||
1356 | * this is a new PCM device, create new pcm and | ||
1357 | * add to the pcm list | ||
1358 | */ | ||
1359 | pcm = kzalloc(sizeof(*pcm), GFP_KERNEL); | ||
1360 | if (!pcm) | ||
1361 | return -ENOMEM; | ||
1362 | pcm->pcm_id = device; | ||
1363 | pcm->cvt = hdmi->dai_map[dai->id].cvt; | ||
1364 | |||
1365 | list_add_tail(&pcm->head, &hdmi->pcm_list); | ||
1366 | |||
1367 | sprintf(jack_name, "HDMI/DP, pcm=%d Jack", device); | ||
1368 | |||
1369 | return snd_jack_new(dapm->card->snd_card, jack_name, | ||
1370 | SND_JACK_AVOUT, &pcm->jack, true, false); | ||
1371 | } | ||
1372 | EXPORT_SYMBOL_GPL(hdac_hdmi_jack_init); | ||
1373 | |||
485 | static int hdmi_codec_probe(struct snd_soc_codec *codec) | 1374 | static int hdmi_codec_probe(struct snd_soc_codec *codec) |
486 | { | 1375 | { |
487 | struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec); | 1376 | struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec); |
488 | struct hdac_hdmi_priv *hdmi = edev->private_data; | 1377 | struct hdac_hdmi_priv *hdmi = edev->private_data; |
489 | struct snd_soc_dapm_context *dapm = | 1378 | struct snd_soc_dapm_context *dapm = |
490 | snd_soc_component_get_dapm(&codec->component); | 1379 | snd_soc_component_get_dapm(&codec->component); |
1380 | struct hdac_hdmi_pin *pin; | ||
1381 | int ret; | ||
491 | 1382 | ||
492 | edev->scodec = codec; | 1383 | edev->scodec = codec; |
493 | 1384 | ||
494 | create_fill_widget_route_map(dapm, &hdmi->dai_map[0]); | 1385 | ret = create_fill_widget_route_map(dapm); |
1386 | if (ret < 0) | ||
1387 | return ret; | ||
1388 | |||
1389 | aops.audio_ptr = edev; | ||
1390 | ret = snd_hdac_i915_register_notifier(&aops); | ||
1391 | if (ret < 0) { | ||
1392 | dev_err(&edev->hdac.dev, "notifier register failed: err: %d\n", | ||
1393 | ret); | ||
1394 | return ret; | ||
1395 | } | ||
1396 | |||
1397 | list_for_each_entry(pin, &hdmi->pin_list, head) | ||
1398 | hdac_hdmi_present_sense(pin, 1); | ||
495 | 1399 | ||
496 | /* Imp: Store the card pointer in hda_codec */ | 1400 | /* Imp: Store the card pointer in hda_codec */ |
497 | edev->card = dapm->card->snd_card; | 1401 | edev->card = dapm->card->snd_card; |
@@ -515,44 +1419,73 @@ static int hdmi_codec_remove(struct snd_soc_codec *codec) | |||
515 | return 0; | 1419 | return 0; |
516 | } | 1420 | } |
517 | 1421 | ||
1422 | #ifdef CONFIG_PM | ||
1423 | static int hdmi_codec_resume(struct snd_soc_codec *codec) | ||
1424 | { | ||
1425 | struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec); | ||
1426 | struct hdac_hdmi_priv *hdmi = edev->private_data; | ||
1427 | struct hdac_hdmi_pin *pin; | ||
1428 | struct hdac_device *hdac = &edev->hdac; | ||
1429 | struct hdac_bus *bus = hdac->bus; | ||
1430 | int err; | ||
1431 | unsigned long timeout; | ||
1432 | |||
1433 | hdac_hdmi_skl_enable_all_pins(&edev->hdac); | ||
1434 | hdac_hdmi_skl_enable_dp12(&edev->hdac); | ||
1435 | |||
1436 | /* Power up afg */ | ||
1437 | if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)) { | ||
1438 | |||
1439 | snd_hdac_codec_write(hdac, hdac->afg, 0, | ||
1440 | AC_VERB_SET_POWER_STATE, AC_PWRST_D0); | ||
1441 | |||
1442 | /* Wait till power state is set to D0 */ | ||
1443 | timeout = jiffies + msecs_to_jiffies(1000); | ||
1444 | while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0) | ||
1445 | && time_before(jiffies, timeout)) { | ||
1446 | msleep(50); | ||
1447 | } | ||
1448 | } | ||
1449 | |||
1450 | /* | ||
1451 | * As the ELD notify callback request is not entertained while the | ||
1452 | * device is in suspend state. Need to manually check detection of | ||
1453 | * all pins here. | ||
1454 | */ | ||
1455 | list_for_each_entry(pin, &hdmi->pin_list, head) | ||
1456 | hdac_hdmi_present_sense(pin, 1); | ||
1457 | |||
1458 | /* | ||
1459 | * Codec power is turned ON during controller resume. | ||
1460 | * Turn it OFF here | ||
1461 | */ | ||
1462 | err = snd_hdac_display_power(bus, false); | ||
1463 | if (err < 0) { | ||
1464 | dev_err(bus->dev, | ||
1465 | "Cannot turn OFF display power on i915, err: %d\n", | ||
1466 | err); | ||
1467 | return err; | ||
1468 | } | ||
1469 | |||
1470 | return 0; | ||
1471 | } | ||
1472 | #else | ||
1473 | #define hdmi_codec_resume NULL | ||
1474 | #endif | ||
1475 | |||
518 | static struct snd_soc_codec_driver hdmi_hda_codec = { | 1476 | static struct snd_soc_codec_driver hdmi_hda_codec = { |
519 | .probe = hdmi_codec_probe, | 1477 | .probe = hdmi_codec_probe, |
520 | .remove = hdmi_codec_remove, | 1478 | .remove = hdmi_codec_remove, |
1479 | .resume = hdmi_codec_resume, | ||
521 | .idle_bias_off = true, | 1480 | .idle_bias_off = true, |
522 | }; | 1481 | }; |
523 | 1482 | ||
524 | static struct snd_soc_dai_ops hdmi_dai_ops = { | ||
525 | .startup = hdac_hdmi_pcm_open, | ||
526 | .shutdown = hdac_hdmi_pcm_close, | ||
527 | .hw_params = hdac_hdmi_set_hw_params, | ||
528 | .prepare = hdac_hdmi_playback_prepare, | ||
529 | .hw_free = hdac_hdmi_playback_cleanup, | ||
530 | }; | ||
531 | |||
532 | static struct snd_soc_dai_driver hdmi_dais[] = { | ||
533 | { .name = "intel-hdmi-hif1", | ||
534 | .playback = { | ||
535 | .stream_name = "hif1", | ||
536 | .channels_min = 2, | ||
537 | .channels_max = 2, | ||
538 | .rates = SNDRV_PCM_RATE_32000 | | ||
539 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | | ||
540 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | | ||
541 | SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000, | ||
542 | .formats = SNDRV_PCM_FMTBIT_S16_LE | | ||
543 | SNDRV_PCM_FMTBIT_S20_3LE | | ||
544 | SNDRV_PCM_FMTBIT_S24_LE | | ||
545 | SNDRV_PCM_FMTBIT_S32_LE, | ||
546 | |||
547 | }, | ||
548 | .ops = &hdmi_dai_ops, | ||
549 | }, | ||
550 | }; | ||
551 | |||
552 | static int hdac_hdmi_dev_probe(struct hdac_ext_device *edev) | 1483 | static int hdac_hdmi_dev_probe(struct hdac_ext_device *edev) |
553 | { | 1484 | { |
554 | struct hdac_device *codec = &edev->hdac; | 1485 | struct hdac_device *codec = &edev->hdac; |
555 | struct hdac_hdmi_priv *hdmi_priv; | 1486 | struct hdac_hdmi_priv *hdmi_priv; |
1487 | struct snd_soc_dai_driver *hdmi_dais = NULL; | ||
1488 | int num_dais = 0; | ||
556 | int ret = 0; | 1489 | int ret = 0; |
557 | 1490 | ||
558 | hdmi_priv = devm_kzalloc(&codec->dev, sizeof(*hdmi_priv), GFP_KERNEL); | 1491 | hdmi_priv = devm_kzalloc(&codec->dev, sizeof(*hdmi_priv), GFP_KERNEL); |
@@ -565,14 +1498,31 @@ static int hdac_hdmi_dev_probe(struct hdac_ext_device *edev) | |||
565 | 1498 | ||
566 | INIT_LIST_HEAD(&hdmi_priv->pin_list); | 1499 | INIT_LIST_HEAD(&hdmi_priv->pin_list); |
567 | INIT_LIST_HEAD(&hdmi_priv->cvt_list); | 1500 | INIT_LIST_HEAD(&hdmi_priv->cvt_list); |
1501 | INIT_LIST_HEAD(&hdmi_priv->pcm_list); | ||
1502 | mutex_init(&hdmi_priv->pin_mutex); | ||
568 | 1503 | ||
569 | ret = hdac_hdmi_parse_and_map_nid(edev); | 1504 | /* |
570 | if (ret < 0) | 1505 | * Turned off in the runtime_suspend during the first explicit |
1506 | * pm_runtime_suspend call. | ||
1507 | */ | ||
1508 | ret = snd_hdac_display_power(edev->hdac.bus, true); | ||
1509 | if (ret < 0) { | ||
1510 | dev_err(&edev->hdac.dev, | ||
1511 | "Cannot turn on display power on i915 err: %d\n", | ||
1512 | ret); | ||
571 | return ret; | 1513 | return ret; |
1514 | } | ||
1515 | |||
1516 | ret = hdac_hdmi_parse_and_map_nid(edev, &hdmi_dais, &num_dais); | ||
1517 | if (ret < 0) { | ||
1518 | dev_err(&codec->dev, | ||
1519 | "Failed in parse and map nid with err: %d\n", ret); | ||
1520 | return ret; | ||
1521 | } | ||
572 | 1522 | ||
573 | /* ASoC specific initialization */ | 1523 | /* ASoC specific initialization */ |
574 | return snd_soc_register_codec(&codec->dev, &hdmi_hda_codec, | 1524 | return snd_soc_register_codec(&codec->dev, &hdmi_hda_codec, |
575 | hdmi_dais, ARRAY_SIZE(hdmi_dais)); | 1525 | hdmi_dais, num_dais); |
576 | } | 1526 | } |
577 | 1527 | ||
578 | static int hdac_hdmi_dev_remove(struct hdac_ext_device *edev) | 1528 | static int hdac_hdmi_dev_remove(struct hdac_ext_device *edev) |
@@ -580,11 +1530,20 @@ static int hdac_hdmi_dev_remove(struct hdac_ext_device *edev) | |||
580 | struct hdac_hdmi_priv *hdmi = edev->private_data; | 1530 | struct hdac_hdmi_priv *hdmi = edev->private_data; |
581 | struct hdac_hdmi_pin *pin, *pin_next; | 1531 | struct hdac_hdmi_pin *pin, *pin_next; |
582 | struct hdac_hdmi_cvt *cvt, *cvt_next; | 1532 | struct hdac_hdmi_cvt *cvt, *cvt_next; |
1533 | struct hdac_hdmi_pcm *pcm, *pcm_next; | ||
583 | 1534 | ||
584 | snd_soc_unregister_codec(&edev->hdac.dev); | 1535 | snd_soc_unregister_codec(&edev->hdac.dev); |
585 | 1536 | ||
1537 | list_for_each_entry_safe(pcm, pcm_next, &hdmi->pcm_list, head) { | ||
1538 | pcm->cvt = NULL; | ||
1539 | pcm->pin = NULL; | ||
1540 | list_del(&pcm->head); | ||
1541 | kfree(pcm); | ||
1542 | } | ||
1543 | |||
586 | list_for_each_entry_safe(cvt, cvt_next, &hdmi->cvt_list, head) { | 1544 | list_for_each_entry_safe(cvt, cvt_next, &hdmi->cvt_list, head) { |
587 | list_del(&cvt->head); | 1545 | list_del(&cvt->head); |
1546 | kfree(cvt->name); | ||
588 | kfree(cvt); | 1547 | kfree(cvt); |
589 | } | 1548 | } |
590 | 1549 | ||
@@ -602,6 +1561,7 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) | |||
602 | struct hdac_ext_device *edev = to_hda_ext_device(dev); | 1561 | struct hdac_ext_device *edev = to_hda_ext_device(dev); |
603 | struct hdac_device *hdac = &edev->hdac; | 1562 | struct hdac_device *hdac = &edev->hdac; |
604 | struct hdac_bus *bus = hdac->bus; | 1563 | struct hdac_bus *bus = hdac->bus; |
1564 | unsigned long timeout; | ||
605 | int err; | 1565 | int err; |
606 | 1566 | ||
607 | dev_dbg(dev, "Enter: %s\n", __func__); | 1567 | dev_dbg(dev, "Enter: %s\n", __func__); |
@@ -611,10 +1571,19 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) | |||
611 | return 0; | 1571 | return 0; |
612 | 1572 | ||
613 | /* Power down afg */ | 1573 | /* Power down afg */ |
614 | if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)) | 1574 | if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)) { |
615 | snd_hdac_codec_write(hdac, hdac->afg, 0, | 1575 | snd_hdac_codec_write(hdac, hdac->afg, 0, |
616 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); | 1576 | AC_VERB_SET_POWER_STATE, AC_PWRST_D3); |
617 | 1577 | ||
1578 | /* Wait till power state is set to D3 */ | ||
1579 | timeout = jiffies + msecs_to_jiffies(1000); | ||
1580 | while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3) | ||
1581 | && time_before(jiffies, timeout)) { | ||
1582 | |||
1583 | msleep(50); | ||
1584 | } | ||
1585 | } | ||
1586 | |||
618 | err = snd_hdac_display_power(bus, false); | 1587 | err = snd_hdac_display_power(bus, false); |
619 | if (err < 0) { | 1588 | if (err < 0) { |
620 | dev_err(bus->dev, "Cannot turn on display power on i915\n"); | 1589 | dev_err(bus->dev, "Cannot turn on display power on i915\n"); |
@@ -643,6 +1612,9 @@ static int hdac_hdmi_runtime_resume(struct device *dev) | |||
643 | return err; | 1612 | return err; |
644 | } | 1613 | } |
645 | 1614 | ||
1615 | hdac_hdmi_skl_enable_all_pins(&edev->hdac); | ||
1616 | hdac_hdmi_skl_enable_dp12(&edev->hdac); | ||
1617 | |||
646 | /* Power up afg */ | 1618 | /* Power up afg */ |
647 | if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)) | 1619 | if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)) |
648 | snd_hdac_codec_write(hdac, hdac->afg, 0, | 1620 | snd_hdac_codec_write(hdac, hdac->afg, 0, |
@@ -661,6 +1633,7 @@ static const struct dev_pm_ops hdac_hdmi_pm = { | |||
661 | 1633 | ||
662 | static const struct hda_device_id hdmi_list[] = { | 1634 | static const struct hda_device_id hdmi_list[] = { |
663 | HDA_CODEC_EXT_ENTRY(0x80862809, 0x100000, "Skylake HDMI", 0), | 1635 | HDA_CODEC_EXT_ENTRY(0x80862809, 0x100000, "Skylake HDMI", 0), |
1636 | HDA_CODEC_EXT_ENTRY(0x8086280a, 0x100000, "Broxton HDMI", 0), | ||
664 | {} | 1637 | {} |
665 | }; | 1638 | }; |
666 | 1639 | ||
diff --git a/sound/soc/codecs/hdac_hdmi.h b/sound/soc/codecs/hdac_hdmi.h new file mode 100644 index 000000000000..8dfd1e0b57b3 --- /dev/null +++ b/sound/soc/codecs/hdac_hdmi.h | |||
@@ -0,0 +1,6 @@ | |||
1 | #ifndef __HDAC_HDMI_H__ | ||
2 | #define __HDAC_HDMI_H__ | ||
3 | |||
4 | int hdac_hdmi_jack_init(struct snd_soc_dai *dai, int pcm); | ||
5 | |||
6 | #endif /* __HDAC_HDMI_H__ */ | ||
diff --git a/sound/soc/codecs/max9867.c b/sound/soc/codecs/max9867.c new file mode 100755 index 000000000000..2a22fddeb6af --- /dev/null +++ b/sound/soc/codecs/max9867.c | |||
@@ -0,0 +1,546 @@ | |||
1 | /* | ||
2 | * max9867.c -- max9867 ALSA SoC Audio driver | ||
3 | * | ||
4 | * Copyright 2013-15 Maxim Integrated Products | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/delay.h> | ||
12 | #include <linux/i2c.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/regmap.h> | ||
15 | #include <sound/pcm_params.h> | ||
16 | #include <sound/soc.h> | ||
17 | #include <sound/tlv.h> | ||
18 | #include "max9867.h" | ||
19 | |||
20 | static const char *const max9867_spmode[] = { | ||
21 | "Stereo Diff", "Mono Diff", | ||
22 | "Stereo Cap", "Mono Cap", | ||
23 | "Stereo Single", "Mono Single", | ||
24 | "Stereo Single Fast", "Mono Single Fast" | ||
25 | }; | ||
26 | static const char *const max9867_sidetone_text[] = { | ||
27 | "None", "Left", "Right", "LeftRight", "LeftRightDiv2", | ||
28 | }; | ||
29 | static const char *const max9867_filter_text[] = {"IIR", "FIR"}; | ||
30 | |||
31 | static SOC_ENUM_SINGLE_DECL(max9867_filter, MAX9867_CODECFLTR, 7, | ||
32 | max9867_filter_text); | ||
33 | static SOC_ENUM_SINGLE_DECL(max9867_spkmode, MAX9867_MODECONFIG, 0, | ||
34 | max9867_spmode); | ||
35 | static SOC_ENUM_SINGLE_DECL(max9867_sidetone, MAX9867_DACGAIN, 6, | ||
36 | max9867_sidetone_text); | ||
37 | static DECLARE_TLV_DB_SCALE(max9860_capture_tlv, -600, 200, 0); | ||
38 | static DECLARE_TLV_DB_SCALE(max9860_mic_tlv, 2000, 100, 1); | ||
39 | static DECLARE_TLV_DB_SCALE(max9860_adc_left_tlv, -1200, 100, 1); | ||
40 | static DECLARE_TLV_DB_SCALE(max9860_adc_right_tlv, -1200, 100, 1); | ||
41 | static const unsigned int max98088_micboost_tlv[] = { | ||
42 | TLV_DB_RANGE_HEAD(2), | ||
43 | 0, 1, TLV_DB_SCALE_ITEM(0, 2000, 0), | ||
44 | 2, 2, TLV_DB_SCALE_ITEM(3000, 0, 0), | ||
45 | }; | ||
46 | |||
47 | static const struct snd_kcontrol_new max9867_snd_controls[] = { | ||
48 | SOC_DOUBLE_R("Master Playback Volume", MAX9867_LEFTVOL, | ||
49 | MAX9867_RIGHTVOL, 0, 63, 1), | ||
50 | SOC_DOUBLE_R_TLV("Capture Volume", MAX9867_LEFTMICGAIN, | ||
51 | MAX9867_RIGHTMICGAIN, | ||
52 | 0, 15, 1, max9860_capture_tlv), | ||
53 | SOC_DOUBLE_R_TLV("Mic Volume", MAX9867_LEFTMICGAIN, | ||
54 | MAX9867_RIGHTMICGAIN, 0, 31, 1, max9860_mic_tlv), | ||
55 | SOC_DOUBLE_R_TLV("Mic Boost Volume", MAX9867_LEFTMICGAIN, | ||
56 | MAX9867_RIGHTMICGAIN, 5, 3, 0, max98088_micboost_tlv), | ||
57 | SOC_ENUM("Digital Sidetone Src", max9867_sidetone), | ||
58 | SOC_SINGLE("Sidetone Volume", MAX9867_DACGAIN, 0, 31, 1), | ||
59 | SOC_SINGLE("DAC Volume", MAX9867_DACLEVEL, 4, 3, 0), | ||
60 | SOC_SINGLE("DAC Attenuation", MAX9867_DACLEVEL, 0, 15, 1), | ||
61 | SOC_SINGLE_TLV("ADC Left Volume", MAX9867_ADCLEVEL, | ||
62 | 4, 15, 1, max9860_adc_left_tlv), | ||
63 | SOC_SINGLE_TLV("ADC Right Volume", MAX9867_ADCLEVEL, | ||
64 | 0, 15, 1, max9860_adc_right_tlv), | ||
65 | SOC_ENUM("Speaker Mode", max9867_spkmode), | ||
66 | SOC_SINGLE("Volume Smoothing Switch", MAX9867_MODECONFIG, 6, 1, 0), | ||
67 | SOC_SINGLE("ZCD Switch", MAX9867_MODECONFIG, 5, 1, 0), | ||
68 | SOC_ENUM("DSP Filter", max9867_filter), | ||
69 | }; | ||
70 | |||
71 | static const char *const max9867_mux[] = {"None", "Mic", "Line", "Mic_Line"}; | ||
72 | |||
73 | static SOC_ENUM_SINGLE_DECL(max9867_mux_enum, | ||
74 | MAX9867_INPUTCONFIG, MAX9867_INPUT_SHIFT, | ||
75 | max9867_mux); | ||
76 | |||
77 | static const struct snd_kcontrol_new max9867_dapm_mux_controls = | ||
78 | SOC_DAPM_ENUM("Route", max9867_mux_enum); | ||
79 | |||
80 | static const struct snd_kcontrol_new max9867_left_dapm_control = | ||
81 | SOC_DAPM_SINGLE("Switch", MAX9867_PWRMAN, 6, 1, 0); | ||
82 | static const struct snd_kcontrol_new max9867_right_dapm_control = | ||
83 | SOC_DAPM_SINGLE("Switch", MAX9867_PWRMAN, 5, 1, 0); | ||
84 | static const struct snd_kcontrol_new max9867_line_dapm_control = | ||
85 | SOC_DAPM_SINGLE("Switch", MAX9867_LEFTLINELVL, 6, 1, 1); | ||
86 | |||
87 | static const struct snd_soc_dapm_widget max9867_dapm_widgets[] = { | ||
88 | SND_SOC_DAPM_AIF_IN("DAI_OUT", "HiFi Playback", 0, SND_SOC_NOPM, 0, 0), | ||
89 | SND_SOC_DAPM_DAC("Left DAC", NULL, MAX9867_PWRMAN, 3, 0), | ||
90 | SND_SOC_DAPM_DAC("Right DAC", NULL, MAX9867_PWRMAN, 2, 0), | ||
91 | SND_SOC_DAPM_MIXER("Output Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
92 | SND_SOC_DAPM_OUTPUT("HPOUT"), | ||
93 | |||
94 | SND_SOC_DAPM_AIF_IN("DAI_IN", "HiFi Capture", 0, SND_SOC_NOPM, 0, 0), | ||
95 | SND_SOC_DAPM_ADC("Left ADC", "HiFi Capture", MAX9867_PWRMAN, 1, 0), | ||
96 | SND_SOC_DAPM_ADC("Right ADC", "HiFi Capture", MAX9867_PWRMAN, 0, 0), | ||
97 | SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, | ||
98 | &max9867_dapm_mux_controls), | ||
99 | |||
100 | SND_SOC_DAPM_MIXER("Input Mixer", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
101 | SND_SOC_DAPM_SWITCH("Left Line", MAX9867_LEFTLINELVL, 6, 1, | ||
102 | &max9867_left_dapm_control), | ||
103 | SND_SOC_DAPM_SWITCH("Right Line", MAX9867_RIGTHLINELVL, 6, 1, | ||
104 | &max9867_right_dapm_control), | ||
105 | SND_SOC_DAPM_SWITCH("Line Mixer", SND_SOC_NOPM, 0, 0, | ||
106 | &max9867_line_dapm_control), | ||
107 | SND_SOC_DAPM_INPUT("LINE_IN"), | ||
108 | }; | ||
109 | |||
110 | static const struct snd_soc_dapm_route max9867_audio_map[] = { | ||
111 | {"Left DAC", NULL, "DAI_OUT"}, | ||
112 | {"Right DAC", NULL, "DAI_OUT"}, | ||
113 | {"Output Mixer", NULL, "Left DAC"}, | ||
114 | {"Output Mixer", NULL, "Right DAC"}, | ||
115 | {"HPOUT", NULL, "Output Mixer"}, | ||
116 | |||
117 | {"Left ADC", NULL, "DAI_IN"}, | ||
118 | {"Right ADC", NULL, "DAI_IN"}, | ||
119 | {"Input Mixer", NULL, "Left ADC"}, | ||
120 | {"Input Mixer", NULL, "Right ADC"}, | ||
121 | {"Input Mux", "Line", "Input Mixer"}, | ||
122 | {"Input Mux", "Mic", "Input Mixer"}, | ||
123 | {"Input Mux", "Mic_Line", "Input Mixer"}, | ||
124 | {"Right Line", "Switch", "Input Mux"}, | ||
125 | {"Left Line", "Switch", "Input Mux"}, | ||
126 | {"LINE_IN", NULL, "Left Line"}, | ||
127 | {"LINE_IN", NULL, "Right Line"}, | ||
128 | }; | ||
129 | |||
130 | enum rates { | ||
131 | pcm_rate_8, pcm_rate_16, pcm_rate_24, | ||
132 | pcm_rate_32, pcm_rate_44, | ||
133 | pcm_rate_48, max_pcm_rate, | ||
134 | }; | ||
135 | |||
136 | struct ni_div_rates { | ||
137 | u32 mclk; | ||
138 | u16 ni[max_pcm_rate]; | ||
139 | } ni_div[] = { | ||
140 | {11289600, {0x116A, 0x22D4, 0x343F, 0x45A9, 0x6000, 0x687D} }, | ||
141 | {12000000, {0x1062, 0x20C5, 0x3127, 0x4189, 0x5A51, 0x624E} }, | ||
142 | {12288000, {0x1000, 0x2000, 0x3000, 0x4000, 0x5833, 0x6000} }, | ||
143 | {13000000, {0x0F20, 0x1E3F, 0x2D5F, 0x3C7F, 0x535F, 0x5ABE} }, | ||
144 | {19200000, {0x0A3D, 0x147B, 0x1EB8, 0x28F6, 0x3873, 0x3D71} }, | ||
145 | {24000000, {0x1062, 0x20C5, 0x1893, 0x4189, 0x5A51, 0x624E} }, | ||
146 | {26000000, {0x0F20, 0x1E3F, 0x16AF, 0x3C7F, 0x535F, 0x5ABE} }, | ||
147 | {27000000, {0x0E90, 0x1D21, 0x15D8, 0x3A41, 0x5048, 0x5762} }, | ||
148 | }; | ||
149 | |||
150 | static inline int get_ni_value(int mclk, int rate) | ||
151 | { | ||
152 | int i, ret = 0; | ||
153 | |||
154 | /* find the closest rate index*/ | ||
155 | for (i = 0; i < ARRAY_SIZE(ni_div); i++) { | ||
156 | if (ni_div[i].mclk >= mclk) | ||
157 | break; | ||
158 | } | ||
159 | if (i == ARRAY_SIZE(ni_div)) | ||
160 | return -EINVAL; | ||
161 | |||
162 | switch (rate) { | ||
163 | case 8000: | ||
164 | return ni_div[i].ni[pcm_rate_8]; | ||
165 | case 16000: | ||
166 | return ni_div[i].ni[pcm_rate_16]; | ||
167 | case 32000: | ||
168 | return ni_div[i].ni[pcm_rate_32]; | ||
169 | case 44100: | ||
170 | return ni_div[i].ni[pcm_rate_44]; | ||
171 | case 48000: | ||
172 | return ni_div[i].ni[pcm_rate_48]; | ||
173 | default: | ||
174 | pr_err("%s wrong rate %d\n", __func__, rate); | ||
175 | ret = -EINVAL; | ||
176 | } | ||
177 | return ret; | ||
178 | } | ||
179 | |||
180 | static int max9867_dai_hw_params(struct snd_pcm_substream *substream, | ||
181 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | ||
182 | { | ||
183 | struct snd_soc_codec *codec = dai->codec; | ||
184 | struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec); | ||
185 | unsigned int ni_h, ni_l; | ||
186 | int value; | ||
187 | |||
188 | value = get_ni_value(max9867->sysclk, params_rate(params)); | ||
189 | if (value < 0) | ||
190 | return value; | ||
191 | |||
192 | ni_h = (0xFF00 & value) >> 8; | ||
193 | ni_l = 0x00FF & value; | ||
194 | /* set up the ni value */ | ||
195 | regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH, | ||
196 | MAX9867_NI_HIGH_MASK, ni_h); | ||
197 | regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW, | ||
198 | MAX9867_NI_LOW_MASK, ni_l); | ||
199 | if (!max9867->master) { | ||
200 | /* | ||
201 | * digital pll locks on to any externally supplied LRCLK signal | ||
202 | * and also enable rapid lock mode. | ||
203 | */ | ||
204 | regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKLOW, | ||
205 | MAX9867_RAPID_LOCK, MAX9867_RAPID_LOCK); | ||
206 | regmap_update_bits(max9867->regmap, MAX9867_AUDIOCLKHIGH, | ||
207 | MAX9867_PLL, MAX9867_PLL); | ||
208 | } else { | ||
209 | unsigned long int bclk_rate, pclk_bclk_ratio; | ||
210 | int bclk_value; | ||
211 | |||
212 | bclk_rate = params_rate(params) * 2 * params_width(params); | ||
213 | pclk_bclk_ratio = max9867->pclk/bclk_rate; | ||
214 | switch (params_width(params)) { | ||
215 | case 8: | ||
216 | case 16: | ||
217 | switch (pclk_bclk_ratio) { | ||
218 | case 2: | ||
219 | bclk_value = MAX9867_IFC1B_PCLK_2; | ||
220 | break; | ||
221 | case 4: | ||
222 | bclk_value = MAX9867_IFC1B_PCLK_4; | ||
223 | break; | ||
224 | case 8: | ||
225 | bclk_value = MAX9867_IFC1B_PCLK_8; | ||
226 | break; | ||
227 | case 16: | ||
228 | bclk_value = MAX9867_IFC1B_PCLK_16; | ||
229 | break; | ||
230 | default: | ||
231 | dev_err(codec->dev, | ||
232 | "unsupported sampling rate\n"); | ||
233 | return -EINVAL; | ||
234 | } | ||
235 | break; | ||
236 | case 24: | ||
237 | bclk_value = MAX9867_IFC1B_24BIT; | ||
238 | break; | ||
239 | case 32: | ||
240 | bclk_value = MAX9867_IFC1B_32BIT; | ||
241 | break; | ||
242 | default: | ||
243 | dev_err(codec->dev, "unsupported sampling rate\n"); | ||
244 | return -EINVAL; | ||
245 | } | ||
246 | regmap_update_bits(max9867->regmap, MAX9867_IFC1B, | ||
247 | MAX9867_IFC1B_BCLK_MASK, bclk_value); | ||
248 | } | ||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | static int max9867_prepare(struct snd_pcm_substream *substream, | ||
253 | struct snd_soc_dai *dai) | ||
254 | { | ||
255 | struct snd_soc_codec *codec = dai->codec; | ||
256 | struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec); | ||
257 | |||
258 | regmap_update_bits(max9867->regmap, MAX9867_PWRMAN, | ||
259 | MAX9867_SHTDOWN_MASK, MAX9867_SHTDOWN_MASK); | ||
260 | return 0; | ||
261 | } | ||
262 | |||
263 | static int max9867_mute(struct snd_soc_dai *dai, int mute) | ||
264 | { | ||
265 | struct snd_soc_codec *codec = dai->codec; | ||
266 | struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec); | ||
267 | |||
268 | if (mute) | ||
269 | regmap_update_bits(max9867->regmap, MAX9867_DACLEVEL, | ||
270 | MAX9867_DAC_MUTE_MASK, MAX9867_DAC_MUTE_MASK); | ||
271 | else | ||
272 | regmap_update_bits(max9867->regmap, MAX9867_DACLEVEL, | ||
273 | MAX9867_DAC_MUTE_MASK, 0); | ||
274 | return 0; | ||
275 | } | ||
276 | |||
277 | static int max9867_set_dai_sysclk(struct snd_soc_dai *codec_dai, | ||
278 | int clk_id, unsigned int freq, int dir) | ||
279 | { | ||
280 | struct snd_soc_codec *codec = codec_dai->codec; | ||
281 | struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec); | ||
282 | int value = 0; | ||
283 | |||
284 | /* Set the prescaler based on the master clock frequency*/ | ||
285 | if (freq >= 10000000 && freq <= 20000000) { | ||
286 | value |= MAX9867_PSCLK_10_20; | ||
287 | max9867->pclk = freq; | ||
288 | } else if (freq >= 20000000 && freq <= 40000000) { | ||
289 | value |= MAX9867_PSCLK_20_40; | ||
290 | max9867->pclk = freq/2; | ||
291 | } else if (freq >= 40000000 && freq <= 60000000) { | ||
292 | value |= MAX9867_PSCLK_40_60; | ||
293 | max9867->pclk = freq/4; | ||
294 | } else { | ||
295 | pr_err("bad clock frequency %d", freq); | ||
296 | return -EINVAL; | ||
297 | } | ||
298 | value = value << MAX9867_PSCLK_SHIFT; | ||
299 | max9867->sysclk = freq; | ||
300 | /* exact integer mode is not supported */ | ||
301 | value &= ~MAX9867_FREQ_MASK; | ||
302 | regmap_update_bits(max9867->regmap, MAX9867_SYSCLK, | ||
303 | MAX9867_PSCLK_MASK, value); | ||
304 | return 0; | ||
305 | } | ||
306 | |||
307 | static int max9867_dai_set_fmt(struct snd_soc_dai *codec_dai, | ||
308 | unsigned int fmt) | ||
309 | { | ||
310 | struct snd_soc_codec *codec = codec_dai->codec; | ||
311 | struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec); | ||
312 | u8 iface1A = 0, iface1B = 0; | ||
313 | int ret; | ||
314 | |||
315 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | ||
316 | case SND_SOC_DAIFMT_CBM_CFM: | ||
317 | max9867->master = 1; | ||
318 | iface1A |= MAX9867_MASTER; | ||
319 | break; | ||
320 | case SND_SOC_DAIFMT_CBS_CFS: | ||
321 | max9867->master = 0; | ||
322 | iface1A &= ~MAX9867_MASTER; | ||
323 | break; | ||
324 | default: | ||
325 | return -EINVAL; | ||
326 | } | ||
327 | |||
328 | /* for i2s compatible mode */ | ||
329 | iface1A |= MAX9867_I2S_DLY; | ||
330 | /* SDOUT goes to hiz state after all data is transferred */ | ||
331 | iface1A |= MAX9867_SDOUT_HIZ; | ||
332 | |||
333 | /* Clock inversion bits, BCI and WCI */ | ||
334 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | ||
335 | case SND_SOC_DAIFMT_NB_NF: | ||
336 | break; | ||
337 | case SND_SOC_DAIFMT_IB_IF: | ||
338 | iface1A |= MAX9867_WCI_MODE | MAX9867_BCI_MODE; | ||
339 | break; | ||
340 | case SND_SOC_DAIFMT_IB_NF: | ||
341 | iface1A |= MAX9867_BCI_MODE; | ||
342 | break; | ||
343 | case SND_SOC_DAIFMT_NB_IF: | ||
344 | iface1A |= MAX9867_WCI_MODE; | ||
345 | break; | ||
346 | default: | ||
347 | return -EINVAL; | ||
348 | } | ||
349 | |||
350 | ret = regmap_write(max9867->regmap, MAX9867_IFC1A, iface1A); | ||
351 | ret = regmap_write(max9867->regmap, MAX9867_IFC1B, iface1B); | ||
352 | return 0; | ||
353 | } | ||
354 | |||
355 | static struct snd_soc_dai_ops max9867_dai_ops = { | ||
356 | .set_fmt = max9867_dai_set_fmt, | ||
357 | .set_sysclk = max9867_set_dai_sysclk, | ||
358 | .prepare = max9867_prepare, | ||
359 | .digital_mute = max9867_mute, | ||
360 | .hw_params = max9867_dai_hw_params, | ||
361 | }; | ||
362 | |||
363 | #define MAX9867_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ | ||
364 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) | ||
365 | #define MAX9867_FORMATS (SNDRV_PCM_FMTBIT_S16_LE) | ||
366 | |||
367 | static struct snd_soc_dai_driver max9867_dai[] = { | ||
368 | { | ||
369 | .name = "max9867-aif1", | ||
370 | .playback = { | ||
371 | .stream_name = "HiFi Playback", | ||
372 | .channels_min = 1, | ||
373 | .channels_max = 2, | ||
374 | .rates = MAX9867_RATES, | ||
375 | .formats = MAX9867_FORMATS, | ||
376 | }, | ||
377 | .capture = { | ||
378 | .stream_name = "HiFi Capture", | ||
379 | .channels_min = 1, | ||
380 | .channels_max = 2, | ||
381 | .rates = MAX9867_RATES, | ||
382 | .formats = MAX9867_FORMATS, | ||
383 | }, | ||
384 | .ops = &max9867_dai_ops, | ||
385 | } | ||
386 | }; | ||
387 | |||
388 | #ifdef CONFIG_PM_SLEEP | ||
389 | static int max9867_suspend(struct device *dev) | ||
390 | { | ||
391 | struct max9867_priv *max9867 = dev_get_drvdata(dev); | ||
392 | |||
393 | /* Drop down to power saving mode when system is suspended */ | ||
394 | regmap_update_bits(max9867->regmap, MAX9867_PWRMAN, | ||
395 | MAX9867_SHTDOWN_MASK, ~MAX9867_SHTDOWN_MASK); | ||
396 | return 0; | ||
397 | } | ||
398 | |||
399 | static int max9867_resume(struct device *dev) | ||
400 | { | ||
401 | struct max9867_priv *max9867 = dev_get_drvdata(dev); | ||
402 | |||
403 | regmap_update_bits(max9867->regmap, MAX9867_PWRMAN, | ||
404 | MAX9867_SHTDOWN_MASK, MAX9867_SHTDOWN_MASK); | ||
405 | return 0; | ||
406 | } | ||
407 | #endif | ||
408 | |||
409 | static int max9867_probe(struct snd_soc_codec *codec) | ||
410 | { | ||
411 | struct max9867_priv *max9867 = snd_soc_codec_get_drvdata(codec); | ||
412 | |||
413 | dev_dbg(codec->dev, "max98090_probe\n"); | ||
414 | max9867->codec = codec; | ||
415 | return 0; | ||
416 | } | ||
417 | |||
418 | static struct snd_soc_codec_driver max9867_codec = { | ||
419 | .probe = max9867_probe, | ||
420 | .controls = max9867_snd_controls, | ||
421 | .num_controls = ARRAY_SIZE(max9867_snd_controls), | ||
422 | .dapm_routes = max9867_audio_map, | ||
423 | .num_dapm_routes = ARRAY_SIZE(max9867_audio_map), | ||
424 | .dapm_widgets = max9867_dapm_widgets, | ||
425 | .num_dapm_widgets = ARRAY_SIZE(max9867_dapm_widgets), | ||
426 | }; | ||
427 | |||
428 | static bool max9867_volatile_register(struct device *dev, unsigned int reg) | ||
429 | { | ||
430 | switch (reg) { | ||
431 | case MAX9867_STATUS: | ||
432 | case MAX9867_JACKSTATUS: | ||
433 | case MAX9867_AUXHIGH: | ||
434 | case MAX9867_AUXLOW: | ||
435 | return true; | ||
436 | default: | ||
437 | return false; | ||
438 | } | ||
439 | } | ||
440 | |||
441 | static const struct reg_default max9867_reg[] = { | ||
442 | { 0x04, 0x00 }, | ||
443 | { 0x05, 0x00 }, | ||
444 | { 0x06, 0x00 }, | ||
445 | { 0x07, 0x00 }, | ||
446 | { 0x08, 0x00 }, | ||
447 | { 0x09, 0x00 }, | ||
448 | { 0x0A, 0x00 }, | ||
449 | { 0x0B, 0x00 }, | ||
450 | { 0x0C, 0x00 }, | ||
451 | { 0x0D, 0x00 }, | ||
452 | { 0x0E, 0x00 }, | ||
453 | { 0x0F, 0x00 }, | ||
454 | { 0x10, 0x00 }, | ||
455 | { 0x11, 0x00 }, | ||
456 | { 0x12, 0x00 }, | ||
457 | { 0x13, 0x00 }, | ||
458 | { 0x14, 0x00 }, | ||
459 | { 0x15, 0x00 }, | ||
460 | { 0x16, 0x00 }, | ||
461 | { 0x17, 0x00 }, | ||
462 | }; | ||
463 | |||
464 | static const struct regmap_config max9867_regmap = { | ||
465 | .reg_bits = 8, | ||
466 | .val_bits = 8, | ||
467 | .max_register = MAX9867_REVISION, | ||
468 | .reg_defaults = max9867_reg, | ||
469 | .num_reg_defaults = ARRAY_SIZE(max9867_reg), | ||
470 | .volatile_reg = max9867_volatile_register, | ||
471 | .cache_type = REGCACHE_RBTREE, | ||
472 | }; | ||
473 | |||
474 | static int max9867_i2c_probe(struct i2c_client *i2c, | ||
475 | const struct i2c_device_id *id) | ||
476 | { | ||
477 | struct max9867_priv *max9867; | ||
478 | int ret = 0, reg; | ||
479 | |||
480 | max9867 = devm_kzalloc(&i2c->dev, | ||
481 | sizeof(*max9867), GFP_KERNEL); | ||
482 | if (!max9867) | ||
483 | return -ENOMEM; | ||
484 | |||
485 | i2c_set_clientdata(i2c, max9867); | ||
486 | max9867->regmap = devm_regmap_init_i2c(i2c, &max9867_regmap); | ||
487 | if (IS_ERR(max9867->regmap)) { | ||
488 | ret = PTR_ERR(max9867->regmap); | ||
489 | dev_err(&i2c->dev, | ||
490 | "Failed to allocate regmap: %d\n", ret); | ||
491 | return ret; | ||
492 | } | ||
493 | ret = regmap_read(max9867->regmap, | ||
494 | MAX9867_REVISION, ®); | ||
495 | if (ret < 0) { | ||
496 | dev_err(&i2c->dev, "Failed to read: %d\n", ret); | ||
497 | return ret; | ||
498 | } | ||
499 | dev_info(&i2c->dev, "device revision: %x\n", reg); | ||
500 | ret = snd_soc_register_codec(&i2c->dev, &max9867_codec, | ||
501 | max9867_dai, ARRAY_SIZE(max9867_dai)); | ||
502 | if (ret < 0) { | ||
503 | dev_err(&i2c->dev, "Failed to register codec: %d\n", ret); | ||
504 | return ret; | ||
505 | } | ||
506 | return ret; | ||
507 | } | ||
508 | |||
509 | static int max9867_i2c_remove(struct i2c_client *client) | ||
510 | { | ||
511 | snd_soc_unregister_codec(&client->dev); | ||
512 | return 0; | ||
513 | } | ||
514 | |||
515 | static const struct i2c_device_id max9867_i2c_id[] = { | ||
516 | { "max9867", 0 }, | ||
517 | { } | ||
518 | }; | ||
519 | |||
520 | static const struct of_device_id max9867_of_match[] = { | ||
521 | { .compatible = "maxim,max9867", }, | ||
522 | { } | ||
523 | }; | ||
524 | |||
525 | MODULE_DEVICE_TABLE(i2c, max9867_i2c_id); | ||
526 | |||
527 | static const struct dev_pm_ops max9867_pm_ops = { | ||
528 | SET_SYSTEM_SLEEP_PM_OPS(max9867_suspend, max9867_resume) | ||
529 | }; | ||
530 | |||
531 | static struct i2c_driver max9867_i2c_driver = { | ||
532 | .driver = { | ||
533 | .name = "max9867", | ||
534 | .of_match_table = of_match_ptr(max9867_of_match), | ||
535 | .pm = &max9867_pm_ops, | ||
536 | }, | ||
537 | .probe = max9867_i2c_probe, | ||
538 | .remove = max9867_i2c_remove, | ||
539 | .id_table = max9867_i2c_id, | ||
540 | }; | ||
541 | |||
542 | module_i2c_driver(max9867_i2c_driver); | ||
543 | |||
544 | MODULE_AUTHOR("anish kumar <yesanishhere@gmail.com>"); | ||
545 | MODULE_DESCRIPTION("ALSA SoC MAX9867 driver"); | ||
546 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/codecs/max9867.h b/sound/soc/codecs/max9867.h new file mode 100755 index 000000000000..65590b4ad62a --- /dev/null +++ b/sound/soc/codecs/max9867.h | |||
@@ -0,0 +1,83 @@ | |||
1 | /* | ||
2 | * max9867.h -- MAX9867 ALSA SoC Audio driver | ||
3 | * | ||
4 | * Copyright 2013-2015 Maxim Integrated Products | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef _MAX9867_H | ||
12 | #define _MAX9867_H | ||
13 | |||
14 | /* MAX9867 register space */ | ||
15 | |||
16 | #define MAX9867_STATUS 0x00 | ||
17 | #define MAX9867_JACKSTATUS 0x01 | ||
18 | #define MAX9867_AUXHIGH 0x02 | ||
19 | #define MAX9867_AUXLOW 0x03 | ||
20 | #define MAX9867_INTEN 0x04 | ||
21 | #define MAX9867_SYSCLK 0x05 | ||
22 | #define MAX9867_FREQ_MASK 0xF | ||
23 | #define MAX9867_PSCLK_SHIFT 0x4 | ||
24 | #define MAX9867_PSCLK_WIDTH 0x2 | ||
25 | #define MAX9867_PSCLK_MASK (0x03<<MAX9867_PSCLK_SHIFT) | ||
26 | #define MAX9867_PSCLK_10_20 0x1 | ||
27 | #define MAX9867_PSCLK_20_40 0x2 | ||
28 | #define MAX9867_PSCLK_40_60 0x3 | ||
29 | #define MAX9867_AUDIOCLKHIGH 0x06 | ||
30 | #define MAX9867_NI_HIGH_WIDTH 0x7 | ||
31 | #define MAX9867_NI_HIGH_MASK 0x7F | ||
32 | #define MAX9867_NI_LOW_MASK 0x7F | ||
33 | #define MAX9867_NI_LOW_SHIFT 0x1 | ||
34 | #define MAX9867_PLL (1<<7) | ||
35 | #define MAX9867_AUDIOCLKLOW 0x07 | ||
36 | #define MAX9867_RAPID_LOCK 0x01 | ||
37 | #define MAX9867_IFC1A 0x08 | ||
38 | #define MAX9867_MASTER (1<<7) | ||
39 | #define MAX9867_I2S_DLY (1<<4) | ||
40 | #define MAX9867_SDOUT_HIZ (1<<3) | ||
41 | #define MAX9867_TDM_MODE (1<<2) | ||
42 | #define MAX9867_WCI_MODE (1<<6) | ||
43 | #define MAX9867_BCI_MODE (1<<5) | ||
44 | #define MAX9867_IFC1B 0x09 | ||
45 | #define MAX9867_IFC1B_BCLK_MASK 7 | ||
46 | #define MAX9867_IFC1B_32BIT 0x01 | ||
47 | #define MAX9867_IFC1B_24BIT 0x02 | ||
48 | #define MAX9867_IFC1B_PCLK_2 4 | ||
49 | #define MAX9867_IFC1B_PCLK_4 5 | ||
50 | #define MAX9867_IFC1B_PCLK_8 6 | ||
51 | #define MAX9867_IFC1B_PCLK_16 7 | ||
52 | #define MAX9867_CODECFLTR 0x0a | ||
53 | #define MAX9867_DACGAIN 0x0b | ||
54 | #define MAX9867_DACLEVEL 0x0c | ||
55 | #define MAX9867_DAC_MUTE_SHIFT 0x6 | ||
56 | #define MAX9867_DAC_MUTE_WIDTH 0x1 | ||
57 | #define MAX9867_DAC_MUTE_MASK (0x1<<MAX9867_DAC_MUTE_SHIFT) | ||
58 | #define MAX9867_ADCLEVEL 0x0d | ||
59 | #define MAX9867_LEFTLINELVL 0x0e | ||
60 | #define MAX9867_RIGTHLINELVL 0x0f | ||
61 | #define MAX9867_LEFTVOL 0x10 | ||
62 | #define MAX9867_RIGHTVOL 0x11 | ||
63 | #define MAX9867_LEFTMICGAIN 0x12 | ||
64 | #define MAX9867_RIGHTMICGAIN 0x13 | ||
65 | #define MAX9867_INPUTCONFIG 0x14 | ||
66 | #define MAX9867_INPUT_SHIFT 0x6 | ||
67 | #define MAX9867_MICCONFIG 0x15 | ||
68 | #define MAX9867_MODECONFIG 0x16 | ||
69 | #define MAX9867_PWRMAN 0x17 | ||
70 | #define MAX9867_SHTDOWN_MASK (1<<7) | ||
71 | #define MAX9867_REVISION 0xff | ||
72 | |||
73 | #define MAX9867_CACHEREGNUM 10 | ||
74 | |||
75 | /* codec private data */ | ||
76 | struct max9867_priv { | ||
77 | struct regmap *regmap; | ||
78 | struct snd_soc_codec *codec; | ||
79 | unsigned int sysclk; | ||
80 | unsigned int pclk; | ||
81 | unsigned int master; | ||
82 | }; | ||
83 | #endif | ||
diff --git a/sound/soc/codecs/max98926.c b/sound/soc/codecs/max98926.c new file mode 100644 index 000000000000..8d14adae5cc5 --- /dev/null +++ b/sound/soc/codecs/max98926.c | |||
@@ -0,0 +1,606 @@ | |||
1 | /* | ||
2 | * max98926.c -- ALSA SoC MAX98926 driver | ||
3 | * Copyright 2013-15 Maxim Integrated Products | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/delay.h> | ||
9 | #include <linux/i2c.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/regmap.h> | ||
12 | #include <linux/slab.h> | ||
13 | #include <linux/cdev.h> | ||
14 | #include <sound/pcm.h> | ||
15 | #include <sound/pcm_params.h> | ||
16 | #include <sound/soc.h> | ||
17 | #include <sound/tlv.h> | ||
18 | #include "max98926.h" | ||
19 | |||
20 | static const char * const max98926_boost_voltage_txt[] = { | ||
21 | "8.5V", "8.25V", "8.0V", "7.75V", "7.5V", "7.25V", "7.0V", "6.75V", | ||
22 | "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V", "6.5V" | ||
23 | }; | ||
24 | |||
25 | static const char * const max98926_boost_current_txt[] = { | ||
26 | "0.6", "0.8", "1.0", "1.2", "1.4", "1.6", "1.8", "2.0", | ||
27 | "2.2", "2.4", "2.6", "2.8", "3.2", "3.6", "4.0", "4.4" | ||
28 | }; | ||
29 | |||
30 | static const char *const max98926_dai_txt[] = { | ||
31 | "Left", "Right", "LeftRight", "LeftRightDiv2", | ||
32 | }; | ||
33 | |||
34 | static const char *const max98926_pdm_ch_text[] = { | ||
35 | "Current", "Voltage", | ||
36 | }; | ||
37 | |||
38 | static const char *const max98926_hpf_cutoff_txt[] = { | ||
39 | "Disable", "DC Block", "100Hz", | ||
40 | "200Hz", "400Hz", "800Hz", | ||
41 | }; | ||
42 | |||
43 | static const struct reg_default max98926_reg[] = { | ||
44 | { 0x0B, 0x00 }, /* IRQ Enable0 */ | ||
45 | { 0x0C, 0x00 }, /* IRQ Enable1 */ | ||
46 | { 0x0D, 0x00 }, /* IRQ Enable2 */ | ||
47 | { 0x0E, 0x00 }, /* IRQ Clear0 */ | ||
48 | { 0x0F, 0x00 }, /* IRQ Clear1 */ | ||
49 | { 0x10, 0x00 }, /* IRQ Clear2 */ | ||
50 | { 0x11, 0xC0 }, /* Map0 */ | ||
51 | { 0x12, 0x00 }, /* Map1 */ | ||
52 | { 0x13, 0x00 }, /* Map2 */ | ||
53 | { 0x14, 0xF0 }, /* Map3 */ | ||
54 | { 0x15, 0x00 }, /* Map4 */ | ||
55 | { 0x16, 0xAB }, /* Map5 */ | ||
56 | { 0x17, 0x89 }, /* Map6 */ | ||
57 | { 0x18, 0x00 }, /* Map7 */ | ||
58 | { 0x19, 0x00 }, /* Map8 */ | ||
59 | { 0x1A, 0x04 }, /* DAI Clock Mode 1 */ | ||
60 | { 0x1B, 0x00 }, /* DAI Clock Mode 2 */ | ||
61 | { 0x1C, 0x00 }, /* DAI Clock Divider Denominator MSBs */ | ||
62 | { 0x1D, 0x00 }, /* DAI Clock Divider Denominator LSBs */ | ||
63 | { 0x1E, 0xF0 }, /* DAI Clock Divider Numerator MSBs */ | ||
64 | { 0x1F, 0x00 }, /* DAI Clock Divider Numerator LSBs */ | ||
65 | { 0x20, 0x50 }, /* Format */ | ||
66 | { 0x21, 0x00 }, /* TDM Slot Select */ | ||
67 | { 0x22, 0x00 }, /* DOUT Configuration VMON */ | ||
68 | { 0x23, 0x00 }, /* DOUT Configuration IMON */ | ||
69 | { 0x24, 0x00 }, /* DOUT Configuration VBAT */ | ||
70 | { 0x25, 0x00 }, /* DOUT Configuration VBST */ | ||
71 | { 0x26, 0x00 }, /* DOUT Configuration FLAG */ | ||
72 | { 0x27, 0xFF }, /* DOUT HiZ Configuration 1 */ | ||
73 | { 0x28, 0xFF }, /* DOUT HiZ Configuration 2 */ | ||
74 | { 0x29, 0xFF }, /* DOUT HiZ Configuration 3 */ | ||
75 | { 0x2A, 0xFF }, /* DOUT HiZ Configuration 4 */ | ||
76 | { 0x2B, 0x02 }, /* DOUT Drive Strength */ | ||
77 | { 0x2C, 0x90 }, /* Filters */ | ||
78 | { 0x2D, 0x00 }, /* Gain */ | ||
79 | { 0x2E, 0x02 }, /* Gain Ramping */ | ||
80 | { 0x2F, 0x00 }, /* Speaker Amplifier */ | ||
81 | { 0x30, 0x0A }, /* Threshold */ | ||
82 | { 0x31, 0x00 }, /* ALC Attack */ | ||
83 | { 0x32, 0x80 }, /* ALC Atten and Release */ | ||
84 | { 0x33, 0x00 }, /* ALC Infinite Hold Release */ | ||
85 | { 0x34, 0x92 }, /* ALC Configuration */ | ||
86 | { 0x35, 0x01 }, /* Boost Converter */ | ||
87 | { 0x36, 0x00 }, /* Block Enable */ | ||
88 | { 0x37, 0x00 }, /* Configuration */ | ||
89 | { 0x38, 0x00 }, /* Global Enable */ | ||
90 | { 0x3A, 0x00 }, /* Boost Limiter */ | ||
91 | }; | ||
92 | |||
93 | static const struct soc_enum max98926_voltage_enum[] = { | ||
94 | SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS, 0, | ||
95 | ARRAY_SIZE(max98926_pdm_ch_text), | ||
96 | max98926_pdm_ch_text), | ||
97 | }; | ||
98 | |||
99 | static const struct snd_kcontrol_new max98926_voltage_control = | ||
100 | SOC_DAPM_ENUM("Route", max98926_voltage_enum); | ||
101 | |||
102 | static const struct soc_enum max98926_current_enum[] = { | ||
103 | SOC_ENUM_SINGLE(MAX98926_DAI_CLK_DIV_N_LSBS, | ||
104 | MAX98926_PDM_SOURCE_1_SHIFT, | ||
105 | ARRAY_SIZE(max98926_pdm_ch_text), | ||
106 | max98926_pdm_ch_text), | ||
107 | }; | ||
108 | |||
109 | static const struct snd_kcontrol_new max98926_current_control = | ||
110 | SOC_DAPM_ENUM("Route", max98926_current_enum); | ||
111 | |||
112 | static const struct snd_kcontrol_new max98926_mixer_controls[] = { | ||
113 | SOC_DAPM_SINGLE("PCM Single Switch", MAX98926_SPK_AMP, | ||
114 | MAX98926_INSELECT_MODE_SHIFT, 0, 0), | ||
115 | SOC_DAPM_SINGLE("PDM Single Switch", MAX98926_SPK_AMP, | ||
116 | MAX98926_INSELECT_MODE_SHIFT, 1, 0), | ||
117 | }; | ||
118 | |||
119 | static const struct snd_kcontrol_new max98926_dai_controls[] = { | ||
120 | SOC_DAPM_SINGLE("Left", MAX98926_GAIN, | ||
121 | MAX98926_DAC_IN_SEL_SHIFT, 0, 0), | ||
122 | SOC_DAPM_SINGLE("Right", MAX98926_GAIN, | ||
123 | MAX98926_DAC_IN_SEL_SHIFT, 1, 0), | ||
124 | SOC_DAPM_SINGLE("LeftRight", MAX98926_GAIN, | ||
125 | MAX98926_DAC_IN_SEL_SHIFT, 2, 0), | ||
126 | SOC_DAPM_SINGLE("(Left+Right)/2 Switch", MAX98926_GAIN, | ||
127 | MAX98926_DAC_IN_SEL_SHIFT, 3, 0), | ||
128 | }; | ||
129 | |||
130 | static const struct snd_soc_dapm_widget max98926_dapm_widgets[] = { | ||
131 | SND_SOC_DAPM_AIF_IN("DAI_OUT", "HiFi Playback", 0, | ||
132 | SND_SOC_NOPM, 0, 0), | ||
133 | SND_SOC_DAPM_DAC("Amp Enable", NULL, MAX98926_BLOCK_ENABLE, | ||
134 | MAX98926_SPK_EN_SHIFT, 0), | ||
135 | SND_SOC_DAPM_SUPPLY("Global Enable", MAX98926_GLOBAL_ENABLE, | ||
136 | MAX98926_EN_SHIFT, 0, NULL, 0), | ||
137 | SND_SOC_DAPM_SUPPLY("VI Enable", MAX98926_BLOCK_ENABLE, | ||
138 | MAX98926_ADC_IMON_EN_WIDTH | | ||
139 | MAX98926_ADC_VMON_EN_SHIFT, | ||
140 | 0, NULL, 0), | ||
141 | SND_SOC_DAPM_PGA("BST Enable", MAX98926_BLOCK_ENABLE, | ||
142 | MAX98926_BST_EN_SHIFT, 0, NULL, 0), | ||
143 | SND_SOC_DAPM_OUTPUT("BE_OUT"), | ||
144 | SND_SOC_DAPM_MIXER("PCM Sel", MAX98926_SPK_AMP, | ||
145 | MAX98926_INSELECT_MODE_SHIFT, 0, | ||
146 | &max98926_mixer_controls[0], | ||
147 | ARRAY_SIZE(max98926_mixer_controls)), | ||
148 | SND_SOC_DAPM_MIXER("DAI Sel", | ||
149 | MAX98926_GAIN, MAX98926_DAC_IN_SEL_SHIFT, 0, | ||
150 | &max98926_dai_controls[0], | ||
151 | ARRAY_SIZE(max98926_dai_controls)), | ||
152 | SND_SOC_DAPM_MUX("PDM CH1 Source", | ||
153 | MAX98926_DAI_CLK_DIV_N_LSBS, | ||
154 | MAX98926_PDM_CURRENT_SHIFT, | ||
155 | 0, &max98926_current_control), | ||
156 | SND_SOC_DAPM_MUX("PDM CH0 Source", | ||
157 | MAX98926_DAI_CLK_DIV_N_LSBS, | ||
158 | MAX98926_PDM_VOLTAGE_SHIFT, | ||
159 | 0, &max98926_voltage_control), | ||
160 | }; | ||
161 | |||
162 | static const struct snd_soc_dapm_route max98926_audio_map[] = { | ||
163 | {"VI Enable", NULL, "DAI_OUT"}, | ||
164 | {"DAI Sel", "Left", "VI Enable"}, | ||
165 | {"DAI Sel", "Right", "VI Enable"}, | ||
166 | {"DAI Sel", "LeftRight", "VI Enable"}, | ||
167 | {"DAI Sel", "LeftRightDiv2", "VI Enable"}, | ||
168 | {"PCM Sel", "PCM", "DAI Sel"}, | ||
169 | |||
170 | {"PDM CH1 Source", "Current", "DAI_OUT"}, | ||
171 | {"PDM CH1 Source", "Voltage", "DAI_OUT"}, | ||
172 | {"PDM CH0 Source", "Current", "DAI_OUT"}, | ||
173 | {"PDM CH0 Source", "Voltage", "DAI_OUT"}, | ||
174 | {"PCM Sel", "Analog", "PDM CH1 Source"}, | ||
175 | {"PCM Sel", "Analog", "PDM CH0 Source"}, | ||
176 | {"Amp Enable", NULL, "PCM Sel"}, | ||
177 | |||
178 | {"BST Enable", NULL, "Amp Enable"}, | ||
179 | {"BE_OUT", NULL, "BST Enable"}, | ||
180 | }; | ||
181 | |||
182 | static bool max98926_volatile_register(struct device *dev, unsigned int reg) | ||
183 | { | ||
184 | switch (reg) { | ||
185 | case MAX98926_VBAT_DATA: | ||
186 | case MAX98926_VBST_DATA: | ||
187 | case MAX98926_LIVE_STATUS0: | ||
188 | case MAX98926_LIVE_STATUS1: | ||
189 | case MAX98926_LIVE_STATUS2: | ||
190 | case MAX98926_STATE0: | ||
191 | case MAX98926_STATE1: | ||
192 | case MAX98926_STATE2: | ||
193 | case MAX98926_FLAG0: | ||
194 | case MAX98926_FLAG1: | ||
195 | case MAX98926_FLAG2: | ||
196 | case MAX98926_VERSION: | ||
197 | return true; | ||
198 | default: | ||
199 | return false; | ||
200 | } | ||
201 | } | ||
202 | |||
203 | static bool max98926_readable_register(struct device *dev, unsigned int reg) | ||
204 | { | ||
205 | switch (reg) { | ||
206 | case MAX98926_IRQ_CLEAR0: | ||
207 | case MAX98926_IRQ_CLEAR1: | ||
208 | case MAX98926_IRQ_CLEAR2: | ||
209 | case MAX98926_ALC_HOLD_RLS: | ||
210 | return false; | ||
211 | default: | ||
212 | return true; | ||
213 | } | ||
214 | }; | ||
215 | |||
216 | DECLARE_TLV_DB_SCALE(max98926_spk_tlv, -600, 100, 0); | ||
217 | DECLARE_TLV_DB_RANGE(max98926_current_tlv, | ||
218 | 0, 11, TLV_DB_SCALE_ITEM(20, 20, 0), | ||
219 | 12, 15, TLV_DB_SCALE_ITEM(320, 40, 0), | ||
220 | ); | ||
221 | |||
222 | static SOC_ENUM_SINGLE_DECL(max98926_dac_hpf_cutoff, | ||
223 | MAX98926_FILTERS, MAX98926_DAC_HPF_SHIFT, | ||
224 | max98926_hpf_cutoff_txt); | ||
225 | |||
226 | static SOC_ENUM_SINGLE_DECL(max98926_boost_voltage, | ||
227 | MAX98926_CONFIGURATION, MAX98926_BST_VOUT_SHIFT, | ||
228 | max98926_boost_voltage_txt); | ||
229 | |||
230 | static const struct snd_kcontrol_new max98926_snd_controls[] = { | ||
231 | SOC_SINGLE_TLV("Speaker Volume", MAX98926_GAIN, | ||
232 | MAX98926_SPK_GAIN_SHIFT, | ||
233 | (1<<MAX98926_SPK_GAIN_WIDTH)-1, 0, | ||
234 | max98926_spk_tlv), | ||
235 | SOC_SINGLE("Ramp Switch", MAX98926_GAIN_RAMPING, | ||
236 | MAX98926_SPK_RMP_EN_SHIFT, 1, 0), | ||
237 | SOC_SINGLE("ZCD Switch", MAX98926_GAIN_RAMPING, | ||
238 | MAX98926_SPK_ZCD_EN_SHIFT, 1, 0), | ||
239 | SOC_SINGLE("ALC Switch", MAX98926_THRESHOLD, | ||
240 | MAX98926_ALC_EN_SHIFT, 1, 0), | ||
241 | SOC_SINGLE("ALC Threshold", MAX98926_THRESHOLD, | ||
242 | MAX98926_ALC_TH_SHIFT, | ||
243 | (1<<MAX98926_ALC_TH_WIDTH)-1, 0), | ||
244 | SOC_ENUM("Boost Output Voltage", max98926_boost_voltage), | ||
245 | SOC_SINGLE_TLV("Boost Current Limit", MAX98926_BOOST_LIMITER, | ||
246 | MAX98926_BST_ILIM_SHIFT, | ||
247 | (1<<MAX98926_BST_ILIM_SHIFT)-1, 0, | ||
248 | max98926_current_tlv), | ||
249 | SOC_ENUM("DAC HPF Cutoff", max98926_dac_hpf_cutoff), | ||
250 | SOC_DOUBLE("PDM Channel One", MAX98926_DAI_CLK_DIV_N_LSBS, | ||
251 | MAX98926_PDM_CHANNEL_1_SHIFT, | ||
252 | MAX98926_PDM_CHANNEL_1_HIZ, 1, 0), | ||
253 | SOC_DOUBLE("PDM Channel Zero", MAX98926_DAI_CLK_DIV_N_LSBS, | ||
254 | MAX98926_PDM_CHANNEL_0_SHIFT, | ||
255 | MAX98926_PDM_CHANNEL_0_HIZ, 1, 0), | ||
256 | }; | ||
257 | |||
258 | static const struct { | ||
259 | int rate; | ||
260 | int sr; | ||
261 | } rate_table[] = { | ||
262 | { | ||
263 | .rate = 8000, | ||
264 | .sr = 0, | ||
265 | }, | ||
266 | { | ||
267 | .rate = 11025, | ||
268 | .sr = 1, | ||
269 | }, | ||
270 | { | ||
271 | .rate = 12000, | ||
272 | .sr = 2, | ||
273 | }, | ||
274 | { | ||
275 | .rate = 16000, | ||
276 | .sr = 3, | ||
277 | }, | ||
278 | { | ||
279 | .rate = 22050, | ||
280 | .sr = 4, | ||
281 | }, | ||
282 | { | ||
283 | .rate = 24000, | ||
284 | .sr = 5, | ||
285 | }, | ||
286 | { | ||
287 | .rate = 32000, | ||
288 | .sr = 6, | ||
289 | }, | ||
290 | { | ||
291 | .rate = 44100, | ||
292 | .sr = 7, | ||
293 | }, | ||
294 | { | ||
295 | .rate = 48000, | ||
296 | .sr = 8, | ||
297 | }, | ||
298 | }; | ||
299 | |||
300 | static void max98926_set_sense_data(struct max98926_priv *max98926) | ||
301 | { | ||
302 | regmap_update_bits(max98926->regmap, | ||
303 | MAX98926_DOUT_CFG_VMON, | ||
304 | MAX98926_DAI_VMON_EN_MASK, | ||
305 | MAX98926_DAI_VMON_EN_MASK); | ||
306 | regmap_update_bits(max98926->regmap, | ||
307 | MAX98926_DOUT_CFG_IMON, | ||
308 | MAX98926_DAI_IMON_EN_MASK, | ||
309 | MAX98926_DAI_IMON_EN_MASK); | ||
310 | |||
311 | if (!max98926->interleave_mode) { | ||
312 | /* set VMON slots */ | ||
313 | regmap_update_bits(max98926->regmap, | ||
314 | MAX98926_DOUT_CFG_VMON, | ||
315 | MAX98926_DAI_VMON_SLOT_MASK, | ||
316 | max98926->v_slot); | ||
317 | /* set IMON slots */ | ||
318 | regmap_update_bits(max98926->regmap, | ||
319 | MAX98926_DOUT_CFG_IMON, | ||
320 | MAX98926_DAI_IMON_SLOT_MASK, | ||
321 | max98926->i_slot); | ||
322 | } else { | ||
323 | /* enable interleave mode */ | ||
324 | regmap_update_bits(max98926->regmap, | ||
325 | MAX98926_FORMAT, | ||
326 | MAX98926_DAI_INTERLEAVE_MASK, | ||
327 | MAX98926_DAI_INTERLEAVE_MASK); | ||
328 | /* set interleave slots */ | ||
329 | regmap_update_bits(max98926->regmap, | ||
330 | MAX98926_DOUT_CFG_VBAT, | ||
331 | MAX98926_DAI_INTERLEAVE_SLOT_MASK, | ||
332 | max98926->v_slot); | ||
333 | } | ||
334 | } | ||
335 | |||
336 | static int max98926_dai_set_fmt(struct snd_soc_dai *codec_dai, | ||
337 | unsigned int fmt) | ||
338 | { | ||
339 | struct snd_soc_codec *codec = codec_dai->codec; | ||
340 | struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec); | ||
341 | unsigned int invert = 0; | ||
342 | |||
343 | dev_dbg(codec->dev, "%s: fmt 0x%08X\n", __func__, fmt); | ||
344 | |||
345 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | ||
346 | case SND_SOC_DAIFMT_CBS_CFS: | ||
347 | max98926_set_sense_data(max98926); | ||
348 | break; | ||
349 | default: | ||
350 | dev_err(codec->dev, "DAI clock mode unsupported"); | ||
351 | return -EINVAL; | ||
352 | } | ||
353 | |||
354 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | ||
355 | case SND_SOC_DAIFMT_NB_NF: | ||
356 | break; | ||
357 | case SND_SOC_DAIFMT_NB_IF: | ||
358 | invert = MAX98926_DAI_WCI_MASK; | ||
359 | break; | ||
360 | case SND_SOC_DAIFMT_IB_NF: | ||
361 | invert = MAX98926_DAI_BCI_MASK; | ||
362 | break; | ||
363 | case SND_SOC_DAIFMT_IB_IF: | ||
364 | invert = MAX98926_DAI_BCI_MASK | MAX98926_DAI_WCI_MASK; | ||
365 | break; | ||
366 | default: | ||
367 | dev_err(codec->dev, "DAI invert mode unsupported"); | ||
368 | return -EINVAL; | ||
369 | } | ||
370 | |||
371 | regmap_write(max98926->regmap, | ||
372 | MAX98926_FORMAT, MAX98926_DAI_DLY_MASK); | ||
373 | regmap_update_bits(max98926->regmap, MAX98926_FORMAT, | ||
374 | MAX98926_DAI_BCI_MASK, invert); | ||
375 | return 0; | ||
376 | } | ||
377 | |||
378 | static int max98926_dai_hw_params(struct snd_pcm_substream *substream, | ||
379 | struct snd_pcm_hw_params *params, | ||
380 | struct snd_soc_dai *dai) | ||
381 | { | ||
382 | int dai_sr = -EINVAL; | ||
383 | int rate = params_rate(params), i; | ||
384 | struct snd_soc_codec *codec = dai->codec; | ||
385 | struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec); | ||
386 | int blr_clk_ratio; | ||
387 | |||
388 | switch (params_format(params)) { | ||
389 | case SNDRV_PCM_FORMAT_S16_LE: | ||
390 | regmap_update_bits(max98926->regmap, | ||
391 | MAX98926_FORMAT, | ||
392 | MAX98926_DAI_CHANSZ_MASK, | ||
393 | MAX98926_DAI_CHANSZ_16); | ||
394 | max98926->ch_size = 16; | ||
395 | break; | ||
396 | case SNDRV_PCM_FORMAT_S24_LE: | ||
397 | regmap_update_bits(max98926->regmap, | ||
398 | MAX98926_FORMAT, | ||
399 | MAX98926_DAI_CHANSZ_MASK, | ||
400 | MAX98926_DAI_CHANSZ_24); | ||
401 | max98926->ch_size = 24; | ||
402 | break; | ||
403 | case SNDRV_PCM_FORMAT_S32_LE: | ||
404 | regmap_update_bits(max98926->regmap, | ||
405 | MAX98926_FORMAT, | ||
406 | MAX98926_DAI_CHANSZ_MASK, | ||
407 | MAX98926_DAI_CHANSZ_32); | ||
408 | max98926->ch_size = 32; | ||
409 | break; | ||
410 | default: | ||
411 | dev_dbg(codec->dev, "format unsupported %d", | ||
412 | params_format(params)); | ||
413 | return -EINVAL; | ||
414 | } | ||
415 | |||
416 | /* BCLK/LRCLK ratio calculation */ | ||
417 | blr_clk_ratio = params_channels(params) * max98926->ch_size; | ||
418 | |||
419 | switch (blr_clk_ratio) { | ||
420 | case 32: | ||
421 | regmap_update_bits(max98926->regmap, | ||
422 | MAX98926_DAI_CLK_MODE2, | ||
423 | MAX98926_DAI_BSEL_MASK, | ||
424 | MAX98926_DAI_BSEL_32); | ||
425 | break; | ||
426 | case 48: | ||
427 | regmap_update_bits(max98926->regmap, | ||
428 | MAX98926_DAI_CLK_MODE2, | ||
429 | MAX98926_DAI_BSEL_MASK, | ||
430 | MAX98926_DAI_BSEL_48); | ||
431 | break; | ||
432 | case 64: | ||
433 | regmap_update_bits(max98926->regmap, | ||
434 | MAX98926_DAI_CLK_MODE2, | ||
435 | MAX98926_DAI_BSEL_MASK, | ||
436 | MAX98926_DAI_BSEL_64); | ||
437 | break; | ||
438 | default: | ||
439 | return -EINVAL; | ||
440 | } | ||
441 | |||
442 | /* find the closest rate */ | ||
443 | for (i = 0; i < ARRAY_SIZE(rate_table); i++) { | ||
444 | if (rate_table[i].rate >= rate) { | ||
445 | dai_sr = rate_table[i].sr; | ||
446 | break; | ||
447 | } | ||
448 | } | ||
449 | if (dai_sr < 0) | ||
450 | return -EINVAL; | ||
451 | |||
452 | /* set DAI_SR to correct LRCLK frequency */ | ||
453 | regmap_update_bits(max98926->regmap, | ||
454 | MAX98926_DAI_CLK_MODE2, | ||
455 | MAX98926_DAI_SR_MASK, dai_sr << MAX98926_DAI_SR_SHIFT); | ||
456 | return 0; | ||
457 | } | ||
458 | |||
459 | #define MAX98926_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ | ||
460 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | ||
461 | |||
462 | static struct snd_soc_dai_ops max98926_dai_ops = { | ||
463 | .set_fmt = max98926_dai_set_fmt, | ||
464 | .hw_params = max98926_dai_hw_params, | ||
465 | }; | ||
466 | |||
467 | static struct snd_soc_dai_driver max98926_dai[] = { | ||
468 | { | ||
469 | .name = "max98926-aif1", | ||
470 | .playback = { | ||
471 | .stream_name = "HiFi Playback", | ||
472 | .channels_min = 1, | ||
473 | .channels_max = 2, | ||
474 | .rates = SNDRV_PCM_RATE_8000_48000, | ||
475 | .formats = MAX98926_FORMATS, | ||
476 | }, | ||
477 | .capture = { | ||
478 | .stream_name = "HiFi Capture", | ||
479 | .channels_min = 1, | ||
480 | .channels_max = 2, | ||
481 | .rates = SNDRV_PCM_RATE_8000_48000, | ||
482 | .formats = MAX98926_FORMATS, | ||
483 | }, | ||
484 | .ops = &max98926_dai_ops, | ||
485 | } | ||
486 | }; | ||
487 | |||
488 | static int max98926_probe(struct snd_soc_codec *codec) | ||
489 | { | ||
490 | struct max98926_priv *max98926 = snd_soc_codec_get_drvdata(codec); | ||
491 | |||
492 | max98926->codec = codec; | ||
493 | codec->control_data = max98926->regmap; | ||
494 | /* Hi-Z all the slots */ | ||
495 | regmap_write(max98926->regmap, MAX98926_DOUT_HIZ_CFG4, 0xF0); | ||
496 | return 0; | ||
497 | } | ||
498 | |||
499 | static struct snd_soc_codec_driver soc_codec_dev_max98926 = { | ||
500 | .probe = max98926_probe, | ||
501 | .controls = max98926_snd_controls, | ||
502 | .num_controls = ARRAY_SIZE(max98926_snd_controls), | ||
503 | .dapm_routes = max98926_audio_map, | ||
504 | .num_dapm_routes = ARRAY_SIZE(max98926_audio_map), | ||
505 | .dapm_widgets = max98926_dapm_widgets, | ||
506 | .num_dapm_widgets = ARRAY_SIZE(max98926_dapm_widgets), | ||
507 | }; | ||
508 | |||
509 | static const struct regmap_config max98926_regmap = { | ||
510 | .reg_bits = 8, | ||
511 | .val_bits = 8, | ||
512 | .max_register = MAX98926_VERSION, | ||
513 | .reg_defaults = max98926_reg, | ||
514 | .num_reg_defaults = ARRAY_SIZE(max98926_reg), | ||
515 | .volatile_reg = max98926_volatile_register, | ||
516 | .readable_reg = max98926_readable_register, | ||
517 | .cache_type = REGCACHE_RBTREE, | ||
518 | }; | ||
519 | |||
520 | static int max98926_i2c_probe(struct i2c_client *i2c, | ||
521 | const struct i2c_device_id *id) | ||
522 | { | ||
523 | int ret, reg; | ||
524 | u32 value; | ||
525 | struct max98926_priv *max98926; | ||
526 | |||
527 | max98926 = devm_kzalloc(&i2c->dev, | ||
528 | sizeof(*max98926), GFP_KERNEL); | ||
529 | if (!max98926) | ||
530 | return -ENOMEM; | ||
531 | |||
532 | i2c_set_clientdata(i2c, max98926); | ||
533 | max98926->regmap = devm_regmap_init_i2c(i2c, &max98926_regmap); | ||
534 | if (IS_ERR(max98926->regmap)) { | ||
535 | ret = PTR_ERR(max98926->regmap); | ||
536 | dev_err(&i2c->dev, | ||
537 | "Failed to allocate regmap: %d\n", ret); | ||
538 | goto err_out; | ||
539 | } | ||
540 | if (of_property_read_bool(i2c->dev.of_node, "interleave-mode")) | ||
541 | max98926->interleave_mode = true; | ||
542 | |||
543 | if (!of_property_read_u32(i2c->dev.of_node, "vmon-slot-no", &value)) { | ||
544 | if (value > MAX98926_DAI_VMON_SLOT_1E_1F) { | ||
545 | dev_err(&i2c->dev, "vmon slot number is wrong:\n"); | ||
546 | return -EINVAL; | ||
547 | } | ||
548 | max98926->v_slot = value; | ||
549 | } | ||
550 | if (!of_property_read_u32(i2c->dev.of_node, "imon-slot-no", &value)) { | ||
551 | if (value > MAX98926_DAI_IMON_SLOT_1E_1F) { | ||
552 | dev_err(&i2c->dev, "imon slot number is wrong:\n"); | ||
553 | return -EINVAL; | ||
554 | } | ||
555 | max98926->i_slot = value; | ||
556 | } | ||
557 | ret = regmap_read(max98926->regmap, | ||
558 | MAX98926_VERSION, ®); | ||
559 | if (ret < 0) { | ||
560 | dev_err(&i2c->dev, "Failed to read: %x\n", reg); | ||
561 | return ret; | ||
562 | } | ||
563 | |||
564 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_max98926, | ||
565 | max98926_dai, ARRAY_SIZE(max98926_dai)); | ||
566 | if (ret < 0) | ||
567 | dev_err(&i2c->dev, | ||
568 | "Failed to register codec: %d\n", ret); | ||
569 | dev_info(&i2c->dev, "device version: %x\n", reg); | ||
570 | err_out: | ||
571 | return ret; | ||
572 | } | ||
573 | |||
574 | static int max98926_i2c_remove(struct i2c_client *client) | ||
575 | { | ||
576 | snd_soc_unregister_codec(&client->dev); | ||
577 | return 0; | ||
578 | } | ||
579 | |||
580 | static const struct i2c_device_id max98926_i2c_id[] = { | ||
581 | { "max98926", 0 }, | ||
582 | { } | ||
583 | }; | ||
584 | MODULE_DEVICE_TABLE(i2c, max98926_i2c_id); | ||
585 | |||
586 | static const struct of_device_id max98926_of_match[] = { | ||
587 | { .compatible = "maxim,max98926", }, | ||
588 | { } | ||
589 | }; | ||
590 | MODULE_DEVICE_TABLE(of, max98926_of_match); | ||
591 | |||
592 | static struct i2c_driver max98926_i2c_driver = { | ||
593 | .driver = { | ||
594 | .name = "max98926", | ||
595 | .of_match_table = of_match_ptr(max98926_of_match), | ||
596 | .pm = NULL, | ||
597 | }, | ||
598 | .probe = max98926_i2c_probe, | ||
599 | .remove = max98926_i2c_remove, | ||
600 | .id_table = max98926_i2c_id, | ||
601 | }; | ||
602 | |||
603 | module_i2c_driver(max98926_i2c_driver) | ||
604 | MODULE_DESCRIPTION("ALSA SoC MAX98926 driver"); | ||
605 | MODULE_AUTHOR("Anish kumar <anish.kumar@maximintegrated.com>"); | ||
606 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/codecs/max98926.h b/sound/soc/codecs/max98926.h new file mode 100644 index 000000000000..9d7ab6df79ca --- /dev/null +++ b/sound/soc/codecs/max98926.h | |||
@@ -0,0 +1,848 @@ | |||
1 | /* | ||
2 | * max98926.h -- MAX98926 ALSA SoC Audio driver | ||
3 | * Copyright 2013-2015 Maxim Integrated Products | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef _MAX98926_H | ||
10 | #define _MAX98926_H | ||
11 | |||
12 | #define MAX98926_CHIP_VERSION 0x40 | ||
13 | #define MAX98926_CHIP_VERSION1 0x50 | ||
14 | |||
15 | #define MAX98926_VBAT_DATA 0x00 | ||
16 | #define MAX98926_VBST_DATA 0x01 | ||
17 | #define MAX98926_LIVE_STATUS0 0x02 | ||
18 | #define MAX98926_LIVE_STATUS1 0x03 | ||
19 | #define MAX98926_LIVE_STATUS2 0x04 | ||
20 | #define MAX98926_STATE0 0x05 | ||
21 | #define MAX98926_STATE1 0x06 | ||
22 | #define MAX98926_STATE2 0x07 | ||
23 | #define MAX98926_FLAG0 0x08 | ||
24 | #define MAX98926_FLAG1 0x09 | ||
25 | #define MAX98926_FLAG2 0x0A | ||
26 | #define MAX98926_IRQ_ENABLE0 0x0B | ||
27 | #define MAX98926_IRQ_ENABLE1 0x0C | ||
28 | #define MAX98926_IRQ_ENABLE2 0x0D | ||
29 | #define MAX98926_IRQ_CLEAR0 0x0E | ||
30 | #define MAX98926_IRQ_CLEAR1 0x0F | ||
31 | #define MAX98926_IRQ_CLEAR2 0x10 | ||
32 | #define MAX98926_MAP0 0x11 | ||
33 | #define MAX98926_MAP1 0x12 | ||
34 | #define MAX98926_MAP2 0x13 | ||
35 | #define MAX98926_MAP3 0x14 | ||
36 | #define MAX98926_MAP4 0x15 | ||
37 | #define MAX98926_MAP5 0x16 | ||
38 | #define MAX98926_MAP6 0x17 | ||
39 | #define MAX98926_MAP7 0x18 | ||
40 | #define MAX98926_MAP8 0x19 | ||
41 | #define MAX98926_DAI_CLK_MODE1 0x1A | ||
42 | #define MAX98926_DAI_CLK_MODE2 0x1B | ||
43 | #define MAX98926_DAI_CLK_DIV_M_MSBS 0x1C | ||
44 | #define MAX98926_DAI_CLK_DIV_M_LSBS 0x1D | ||
45 | #define MAX98926_DAI_CLK_DIV_N_MSBS 0x1E | ||
46 | #define MAX98926_DAI_CLK_DIV_N_LSBS 0x1F | ||
47 | #define MAX98926_FORMAT 0x20 | ||
48 | #define MAX98926_TDM_SLOT_SELECT 0x21 | ||
49 | #define MAX98926_DOUT_CFG_VMON 0x22 | ||
50 | #define MAX98926_DOUT_CFG_IMON 0x23 | ||
51 | #define MAX98926_DOUT_CFG_VBAT 0x24 | ||
52 | #define MAX98926_DOUT_CFG_VBST 0x25 | ||
53 | #define MAX98926_DOUT_CFG_FLAG 0x26 | ||
54 | #define MAX98926_DOUT_HIZ_CFG1 0x27 | ||
55 | #define MAX98926_DOUT_HIZ_CFG2 0x28 | ||
56 | #define MAX98926_DOUT_HIZ_CFG3 0x29 | ||
57 | #define MAX98926_DOUT_HIZ_CFG4 0x2A | ||
58 | #define MAX98926_DOUT_DRV_STRENGTH 0x2B | ||
59 | #define MAX98926_FILTERS 0x2C | ||
60 | #define MAX98926_GAIN 0x2D | ||
61 | #define MAX98926_GAIN_RAMPING 0x2E | ||
62 | #define MAX98926_SPK_AMP 0x2F | ||
63 | #define MAX98926_THRESHOLD 0x30 | ||
64 | #define MAX98926_ALC_ATTACK 0x31 | ||
65 | #define MAX98926_ALC_ATTEN_RLS 0x32 | ||
66 | #define MAX98926_ALC_HOLD_RLS 0x33 | ||
67 | #define MAX98926_ALC_CONFIGURATION 0x34 | ||
68 | #define MAX98926_BOOST_CONVERTER 0x35 | ||
69 | #define MAX98926_BLOCK_ENABLE 0x36 | ||
70 | #define MAX98926_CONFIGURATION 0x37 | ||
71 | #define MAX98926_GLOBAL_ENABLE 0x38 | ||
72 | #define MAX98926_BOOST_LIMITER 0x3A | ||
73 | #define MAX98926_VERSION 0xFF | ||
74 | |||
75 | #define MAX98926_REG_CNT (MAX98926_R03A_BOOST_LIMITER+1) | ||
76 | |||
77 | #define MAX98926_PDM_CURRENT_MASK (1<<7) | ||
78 | #define MAX98926_PDM_CURRENT_SHIFT 7 | ||
79 | #define MAX98926_PDM_VOLTAGE_MASK (1<<3) | ||
80 | #define MAX98926_PDM_VOLTAGE_SHIFT 3 | ||
81 | #define MAX98926_PDM_CHANNEL_0_MASK (1<<2) | ||
82 | #define MAX98926_PDM_CHANNEL_0_SHIFT 2 | ||
83 | #define MAX98926_PDM_CHANNEL_1_MASK (1<<6) | ||
84 | #define MAX98926_PDM_CHANNEL_1_SHIFT 6 | ||
85 | #define MAX98926_PDM_CHANNEL_1_HIZ 5 | ||
86 | #define MAX98926_PDM_CHANNEL_0_HIZ 1 | ||
87 | #define MAX98926_PDM_SOURCE_0_SHIFT 0 | ||
88 | #define MAX98926_PDM_SOURCE_0_MASK (1<<0) | ||
89 | #define MAX98926_PDM_SOURCE_1_MASK (1<<4) | ||
90 | #define MAX98926_PDM_SOURCE_1_SHIFT 4 | ||
91 | |||
92 | /* MAX98926 Register Bit Fields */ | ||
93 | |||
94 | /* MAX98926_R002_LIVE_STATUS0 */ | ||
95 | #define MAX98926_THERMWARN_STATUS_MASK (1<<3) | ||
96 | #define MAX98926_THERMWARN_STATUS_SHIFT 3 | ||
97 | #define MAX98926_THERMWARN_STATUS_WIDTH 1 | ||
98 | #define MAX98926_THERMSHDN_STATUS_MASK (1<<1) | ||
99 | #define MAX98926_THERMSHDN_STATUS_SHIFT 1 | ||
100 | #define MAX98926_THERMSHDN_STATUS_WIDTH 1 | ||
101 | |||
102 | /* MAX98926_R003_LIVE_STATUS1 */ | ||
103 | #define MAX98926_SPKCURNT_STATUS_MASK (1<<5) | ||
104 | #define MAX98926_SPKCURNT_STATUS_SHIFT 5 | ||
105 | #define MAX98926_SPKCURNT_STATUS_WIDTH 1 | ||
106 | #define MAX98926_WATCHFAIL_STATUS_MASK (1<<4) | ||
107 | #define MAX98926_WATCHFAIL_STATUS_SHIFT 4 | ||
108 | #define MAX98926_WATCHFAIL_STATUS_WIDTH 1 | ||
109 | #define MAX98926_ALCINFH_STATUS_MASK (1<<3) | ||
110 | #define MAX98926_ALCINFH_STATUS_SHIFT 3 | ||
111 | #define MAX98926_ALCINFH_STATUS_WIDTH 1 | ||
112 | #define MAX98926_ALCACT_STATUS_MASK (1<<2) | ||
113 | #define MAX98926_ALCACT_STATUS_SHIFT 2 | ||
114 | #define MAX98926_ALCACT_STATUS_WIDTH 1 | ||
115 | #define MAX98926_ALCMUT_STATUS_MASK (1<<1) | ||
116 | #define MAX98926_ALCMUT_STATUS_SHIFT 1 | ||
117 | #define MAX98926_ALCMUT_STATUS_WIDTH 1 | ||
118 | #define MAX98926_ACLP_STATUS_MASK (1<<0) | ||
119 | #define MAX98926_ACLP_STATUS_SHIFT 0 | ||
120 | #define MAX98926_ACLP_STATUS_WIDTH 1 | ||
121 | |||
122 | /* MAX98926_R004_LIVE_STATUS2 */ | ||
123 | #define MAX98926_SLOTOVRN_STATUS_MASK (1<<6) | ||
124 | #define MAX98926_SLOTOVRN_STATUS_SHIFT 6 | ||
125 | #define MAX98926_SLOTOVRN_STATUS_WIDTH 1 | ||
126 | #define MAX98926_INVALSLOT_STATUS_MASK (1<<5) | ||
127 | #define MAX98926_INVALSLOT_STATUS_SHIFT 5 | ||
128 | #define MAX98926_INVALSLOT_STATUS_WIDTH 1 | ||
129 | #define MAX98926_SLOTCNFLT_STATUS_MASK (1<<4) | ||
130 | #define MAX98926_SLOTCNFLT_STATUS_SHIFT 4 | ||
131 | #define MAX98926_SLOTCNFLT_STATUS_WIDTH 1 | ||
132 | #define MAX98926_VBSTOVFL_STATUS_MASK (1<<3) | ||
133 | #define MAX98926_VBSTOVFL_STATUS_SHIFT 3 | ||
134 | #define MAX98926_VBSTOVFL_STATUS_WIDTH 1 | ||
135 | #define MAX98926_VBATOVFL_STATUS_MASK (1<<2) | ||
136 | #define MAX98926_VBATOVFL_STATUS_SHIFT 2 | ||
137 | #define MAX98926_VBATOVFL_STATUS_WIDTH 1 | ||
138 | #define MAX98926_IMONOVFL_STATUS_MASK (1<<1) | ||
139 | #define MAX98926_IMONOVFL_STATUS_SHIFT 1 | ||
140 | #define MAX98926_IMONOVFL_STATUS_WIDTH 1 | ||
141 | #define MAX98926_VMONOVFL_STATUS_MASK (1<<0) | ||
142 | #define MAX98926_VMONOVFL_STATUS_SHIFT 0 | ||
143 | #define MAX98926_VMONOVFL_STATUS_WIDTH 1 | ||
144 | |||
145 | /* MAX98926_R005_STATE0 */ | ||
146 | #define MAX98926_THERMWARN_END_STATE_MASK (1<<3) | ||
147 | #define MAX98926_THERMWARN_END_STATE_SHIFT 3 | ||
148 | #define MAX98926_THERMWARN_END_STATE_WIDTH 1 | ||
149 | #define MAX98926_THERMWARN_BGN_STATE_MASK (1<<2) | ||
150 | #define MAX98926_THERMWARN_BGN_STATE_SHIFT 1 | ||
151 | #define MAX98926_THERMWARN_BGN_STATE_WIDTH 1 | ||
152 | #define MAX98926_THERMSHDN_END_STATE_MASK (1<<1) | ||
153 | #define MAX98926_THERMSHDN_END_STATE_SHIFT 1 | ||
154 | #define MAX98926_THERMSHDN_END_STATE_WIDTH 1 | ||
155 | #define MAX98926_THERMSHDN_BGN_STATE_MASK (1<<0) | ||
156 | #define MAX98926_THERMSHDN_BGN_STATE_SHIFT 0 | ||
157 | #define MAX98926_THERMSHDN_BGN_STATE_WIDTH 1 | ||
158 | |||
159 | /* MAX98926_R006_STATE1 */ | ||
160 | #define MAX98926_SPRCURNT_STATE_MASK (1<<5) | ||
161 | #define MAX98926_SPRCURNT_STATE_SHIFT 5 | ||
162 | #define MAX98926_SPRCURNT_STATE_WIDTH 1 | ||
163 | #define MAX98926_WATCHFAIL_STATE_MASK (1<<4) | ||
164 | #define MAX98926_WATCHFAIL_STATE_SHIFT 4 | ||
165 | #define MAX98926_WATCHFAIL_STATE_WIDTH 1 | ||
166 | #define MAX98926_ALCINFH_STATE_MASK (1<<3) | ||
167 | #define MAX98926_ALCINFH_STATE_SHIFT 3 | ||
168 | #define MAX98926_ALCINFH_STATE_WIDTH 1 | ||
169 | #define MAX98926_ALCACT_STATE_MASK (1<<2) | ||
170 | #define MAX98926_ALCACT_STATE_SHIFT 2 | ||
171 | #define MAX98926_ALCACT_STATE_WIDTH 1 | ||
172 | #define MAX98926_ALCMUT_STATE_MASK (1<<1) | ||
173 | #define MAX98926_ALCMUT_STATE_SHIFT 1 | ||
174 | #define MAX98926_ALCMUT_STATE_WIDTH 1 | ||
175 | #define MAX98926_ALCP_STATE_MASK (1<<0) | ||
176 | #define MAX98926_ALCP_STATE_SHIFT 0 | ||
177 | #define MAX98926_ALCP_STATE_WIDTH 1 | ||
178 | |||
179 | /* MAX98926_R007_STATE2 */ | ||
180 | #define MAX98926_SLOTOVRN_STATE_MASK (1<<6) | ||
181 | #define MAX98926_SLOTOVRN_STATE_SHIFT 6 | ||
182 | #define MAX98926_SLOTOVRN_STATE_WIDTH 1 | ||
183 | #define MAX98926_INVALSLOT_STATE_MASK (1<<5) | ||
184 | #define MAX98926_INVALSLOT_STATE_SHIFT 5 | ||
185 | #define MAX98926_INVALSLOT_STATE_WIDTH 1 | ||
186 | #define MAX98926_SLOTCNFLT_STATE_MASK (1<<4) | ||
187 | #define MAX98926_SLOTCNFLT_STATE_SHIFT 4 | ||
188 | #define MAX98926_SLOTCNFLT_STATE_WIDTH 1 | ||
189 | #define MAX98926_VBSTOVFL_STATE_MASK (1<<3) | ||
190 | #define MAX98926_VBSTOVFL_STATE_SHIFT 3 | ||
191 | #define MAX98926_VBSTOVFL_STATE_WIDTH 1 | ||
192 | #define MAX98926_VBATOVFL_STATE_MASK (1<<2) | ||
193 | #define MAX98926_VBATOVFL_STATE_SHIFT 2 | ||
194 | #define MAX98926_VBATOVFL_STATE_WIDTH 1 | ||
195 | #define MAX98926_IMONOVFL_STATE_MASK (1<<1) | ||
196 | #define MAX98926_IMONOVFL_STATE_SHIFT 1 | ||
197 | #define MAX98926_IMONOVFL_STATE_WIDTH 1 | ||
198 | #define MAX98926_VMONOVFL_STATE_MASK (1<<0) | ||
199 | #define MAX98926_VMONOVFL_STATE_SHIFT 0 | ||
200 | #define MAX98926_VMONOVFL_STATE_WIDTH 1 | ||
201 | |||
202 | /* MAX98926_R008_FLAG0 */ | ||
203 | #define MAX98926_THERMWARN_END_FLAG_MASK (1<<3) | ||
204 | #define MAX98926_THERMWARN_END_FLAG_SHIFT 3 | ||
205 | #define MAX98926_THERMWARN_END_FLAG_WIDTH 1 | ||
206 | #define MAX98926_THERMWARN_BGN_FLAG_MASK (1<<2) | ||
207 | #define MAX98926_THERMWARN_BGN_FLAG_SHIFT 2 | ||
208 | #define MAX98926_THERMWARN_BGN_FLAG_WIDTH 1 | ||
209 | #define MAX98926_THERMSHDN_END_FLAG_MASK (1<<1) | ||
210 | #define MAX98926_THERMSHDN_END_FLAG_SHIFT 1 | ||
211 | #define MAX98926_THERMSHDN_END_FLAG_WIDTH 1 | ||
212 | #define MAX98926_THERMSHDN_BGN_FLAG_MASK (1<<0) | ||
213 | #define MAX98926_THERMSHDN_BGN_FLAG_SHIFT 0 | ||
214 | #define MAX98926_THERMSHDN_BGN_FLAG_WIDTH 1 | ||
215 | |||
216 | /* MAX98926_R009_FLAG1 */ | ||
217 | #define MAX98926_SPKCURNT_FLAG_MASK (1<<5) | ||
218 | #define MAX98926_SPKCURNT_FLAG_SHIFT 5 | ||
219 | #define MAX98926_SPKCURNT_FLAG_WIDTH 1 | ||
220 | #define MAX98926_WATCHFAIL_FLAG_MASK (1<<4) | ||
221 | #define MAX98926_WATCHFAIL_FLAG_SHIFT 4 | ||
222 | #define MAX98926_WATCHFAIL_FLAG_WIDTH 1 | ||
223 | #define MAX98926_ALCINFH_FLAG_MASK (1<<3) | ||
224 | #define MAX98926_ALCINFH_FLAG_SHIFT 3 | ||
225 | #define MAX98926_ALCINFH_FLAG_WIDTH 1 | ||
226 | #define MAX98926_ALCACT_FLAG_MASK (1<<2) | ||
227 | #define MAX98926_ALCACT_FLAG_SHIFT 2 | ||
228 | #define MAX98926_ALCACT_FLAG_WIDTH 1 | ||
229 | #define MAX98926_ALCMUT_FLAG_MASK (1<<1) | ||
230 | #define MAX98926_ALCMUT_FLAG_SHIFT 1 | ||
231 | #define MAX98926_ALCMUT_FLAG_WIDTH 1 | ||
232 | #define MAX98926_ALCP_FLAG_MASK (1<<0) | ||
233 | #define MAX98926_ALCP_FLAG_SHIFT 0 | ||
234 | #define MAX98926_ALCP_FLAG_WIDTH 1 | ||
235 | |||
236 | /* MAX98926_R00A_FLAG2 */ | ||
237 | #define MAX98926_SLOTOVRN_FLAG_MASK (1<<6) | ||
238 | #define MAX98926_SLOTOVRN_FLAG_SHIFT 6 | ||
239 | #define MAX98926_SLOTOVRN_FLAG_WIDTH 1 | ||
240 | #define MAX98926_INVALSLOT_FLAG_MASK (1<<5) | ||
241 | #define MAX98926_INVALSLOT_FLAG_SHIFT 5 | ||
242 | #define MAX98926_INVALSLOT_FLAG_WIDTH 1 | ||
243 | #define MAX98926_SLOTCNFLT_FLAG_MASK (1<<4) | ||
244 | #define MAX98926_SLOTCNFLT_FLAG_SHIFT 4 | ||
245 | #define MAX98926_SLOTCNFLT_FLAG_WIDTH 1 | ||
246 | #define MAX98926_VBSTOVFL_FLAG_MASK (1<<3) | ||
247 | #define MAX98926_VBSTOVFL_FLAG_SHIFT 3 | ||
248 | #define MAX98926_VBSTOVFL_FLAG_WIDTH 1 | ||
249 | #define MAX98926_VBATOVFL_FLAG_MASK (1<<2) | ||
250 | #define MAX98926_VBATOVFL_FLAG_SHIFT 2 | ||
251 | #define MAX98926_VBATOVFL_FLAG_WIDTH 1 | ||
252 | #define MAX98926_IMONOVFL_FLAG_MASK (1<<1) | ||
253 | #define MAX98926_IMONOVFL_FLAG_SHIFT 1 | ||
254 | #define MAX98926_IMONOVFL_FLAG_WIDTH 1 | ||
255 | #define MAX98926_VMONOVFL_FLAG_MASK (1<<0) | ||
256 | #define MAX98926_VMONOVFL_FLAG_SHIFT 0 | ||
257 | #define MAX98926_VMONOVFL_FLAG_WIDTH 1 | ||
258 | |||
259 | /* MAX98926_R00B_IRQ_ENABLE0 */ | ||
260 | #define MAX98926_THERMWARN_END_EN_MASK (1<<3) | ||
261 | #define MAX98926_THERMWARN_END_EN_SHIFT 3 | ||
262 | #define MAX98926_THERMWARN_END_EN_WIDTH 1 | ||
263 | #define MAX98926_THERMWARN_BGN_EN_MASK (1<<2) | ||
264 | #define MAX98926_THERMWARN_BGN_EN_SHIFT 2 | ||
265 | #define MAX98926_THERMWARN_BGN_EN_WIDTH 1 | ||
266 | #define MAX98926_THERMSHDN_END_EN_MASK (1<<1) | ||
267 | #define MAX98926_THERMSHDN_END_EN_SHIFT 1 | ||
268 | #define MAX98926_THERMSHDN_END_EN_WIDTH 1 | ||
269 | #define MAX98926_THERMSHDN_BGN_EN_MASK (1<<0) | ||
270 | #define MAX98926_THERMSHDN_BGN_EN_SHIFT 0 | ||
271 | #define MAX98926_THERMSHDN_BGN_EN_WIDTH 1 | ||
272 | |||
273 | /* MAX98926_R00C_IRQ_ENABLE1 */ | ||
274 | #define MAX98926_SPKCURNT_EN_MASK (1<<5) | ||
275 | #define MAX98926_SPKCURNT_EN_SHIFT 5 | ||
276 | #define MAX98926_SPKCURNT_EN_WIDTH 1 | ||
277 | #define MAX98926_WATCHFAIL_EN_MASK (1<<4) | ||
278 | #define MAX98926_WATCHFAIL_EN_SHIFT 4 | ||
279 | #define MAX98926_WATCHFAIL_EN_WIDTH 1 | ||
280 | #define MAX98926_ALCINFH_EN_MASK (1<<3) | ||
281 | #define MAX98926_ALCINFH_EN_SHIFT 3 | ||
282 | #define MAX98926_ALCINFH_EN_WIDTH 1 | ||
283 | #define MAX98926_ALCACT_EN_MASK (1<<2) | ||
284 | #define MAX98926_ALCACT_EN_SHIFT 2 | ||
285 | #define MAX98926_ALCACT_EN_WIDTH 1 | ||
286 | #define MAX98926_ALCMUT_EN_MASK (1<<1) | ||
287 | #define MAX98926_ALCMUT_EN_SHIFT 1 | ||
288 | #define MAX98926_ALCMUT_EN_WIDTH 1 | ||
289 | #define MAX98926_ALCP_EN_MASK (1<<0) | ||
290 | #define MAX98926_ALCP_EN_SHIFT 0 | ||
291 | #define MAX98926_ALCP_EN_WIDTH 1 | ||
292 | |||
293 | /* MAX98926_R00D_IRQ_ENABLE2 */ | ||
294 | #define MAX98926_SLOTOVRN_EN_MASK (1<<6) | ||
295 | #define MAX98926_SLOTOVRN_EN_SHIFT 6 | ||
296 | #define MAX98926_SLOTOVRN_EN_WIDTH 1 | ||
297 | #define MAX98926_INVALSLOT_EN_MASK (1<<5) | ||
298 | #define MAX98926_INVALSLOT_EN_SHIFT 5 | ||
299 | #define MAX98926_INVALSLOT_EN_WIDTH 1 | ||
300 | #define MAX98926_SLOTCNFLT_EN_MASK (1<<4) | ||
301 | #define MAX98926_SLOTCNFLT_EN_SHIFT 4 | ||
302 | #define MAX98926_SLOTCNFLT_EN_WIDTH 1 | ||
303 | #define MAX98926_VBSTOVFL_EN_MASK (1<<3) | ||
304 | #define MAX98926_VBSTOVFL_EN_SHIFT 3 | ||
305 | #define MAX98926_VBSTOVFL_EN_WIDTH 1 | ||
306 | #define MAX98926_VBATOVFL_EN_MASK (1<<2) | ||
307 | #define MAX98926_VBATOVFL_EN_SHIFT 2 | ||
308 | #define MAX98926_VBATOVFL_EN_WIDTH 1 | ||
309 | #define MAX98926_IMONOVFL_EN_MASK (1<<1) | ||
310 | #define MAX98926_IMONOVFL_EN_SHIFT 1 | ||
311 | #define MAX98926_IMONOVFL_EN_WIDTH 1 | ||
312 | #define MAX98926_VMONOVFL_EN_MASK (1<<0) | ||
313 | #define MAX98926_VMONOVFL_EN_SHIFT 0 | ||
314 | #define MAX98926_VMONOVFL_EN_WIDTH 1 | ||
315 | |||
316 | /* MAX98926_R00E_IRQ_CLEAR0 */ | ||
317 | #define MAX98926_THERMWARN_END_CLR_MASK (1<<3) | ||
318 | #define MAX98926_THERMWARN_END_CLR_SHIFT 3 | ||
319 | #define MAX98926_THERMWARN_END_CLR_WIDTH 1 | ||
320 | #define MAX98926_THERMWARN_BGN_CLR_MASK (1<<2) | ||
321 | #define MAX98926_THERMWARN_BGN_CLR_SHIFT 2 | ||
322 | #define MAX98926_THERMWARN_BGN_CLR_WIDTH 1 | ||
323 | #define MAX98926_THERMSHDN_END_CLR_MASK (1<<1) | ||
324 | #define MAX98926_THERMSHDN_END_CLR_SHIFT 1 | ||
325 | #define MAX98926_THERMSHDN_END_CLR_WIDTH 1 | ||
326 | #define MAX98926_THERMSHDN_BGN_CLR_MASK (1<<0) | ||
327 | #define MAX98926_THERMSHDN_BGN_CLR_SHIFT 0 | ||
328 | #define MAX98926_THERMSHDN_BGN_CLR_WIDTH 1 | ||
329 | |||
330 | /* MAX98926_R00F_IRQ_CLEAR1 */ | ||
331 | #define MAX98926_SPKCURNT_CLR_MASK (1<<5) | ||
332 | #define MAX98926_SPKCURNT_CLR_SHIFT 5 | ||
333 | #define MAX98926_SPKCURNT_CLR_WIDTH 1 | ||
334 | #define MAX98926_WATCHFAIL_CLR_MASK (1<<4) | ||
335 | #define MAX98926_WATCHFAIL_CLR_SHIFT 4 | ||
336 | #define MAX98926_WATCHFAIL_CLR_WIDTH 1 | ||
337 | #define MAX98926_ALCINFH_CLR_MASK (1<<3) | ||
338 | #define MAX98926_ALCINFH_CLR_SHIFT 3 | ||
339 | #define MAX98926_ALCINFH_CLR_WIDTH 1 | ||
340 | #define MAX98926_ALCACT_CLR_MASK (1<<2) | ||
341 | #define MAX98926_ALCACT_CLR_SHIFT 2 | ||
342 | #define MAX98926_ALCACT_CLR_WIDTH 1 | ||
343 | #define MAX98926_ALCMUT_CLR_MASK (1<<1) | ||
344 | #define MAX98926_ALCMUT_CLR_SHIFT 1 | ||
345 | #define MAX98926_ALCMUT_CLR_WIDTH 1 | ||
346 | #define MAX98926_ALCP_CLR_MASK (1<<0) | ||
347 | #define MAX98926_ALCP_CLR_SHIFT 0 | ||
348 | #define MAX98926_ALCP_CLR_WIDTH 1 | ||
349 | |||
350 | /* MAX98926_R010_IRQ_CLEAR2 */ | ||
351 | #define MAX98926_SLOTOVRN_CLR_MASK (1<<6) | ||
352 | #define MAX98926_SLOTOVRN_CLR_SHIFT 6 | ||
353 | #define MAX98926_SLOTOVRN_CLR_WIDTH 1 | ||
354 | #define MAX98926_INVALSLOT_CLR_MASK (1<<5) | ||
355 | #define MAX98926_INVALSLOT_CLR_SHIFT 5 | ||
356 | #define MAX98926_INVALSLOT_CLR_WIDTH 1 | ||
357 | #define MAX98926_SLOTCNFLT_CLR_MASK (1<<4) | ||
358 | #define MAX98926_SLOTCNFLT_CLR_SHIFT 4 | ||
359 | #define MAX98926_SLOTCNFLT_CLR_WIDTH 1 | ||
360 | #define MAX98926_VBSTOVFL_CLR_MASK (1<<3) | ||
361 | #define MAX98926_VBSTOVFL_CLR_SHIFT 3 | ||
362 | #define MAX98926_VBSTOVFL_CLR_WIDTH 1 | ||
363 | #define MAX98926_VBATOVFL_CLR_MASK (1<<2) | ||
364 | #define MAX98926_VBATOVFL_CLR_SHIFT 2 | ||
365 | #define MAX98926_VBATOVFL_CLR_WIDTH 1 | ||
366 | #define MAX98926_IMONOVFL_CLR_MASK (1<<1) | ||
367 | #define MAX98926_IMONOVFL_CLR_SHIFT 1 | ||
368 | #define MAX98926_IMONOVFL_CLR_WIDTH 1 | ||
369 | #define MAX98926_VMONOVFL_CLR_MASK (1<<0) | ||
370 | #define MAX98926_VMONOVFL_CLR_SHIFT 0 | ||
371 | #define MAX98926_VMONOVFL_CLR_WIDTH 1 | ||
372 | |||
373 | /* MAX98926_R011_MAP0 */ | ||
374 | #define MAX98926_ER_THERMWARN_EN_MASK (1<<7) | ||
375 | #define MAX98926_ER_THERMWARN_EN_SHIFT 7 | ||
376 | #define MAX98926_ER_THERMWARN_EN_WIDTH 1 | ||
377 | #define MAX98926_ER_THERMWARN_MAP_MASK (0x07<<4) | ||
378 | #define MAX98926_ER_THERMWARN_MAP_SHIFT 4 | ||
379 | #define MAX98926_ER_THERMWARN_MAP_WIDTH 3 | ||
380 | |||
381 | /* MAX98926_R012_MAP1 */ | ||
382 | #define MAX98926_ER_ALCMUT_EN_MASK (1<<7) | ||
383 | #define MAX98926_ER_ALCMUT_EN_SHIFT 7 | ||
384 | #define MAX98926_ER_ALCMUT_EN_WIDTH 1 | ||
385 | #define MAX98926_ER_ALCMUT_MAP_MASK (0x07<<4) | ||
386 | #define MAX98926_ER_ALCMUT_MAP_SHIFT 4 | ||
387 | #define MAX98926_ER_ALCMUT_MAP_WIDTH 3 | ||
388 | #define MAX98926_ER_ALCP_EN_MASK (1<<3) | ||
389 | #define MAX98926_ER_ALCP_EN_SHIFT 3 | ||
390 | #define MAX98926_ER_ALCP_EN_WIDTH 1 | ||
391 | #define MAX98926_ER_ALCP_MAP_MASK (0x07<<0) | ||
392 | #define MAX98926_ER_ALCP_MAP_SHIFT 0 | ||
393 | #define MAX98926_ER_ALCP_MAP_WIDTH 3 | ||
394 | |||
395 | /* MAX98926_R013_MAP2 */ | ||
396 | #define MAX98926_ER_ALCINFH_EN_MASK (1<<7) | ||
397 | #define MAX98926_ER_ALCINFH_EN_SHIFT 7 | ||
398 | #define MAX98926_ER_ALCINFH_EN_WIDTH 1 | ||
399 | #define MAX98926_ER_ALCINFH_MAP_MASK (0x07<<4) | ||
400 | #define MAX98926_ER_ALCINFH_MAP_SHIFT 4 | ||
401 | #define MAX98926_ER_ALCINFH_MAP_WIDTH 3 | ||
402 | #define MAX98926_ER_ALCACT_EN_MASK (1<<3) | ||
403 | #define MAX98926_ER_ALCACT_EN_SHIFT 3 | ||
404 | #define MAX98926_ER_ALCACT_EN_WIDTH 1 | ||
405 | #define MAX98926_ER_ALCACT_MAP_MASK (0x07<<0) | ||
406 | #define MAX98926_ER_ALCACT_MAP_SHIFT 0 | ||
407 | #define MAX98926_ER_ALCACT_MAP_WIDTH 3 | ||
408 | |||
409 | /* MAX98926_R014_MAP3 */ | ||
410 | #define MAX98926_ER_SPKCURNT_EN_MASK (1<<7) | ||
411 | #define MAX98926_ER_SPKCURNT_EN_SHIFT 7 | ||
412 | #define MAX98926_ER_SPKCURNT_EN_WIDTH 1 | ||
413 | #define MAX98926_ER_SPKCURNT_MAP_MASK (0x07<<4) | ||
414 | #define MAX98926_ER_SPKCURNT_MAP_SHIFT 4 | ||
415 | #define MAX98926_ER_SPKCURNT_MAP_WIDTH 3 | ||
416 | |||
417 | /* MAX98926_R015_MAP4 */ | ||
418 | /* RESERVED */ | ||
419 | |||
420 | /* MAX98926_R016_MAP5 */ | ||
421 | #define MAX98926_ER_IMONOVFL_EN_MASK (1<<7) | ||
422 | #define MAX98926_ER_IMONOVFL_EN_SHIFT 7 | ||
423 | #define MAX98926_ER_IMONOVFL_EN_WIDTH 1 | ||
424 | #define MAX98926_ER_IMONOVFL_MAP_MASK (0x07<<4) | ||
425 | #define MAX98926_ER_IMONOVFL_MAP_SHIFT 4 | ||
426 | #define MAX98926_ER_IMONOVFL_MAP_WIDTH 3 | ||
427 | #define MAX98926_ER_VMONOVFL_EN_MASK (1<<3) | ||
428 | #define MAX98926_ER_VMONOVFL_EN_SHIFT 3 | ||
429 | #define MAX98926_ER_VMONOVFL_EN_WIDTH 1 | ||
430 | #define MAX98926_ER_VMONOVFL_MAP_MASK (0x07<<0) | ||
431 | #define MAX98926_ER_VMONOVFL_MAP_SHIFT 0 | ||
432 | #define MAX98926_ER_VMONOVFL_MAP_WIDTH 3 | ||
433 | |||
434 | /* MAX98926_R017_MAP6 */ | ||
435 | #define MAX98926_ER_VBSTOVFL_EN_MASK (1<<7) | ||
436 | #define MAX98926_ER_VBSTOVFL_EN_SHIFT 7 | ||
437 | #define MAX98926_ER_VBSTOVFL_EN_WIDTH 1 | ||
438 | #define MAX98926_ER_VBSTOVFL_MAP_MASK (0x07<<4) | ||
439 | #define MAX98926_ER_VBSTOVFL_MAP_SHIFT 4 | ||
440 | #define MAX98926_ER_VBSTOVFL_MAP_WIDTH 3 | ||
441 | #define MAX98926_ER_VBATOVFL_EN_MASK (1<<3) | ||
442 | #define MAX98926_ER_VBATOVFL_EN_SHIFT 3 | ||
443 | #define MAX98926_ER_VBATOVFL_EN_WIDTH 1 | ||
444 | #define MAX98926_ER_VBATOVFL_MAP_MASK (0x07<<0) | ||
445 | #define MAX98926_ER_VBATOVFL_MAP_SHIFT 0 | ||
446 | #define MAX98926_ER_VBATOVFL_MAP_WIDTH 3 | ||
447 | |||
448 | /* MAX98926_R018_MAP7 */ | ||
449 | #define MAX98926_ER_INVALSLOT_EN_MASK (1<<7) | ||
450 | #define MAX98926_ER_INVALSLOT_EN_SHIFT 7 | ||
451 | #define MAX98926_ER_INVALSLOT_EN_WIDTH 1 | ||
452 | #define MAX98926_ER_INVALSLOT_MAP_MASK (0x07<<4) | ||
453 | #define MAX98926_ER_INVALSLOT_MAP_SHIFT 4 | ||
454 | #define MAX98926_ER_INVALSLOT_MAP_WIDTH 3 | ||
455 | #define MAX98926_ER_SLOTCNFLT_EN_MASK (1<<3) | ||
456 | #define MAX98926_ER_SLOTCNFLT_EN_SHIFT 3 | ||
457 | #define MAX98926_ER_SLOTCNFLT_EN_WIDTH 1 | ||
458 | #define MAX98926_ER_SLOTCNFLT_MAP_MASK (0x07<<0) | ||
459 | #define MAX98926_ER_SLOTCNFLT_MAP_SHIFT 0 | ||
460 | #define MAX98926_ER_SLOTCNFLT_MAP_WIDTH 3 | ||
461 | |||
462 | /* MAX98926_R019_MAP8 */ | ||
463 | #define MAX98926_ER_SLOTOVRN_EN_MASK (1<<3) | ||
464 | #define MAX98926_ER_SLOTOVRN_EN_SHIFT 3 | ||
465 | #define MAX98926_ER_SLOTOVRN_EN_WIDTH 1 | ||
466 | #define MAX98926_ER_SLOTOVRN_MAP_MASK (0x07<<0) | ||
467 | #define MAX98926_ER_SLOTOVRN_MAP_SHIFT 0 | ||
468 | #define MAX98926_ER_SLOTOVRN_MAP_WIDTH 3 | ||
469 | |||
470 | /* MAX98926_R01A_DAI_CLK_MODE1 */ | ||
471 | #define MAX98926_DAI_CLK_SOURCE_MASK (1<<6) | ||
472 | #define MAX98926_DAI_CLK_SOURCE_SHIFT 6 | ||
473 | #define MAX98926_DAI_CLK_SOURCE_WIDTH 1 | ||
474 | #define MAX98926_MDLL_MULT_MASK (0x0F<<0) | ||
475 | #define MAX98926_MDLL_MULT_SHIFT 0 | ||
476 | #define MAX98926_MDLL_MULT_WIDTH 4 | ||
477 | |||
478 | #define MAX98926_MDLL_MULT_MCLKx8 6 | ||
479 | #define MAX98926_MDLL_MULT_MCLKx16 8 | ||
480 | |||
481 | /* MAX98926_R01B_DAI_CLK_MODE2 */ | ||
482 | #define MAX98926_DAI_SR_MASK (0x0F<<4) | ||
483 | #define MAX98926_DAI_SR_SHIFT 4 | ||
484 | #define MAX98926_DAI_SR_WIDTH 4 | ||
485 | #define MAX98926_DAI_MAS_MASK (1<<3) | ||
486 | #define MAX98926_DAI_MAS_SHIFT 3 | ||
487 | #define MAX98926_DAI_MAS_WIDTH 1 | ||
488 | #define MAX98926_DAI_BSEL_MASK (0x07<<0) | ||
489 | #define MAX98926_DAI_BSEL_SHIFT 0 | ||
490 | #define MAX98926_DAI_BSEL_WIDTH 3 | ||
491 | |||
492 | #define MAX98926_DAI_BSEL_32 (0 << MAX98926_DAI_BSEL_SHIFT) | ||
493 | #define MAX98926_DAI_BSEL_48 (1 << MAX98926_DAI_BSEL_SHIFT) | ||
494 | #define MAX98926_DAI_BSEL_64 (2 << MAX98926_DAI_BSEL_SHIFT) | ||
495 | #define MAX98926_DAI_BSEL_256 (6 << MAX98926_DAI_BSEL_SHIFT) | ||
496 | |||
497 | /* MAX98926_R01C_DAI_CLK_DIV_M_MSBS */ | ||
498 | #define MAX98926_DAI_M_MSBS_MASK (0xFF<<0) | ||
499 | #define MAX98926_DAI_M_MSBS_SHIFT 0 | ||
500 | #define MAX98926_DAI_M_MSBS_WIDTH 8 | ||
501 | |||
502 | /* MAX98926_R01D_DAI_CLK_DIV_M_LSBS */ | ||
503 | #define MAX98926_DAI_M_LSBS_MASK (0xFF<<0) | ||
504 | #define MAX98926_DAI_M_LSBS_SHIFT 0 | ||
505 | #define MAX98926_DAI_M_LSBS_WIDTH 8 | ||
506 | |||
507 | /* MAX98926_R01E_DAI_CLK_DIV_N_MSBS */ | ||
508 | #define MAX98926_DAI_N_MSBS_MASK (0x7F<<0) | ||
509 | #define MAX98926_DAI_N_MSBS_SHIFT 0 | ||
510 | #define MAX98926_DAI_N_MSBS_WIDTH 7 | ||
511 | |||
512 | /* MAX98926_R01F_DAI_CLK_DIV_N_LSBS */ | ||
513 | #define MAX98926_DAI_N_LSBS_MASK (0xFF<<0) | ||
514 | #define MAX98926_DAI_N_LSBS_SHIFT 0 | ||
515 | #define MAX98926_DAI_N_LSBS_WIDTH 8 | ||
516 | |||
517 | /* MAX98926_R020_FORMAT */ | ||
518 | #define MAX98926_DAI_CHANSZ_MASK (0x03<<6) | ||
519 | #define MAX98926_DAI_CHANSZ_SHIFT 6 | ||
520 | #define MAX98926_DAI_CHANSZ_WIDTH 2 | ||
521 | #define MAX98926_DAI_INTERLEAVE_MASK (1<<5) | ||
522 | #define MAX98926_DAI_INTERLEAVE_SHIFT 5 | ||
523 | #define MAX98926_DAI_INTERLEAVE_WIDTH 1 | ||
524 | #define MAX98926_DAI_EXTBCLK_HIZ_MASK (1<<4) | ||
525 | #define MAX98926_DAI_EXTBCLK_HIZ_SHIFT 4 | ||
526 | #define MAX98926_DAI_EXTBCLK_HIZ_WIDTH 1 | ||
527 | #define MAX98926_DAI_WCI_MASK (1<<3) | ||
528 | #define MAX98926_DAI_WCI_SHIFT 3 | ||
529 | #define MAX98926_DAI_WCI_WIDTH 1 | ||
530 | #define MAX98926_DAI_BCI_MASK (1<<2) | ||
531 | #define MAX98926_DAI_BCI_SHIFT 2 | ||
532 | #define MAX98926_DAI_BCI_WIDTH 1 | ||
533 | #define MAX98926_DAI_DLY_MASK (1<<1) | ||
534 | #define MAX98926_DAI_DLY_SHIFT 1 | ||
535 | #define MAX98926_DAI_DLY_WIDTH 1 | ||
536 | #define MAX98926_DAI_TDM_MASK (1<<0) | ||
537 | #define MAX98926_DAI_TDM_SHIFT 0 | ||
538 | #define MAX98926_DAI_TDM_WIDTH 1 | ||
539 | |||
540 | #define MAX98926_DAI_CHANSZ_16 (1 << MAX98926_DAI_CHANSZ_SHIFT) | ||
541 | #define MAX98926_DAI_CHANSZ_24 (2 << MAX98926_DAI_CHANSZ_SHIFT) | ||
542 | #define MAX98926_DAI_CHANSZ_32 (3 << MAX98926_DAI_CHANSZ_SHIFT) | ||
543 | |||
544 | /* MAX98926_R021_TDM_SLOT_SELECT */ | ||
545 | #define MAX98926_DAI_DO_EN_MASK (1<<7) | ||
546 | #define MAX98926_DAI_DO_EN_SHIFT 7 | ||
547 | #define MAX98926_DAI_DO_EN_WIDTH 1 | ||
548 | #define MAX98926_DAI_DIN_EN_MASK (1<<6) | ||
549 | #define MAX98926_DAI_DIN_EN_SHIFT 6 | ||
550 | #define MAX98926_DAI_DIN_EN_WIDTH 1 | ||
551 | #define MAX98926_DAI_INR_SOURCE_MASK (0x07<<3) | ||
552 | #define MAX98926_DAI_INR_SOURCE_SHIFT 3 | ||
553 | #define MAX98926_DAI_INR_SOURCE_WIDTH 3 | ||
554 | #define MAX98926_DAI_INL_SOURCE_MASK (0x07<<0) | ||
555 | #define MAX98926_DAI_INL_SOURCE_SHIFT 0 | ||
556 | #define MAX98926_DAI_INL_SOURCE_WIDTH 3 | ||
557 | |||
558 | /* MAX98926_R022_DOUT_CFG_VMON */ | ||
559 | #define MAX98926_DAI_VMON_EN_MASK (1<<5) | ||
560 | #define MAX98926_DAI_VMON_EN_SHIFT 5 | ||
561 | #define MAX98926_DAI_VMON_EN_WIDTH 1 | ||
562 | #define MAX98926_DAI_VMON_SLOT_MASK (0x1F<<0) | ||
563 | #define MAX98926_DAI_VMON_SLOT_SHIFT 0 | ||
564 | #define MAX98926_DAI_VMON_SLOT_WIDTH 5 | ||
565 | |||
566 | #define MAX98926_DAI_VMON_SLOT_00_01 (0 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
567 | #define MAX98926_DAI_VMON_SLOT_01_02 (1 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
568 | #define MAX98926_DAI_VMON_SLOT_02_03 (2 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
569 | #define MAX98926_DAI_VMON_SLOT_03_04 (3 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
570 | #define MAX98926_DAI_VMON_SLOT_04_05 (4 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
571 | #define MAX98926_DAI_VMON_SLOT_05_06 (5 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
572 | #define MAX98926_DAI_VMON_SLOT_06_07 (6 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
573 | #define MAX98926_DAI_VMON_SLOT_07_08 (7 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
574 | #define MAX98926_DAI_VMON_SLOT_08_09 (8 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
575 | #define MAX98926_DAI_VMON_SLOT_09_0A (9 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
576 | #define MAX98926_DAI_VMON_SLOT_0A_0B (10 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
577 | #define MAX98926_DAI_VMON_SLOT_0B_0C (11 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
578 | #define MAX98926_DAI_VMON_SLOT_0C_0D (12 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
579 | #define MAX98926_DAI_VMON_SLOT_0D_0E (13 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
580 | #define MAX98926_DAI_VMON_SLOT_0E_0F (14 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
581 | #define MAX98926_DAI_VMON_SLOT_0F_10 (15 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
582 | #define MAX98926_DAI_VMON_SLOT_10_11 (16 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
583 | #define MAX98926_DAI_VMON_SLOT_11_12 (17 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
584 | #define MAX98926_DAI_VMON_SLOT_12_13 (18 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
585 | #define MAX98926_DAI_VMON_SLOT_13_14 (19 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
586 | #define MAX98926_DAI_VMON_SLOT_14_15 (20 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
587 | #define MAX98926_DAI_VMON_SLOT_15_16 (21 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
588 | #define MAX98926_DAI_VMON_SLOT_16_17 (22 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
589 | #define MAX98926_DAI_VMON_SLOT_17_18 (23 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
590 | #define MAX98926_DAI_VMON_SLOT_18_19 (24 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
591 | #define MAX98926_DAI_VMON_SLOT_19_1A (25 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
592 | #define MAX98926_DAI_VMON_SLOT_1A_1B (26 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
593 | #define MAX98926_DAI_VMON_SLOT_1B_1C (27 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
594 | #define MAX98926_DAI_VMON_SLOT_1C_1D (28 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
595 | #define MAX98926_DAI_VMON_SLOT_1D_1E (29 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
596 | #define MAX98926_DAI_VMON_SLOT_1E_1F (30 << MAX98926_DAI_VMON_SLOT_SHIFT) | ||
597 | |||
598 | /* MAX98926_R023_DOUT_CFG_IMON */ | ||
599 | #define MAX98926_DAI_IMON_EN_MASK (1<<5) | ||
600 | #define MAX98926_DAI_IMON_EN_SHIFT 5 | ||
601 | #define MAX98926_DAI_IMON_EN_WIDTH 1 | ||
602 | #define MAX98926_DAI_IMON_SLOT_MASK (0x1F<<0) | ||
603 | #define MAX98926_DAI_IMON_SLOT_SHIFT 0 | ||
604 | #define MAX98926_DAI_IMON_SLOT_WIDTH 5 | ||
605 | |||
606 | #define MAX98926_DAI_IMON_SLOT_00_01 (0 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
607 | #define MAX98926_DAI_IMON_SLOT_01_02 (1 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
608 | #define MAX98926_DAI_IMON_SLOT_02_03 (2 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
609 | #define MAX98926_DAI_IMON_SLOT_03_04 (3 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
610 | #define MAX98926_DAI_IMON_SLOT_04_05 (4 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
611 | #define MAX98926_DAI_IMON_SLOT_05_06 (5 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
612 | #define MAX98926_DAI_IMON_SLOT_06_07 (6 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
613 | #define MAX98926_DAI_IMON_SLOT_07_08 (7 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
614 | #define MAX98926_DAI_IMON_SLOT_08_09 (8 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
615 | #define MAX98926_DAI_IMON_SLOT_09_0A (9 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
616 | #define MAX98926_DAI_IMON_SLOT_0A_0B (10 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
617 | #define MAX98926_DAI_IMON_SLOT_0B_0C (11 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
618 | #define MAX98926_DAI_IMON_SLOT_0C_0D (12 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
619 | #define MAX98926_DAI_IMON_SLOT_0D_0E (13 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
620 | #define MAX98926_DAI_IMON_SLOT_0E_0F (14 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
621 | #define MAX98926_DAI_IMON_SLOT_0F_10 (15 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
622 | #define MAX98926_DAI_IMON_SLOT_10_11 (16 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
623 | #define MAX98926_DAI_IMON_SLOT_11_12 (17 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
624 | #define MAX98926_DAI_IMON_SLOT_12_13 (18 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
625 | #define MAX98926_DAI_IMON_SLOT_13_14 (19 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
626 | #define MAX98926_DAI_IMON_SLOT_14_15 (20 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
627 | #define MAX98926_DAI_IMON_SLOT_15_16 (21 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
628 | #define MAX98926_DAI_IMON_SLOT_16_17 (22 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
629 | #define MAX98926_DAI_IMON_SLOT_17_18 (23 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
630 | #define MAX98926_DAI_IMON_SLOT_18_19 (24 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
631 | #define MAX98926_DAI_IMON_SLOT_19_1A (25 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
632 | #define MAX98926_DAI_IMON_SLOT_1A_1B (26 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
633 | #define MAX98926_DAI_IMON_SLOT_1B_1C (27 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
634 | #define MAX98926_DAI_IMON_SLOT_1C_1D (28 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
635 | #define MAX98926_DAI_IMON_SLOT_1D_1E (29 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
636 | #define MAX98926_DAI_IMON_SLOT_1E_1F (30 << MAX98926_DAI_IMON_SLOT_SHIFT) | ||
637 | |||
638 | /* MAX98926_R024_DOUT_CFG_VBAT */ | ||
639 | #define MAX98926_DAI_INTERLEAVE_SLOT_MASK (0x1F<<0) | ||
640 | #define MAX98926_DAI_INTERLEAVE_SLOT_SHIFT 0 | ||
641 | #define MAX98926_DAI_INTERLEAVE_SLOT_WIDTH 5 | ||
642 | |||
643 | /* MAX98926_R025_DOUT_CFG_VBST */ | ||
644 | #define MAX98926_DAI_VBST_EN_MASK (1<<5) | ||
645 | #define MAX98926_DAI_VBST_EN_SHIFT 5 | ||
646 | #define MAX98926_DAI_VBST_EN_WIDTH 1 | ||
647 | #define MAX98926_DAI_VBST_SLOT_MASK (0x1F<<0) | ||
648 | #define MAX98926_DAI_VBST_SLOT_SHIFT 0 | ||
649 | #define MAX98926_DAI_VBST_SLOT_WIDTH 5 | ||
650 | |||
651 | /* MAX98926_R026_DOUT_CFG_FLAG */ | ||
652 | #define MAX98926_DAI_FLAG_EN_MASK (1<<5) | ||
653 | #define MAX98926_DAI_FLAG_EN_SHIFT 5 | ||
654 | #define MAX98926_DAI_FLAG_EN_WIDTH 1 | ||
655 | #define MAX98926_DAI_FLAG_SLOT_MASK (0x1F<<0) | ||
656 | #define MAX98926_DAI_FLAG_SLOT_SHIFT 0 | ||
657 | #define MAX98926_DAI_FLAG_SLOT_WIDTH 5 | ||
658 | |||
659 | /* MAX98926_R027_DOUT_HIZ_CFG1 */ | ||
660 | #define MAX98926_DAI_SLOT_HIZ_CFG1_MASK (0xFF<<0) | ||
661 | #define MAX98926_DAI_SLOT_HIZ_CFG1_SHIFT 0 | ||
662 | #define MAX98926_DAI_SLOT_HIZ_CFG1_WIDTH 8 | ||
663 | |||
664 | /* MAX98926_R028_DOUT_HIZ_CFG2 */ | ||
665 | #define MAX98926_DAI_SLOT_HIZ_CFG2_MASK (0xFF<<0) | ||
666 | #define MAX98926_DAI_SLOT_HIZ_CFG2_SHIFT 0 | ||
667 | #define MAX98926_DAI_SLOT_HIZ_CFG2_WIDTH 8 | ||
668 | |||
669 | /* MAX98926_R029_DOUT_HIZ_CFG3 */ | ||
670 | #define MAX98926_DAI_SLOT_HIZ_CFG3_MASK (0xFF<<0) | ||
671 | #define MAX98926_DAI_SLOT_HIZ_CFG3_SHIFT 0 | ||
672 | #define MAX98926_DAI_SLOT_HIZ_CFG3_WIDTH 8 | ||
673 | |||
674 | /* MAX98926_R02A_DOUT_HIZ_CFG4 */ | ||
675 | #define MAX98926_DAI_SLOT_HIZ_CFG4_MASK (0xFF<<0) | ||
676 | #define MAX98926_DAI_SLOT_HIZ_CFG4_SHIFT 0 | ||
677 | #define MAX98926_DAI_SLOT_HIZ_CFG4_WIDTH 8 | ||
678 | |||
679 | /* MAX98926_R02B_DOUT_DRV_STRENGTH */ | ||
680 | #define MAX98926_DAI_OUT_DRIVE_MASK (0x03<<0) | ||
681 | #define MAX98926_DAI_OUT_DRIVE_SHIFT 0 | ||
682 | #define MAX98926_DAI_OUT_DRIVE_WIDTH 2 | ||
683 | |||
684 | /* MAX98926_R02C_FILTERS */ | ||
685 | #define MAX98926_ADC_DITHER_EN_MASK (1<<7) | ||
686 | #define MAX98926_ADC_DITHER_EN_SHIFT 7 | ||
687 | #define MAX98926_ADC_DITHER_EN_WIDTH 1 | ||
688 | #define MAX98926_IV_DCB_EN_MASK (1<<6) | ||
689 | #define MAX98926_IV_DCB_EN_SHIFT 6 | ||
690 | #define MAX98926_IV_DCB_EN_WIDTH 1 | ||
691 | #define MAX98926_DAC_DITHER_EN_MASK (1<<4) | ||
692 | #define MAX98926_DAC_DITHER_EN_SHIFT 4 | ||
693 | #define MAX98926_DAC_DITHER_EN_WIDTH 1 | ||
694 | #define MAX98926_DAC_FILTER_MODE_MASK (1<<3) | ||
695 | #define MAX98926_DAC_FILTER_MODE_SHIFT 3 | ||
696 | #define MAX98926_DAC_FILTER_MODE_WIDTH 1 | ||
697 | #define MAX98926_DAC_HPF_MASK (0x07<<0) | ||
698 | #define MAX98926_DAC_HPF_SHIFT 0 | ||
699 | #define MAX98926_DAC_HPF_WIDTH 3 | ||
700 | #define MAX98926_DAC_HPF_DISABLE (0 << MAX98926_DAC_HPF_SHIFT) | ||
701 | #define MAX98926_DAC_HPF_DC_BLOCK (1 << MAX98926_DAC_HPF_SHIFT) | ||
702 | #define MAX98926_DAC_HPF_EN_100 (2 << MAX98926_DAC_HPF_SHIFT) | ||
703 | #define MAX98926_DAC_HPF_EN_200 (3 << MAX98926_DAC_HPF_SHIFT) | ||
704 | #define MAX98926_DAC_HPF_EN_400 (4 << MAX98926_DAC_HPF_SHIFT) | ||
705 | #define MAX98926_DAC_HPF_EN_800 (5 << MAX98926_DAC_HPF_SHIFT) | ||
706 | |||
707 | /* MAX98926_R02D_GAIN */ | ||
708 | #define MAX98926_DAC_IN_SEL_MASK (0x03<<5) | ||
709 | #define MAX98926_DAC_IN_SEL_SHIFT 5 | ||
710 | #define MAX98926_DAC_IN_SEL_WIDTH 2 | ||
711 | #define MAX98926_SPK_GAIN_MASK (0x1F<<0) | ||
712 | #define MAX98926_SPK_GAIN_SHIFT 0 | ||
713 | #define MAX98926_SPK_GAIN_WIDTH 5 | ||
714 | |||
715 | #define MAX98926_DAC_IN_SEL_LEFT_DAI (0 << MAX98926_DAC_IN_SEL_SHIFT) | ||
716 | #define MAX98926_DAC_IN_SEL_RIGHT_DAI (1 << MAX98926_DAC_IN_SEL_SHIFT) | ||
717 | #define MAX98926_DAC_IN_SEL_SUMMED_DAI (2 << MAX98926_DAC_IN_SEL_SHIFT) | ||
718 | #define MAX98926_DAC_IN_SEL_DIV2_SUMMED_DAI (3 << MAX98926_DAC_IN_SEL_SHIFT) | ||
719 | |||
720 | /* MAX98926_R02E_GAIN_RAMPING */ | ||
721 | #define MAX98926_SPK_RMP_EN_MASK (1<<1) | ||
722 | #define MAX98926_SPK_RMP_EN_SHIFT 1 | ||
723 | #define MAX98926_SPK_RMP_EN_WIDTH 1 | ||
724 | #define MAX98926_SPK_ZCD_EN_MASK (1<<0) | ||
725 | #define MAX98926_SPK_ZCD_EN_SHIFT 0 | ||
726 | #define MAX98926_SPK_ZCD_EN_WIDTH 1 | ||
727 | |||
728 | /* MAX98926_R02F_SPK_AMP */ | ||
729 | #define MAX98926_SPK_MODE_MASK (1<<0) | ||
730 | #define MAX98926_SPK_MODE_SHIFT 0 | ||
731 | #define MAX98926_SPK_MODE_WIDTH 1 | ||
732 | #define MAX98926_INSELECT_MODE_MASK (1<<1) | ||
733 | #define MAX98926_INSELECT_MODE_SHIFT 1 | ||
734 | #define MAX98926_INSELECT_MODE_WIDTH 1 | ||
735 | |||
736 | /* MAX98926_R030_THRESHOLD */ | ||
737 | #define MAX98926_ALC_EN_MASK (1<<5) | ||
738 | #define MAX98926_ALC_EN_SHIFT 5 | ||
739 | #define MAX98926_ALC_EN_WIDTH 1 | ||
740 | #define MAX98926_ALC_TH_MASK (0x1F<<0) | ||
741 | #define MAX98926_ALC_TH_SHIFT 0 | ||
742 | #define MAX98926_ALC_TH_WIDTH 5 | ||
743 | |||
744 | /* MAX98926_R031_ALC_ATTACK */ | ||
745 | #define MAX98926_ALC_ATK_STEP_MASK (0x0F<<4) | ||
746 | #define MAX98926_ALC_ATK_STEP_SHIFT 4 | ||
747 | #define MAX98926_ALC_ATK_STEP_WIDTH 4 | ||
748 | #define MAX98926_ALC_ATK_RATE_MASK (0x7<<0) | ||
749 | #define MAX98926_ALC_ATK_RATE_SHIFT 0 | ||
750 | #define MAX98926_ALC_ATK_RATE_WIDTH 3 | ||
751 | |||
752 | /* MAX98926_R032_ALC_ATTEN_RLS */ | ||
753 | #define MAX98926_ALC_MAX_ATTEN_MASK (0x0F<<4) | ||
754 | #define MAX98926_ALC_MAX_ATTEN_SHIFT 4 | ||
755 | #define MAX98926_ALC_MAX_ATTEN_WIDTH 4 | ||
756 | #define MAX98926_ALC_RLS_RATE_MASK (0x7<<0) | ||
757 | #define MAX98926_ALC_RLS_RATE_SHIFT 0 | ||
758 | #define MAX98926_ALC_RLS_RATE_WIDTH 3 | ||
759 | |||
760 | /* MAX98926_R033_ALC_HOLD_RLS */ | ||
761 | #define MAX98926_ALC_RLS_TGR_MASK (1<<0) | ||
762 | #define MAX98926_ALC_RLS_TGR_SHIFT 0 | ||
763 | #define MAX98926_ALC_RLS_TGR_WIDTH 1 | ||
764 | |||
765 | /* MAX98926_R034_ALC_CONFIGURATION */ | ||
766 | #define MAX98926_ALC_MUTE_EN_MASK (1<<7) | ||
767 | #define MAX98926_ALC_MUTE_EN_SHIFT 7 | ||
768 | #define MAX98926_ALC_MUTE_EN_WIDTH 1 | ||
769 | #define MAX98926_ALC_MUTE_DLY_MASK (0x07<<4) | ||
770 | #define MAX98926_ALC_MUTE_DLY_SHIFT 4 | ||
771 | #define MAX98926_ALC_MUTE_DLY_WIDTH 3 | ||
772 | #define MAX98926_ALC_RLS_DBT_MASK (0x07<<0) | ||
773 | #define MAX98926_ALC_RLS_DBT_SHIFT 0 | ||
774 | #define MAX98926_ALC_RLS_DBT_WIDTH 3 | ||
775 | |||
776 | /* MAX98926_R035_BOOST_CONVERTER */ | ||
777 | #define MAX98926_BST_SYNC_MASK (1<<7) | ||
778 | #define MAX98926_BST_SYNC_SHIFT 7 | ||
779 | #define MAX98926_BST_SYNC_WIDTH 1 | ||
780 | #define MAX98926_BST_PHASE_MASK (0x03<<4) | ||
781 | #define MAX98926_BST_PHASE_SHIFT 4 | ||
782 | #define MAX98926_BST_PHASE_WIDTH 2 | ||
783 | #define MAX98926_BST_SKIP_MODE_MASK (0x03<<0) | ||
784 | #define MAX98926_BST_SKIP_MODE_SHIFT 0 | ||
785 | #define MAX98926_BST_SKIP_MODE_WIDTH 2 | ||
786 | |||
787 | /* MAX98926_R036_BLOCK_ENABLE */ | ||
788 | #define MAX98926_BST_EN_MASK (1<<7) | ||
789 | #define MAX98926_BST_EN_SHIFT 7 | ||
790 | #define MAX98926_BST_EN_WIDTH 1 | ||
791 | #define MAX98926_WATCH_EN_MASK (1<<6) | ||
792 | #define MAX98926_WATCH_EN_SHIFT 6 | ||
793 | #define MAX98926_WATCH_EN_WIDTH 1 | ||
794 | #define MAX98926_CLKMON_EN_MASK (1<<5) | ||
795 | #define MAX98926_CLKMON_EN_SHIFT 5 | ||
796 | #define MAX98926_CLKMON_EN_WIDTH 1 | ||
797 | #define MAX98926_SPK_EN_MASK (1<<4) | ||
798 | #define MAX98926_SPK_EN_SHIFT 4 | ||
799 | #define MAX98926_SPK_EN_WIDTH 1 | ||
800 | #define MAX98926_ADC_VBST_EN_MASK (1<<3) | ||
801 | #define MAX98926_ADC_VBST_EN_SHIFT 3 | ||
802 | #define MAX98926_ADC_VBST_EN_WIDTH 1 | ||
803 | #define MAX98926_ADC_VBAT_EN_MASK (1<<2) | ||
804 | #define MAX98926_ADC_VBAT_EN_SHIFT 2 | ||
805 | #define MAX98926_ADC_VBAT_EN_WIDTH 1 | ||
806 | #define MAX98926_ADC_IMON_EN_MASK (1<<1) | ||
807 | #define MAX98926_ADC_IMON_EN_SHIFT 1 | ||
808 | #define MAX98926_ADC_IMON_EN_WIDTH 1 | ||
809 | #define MAX98926_ADC_VMON_EN_MASK (1<<0) | ||
810 | #define MAX98926_ADC_VMON_EN_SHIFT 0 | ||
811 | #define MAX98926_ADC_VMON_EN_WIDTH 1 | ||
812 | |||
813 | /* MAX98926_R037_CONFIGURATION */ | ||
814 | #define MAX98926_BST_VOUT_MASK (0x0F<<4) | ||
815 | #define MAX98926_BST_VOUT_SHIFT 4 | ||
816 | #define MAX98926_BST_VOUT_WIDTH 4 | ||
817 | #define MAX98926_THERMWARN_LEVEL_MASK (0x03<<2) | ||
818 | #define MAX98926_THERMWARN_LEVEL_SHIFT 2 | ||
819 | #define MAX98926_THERMWARN_LEVEL_WIDTH 2 | ||
820 | #define MAX98926_WATCH_TIME_MASK (0x03<<0) | ||
821 | #define MAX98926_WATCH_TIME_SHIFT 0 | ||
822 | #define MAX98926_WATCH_TIME_WIDTH 2 | ||
823 | |||
824 | /* MAX98926_R038_GLOBAL_ENABLE */ | ||
825 | #define MAX98926_EN_MASK (1<<7) | ||
826 | #define MAX98926_EN_SHIFT 7 | ||
827 | #define MAX98926_EN_WIDTH 1 | ||
828 | |||
829 | /* MAX98926_R03A_BOOST_LIMITER */ | ||
830 | #define MAX98926_BST_ILIM_MASK (0xF<<4) | ||
831 | #define MAX98926_BST_ILIM_SHIFT 4 | ||
832 | #define MAX98926_BST_ILIM_WIDTH 4 | ||
833 | |||
834 | /* MAX98926_R0FF_VERSION */ | ||
835 | #define MAX98926_REV_ID_MASK (0xFF<<0) | ||
836 | #define MAX98926_REV_ID_SHIFT 0 | ||
837 | #define MAX98926_REV_ID_WIDTH 8 | ||
838 | |||
839 | struct max98926_priv { | ||
840 | struct regmap *regmap; | ||
841 | struct snd_soc_codec *codec; | ||
842 | unsigned int sysclk; | ||
843 | unsigned int v_slot; | ||
844 | unsigned int i_slot; | ||
845 | unsigned int ch_size; | ||
846 | unsigned int interleave_mode; | ||
847 | }; | ||
848 | #endif | ||
diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c index c1b87c5800b1..1c8729984c2b 100644 --- a/sound/soc/codecs/nau8825.c +++ b/sound/soc/codecs/nau8825.c | |||
@@ -84,6 +84,7 @@ static const struct nau8825_fll_attr fll_pre_scalar[] = { | |||
84 | 84 | ||
85 | static const struct reg_default nau8825_reg_defaults[] = { | 85 | static const struct reg_default nau8825_reg_defaults[] = { |
86 | { NAU8825_REG_ENA_CTRL, 0x00ff }, | 86 | { NAU8825_REG_ENA_CTRL, 0x00ff }, |
87 | { NAU8825_REG_IIC_ADDR_SET, 0x0 }, | ||
87 | { NAU8825_REG_CLK_DIVIDER, 0x0050 }, | 88 | { NAU8825_REG_CLK_DIVIDER, 0x0050 }, |
88 | { NAU8825_REG_FLL1, 0x0 }, | 89 | { NAU8825_REG_FLL1, 0x0 }, |
89 | { NAU8825_REG_FLL2, 0x3126 }, | 90 | { NAU8825_REG_FLL2, 0x3126 }, |
@@ -158,8 +159,7 @@ static const struct reg_default nau8825_reg_defaults[] = { | |||
158 | static bool nau8825_readable_reg(struct device *dev, unsigned int reg) | 159 | static bool nau8825_readable_reg(struct device *dev, unsigned int reg) |
159 | { | 160 | { |
160 | switch (reg) { | 161 | switch (reg) { |
161 | case NAU8825_REG_ENA_CTRL: | 162 | case NAU8825_REG_ENA_CTRL ... NAU8825_REG_FLL_VCO_RSV: |
162 | case NAU8825_REG_CLK_DIVIDER ... NAU8825_REG_FLL_VCO_RSV: | ||
163 | case NAU8825_REG_HSD_CTRL ... NAU8825_REG_JACK_DET_CTRL: | 163 | case NAU8825_REG_HSD_CTRL ... NAU8825_REG_JACK_DET_CTRL: |
164 | case NAU8825_REG_INTERRUPT_MASK ... NAU8825_REG_KEYDET_CTRL: | 164 | case NAU8825_REG_INTERRUPT_MASK ... NAU8825_REG_KEYDET_CTRL: |
165 | case NAU8825_REG_VDET_THRESHOLD_1 ... NAU8825_REG_DACR_CTRL: | 165 | case NAU8825_REG_VDET_THRESHOLD_1 ... NAU8825_REG_DACR_CTRL: |
@@ -184,8 +184,7 @@ static bool nau8825_readable_reg(struct device *dev, unsigned int reg) | |||
184 | static bool nau8825_writeable_reg(struct device *dev, unsigned int reg) | 184 | static bool nau8825_writeable_reg(struct device *dev, unsigned int reg) |
185 | { | 185 | { |
186 | switch (reg) { | 186 | switch (reg) { |
187 | case NAU8825_REG_RESET ... NAU8825_REG_ENA_CTRL: | 187 | case NAU8825_REG_RESET ... NAU8825_REG_FLL_VCO_RSV: |
188 | case NAU8825_REG_CLK_DIVIDER ... NAU8825_REG_FLL_VCO_RSV: | ||
189 | case NAU8825_REG_HSD_CTRL ... NAU8825_REG_JACK_DET_CTRL: | 188 | case NAU8825_REG_HSD_CTRL ... NAU8825_REG_JACK_DET_CTRL: |
190 | case NAU8825_REG_INTERRUPT_MASK: | 189 | case NAU8825_REG_INTERRUPT_MASK: |
191 | case NAU8825_REG_INT_CLR_KEY_STATUS ... NAU8825_REG_KEYDET_CTRL: | 190 | case NAU8825_REG_INT_CLR_KEY_STATUS ... NAU8825_REG_KEYDET_CTRL: |
@@ -227,10 +226,42 @@ static bool nau8825_volatile_reg(struct device *dev, unsigned int reg) | |||
227 | static int nau8825_pump_event(struct snd_soc_dapm_widget *w, | 226 | static int nau8825_pump_event(struct snd_soc_dapm_widget *w, |
228 | struct snd_kcontrol *kcontrol, int event) | 227 | struct snd_kcontrol *kcontrol, int event) |
229 | { | 228 | { |
229 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | ||
230 | struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); | ||
231 | |||
230 | switch (event) { | 232 | switch (event) { |
231 | case SND_SOC_DAPM_POST_PMU: | 233 | case SND_SOC_DAPM_POST_PMU: |
232 | /* Prevent startup click by letting charge pump to ramp up */ | 234 | /* Prevent startup click by letting charge pump to ramp up */ |
233 | msleep(10); | 235 | msleep(10); |
236 | regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, | ||
237 | NAU8825_JAMNODCLOW, NAU8825_JAMNODCLOW); | ||
238 | break; | ||
239 | case SND_SOC_DAPM_PRE_PMD: | ||
240 | regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, | ||
241 | NAU8825_JAMNODCLOW, 0); | ||
242 | break; | ||
243 | default: | ||
244 | return -EINVAL; | ||
245 | } | ||
246 | |||
247 | return 0; | ||
248 | } | ||
249 | |||
250 | static int nau8825_output_dac_event(struct snd_soc_dapm_widget *w, | ||
251 | struct snd_kcontrol *kcontrol, int event) | ||
252 | { | ||
253 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | ||
254 | struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec); | ||
255 | |||
256 | switch (event) { | ||
257 | case SND_SOC_DAPM_PRE_PMU: | ||
258 | /* Disables the TESTDAC to let DAC signal pass through. */ | ||
259 | regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, | ||
260 | NAU8825_BIAS_TESTDAC_EN, 0); | ||
261 | break; | ||
262 | case SND_SOC_DAPM_POST_PMD: | ||
263 | regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, | ||
264 | NAU8825_BIAS_TESTDAC_EN, NAU8825_BIAS_TESTDAC_EN); | ||
234 | break; | 265 | break; |
235 | default: | 266 | default: |
236 | return -EINVAL; | 267 | return -EINVAL; |
@@ -316,10 +347,10 @@ static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = { | |||
316 | SND_SOC_DAPM_ADC("SAR", NULL, NAU8825_REG_SAR_CTRL, | 347 | SND_SOC_DAPM_ADC("SAR", NULL, NAU8825_REG_SAR_CTRL, |
317 | NAU8825_SAR_ADC_EN_SFT, 0), | 348 | NAU8825_SAR_ADC_EN_SFT, 0), |
318 | 349 | ||
319 | SND_SOC_DAPM_DAC("ADACL", NULL, NAU8825_REG_RDAC, 12, 0), | 350 | SND_SOC_DAPM_PGA_S("ADACL", 2, NAU8825_REG_RDAC, 12, 0, NULL, 0), |
320 | SND_SOC_DAPM_DAC("ADACR", NULL, NAU8825_REG_RDAC, 13, 0), | 351 | SND_SOC_DAPM_PGA_S("ADACR", 2, NAU8825_REG_RDAC, 13, 0, NULL, 0), |
321 | SND_SOC_DAPM_SUPPLY("ADACL Clock", NAU8825_REG_RDAC, 8, 0, NULL, 0), | 352 | SND_SOC_DAPM_PGA_S("ADACL Clock", 3, NAU8825_REG_RDAC, 8, 0, NULL, 0), |
322 | SND_SOC_DAPM_SUPPLY("ADACR Clock", NAU8825_REG_RDAC, 9, 0, NULL, 0), | 353 | SND_SOC_DAPM_PGA_S("ADACR Clock", 3, NAU8825_REG_RDAC, 9, 0, NULL, 0), |
323 | 354 | ||
324 | SND_SOC_DAPM_DAC("DDACR", NULL, NAU8825_REG_ENA_CTRL, | 355 | SND_SOC_DAPM_DAC("DDACR", NULL, NAU8825_REG_ENA_CTRL, |
325 | NAU8825_ENABLE_DACR_SFT, 0), | 356 | NAU8825_ENABLE_DACR_SFT, 0), |
@@ -330,29 +361,48 @@ static const struct snd_soc_dapm_widget nau8825_dapm_widgets[] = { | |||
330 | SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &nau8825_dacl_mux), | 361 | SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &nau8825_dacl_mux), |
331 | SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &nau8825_dacr_mux), | 362 | SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &nau8825_dacr_mux), |
332 | 363 | ||
333 | SND_SOC_DAPM_PGA("HP amp L", NAU8825_REG_CLASSG_CTRL, 1, 0, NULL, 0), | 364 | SND_SOC_DAPM_PGA_S("HP amp L", 0, |
334 | SND_SOC_DAPM_PGA("HP amp R", NAU8825_REG_CLASSG_CTRL, 2, 0, NULL, 0), | 365 | NAU8825_REG_CLASSG_CTRL, 1, 0, NULL, 0), |
335 | SND_SOC_DAPM_SUPPLY("HP amp power", NAU8825_REG_CLASSG_CTRL, 0, 0, NULL, | 366 | SND_SOC_DAPM_PGA_S("HP amp R", 0, |
336 | 0), | 367 | NAU8825_REG_CLASSG_CTRL, 2, 0, NULL, 0), |
337 | 368 | ||
338 | SND_SOC_DAPM_SUPPLY("Charge Pump", NAU8825_REG_CHARGE_PUMP, 5, 0, | 369 | SND_SOC_DAPM_PGA_S("Charge Pump", 1, NAU8825_REG_CHARGE_PUMP, 5, 0, |
339 | nau8825_pump_event, SND_SOC_DAPM_POST_PMU), | 370 | nau8825_pump_event, SND_SOC_DAPM_POST_PMU | |
371 | SND_SOC_DAPM_PRE_PMD), | ||
340 | 372 | ||
341 | SND_SOC_DAPM_PGA("Output Driver R Stage 1", | 373 | SND_SOC_DAPM_PGA_S("Output Driver R Stage 1", 4, |
342 | NAU8825_REG_POWER_UP_CONTROL, 5, 0, NULL, 0), | 374 | NAU8825_REG_POWER_UP_CONTROL, 5, 0, NULL, 0), |
343 | SND_SOC_DAPM_PGA("Output Driver L Stage 1", | 375 | SND_SOC_DAPM_PGA_S("Output Driver L Stage 1", 4, |
344 | NAU8825_REG_POWER_UP_CONTROL, 4, 0, NULL, 0), | 376 | NAU8825_REG_POWER_UP_CONTROL, 4, 0, NULL, 0), |
345 | SND_SOC_DAPM_PGA("Output Driver R Stage 2", | 377 | SND_SOC_DAPM_PGA_S("Output Driver R Stage 2", 5, |
346 | NAU8825_REG_POWER_UP_CONTROL, 3, 0, NULL, 0), | 378 | NAU8825_REG_POWER_UP_CONTROL, 3, 0, NULL, 0), |
347 | SND_SOC_DAPM_PGA("Output Driver L Stage 2", | 379 | SND_SOC_DAPM_PGA_S("Output Driver L Stage 2", 5, |
348 | NAU8825_REG_POWER_UP_CONTROL, 2, 0, NULL, 0), | 380 | NAU8825_REG_POWER_UP_CONTROL, 2, 0, NULL, 0), |
349 | SND_SOC_DAPM_PGA_S("Output Driver R Stage 3", 1, | 381 | SND_SOC_DAPM_PGA_S("Output Driver R Stage 3", 6, |
350 | NAU8825_REG_POWER_UP_CONTROL, 1, 0, NULL, 0), | 382 | NAU8825_REG_POWER_UP_CONTROL, 1, 0, NULL, 0), |
351 | SND_SOC_DAPM_PGA_S("Output Driver L Stage 3", 1, | 383 | SND_SOC_DAPM_PGA_S("Output Driver L Stage 3", 6, |
352 | NAU8825_REG_POWER_UP_CONTROL, 0, 0, NULL, 0), | 384 | NAU8825_REG_POWER_UP_CONTROL, 0, 0, NULL, 0), |
353 | 385 | ||
354 | SND_SOC_DAPM_PGA_S("Output DACL", 2, NAU8825_REG_CHARGE_PUMP, 8, 1, NULL, 0), | 386 | SND_SOC_DAPM_PGA_S("Output DACL", 7, |
355 | SND_SOC_DAPM_PGA_S("Output DACR", 2, NAU8825_REG_CHARGE_PUMP, 9, 1, NULL, 0), | 387 | NAU8825_REG_CHARGE_PUMP, 8, 1, nau8825_output_dac_event, |
388 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | ||
389 | SND_SOC_DAPM_PGA_S("Output DACR", 7, | ||
390 | NAU8825_REG_CHARGE_PUMP, 9, 1, nau8825_output_dac_event, | ||
391 | SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), | ||
392 | |||
393 | /* HPOL/R are ungrounded by disabling 16 Ohm pull-downs on playback */ | ||
394 | SND_SOC_DAPM_PGA_S("HPOL Pulldown", 8, | ||
395 | NAU8825_REG_HSD_CTRL, 0, 1, NULL, 0), | ||
396 | SND_SOC_DAPM_PGA_S("HPOR Pulldown", 8, | ||
397 | NAU8825_REG_HSD_CTRL, 1, 1, NULL, 0), | ||
398 | |||
399 | /* High current HPOL/R boost driver */ | ||
400 | SND_SOC_DAPM_PGA_S("HP Boost Driver", 9, | ||
401 | NAU8825_REG_BOOST, 9, 1, NULL, 0), | ||
402 | |||
403 | /* Class G operation control*/ | ||
404 | SND_SOC_DAPM_PGA_S("Class G", 10, | ||
405 | NAU8825_REG_CLASSG_CTRL, 0, 0, NULL, 0), | ||
356 | 406 | ||
357 | SND_SOC_DAPM_OUTPUT("HPOL"), | 407 | SND_SOC_DAPM_OUTPUT("HPOL"), |
358 | SND_SOC_DAPM_OUTPUT("HPOR"), | 408 | SND_SOC_DAPM_OUTPUT("HPOR"), |
@@ -375,24 +425,27 @@ static const struct snd_soc_dapm_route nau8825_dapm_routes[] = { | |||
375 | {"DACR Mux", "DACR", "DDACR"}, | 425 | {"DACR Mux", "DACR", "DDACR"}, |
376 | {"HP amp L", NULL, "DACL Mux"}, | 426 | {"HP amp L", NULL, "DACL Mux"}, |
377 | {"HP amp R", NULL, "DACR Mux"}, | 427 | {"HP amp R", NULL, "DACR Mux"}, |
378 | {"HP amp L", NULL, "HP amp power"}, | 428 | {"Charge Pump", NULL, "HP amp L"}, |
379 | {"HP amp R", NULL, "HP amp power"}, | 429 | {"Charge Pump", NULL, "HP amp R"}, |
380 | {"ADACL", NULL, "HP amp L"}, | 430 | {"ADACL", NULL, "Charge Pump"}, |
381 | {"ADACR", NULL, "HP amp R"}, | 431 | {"ADACR", NULL, "Charge Pump"}, |
382 | {"ADACL", NULL, "ADACL Clock"}, | 432 | {"ADACL Clock", NULL, "ADACL"}, |
383 | {"ADACR", NULL, "ADACR Clock"}, | 433 | {"ADACR Clock", NULL, "ADACR"}, |
384 | {"Output Driver L Stage 1", NULL, "ADACL"}, | 434 | {"Output Driver L Stage 1", NULL, "ADACL Clock"}, |
385 | {"Output Driver R Stage 1", NULL, "ADACR"}, | 435 | {"Output Driver R Stage 1", NULL, "ADACR Clock"}, |
386 | {"Output Driver L Stage 2", NULL, "Output Driver L Stage 1"}, | 436 | {"Output Driver L Stage 2", NULL, "Output Driver L Stage 1"}, |
387 | {"Output Driver R Stage 2", NULL, "Output Driver R Stage 1"}, | 437 | {"Output Driver R Stage 2", NULL, "Output Driver R Stage 1"}, |
388 | {"Output Driver L Stage 3", NULL, "Output Driver L Stage 2"}, | 438 | {"Output Driver L Stage 3", NULL, "Output Driver L Stage 2"}, |
389 | {"Output Driver R Stage 3", NULL, "Output Driver R Stage 2"}, | 439 | {"Output Driver R Stage 3", NULL, "Output Driver R Stage 2"}, |
390 | {"Output DACL", NULL, "Output Driver L Stage 3"}, | 440 | {"Output DACL", NULL, "Output Driver L Stage 3"}, |
391 | {"Output DACR", NULL, "Output Driver R Stage 3"}, | 441 | {"Output DACR", NULL, "Output Driver R Stage 3"}, |
392 | {"HPOL", NULL, "Output DACL"}, | 442 | {"HPOL Pulldown", NULL, "Output DACL"}, |
393 | {"HPOR", NULL, "Output DACR"}, | 443 | {"HPOR Pulldown", NULL, "Output DACR"}, |
394 | {"HPOL", NULL, "Charge Pump"}, | 444 | {"HP Boost Driver", NULL, "HPOL Pulldown"}, |
395 | {"HPOR", NULL, "Charge Pump"}, | 445 | {"HP Boost Driver", NULL, "HPOR Pulldown"}, |
446 | {"Class G", NULL, "HP Boost Driver"}, | ||
447 | {"HPOL", NULL, "Class G"}, | ||
448 | {"HPOR", NULL, "Class G"}, | ||
396 | }; | 449 | }; |
397 | 450 | ||
398 | static int nau8825_hw_params(struct snd_pcm_substream *substream, | 451 | static int nau8825_hw_params(struct snd_pcm_substream *substream, |
@@ -659,11 +712,10 @@ static int nau8825_jack_insert(struct nau8825 *nau8825) | |||
659 | break; | 712 | break; |
660 | } | 713 | } |
661 | 714 | ||
662 | if (type & SND_JACK_HEADPHONE) { | 715 | /* Leaving HPOL/R grounded after jack insert by default. They will be |
663 | /* Unground HPL/R */ | 716 | * ungrounded as part of the widget power up sequence at the beginning |
664 | regmap_update_bits(regmap, NAU8825_REG_HSD_CTRL, 0x3, 0); | 717 | * of playback to reduce pop. |
665 | } | 718 | */ |
666 | |||
667 | return type; | 719 | return type; |
668 | } | 720 | } |
669 | 721 | ||
@@ -768,6 +820,8 @@ static void nau8825_init_regs(struct nau8825 *nau8825) | |||
768 | { | 820 | { |
769 | struct regmap *regmap = nau8825->regmap; | 821 | struct regmap *regmap = nau8825->regmap; |
770 | 822 | ||
823 | /* Latch IIC LSB value */ | ||
824 | regmap_write(regmap, NAU8825_REG_IIC_ADDR_SET, 0x0001); | ||
771 | /* Enable Bias/Vmid */ | 825 | /* Enable Bias/Vmid */ |
772 | regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, | 826 | regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, |
773 | NAU8825_BIAS_VMID, NAU8825_BIAS_VMID); | 827 | NAU8825_BIAS_VMID, NAU8825_BIAS_VMID); |
@@ -780,10 +834,10 @@ static void nau8825_init_regs(struct nau8825 *nau8825) | |||
780 | nau8825->vref_impedance << NAU8825_BIAS_VMID_SEL_SFT); | 834 | nau8825->vref_impedance << NAU8825_BIAS_VMID_SEL_SFT); |
781 | /* Disable Boost Driver, Automatic Short circuit protection enable */ | 835 | /* Disable Boost Driver, Automatic Short circuit protection enable */ |
782 | regmap_update_bits(regmap, NAU8825_REG_BOOST, | 836 | regmap_update_bits(regmap, NAU8825_REG_BOOST, |
783 | NAU8825_PRECHARGE_DIS | NAU8825_HP_BOOST_G_DIS | | 837 | NAU8825_PRECHARGE_DIS | NAU8825_HP_BOOST_DIS | |
784 | NAU8825_SHORT_SHUTDOWN_EN, | 838 | NAU8825_HP_BOOST_G_DIS | NAU8825_SHORT_SHUTDOWN_EN, |
785 | NAU8825_PRECHARGE_DIS | NAU8825_HP_BOOST_G_DIS | | 839 | NAU8825_PRECHARGE_DIS | NAU8825_HP_BOOST_DIS | |
786 | NAU8825_SHORT_SHUTDOWN_EN); | 840 | NAU8825_HP_BOOST_G_DIS | NAU8825_SHORT_SHUTDOWN_EN); |
787 | 841 | ||
788 | regmap_update_bits(regmap, NAU8825_REG_GPIO12_CTRL, | 842 | regmap_update_bits(regmap, NAU8825_REG_GPIO12_CTRL, |
789 | NAU8825_JKDET_OUTPUT_EN, | 843 | NAU8825_JKDET_OUTPUT_EN, |
@@ -822,6 +876,35 @@ static void nau8825_init_regs(struct nau8825 *nau8825) | |||
822 | NAU8825_ADC_SYNC_DOWN_MASK, NAU8825_ADC_SYNC_DOWN_128); | 876 | NAU8825_ADC_SYNC_DOWN_MASK, NAU8825_ADC_SYNC_DOWN_128); |
823 | regmap_update_bits(regmap, NAU8825_REG_DAC_CTRL1, | 877 | regmap_update_bits(regmap, NAU8825_REG_DAC_CTRL1, |
824 | NAU8825_DAC_OVERSAMPLE_MASK, NAU8825_DAC_OVERSAMPLE_128); | 878 | NAU8825_DAC_OVERSAMPLE_MASK, NAU8825_DAC_OVERSAMPLE_128); |
879 | /* Disable DACR/L power */ | ||
880 | regmap_update_bits(regmap, NAU8825_REG_CHARGE_PUMP, | ||
881 | NAU8825_POWER_DOWN_DACR | NAU8825_POWER_DOWN_DACL, | ||
882 | NAU8825_POWER_DOWN_DACR | NAU8825_POWER_DOWN_DACL); | ||
883 | /* Enable TESTDAC. This sets the analog DAC inputs to a '0' input | ||
884 | * signal to avoid any glitches due to power up transients in both | ||
885 | * the analog and digital DAC circuit. | ||
886 | */ | ||
887 | regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, | ||
888 | NAU8825_BIAS_TESTDAC_EN, NAU8825_BIAS_TESTDAC_EN); | ||
889 | /* CICCLP off */ | ||
890 | regmap_update_bits(regmap, NAU8825_REG_DAC_CTRL1, | ||
891 | NAU8825_DAC_CLIP_OFF, NAU8825_DAC_CLIP_OFF); | ||
892 | |||
893 | /* Class AB bias current to 2x, DAC Capacitor enable MSB/LSB */ | ||
894 | regmap_update_bits(regmap, NAU8825_REG_ANALOG_CONTROL_2, | ||
895 | NAU8825_HP_NON_CLASSG_CURRENT_2xADJ | | ||
896 | NAU8825_DAC_CAPACITOR_MSB | NAU8825_DAC_CAPACITOR_LSB, | ||
897 | NAU8825_HP_NON_CLASSG_CURRENT_2xADJ | | ||
898 | NAU8825_DAC_CAPACITOR_MSB | NAU8825_DAC_CAPACITOR_LSB); | ||
899 | /* Class G timer 64ms */ | ||
900 | regmap_update_bits(regmap, NAU8825_REG_CLASSG_CTRL, | ||
901 | NAU8825_CLASSG_TIMER_MASK, | ||
902 | 0x20 << NAU8825_CLASSG_TIMER_SFT); | ||
903 | /* DAC clock delay 2ns, VREF */ | ||
904 | regmap_update_bits(regmap, NAU8825_REG_RDAC, | ||
905 | NAU8825_RDAC_CLK_DELAY_MASK | NAU8825_RDAC_VREF_MASK, | ||
906 | (0x2 << NAU8825_RDAC_CLK_DELAY_SFT) | | ||
907 | (0x3 << NAU8825_RDAC_VREF_SFT)); | ||
825 | } | 908 | } |
826 | 909 | ||
827 | static const struct regmap_config nau8825_regmap_config = { | 910 | static const struct regmap_config nau8825_regmap_config = { |
diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h index dff8edb83bfd..8ceb5f385478 100644 --- a/sound/soc/codecs/nau8825.h +++ b/sound/soc/codecs/nau8825.h | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | #define NAU8825_REG_RESET 0x00 | 15 | #define NAU8825_REG_RESET 0x00 |
16 | #define NAU8825_REG_ENA_CTRL 0x01 | 16 | #define NAU8825_REG_ENA_CTRL 0x01 |
17 | #define NAU8825_REG_IIC_ADDR_SET 0x02 | ||
17 | #define NAU8825_REG_CLK_DIVIDER 0x03 | 18 | #define NAU8825_REG_CLK_DIVIDER 0x03 |
18 | #define NAU8825_REG_FLL1 0x04 | 19 | #define NAU8825_REG_FLL1 0x04 |
19 | #define NAU8825_REG_FLL2 0x05 | 20 | #define NAU8825_REG_FLL2 0x05 |
@@ -129,7 +130,7 @@ | |||
129 | 130 | ||
130 | /* HSD_CTRL (0xc) */ | 131 | /* HSD_CTRL (0xc) */ |
131 | #define NAU8825_HSD_AUTO_MODE (1 << 6) | 132 | #define NAU8825_HSD_AUTO_MODE (1 << 6) |
132 | /* 0 - short to GND, 1 - open */ | 133 | /* 0 - open, 1 - short to GND */ |
133 | #define NAU8825_SPKR_DWN1R (1 << 1) | 134 | #define NAU8825_SPKR_DWN1R (1 << 1) |
134 | #define NAU8825_SPKR_DWN1L (1 << 0) | 135 | #define NAU8825_SPKR_DWN1L (1 << 0) |
135 | 136 | ||
@@ -251,12 +252,18 @@ | |||
251 | /* DACR_CTRL (0x34) */ | 252 | /* DACR_CTRL (0x34) */ |
252 | #define NAU8825_DACR_CH_SEL_SFT 9 | 253 | #define NAU8825_DACR_CH_SEL_SFT 9 |
253 | 254 | ||
255 | /* CLASSG_CTRL (0x50) */ | ||
256 | #define NAU8825_CLASSG_TIMER_SFT 8 | ||
257 | #define NAU8825_CLASSG_TIMER_MASK (0x3f << NAU8825_CLASSG_TIMER_SFT) | ||
258 | #define NAU8825_CLASSG_EN (1 << 0) | ||
259 | |||
254 | /* I2C_DEVICE_ID (0x58) */ | 260 | /* I2C_DEVICE_ID (0x58) */ |
255 | #define NAU8825_GPIO2JD1 (1 << 7) | 261 | #define NAU8825_GPIO2JD1 (1 << 7) |
256 | #define NAU8825_SOFTWARE_ID_MASK 0x3 | 262 | #define NAU8825_SOFTWARE_ID_MASK 0x3 |
257 | #define NAU8825_SOFTWARE_ID_NAU8825 0x0 | 263 | #define NAU8825_SOFTWARE_ID_NAU8825 0x0 |
258 | 264 | ||
259 | /* BIAS_ADJ (0x66) */ | 265 | /* BIAS_ADJ (0x66) */ |
266 | #define NAU8825_BIAS_TESTDAC_EN (0x3 << 8) | ||
260 | #define NAU8825_BIAS_VMID (1 << 6) | 267 | #define NAU8825_BIAS_VMID (1 << 6) |
261 | #define NAU8825_BIAS_VMID_SEL_SFT 4 | 268 | #define NAU8825_BIAS_VMID_SEL_SFT 4 |
262 | #define NAU8825_BIAS_VMID_SEL_MASK (3 << NAU8825_BIAS_VMID_SEL_SFT) | 269 | #define NAU8825_BIAS_VMID_SEL_MASK (3 << NAU8825_BIAS_VMID_SEL_SFT) |
@@ -274,6 +281,12 @@ | |||
274 | #define NAU8825_ADC_VREFSEL_VMID_PLUS_1DB (3 << 8) | 281 | #define NAU8825_ADC_VREFSEL_VMID_PLUS_1DB (3 << 8) |
275 | #define NAU8825_POWERUP_ADCL (1 << 6) | 282 | #define NAU8825_POWERUP_ADCL (1 << 6) |
276 | 283 | ||
284 | /* RDAC (0x73) */ | ||
285 | #define NAU8825_RDAC_CLK_DELAY_SFT 4 | ||
286 | #define NAU8825_RDAC_CLK_DELAY_MASK (0x7 << NAU8825_RDAC_CLK_DELAY_SFT) | ||
287 | #define NAU8825_RDAC_VREF_SFT 2 | ||
288 | #define NAU8825_RDAC_VREF_MASK (0x3 << NAU8825_RDAC_VREF_SFT) | ||
289 | |||
277 | /* MIC_BIAS (0x74) */ | 290 | /* MIC_BIAS (0x74) */ |
278 | #define NAU8825_MICBIAS_JKSLV (1 << 14) | 291 | #define NAU8825_MICBIAS_JKSLV (1 << 14) |
279 | #define NAU8825_MICBIAS_JKR2 (1 << 12) | 292 | #define NAU8825_MICBIAS_JKR2 (1 << 12) |
@@ -284,6 +297,7 @@ | |||
284 | /* BOOST (0x76) */ | 297 | /* BOOST (0x76) */ |
285 | #define NAU8825_PRECHARGE_DIS (1 << 13) | 298 | #define NAU8825_PRECHARGE_DIS (1 << 13) |
286 | #define NAU8825_GLOBAL_BIAS_EN (1 << 12) | 299 | #define NAU8825_GLOBAL_BIAS_EN (1 << 12) |
300 | #define NAU8825_HP_BOOST_DIS (1 << 9) | ||
287 | #define NAU8825_HP_BOOST_G_DIS (1 << 8) | 301 | #define NAU8825_HP_BOOST_G_DIS (1 << 8) |
288 | #define NAU8825_SHORT_SHUTDOWN_EN (1 << 6) | 302 | #define NAU8825_SHORT_SHUTDOWN_EN (1 << 6) |
289 | 303 | ||
diff --git a/sound/soc/codecs/pcm179x-i2c.c b/sound/soc/codecs/pcm179x-i2c.c new file mode 100644 index 000000000000..4118106abb8d --- /dev/null +++ b/sound/soc/codecs/pcm179x-i2c.c | |||
@@ -0,0 +1,73 @@ | |||
1 | /* | ||
2 | * PCM179X ASoC I2C driver | ||
3 | * | ||
4 | * Copyright (c) Teenage Engineering AB 2016 | ||
5 | * | ||
6 | * Jacob Siverskog <jacob@teenage.engineering> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #include <linux/module.h> | ||
20 | #include <linux/of.h> | ||
21 | #include <linux/i2c.h> | ||
22 | #include <linux/regmap.h> | ||
23 | |||
24 | #include "pcm179x.h" | ||
25 | |||
26 | static int pcm179x_i2c_probe(struct i2c_client *client, | ||
27 | const struct i2c_device_id *id) | ||
28 | { | ||
29 | struct regmap *regmap; | ||
30 | int ret; | ||
31 | |||
32 | regmap = devm_regmap_init_i2c(client, &pcm179x_regmap_config); | ||
33 | if (IS_ERR(regmap)) { | ||
34 | ret = PTR_ERR(regmap); | ||
35 | dev_err(&client->dev, "Failed to allocate regmap: %d\n", ret); | ||
36 | return ret; | ||
37 | } | ||
38 | |||
39 | return pcm179x_common_init(&client->dev, regmap); | ||
40 | } | ||
41 | |||
42 | static int pcm179x_i2c_remove(struct i2c_client *client) | ||
43 | { | ||
44 | return pcm179x_common_exit(&client->dev); | ||
45 | } | ||
46 | |||
47 | static const struct of_device_id pcm179x_of_match[] = { | ||
48 | { .compatible = "ti,pcm1792a", }, | ||
49 | { } | ||
50 | }; | ||
51 | MODULE_DEVICE_TABLE(of, pcm179x_of_match); | ||
52 | |||
53 | static const struct i2c_device_id pcm179x_i2c_ids[] = { | ||
54 | { "pcm179x", 0 }, | ||
55 | { } | ||
56 | }; | ||
57 | MODULE_DEVICE_TABLE(i2c, pcm179x_i2c_ids); | ||
58 | |||
59 | static struct i2c_driver pcm179x_i2c_driver = { | ||
60 | .driver = { | ||
61 | .name = "pcm179x", | ||
62 | .of_match_table = of_match_ptr(pcm179x_of_match), | ||
63 | }, | ||
64 | .id_table = pcm179x_i2c_ids, | ||
65 | .probe = pcm179x_i2c_probe, | ||
66 | .remove = pcm179x_i2c_remove, | ||
67 | }; | ||
68 | |||
69 | module_i2c_driver(pcm179x_i2c_driver); | ||
70 | |||
71 | MODULE_DESCRIPTION("ASoC PCM179X I2C driver"); | ||
72 | MODULE_AUTHOR("Jacob Siverskog <jacob@teenage.engineering>"); | ||
73 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/codecs/pcm179x-spi.c b/sound/soc/codecs/pcm179x-spi.c new file mode 100644 index 000000000000..da924d444083 --- /dev/null +++ b/sound/soc/codecs/pcm179x-spi.c | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * PCM179X ASoC SPI driver | ||
3 | * | ||
4 | * Copyright (c) Amarula Solutions B.V. 2013 | ||
5 | * | ||
6 | * Michael Trimarchi <michael@amarulasolutions.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #include <linux/module.h> | ||
20 | #include <linux/of.h> | ||
21 | #include <linux/spi/spi.h> | ||
22 | #include <linux/regmap.h> | ||
23 | |||
24 | #include "pcm179x.h" | ||
25 | |||
26 | static int pcm179x_spi_probe(struct spi_device *spi) | ||
27 | { | ||
28 | struct regmap *regmap; | ||
29 | int ret; | ||
30 | |||
31 | regmap = devm_regmap_init_spi(spi, &pcm179x_regmap_config); | ||
32 | if (IS_ERR(regmap)) { | ||
33 | ret = PTR_ERR(regmap); | ||
34 | dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret); | ||
35 | return ret; | ||
36 | } | ||
37 | |||
38 | return pcm179x_common_init(&spi->dev, regmap); | ||
39 | } | ||
40 | |||
41 | static int pcm179x_spi_remove(struct spi_device *spi) | ||
42 | { | ||
43 | return pcm179x_common_exit(&spi->dev); | ||
44 | } | ||
45 | |||
46 | static const struct of_device_id pcm179x_of_match[] = { | ||
47 | { .compatible = "ti,pcm1792a", }, | ||
48 | { } | ||
49 | }; | ||
50 | MODULE_DEVICE_TABLE(of, pcm179x_of_match); | ||
51 | |||
52 | static const struct spi_device_id pcm179x_spi_ids[] = { | ||
53 | { "pcm179x", 0 }, | ||
54 | { }, | ||
55 | }; | ||
56 | MODULE_DEVICE_TABLE(spi, pcm179x_spi_ids); | ||
57 | |||
58 | static struct spi_driver pcm179x_spi_driver = { | ||
59 | .driver = { | ||
60 | .name = "pcm179x", | ||
61 | .of_match_table = of_match_ptr(pcm179x_of_match), | ||
62 | }, | ||
63 | .id_table = pcm179x_spi_ids, | ||
64 | .probe = pcm179x_spi_probe, | ||
65 | .remove = pcm179x_spi_remove, | ||
66 | }; | ||
67 | |||
68 | module_spi_driver(pcm179x_spi_driver); | ||
69 | |||
70 | MODULE_DESCRIPTION("ASoC PCM179X SPI driver"); | ||
71 | MODULE_AUTHOR("Michael Trimarchi <michael@amarulasolutions.com>"); | ||
72 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/codecs/pcm179x.c b/sound/soc/codecs/pcm179x.c index a56c7b767d90..06a66579ca6d 100644 --- a/sound/soc/codecs/pcm179x.c +++ b/sound/soc/codecs/pcm179x.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include <linux/slab.h> | 20 | #include <linux/slab.h> |
21 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
22 | #include <linux/device.h> | 22 | #include <linux/device.h> |
23 | #include <linux/spi/spi.h> | ||
24 | 23 | ||
25 | #include <sound/core.h> | 24 | #include <sound/core.h> |
26 | #include <sound/pcm.h> | 25 | #include <sound/pcm.h> |
@@ -29,7 +28,6 @@ | |||
29 | #include <sound/soc.h> | 28 | #include <sound/soc.h> |
30 | #include <sound/tlv.h> | 29 | #include <sound/tlv.h> |
31 | #include <linux/of.h> | 30 | #include <linux/of.h> |
32 | #include <linux/of_device.h> | ||
33 | 31 | ||
34 | #include "pcm179x.h" | 32 | #include "pcm179x.h" |
35 | 33 | ||
@@ -189,18 +187,14 @@ static struct snd_soc_dai_driver pcm179x_dai = { | |||
189 | .stream_name = "Playback", | 187 | .stream_name = "Playback", |
190 | .channels_min = 2, | 188 | .channels_min = 2, |
191 | .channels_max = 2, | 189 | .channels_max = 2, |
192 | .rates = PCM1792A_RATES, | 190 | .rates = SNDRV_PCM_RATE_CONTINUOUS, |
191 | .rate_min = 10000, | ||
192 | .rate_max = 200000, | ||
193 | .formats = PCM1792A_FORMATS, }, | 193 | .formats = PCM1792A_FORMATS, }, |
194 | .ops = &pcm179x_dai_ops, | 194 | .ops = &pcm179x_dai_ops, |
195 | }; | 195 | }; |
196 | 196 | ||
197 | static const struct of_device_id pcm179x_of_match[] = { | 197 | const struct regmap_config pcm179x_regmap_config = { |
198 | { .compatible = "ti,pcm1792a", }, | ||
199 | { } | ||
200 | }; | ||
201 | MODULE_DEVICE_TABLE(of, pcm179x_of_match); | ||
202 | |||
203 | static const struct regmap_config pcm179x_regmap = { | ||
204 | .reg_bits = 8, | 198 | .reg_bits = 8, |
205 | .val_bits = 8, | 199 | .val_bits = 8, |
206 | .max_register = 23, | 200 | .max_register = 23, |
@@ -209,6 +203,7 @@ static const struct regmap_config pcm179x_regmap = { | |||
209 | .writeable_reg = pcm179x_writeable_reg, | 203 | .writeable_reg = pcm179x_writeable_reg, |
210 | .readable_reg = pcm179x_accessible_reg, | 204 | .readable_reg = pcm179x_accessible_reg, |
211 | }; | 205 | }; |
206 | EXPORT_SYMBOL_GPL(pcm179x_regmap_config); | ||
212 | 207 | ||
213 | static struct snd_soc_codec_driver soc_codec_dev_pcm179x = { | 208 | static struct snd_soc_codec_driver soc_codec_dev_pcm179x = { |
214 | .controls = pcm179x_controls, | 209 | .controls = pcm179x_controls, |
@@ -219,52 +214,29 @@ static struct snd_soc_codec_driver soc_codec_dev_pcm179x = { | |||
219 | .num_dapm_routes = ARRAY_SIZE(pcm179x_dapm_routes), | 214 | .num_dapm_routes = ARRAY_SIZE(pcm179x_dapm_routes), |
220 | }; | 215 | }; |
221 | 216 | ||
222 | static int pcm179x_spi_probe(struct spi_device *spi) | 217 | int pcm179x_common_init(struct device *dev, struct regmap *regmap) |
223 | { | 218 | { |
224 | struct pcm179x_private *pcm179x; | 219 | struct pcm179x_private *pcm179x; |
225 | int ret; | ||
226 | 220 | ||
227 | pcm179x = devm_kzalloc(&spi->dev, sizeof(struct pcm179x_private), | 221 | pcm179x = devm_kzalloc(dev, sizeof(struct pcm179x_private), |
228 | GFP_KERNEL); | 222 | GFP_KERNEL); |
229 | if (!pcm179x) | 223 | if (!pcm179x) |
230 | return -ENOMEM; | 224 | return -ENOMEM; |
231 | 225 | ||
232 | spi_set_drvdata(spi, pcm179x); | 226 | pcm179x->regmap = regmap; |
233 | 227 | dev_set_drvdata(dev, pcm179x); | |
234 | pcm179x->regmap = devm_regmap_init_spi(spi, &pcm179x_regmap); | ||
235 | if (IS_ERR(pcm179x->regmap)) { | ||
236 | ret = PTR_ERR(pcm179x->regmap); | ||
237 | dev_err(&spi->dev, "Failed to register regmap: %d\n", ret); | ||
238 | return ret; | ||
239 | } | ||
240 | 228 | ||
241 | return snd_soc_register_codec(&spi->dev, | 229 | return snd_soc_register_codec(dev, |
242 | &soc_codec_dev_pcm179x, &pcm179x_dai, 1); | 230 | &soc_codec_dev_pcm179x, &pcm179x_dai, 1); |
243 | } | 231 | } |
232 | EXPORT_SYMBOL_GPL(pcm179x_common_init); | ||
244 | 233 | ||
245 | static int pcm179x_spi_remove(struct spi_device *spi) | 234 | int pcm179x_common_exit(struct device *dev) |
246 | { | 235 | { |
247 | snd_soc_unregister_codec(&spi->dev); | 236 | snd_soc_unregister_codec(dev); |
248 | return 0; | 237 | return 0; |
249 | } | 238 | } |
250 | 239 | EXPORT_SYMBOL_GPL(pcm179x_common_exit); | |
251 | static const struct spi_device_id pcm179x_spi_ids[] = { | ||
252 | { "pcm179x", 0 }, | ||
253 | { }, | ||
254 | }; | ||
255 | MODULE_DEVICE_TABLE(spi, pcm179x_spi_ids); | ||
256 | |||
257 | static struct spi_driver pcm179x_codec_driver = { | ||
258 | .driver = { | ||
259 | .name = "pcm179x", | ||
260 | .of_match_table = of_match_ptr(pcm179x_of_match), | ||
261 | }, | ||
262 | .id_table = pcm179x_spi_ids, | ||
263 | .probe = pcm179x_spi_probe, | ||
264 | .remove = pcm179x_spi_remove, | ||
265 | }; | ||
266 | |||
267 | module_spi_driver(pcm179x_codec_driver); | ||
268 | 240 | ||
269 | MODULE_DESCRIPTION("ASoC PCM179X driver"); | 241 | MODULE_DESCRIPTION("ASoC PCM179X driver"); |
270 | MODULE_AUTHOR("Michael Trimarchi <michael@amarulasolutions.com>"); | 242 | MODULE_AUTHOR("Michael Trimarchi <michael@amarulasolutions.com>"); |
diff --git a/sound/soc/codecs/pcm179x.h b/sound/soc/codecs/pcm179x.h index c6fdc062a497..11e331268aae 100644 --- a/sound/soc/codecs/pcm179x.h +++ b/sound/soc/codecs/pcm179x.h | |||
@@ -17,11 +17,12 @@ | |||
17 | #ifndef __PCM179X_H__ | 17 | #ifndef __PCM179X_H__ |
18 | #define __PCM179X_H__ | 18 | #define __PCM179X_H__ |
19 | 19 | ||
20 | #define PCM1792A_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_8000_48000 | \ | ||
21 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \ | ||
22 | SNDRV_PCM_RATE_192000) | ||
23 | |||
24 | #define PCM1792A_FORMATS (SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE | \ | 20 | #define PCM1792A_FORMATS (SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S24_LE | \ |
25 | SNDRV_PCM_FMTBIT_S16_LE) | 21 | SNDRV_PCM_FMTBIT_S16_LE) |
26 | 22 | ||
23 | extern const struct regmap_config pcm179x_regmap_config; | ||
24 | |||
25 | int pcm179x_common_init(struct device *dev, struct regmap *regmap); | ||
26 | int pcm179x_common_exit(struct device *dev); | ||
27 | |||
27 | #endif | 28 | #endif |
diff --git a/sound/soc/codecs/pcm3168a.c b/sound/soc/codecs/pcm3168a.c index 44b268aa4dd8..992a77edcd5d 100644 --- a/sound/soc/codecs/pcm3168a.c +++ b/sound/soc/codecs/pcm3168a.c | |||
@@ -299,10 +299,15 @@ static int pcm3168a_set_dai_sysclk(struct snd_soc_dai *dai, | |||
299 | int clk_id, unsigned int freq, int dir) | 299 | int clk_id, unsigned int freq, int dir) |
300 | { | 300 | { |
301 | struct pcm3168a_priv *pcm3168a = snd_soc_codec_get_drvdata(dai->codec); | 301 | struct pcm3168a_priv *pcm3168a = snd_soc_codec_get_drvdata(dai->codec); |
302 | int ret; | ||
302 | 303 | ||
303 | if (freq > PCM1368A_MAX_SYSCLK) | 304 | if (freq > PCM1368A_MAX_SYSCLK) |
304 | return -EINVAL; | 305 | return -EINVAL; |
305 | 306 | ||
307 | ret = clk_set_rate(pcm3168a->scki, freq); | ||
308 | if (ret) | ||
309 | return ret; | ||
310 | |||
306 | pcm3168a->sysclk = freq; | 311 | pcm3168a->sysclk = freq; |
307 | 312 | ||
308 | return 0; | 313 | return 0; |
@@ -395,13 +400,12 @@ static int pcm3168a_hw_params(struct snd_pcm_substream *substream, | |||
395 | struct pcm3168a_priv *pcm3168a = snd_soc_codec_get_drvdata(codec); | 400 | struct pcm3168a_priv *pcm3168a = snd_soc_codec_get_drvdata(codec); |
396 | bool tx, master_mode; | 401 | bool tx, master_mode; |
397 | u32 val, mask, shift, reg; | 402 | u32 val, mask, shift, reg; |
398 | unsigned int rate, channels, fmt, ratio, max_ratio; | 403 | unsigned int rate, fmt, ratio, max_ratio; |
399 | int i, min_frame_size; | 404 | int i, min_frame_size; |
400 | snd_pcm_format_t format; | 405 | snd_pcm_format_t format; |
401 | 406 | ||
402 | rate = params_rate(params); | 407 | rate = params_rate(params); |
403 | format = params_format(params); | 408 | format = params_format(params); |
404 | channels = params_channels(params); | ||
405 | 409 | ||
406 | ratio = pcm3168a->sysclk / rate; | 410 | ratio = pcm3168a->sysclk / rate; |
407 | 411 | ||
diff --git a/sound/soc/codecs/rt298.c b/sound/soc/codecs/rt298.c index 30c6de62ae6c..f0e6c06e89ac 100644 --- a/sound/soc/codecs/rt298.c +++ b/sound/soc/codecs/rt298.c | |||
@@ -1224,7 +1224,12 @@ static int rt298_i2c_probe(struct i2c_client *i2c, | |||
1224 | regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000); | 1224 | regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000); |
1225 | regmap_update_bits(rt298->regmap, | 1225 | regmap_update_bits(rt298->regmap, |
1226 | RT298_WIND_FILTER_CTRL, 0x0082, 0x0082); | 1226 | RT298_WIND_FILTER_CTRL, 0x0082, 0x0082); |
1227 | regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x2); | 1227 | |
1228 | regmap_write(rt298->regmap, RT298_UNSOLICITED_INLINE_CMD, 0x81); | ||
1229 | regmap_write(rt298->regmap, RT298_UNSOLICITED_HP_OUT, 0x82); | ||
1230 | regmap_write(rt298->regmap, RT298_UNSOLICITED_MIC1, 0x84); | ||
1231 | regmap_update_bits(rt298->regmap, RT298_IRQ_FLAG_CTRL, 0x2, 0x2); | ||
1232 | |||
1228 | rt298->is_hp_in = -1; | 1233 | rt298->is_hp_in = -1; |
1229 | 1234 | ||
1230 | if (rt298->i2c->irq) { | 1235 | if (rt298->i2c->irq) { |
diff --git a/sound/soc/codecs/rt298.h b/sound/soc/codecs/rt298.h index 31da16265f2b..d66f8847b676 100644 --- a/sound/soc/codecs/rt298.h +++ b/sound/soc/codecs/rt298.h | |||
@@ -34,6 +34,7 @@ | |||
34 | #define RT298_HP_OUT 0x21 | 34 | #define RT298_HP_OUT 0x21 |
35 | #define RT298_MIXER_IN1 0x22 | 35 | #define RT298_MIXER_IN1 0x22 |
36 | #define RT298_MIXER_IN2 0x23 | 36 | #define RT298_MIXER_IN2 0x23 |
37 | #define RT298_INLINE_CMD 0x55 | ||
37 | 38 | ||
38 | #define RT298_SET_PIN_SFT 6 | 39 | #define RT298_SET_PIN_SFT 6 |
39 | #define RT298_SET_PIN_ENABLE 0x40 | 40 | #define RT298_SET_PIN_ENABLE 0x40 |
@@ -124,6 +125,12 @@ | |||
124 | VERB_CMD(AC_VERB_SET_COEF_INDEX, RT298_VENDOR_REGISTERS, 0) | 125 | VERB_CMD(AC_VERB_SET_COEF_INDEX, RT298_VENDOR_REGISTERS, 0) |
125 | #define RT298_PROC_COEF\ | 126 | #define RT298_PROC_COEF\ |
126 | VERB_CMD(AC_VERB_SET_PROC_COEF, RT298_VENDOR_REGISTERS, 0) | 127 | VERB_CMD(AC_VERB_SET_PROC_COEF, RT298_VENDOR_REGISTERS, 0) |
128 | #define RT298_UNSOLICITED_INLINE_CMD\ | ||
129 | VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT298_INLINE_CMD, 0) | ||
130 | #define RT298_UNSOLICITED_HP_OUT\ | ||
131 | VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT298_HP_OUT, 0) | ||
132 | #define RT298_UNSOLICITED_MIC1\ | ||
133 | VERB_CMD(AC_VERB_SET_UNSOLICITED_ENABLE, RT298_MIC1, 0) | ||
127 | 134 | ||
128 | /* Index registers */ | 135 | /* Index registers */ |
129 | #define RT298_A_BIAS_CTRL1 0x01 | 136 | #define RT298_A_BIAS_CTRL1 0x01 |
@@ -148,6 +155,7 @@ | |||
148 | #define RT298_DEPOP_CTRL2 0x67 | 155 | #define RT298_DEPOP_CTRL2 0x67 |
149 | #define RT298_DEPOP_CTRL3 0x68 | 156 | #define RT298_DEPOP_CTRL3 0x68 |
150 | #define RT298_DEPOP_CTRL4 0x69 | 157 | #define RT298_DEPOP_CTRL4 0x69 |
158 | #define RT298_IRQ_FLAG_CTRL 0x7c | ||
151 | 159 | ||
152 | /* SPDIF (0x06) */ | 160 | /* SPDIF (0x06) */ |
153 | #define RT298_SPDIF_SEL_SFT 0 | 161 | #define RT298_SPDIF_SEL_SFT 0 |
diff --git a/sound/soc/codecs/rt5514.c b/sound/soc/codecs/rt5514.c new file mode 100644 index 000000000000..879bf60f4965 --- /dev/null +++ b/sound/soc/codecs/rt5514.c | |||
@@ -0,0 +1,982 @@ | |||
1 | /* | ||
2 | * rt5514.c -- RT5514 ALSA SoC audio codec driver | ||
3 | * | ||
4 | * Copyright 2015 Realtek Semiconductor Corp. | ||
5 | * Author: Oder Chiou <oder_chiou@realtek.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/fs.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/moduleparam.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/pm.h> | ||
18 | #include <linux/regmap.h> | ||
19 | #include <linux/i2c.h> | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/firmware.h> | ||
22 | #include <linux/gpio.h> | ||
23 | #include <sound/core.h> | ||
24 | #include <sound/pcm.h> | ||
25 | #include <sound/pcm_params.h> | ||
26 | #include <sound/soc.h> | ||
27 | #include <sound/soc-dapm.h> | ||
28 | #include <sound/initval.h> | ||
29 | #include <sound/tlv.h> | ||
30 | |||
31 | #include "rl6231.h" | ||
32 | #include "rt5514.h" | ||
33 | |||
34 | static const struct reg_sequence rt5514_i2c_patch[] = { | ||
35 | {0x1800101c, 0x00000000}, | ||
36 | {0x18001100, 0x0000031f}, | ||
37 | {0x18001104, 0x00000007}, | ||
38 | {0x18001108, 0x00000000}, | ||
39 | {0x1800110c, 0x00000000}, | ||
40 | {0x18001110, 0x00000000}, | ||
41 | {0x18001114, 0x00000001}, | ||
42 | {0x18001118, 0x00000000}, | ||
43 | {0x18002f08, 0x00000006}, | ||
44 | {0x18002f00, 0x00055149}, | ||
45 | {0x18002f00, 0x0005514b}, | ||
46 | {0x18002f00, 0x00055149}, | ||
47 | {0xfafafafa, 0x00000001}, | ||
48 | {0x18002f10, 0x00000001}, | ||
49 | {0x18002f10, 0x00000000}, | ||
50 | {0x18002f10, 0x00000001}, | ||
51 | {0xfafafafa, 0x00000001}, | ||
52 | {0x18002000, 0x000010ec}, | ||
53 | {0xfafafafa, 0x00000000}, | ||
54 | }; | ||
55 | |||
56 | static const struct reg_sequence rt5514_patch[] = { | ||
57 | {RT5514_DIG_IO_CTRL, 0x00000040}, | ||
58 | {RT5514_CLK_CTRL1, 0x38020041}, | ||
59 | {RT5514_SRC_CTRL, 0x44000eee}, | ||
60 | {RT5514_ANA_CTRL_LDO10, 0x00028604}, | ||
61 | {RT5514_ANA_CTRL_ADCFED, 0x00000800}, | ||
62 | }; | ||
63 | |||
64 | static const struct reg_default rt5514_reg[] = { | ||
65 | {RT5514_RESET, 0x00000000}, | ||
66 | {RT5514_PWR_ANA1, 0x00808880}, | ||
67 | {RT5514_PWR_ANA2, 0x00220000}, | ||
68 | {RT5514_I2S_CTRL1, 0x00000330}, | ||
69 | {RT5514_I2S_CTRL2, 0x20000000}, | ||
70 | {RT5514_VAD_CTRL6, 0xc00007d2}, | ||
71 | {RT5514_EXT_VAD_CTRL, 0x80000080}, | ||
72 | {RT5514_DIG_IO_CTRL, 0x00000040}, | ||
73 | {RT5514_PAD_CTRL1, 0x00804000}, | ||
74 | {RT5514_DMIC_DATA_CTRL, 0x00000005}, | ||
75 | {RT5514_DIG_SOURCE_CTRL, 0x00000002}, | ||
76 | {RT5514_SRC_CTRL, 0x44000eee}, | ||
77 | {RT5514_DOWNFILTER2_CTRL1, 0x0000882f}, | ||
78 | {RT5514_PLL_SOURCE_CTRL, 0x00000004}, | ||
79 | {RT5514_CLK_CTRL1, 0x38020041}, | ||
80 | {RT5514_CLK_CTRL2, 0x00000000}, | ||
81 | {RT5514_PLL3_CALIB_CTRL1, 0x00400200}, | ||
82 | {RT5514_PLL3_CALIB_CTRL5, 0x40220012}, | ||
83 | {RT5514_DELAY_BUF_CTRL1, 0x7fff006a}, | ||
84 | {RT5514_DELAY_BUF_CTRL3, 0x00000000}, | ||
85 | {RT5514_DOWNFILTER0_CTRL1, 0x00020c2f}, | ||
86 | {RT5514_DOWNFILTER0_CTRL2, 0x00020c2f}, | ||
87 | {RT5514_DOWNFILTER0_CTRL3, 0x00000362}, | ||
88 | {RT5514_DOWNFILTER1_CTRL1, 0x00020c2f}, | ||
89 | {RT5514_DOWNFILTER1_CTRL2, 0x00020c2f}, | ||
90 | {RT5514_DOWNFILTER1_CTRL3, 0x00000362}, | ||
91 | {RT5514_ANA_CTRL_LDO10, 0x00028604}, | ||
92 | {RT5514_ANA_CTRL_LDO18_16, 0x02000345}, | ||
93 | {RT5514_ANA_CTRL_ADC12, 0x0000a2a8}, | ||
94 | {RT5514_ANA_CTRL_ADC21, 0x00001180}, | ||
95 | {RT5514_ANA_CTRL_ADC22, 0x0000aaa8}, | ||
96 | {RT5514_ANA_CTRL_ADC23, 0x00151427}, | ||
97 | {RT5514_ANA_CTRL_MICBST, 0x00002000}, | ||
98 | {RT5514_ANA_CTRL_ADCFED, 0x00000800}, | ||
99 | {RT5514_ANA_CTRL_INBUF, 0x00000143}, | ||
100 | {RT5514_ANA_CTRL_VREF, 0x00008d50}, | ||
101 | {RT5514_ANA_CTRL_PLL3, 0x0000000e}, | ||
102 | {RT5514_ANA_CTRL_PLL1_1, 0x00000000}, | ||
103 | {RT5514_ANA_CTRL_PLL1_2, 0x00030220}, | ||
104 | {RT5514_DMIC_LP_CTRL, 0x00000000}, | ||
105 | {RT5514_MISC_CTRL_DSP, 0x00000000}, | ||
106 | {RT5514_DSP_CTRL1, 0x00055149}, | ||
107 | {RT5514_DSP_CTRL3, 0x00000006}, | ||
108 | {RT5514_DSP_CTRL4, 0x00000001}, | ||
109 | {RT5514_VENDOR_ID1, 0x00000001}, | ||
110 | {RT5514_VENDOR_ID2, 0x10ec5514}, | ||
111 | }; | ||
112 | |||
113 | static bool rt5514_volatile_register(struct device *dev, unsigned int reg) | ||
114 | { | ||
115 | switch (reg) { | ||
116 | case RT5514_VENDOR_ID1: | ||
117 | case RT5514_VENDOR_ID2: | ||
118 | return true; | ||
119 | |||
120 | default: | ||
121 | return false; | ||
122 | } | ||
123 | } | ||
124 | |||
125 | static bool rt5514_readable_register(struct device *dev, unsigned int reg) | ||
126 | { | ||
127 | switch (reg) { | ||
128 | case RT5514_RESET: | ||
129 | case RT5514_PWR_ANA1: | ||
130 | case RT5514_PWR_ANA2: | ||
131 | case RT5514_I2S_CTRL1: | ||
132 | case RT5514_I2S_CTRL2: | ||
133 | case RT5514_VAD_CTRL6: | ||
134 | case RT5514_EXT_VAD_CTRL: | ||
135 | case RT5514_DIG_IO_CTRL: | ||
136 | case RT5514_PAD_CTRL1: | ||
137 | case RT5514_DMIC_DATA_CTRL: | ||
138 | case RT5514_DIG_SOURCE_CTRL: | ||
139 | case RT5514_SRC_CTRL: | ||
140 | case RT5514_DOWNFILTER2_CTRL1: | ||
141 | case RT5514_PLL_SOURCE_CTRL: | ||
142 | case RT5514_CLK_CTRL1: | ||
143 | case RT5514_CLK_CTRL2: | ||
144 | case RT5514_PLL3_CALIB_CTRL1: | ||
145 | case RT5514_PLL3_CALIB_CTRL5: | ||
146 | case RT5514_DELAY_BUF_CTRL1: | ||
147 | case RT5514_DELAY_BUF_CTRL3: | ||
148 | case RT5514_DOWNFILTER0_CTRL1: | ||
149 | case RT5514_DOWNFILTER0_CTRL2: | ||
150 | case RT5514_DOWNFILTER0_CTRL3: | ||
151 | case RT5514_DOWNFILTER1_CTRL1: | ||
152 | case RT5514_DOWNFILTER1_CTRL2: | ||
153 | case RT5514_DOWNFILTER1_CTRL3: | ||
154 | case RT5514_ANA_CTRL_LDO10: | ||
155 | case RT5514_ANA_CTRL_LDO18_16: | ||
156 | case RT5514_ANA_CTRL_ADC12: | ||
157 | case RT5514_ANA_CTRL_ADC21: | ||
158 | case RT5514_ANA_CTRL_ADC22: | ||
159 | case RT5514_ANA_CTRL_ADC23: | ||
160 | case RT5514_ANA_CTRL_MICBST: | ||
161 | case RT5514_ANA_CTRL_ADCFED: | ||
162 | case RT5514_ANA_CTRL_INBUF: | ||
163 | case RT5514_ANA_CTRL_VREF: | ||
164 | case RT5514_ANA_CTRL_PLL3: | ||
165 | case RT5514_ANA_CTRL_PLL1_1: | ||
166 | case RT5514_ANA_CTRL_PLL1_2: | ||
167 | case RT5514_DMIC_LP_CTRL: | ||
168 | case RT5514_MISC_CTRL_DSP: | ||
169 | case RT5514_DSP_CTRL1: | ||
170 | case RT5514_DSP_CTRL3: | ||
171 | case RT5514_DSP_CTRL4: | ||
172 | case RT5514_VENDOR_ID1: | ||
173 | case RT5514_VENDOR_ID2: | ||
174 | return true; | ||
175 | |||
176 | default: | ||
177 | return false; | ||
178 | } | ||
179 | } | ||
180 | |||
181 | static bool rt5514_i2c_readable_register(struct device *dev, | ||
182 | unsigned int reg) | ||
183 | { | ||
184 | switch (reg) { | ||
185 | case RT5514_DSP_MAPPING | RT5514_RESET: | ||
186 | case RT5514_DSP_MAPPING | RT5514_PWR_ANA1: | ||
187 | case RT5514_DSP_MAPPING | RT5514_PWR_ANA2: | ||
188 | case RT5514_DSP_MAPPING | RT5514_I2S_CTRL1: | ||
189 | case RT5514_DSP_MAPPING | RT5514_I2S_CTRL2: | ||
190 | case RT5514_DSP_MAPPING | RT5514_VAD_CTRL6: | ||
191 | case RT5514_DSP_MAPPING | RT5514_EXT_VAD_CTRL: | ||
192 | case RT5514_DSP_MAPPING | RT5514_DIG_IO_CTRL: | ||
193 | case RT5514_DSP_MAPPING | RT5514_PAD_CTRL1: | ||
194 | case RT5514_DSP_MAPPING | RT5514_DMIC_DATA_CTRL: | ||
195 | case RT5514_DSP_MAPPING | RT5514_DIG_SOURCE_CTRL: | ||
196 | case RT5514_DSP_MAPPING | RT5514_SRC_CTRL: | ||
197 | case RT5514_DSP_MAPPING | RT5514_DOWNFILTER2_CTRL1: | ||
198 | case RT5514_DSP_MAPPING | RT5514_PLL_SOURCE_CTRL: | ||
199 | case RT5514_DSP_MAPPING | RT5514_CLK_CTRL1: | ||
200 | case RT5514_DSP_MAPPING | RT5514_CLK_CTRL2: | ||
201 | case RT5514_DSP_MAPPING | RT5514_PLL3_CALIB_CTRL1: | ||
202 | case RT5514_DSP_MAPPING | RT5514_PLL3_CALIB_CTRL5: | ||
203 | case RT5514_DSP_MAPPING | RT5514_DELAY_BUF_CTRL1: | ||
204 | case RT5514_DSP_MAPPING | RT5514_DELAY_BUF_CTRL3: | ||
205 | case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL1: | ||
206 | case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL2: | ||
207 | case RT5514_DSP_MAPPING | RT5514_DOWNFILTER0_CTRL3: | ||
208 | case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL1: | ||
209 | case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL2: | ||
210 | case RT5514_DSP_MAPPING | RT5514_DOWNFILTER1_CTRL3: | ||
211 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_LDO10: | ||
212 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_LDO18_16: | ||
213 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC12: | ||
214 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC21: | ||
215 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC22: | ||
216 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADC23: | ||
217 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_MICBST: | ||
218 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_ADCFED: | ||
219 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_INBUF: | ||
220 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_VREF: | ||
221 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL3: | ||
222 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL1_1: | ||
223 | case RT5514_DSP_MAPPING | RT5514_ANA_CTRL_PLL1_2: | ||
224 | case RT5514_DSP_MAPPING | RT5514_DMIC_LP_CTRL: | ||
225 | case RT5514_DSP_MAPPING | RT5514_MISC_CTRL_DSP: | ||
226 | case RT5514_DSP_MAPPING | RT5514_DSP_CTRL1: | ||
227 | case RT5514_DSP_MAPPING | RT5514_DSP_CTRL3: | ||
228 | case RT5514_DSP_MAPPING | RT5514_DSP_CTRL4: | ||
229 | case RT5514_DSP_MAPPING | RT5514_VENDOR_ID1: | ||
230 | case RT5514_DSP_MAPPING | RT5514_VENDOR_ID2: | ||
231 | return true; | ||
232 | |||
233 | default: | ||
234 | return false; | ||
235 | } | ||
236 | } | ||
237 | |||
238 | /* {-3, 0, +3, +4.5, +7.5, +9.5, +12, +14, +17} dB */ | ||
239 | static const DECLARE_TLV_DB_RANGE(bst_tlv, | ||
240 | 0, 2, TLV_DB_SCALE_ITEM(-300, 300, 0), | ||
241 | 3, 3, TLV_DB_SCALE_ITEM(450, 0, 0), | ||
242 | 4, 4, TLV_DB_SCALE_ITEM(750, 0, 0), | ||
243 | 5, 5, TLV_DB_SCALE_ITEM(950, 0, 0), | ||
244 | 6, 6, TLV_DB_SCALE_ITEM(1200, 0, 0), | ||
245 | 7, 7, TLV_DB_SCALE_ITEM(1400, 0, 0), | ||
246 | 8, 8, TLV_DB_SCALE_ITEM(1700, 0, 0) | ||
247 | ); | ||
248 | |||
249 | static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0); | ||
250 | |||
251 | static const struct snd_kcontrol_new rt5514_snd_controls[] = { | ||
252 | SOC_DOUBLE_TLV("MIC Boost Volume", RT5514_ANA_CTRL_MICBST, | ||
253 | RT5514_SEL_BSTL_SFT, RT5514_SEL_BSTR_SFT, 8, 0, bst_tlv), | ||
254 | SOC_DOUBLE_R_TLV("ADC1 Capture Volume", RT5514_DOWNFILTER0_CTRL1, | ||
255 | RT5514_DOWNFILTER0_CTRL2, RT5514_AD_GAIN_SFT, 127, 0, | ||
256 | adc_vol_tlv), | ||
257 | SOC_DOUBLE_R_TLV("ADC2 Capture Volume", RT5514_DOWNFILTER1_CTRL1, | ||
258 | RT5514_DOWNFILTER1_CTRL2, RT5514_AD_GAIN_SFT, 127, 0, | ||
259 | adc_vol_tlv), | ||
260 | }; | ||
261 | |||
262 | /* ADC Mixer*/ | ||
263 | static const struct snd_kcontrol_new rt5514_sto1_adc_l_mix[] = { | ||
264 | SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER0_CTRL1, | ||
265 | RT5514_AD_DMIC_MIX_BIT, 1, 1), | ||
266 | SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER0_CTRL1, | ||
267 | RT5514_AD_AD_MIX_BIT, 1, 1), | ||
268 | }; | ||
269 | |||
270 | static const struct snd_kcontrol_new rt5514_sto1_adc_r_mix[] = { | ||
271 | SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER0_CTRL2, | ||
272 | RT5514_AD_DMIC_MIX_BIT, 1, 1), | ||
273 | SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER0_CTRL2, | ||
274 | RT5514_AD_AD_MIX_BIT, 1, 1), | ||
275 | }; | ||
276 | |||
277 | static const struct snd_kcontrol_new rt5514_sto2_adc_l_mix[] = { | ||
278 | SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER1_CTRL1, | ||
279 | RT5514_AD_DMIC_MIX_BIT, 1, 1), | ||
280 | SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER1_CTRL1, | ||
281 | RT5514_AD_AD_MIX_BIT, 1, 1), | ||
282 | }; | ||
283 | |||
284 | static const struct snd_kcontrol_new rt5514_sto2_adc_r_mix[] = { | ||
285 | SOC_DAPM_SINGLE("DMIC Switch", RT5514_DOWNFILTER1_CTRL2, | ||
286 | RT5514_AD_DMIC_MIX_BIT, 1, 1), | ||
287 | SOC_DAPM_SINGLE("ADC Switch", RT5514_DOWNFILTER1_CTRL2, | ||
288 | RT5514_AD_AD_MIX_BIT, 1, 1), | ||
289 | }; | ||
290 | |||
291 | /* DMIC Source */ | ||
292 | static const char * const rt5514_dmic_src[] = { | ||
293 | "DMIC1", "DMIC2" | ||
294 | }; | ||
295 | |||
296 | static const SOC_ENUM_SINGLE_DECL( | ||
297 | rt5514_stereo1_dmic_enum, RT5514_DIG_SOURCE_CTRL, | ||
298 | RT5514_AD0_DMIC_INPUT_SEL_SFT, rt5514_dmic_src); | ||
299 | |||
300 | static const struct snd_kcontrol_new rt5514_sto1_dmic_mux = | ||
301 | SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5514_stereo1_dmic_enum); | ||
302 | |||
303 | static const SOC_ENUM_SINGLE_DECL( | ||
304 | rt5514_stereo2_dmic_enum, RT5514_DIG_SOURCE_CTRL, | ||
305 | RT5514_AD1_DMIC_INPUT_SEL_SFT, rt5514_dmic_src); | ||
306 | |||
307 | static const struct snd_kcontrol_new rt5514_sto2_dmic_mux = | ||
308 | SOC_DAPM_ENUM("Stereo2 DMIC Source", rt5514_stereo2_dmic_enum); | ||
309 | |||
310 | /** | ||
311 | * rt5514_calc_dmic_clk - Calculate the frequency divider parameter of dmic. | ||
312 | * | ||
313 | * @rate: base clock rate. | ||
314 | * | ||
315 | * Choose divider parameter that gives the highest possible DMIC frequency in | ||
316 | * 1MHz - 3MHz range. | ||
317 | */ | ||
318 | static int rt5514_calc_dmic_clk(struct snd_soc_codec *codec, int rate) | ||
319 | { | ||
320 | int div[] = {2, 3, 4, 8, 12, 16, 24, 32}; | ||
321 | int i; | ||
322 | |||
323 | if (rate < 1000000 * div[0]) { | ||
324 | pr_warn("Base clock rate %d is too low\n", rate); | ||
325 | return -EINVAL; | ||
326 | } | ||
327 | |||
328 | for (i = 0; i < ARRAY_SIZE(div); i++) { | ||
329 | /* find divider that gives DMIC frequency below 3.072MHz */ | ||
330 | if (3072000 * div[i] >= rate) | ||
331 | return i; | ||
332 | } | ||
333 | |||
334 | dev_warn(codec->dev, "Base clock rate %d is too high\n", rate); | ||
335 | return -EINVAL; | ||
336 | } | ||
337 | |||
338 | static int rt5514_set_dmic_clk(struct snd_soc_dapm_widget *w, | ||
339 | struct snd_kcontrol *kcontrol, int event) | ||
340 | { | ||
341 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | ||
342 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
343 | int idx; | ||
344 | |||
345 | idx = rt5514_calc_dmic_clk(codec, rt5514->sysclk); | ||
346 | if (idx < 0) | ||
347 | dev_err(codec->dev, "Failed to set DMIC clock\n"); | ||
348 | else | ||
349 | regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL1, | ||
350 | RT5514_CLK_DMIC_OUT_SEL_MASK, | ||
351 | idx << RT5514_CLK_DMIC_OUT_SEL_SFT); | ||
352 | |||
353 | return idx; | ||
354 | } | ||
355 | |||
356 | static int rt5514_is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, | ||
357 | struct snd_soc_dapm_widget *sink) | ||
358 | { | ||
359 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); | ||
360 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
361 | |||
362 | if (rt5514->sysclk_src == RT5514_SCLK_S_PLL1) | ||
363 | return 1; | ||
364 | else | ||
365 | return 0; | ||
366 | } | ||
367 | |||
368 | static const struct snd_soc_dapm_widget rt5514_dapm_widgets[] = { | ||
369 | /* Input Lines */ | ||
370 | SND_SOC_DAPM_INPUT("DMIC1L"), | ||
371 | SND_SOC_DAPM_INPUT("DMIC1R"), | ||
372 | SND_SOC_DAPM_INPUT("DMIC2L"), | ||
373 | SND_SOC_DAPM_INPUT("DMIC2R"), | ||
374 | |||
375 | SND_SOC_DAPM_INPUT("AMICL"), | ||
376 | SND_SOC_DAPM_INPUT("AMICR"), | ||
377 | |||
378 | SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
379 | SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
380 | |||
381 | SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0, | ||
382 | rt5514_set_dmic_clk, SND_SOC_DAPM_PRE_PMU), | ||
383 | |||
384 | SND_SOC_DAPM_SUPPLY("ADC CLK", RT5514_CLK_CTRL1, | ||
385 | RT5514_CLK_AD_ANA1_EN_BIT, 0, NULL, 0), | ||
386 | |||
387 | SND_SOC_DAPM_SUPPLY("LDO18 IN", RT5514_PWR_ANA1, | ||
388 | RT5514_POW_LDO18_IN_BIT, 0, NULL, 0), | ||
389 | SND_SOC_DAPM_SUPPLY("LDO18 ADC", RT5514_PWR_ANA1, | ||
390 | RT5514_POW_LDO18_ADC_BIT, 0, NULL, 0), | ||
391 | SND_SOC_DAPM_SUPPLY("LDO21", RT5514_PWR_ANA1, RT5514_POW_LDO21_BIT, 0, | ||
392 | NULL, 0), | ||
393 | SND_SOC_DAPM_SUPPLY("BG LDO18 IN", RT5514_PWR_ANA1, | ||
394 | RT5514_POW_BG_LDO18_IN_BIT, 0, NULL, 0), | ||
395 | SND_SOC_DAPM_SUPPLY("BG LDO21", RT5514_PWR_ANA1, | ||
396 | RT5514_POW_BG_LDO21_BIT, 0, NULL, 0), | ||
397 | SND_SOC_DAPM_SUPPLY("BG MBIAS", RT5514_PWR_ANA2, | ||
398 | RT5514_POW_BG_MBIAS_BIT, 0, NULL, 0), | ||
399 | SND_SOC_DAPM_SUPPLY("MBIAS", RT5514_PWR_ANA2, RT5514_POW_MBIAS_BIT, 0, | ||
400 | NULL, 0), | ||
401 | SND_SOC_DAPM_SUPPLY("VREF2", RT5514_PWR_ANA2, RT5514_POW_VREF2_BIT, 0, | ||
402 | NULL, 0), | ||
403 | SND_SOC_DAPM_SUPPLY("VREF1", RT5514_PWR_ANA2, RT5514_POW_VREF1_BIT, 0, | ||
404 | NULL, 0), | ||
405 | SND_SOC_DAPM_SUPPLY("ADC Power", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
406 | |||
407 | |||
408 | SND_SOC_DAPM_SUPPLY("LDO16L", RT5514_PWR_ANA2, RT5514_POWL_LDO16_BIT, 0, | ||
409 | NULL, 0), | ||
410 | SND_SOC_DAPM_SUPPLY("ADC1L", RT5514_PWR_ANA2, RT5514_POW_ADC1_L_BIT, 0, | ||
411 | NULL, 0), | ||
412 | SND_SOC_DAPM_SUPPLY("BSTL2", RT5514_PWR_ANA2, RT5514_POW2_BSTL_BIT, 0, | ||
413 | NULL, 0), | ||
414 | SND_SOC_DAPM_SUPPLY("BSTL", RT5514_PWR_ANA2, RT5514_POW_BSTL_BIT, 0, | ||
415 | NULL, 0), | ||
416 | SND_SOC_DAPM_SUPPLY("ADCFEDL", RT5514_PWR_ANA2, RT5514_POW_ADCFEDL_BIT, | ||
417 | 0, NULL, 0), | ||
418 | SND_SOC_DAPM_SUPPLY("ADCL Power", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
419 | |||
420 | SND_SOC_DAPM_SUPPLY("LDO16R", RT5514_PWR_ANA2, RT5514_POWR_LDO16_BIT, 0, | ||
421 | NULL, 0), | ||
422 | SND_SOC_DAPM_SUPPLY("ADC1R", RT5514_PWR_ANA2, RT5514_POW_ADC1_R_BIT, 0, | ||
423 | NULL, 0), | ||
424 | SND_SOC_DAPM_SUPPLY("BSTR2", RT5514_PWR_ANA2, RT5514_POW2_BSTR_BIT, 0, | ||
425 | NULL, 0), | ||
426 | SND_SOC_DAPM_SUPPLY("BSTR", RT5514_PWR_ANA2, RT5514_POW_BSTR_BIT, 0, | ||
427 | NULL, 0), | ||
428 | SND_SOC_DAPM_SUPPLY("ADCFEDR", RT5514_PWR_ANA2, RT5514_POW_ADCFEDR_BIT, | ||
429 | 0, NULL, 0), | ||
430 | SND_SOC_DAPM_SUPPLY("ADCR Power", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
431 | |||
432 | SND_SOC_DAPM_SUPPLY("PLL1 LDO ENABLE", RT5514_ANA_CTRL_PLL1_2, | ||
433 | RT5514_EN_LDO_PLL1_BIT, 0, NULL, 0), | ||
434 | SND_SOC_DAPM_SUPPLY("PLL1 LDO", RT5514_PWR_ANA2, | ||
435 | RT5514_POW_PLL1_LDO_BIT, 0, NULL, 0), | ||
436 | SND_SOC_DAPM_SUPPLY("PLL1", RT5514_PWR_ANA2, RT5514_POW_PLL1_BIT, 0, | ||
437 | NULL, 0), | ||
438 | |||
439 | /* ADC Mux */ | ||
440 | SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0, | ||
441 | &rt5514_sto1_dmic_mux), | ||
442 | SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0, | ||
443 | &rt5514_sto2_dmic_mux), | ||
444 | |||
445 | /* ADC Mixer */ | ||
446 | SND_SOC_DAPM_SUPPLY("adc stereo1 filter", RT5514_CLK_CTRL1, | ||
447 | RT5514_CLK_AD0_EN_BIT, 0, NULL, 0), | ||
448 | SND_SOC_DAPM_SUPPLY("adc stereo2 filter", RT5514_CLK_CTRL1, | ||
449 | RT5514_CLK_AD1_EN_BIT, 0, NULL, 0), | ||
450 | |||
451 | SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0, | ||
452 | rt5514_sto1_adc_l_mix, ARRAY_SIZE(rt5514_sto1_adc_l_mix)), | ||
453 | SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0, | ||
454 | rt5514_sto1_adc_r_mix, ARRAY_SIZE(rt5514_sto1_adc_r_mix)), | ||
455 | SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0, | ||
456 | rt5514_sto2_adc_l_mix, ARRAY_SIZE(rt5514_sto2_adc_l_mix)), | ||
457 | SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0, | ||
458 | rt5514_sto2_adc_r_mix, ARRAY_SIZE(rt5514_sto2_adc_r_mix)), | ||
459 | |||
460 | SND_SOC_DAPM_ADC("Stereo1 ADC MIXL", NULL, RT5514_DOWNFILTER0_CTRL1, | ||
461 | RT5514_AD_AD_MUTE_BIT, 1), | ||
462 | SND_SOC_DAPM_ADC("Stereo1 ADC MIXR", NULL, RT5514_DOWNFILTER0_CTRL2, | ||
463 | RT5514_AD_AD_MUTE_BIT, 1), | ||
464 | SND_SOC_DAPM_ADC("Stereo2 ADC MIXL", NULL, RT5514_DOWNFILTER1_CTRL1, | ||
465 | RT5514_AD_AD_MUTE_BIT, 1), | ||
466 | SND_SOC_DAPM_ADC("Stereo2 ADC MIXR", NULL, RT5514_DOWNFILTER1_CTRL2, | ||
467 | RT5514_AD_AD_MUTE_BIT, 1), | ||
468 | |||
469 | /* ADC PGA */ | ||
470 | SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
471 | SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
472 | |||
473 | /* Audio Interface */ | ||
474 | SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), | ||
475 | }; | ||
476 | |||
477 | static const struct snd_soc_dapm_route rt5514_dapm_routes[] = { | ||
478 | { "DMIC1", NULL, "DMIC1L" }, | ||
479 | { "DMIC1", NULL, "DMIC1R" }, | ||
480 | { "DMIC2", NULL, "DMIC2L" }, | ||
481 | { "DMIC2", NULL, "DMIC2R" }, | ||
482 | |||
483 | { "DMIC1L", NULL, "DMIC CLK" }, | ||
484 | { "DMIC1R", NULL, "DMIC CLK" }, | ||
485 | { "DMIC2L", NULL, "DMIC CLK" }, | ||
486 | { "DMIC2R", NULL, "DMIC CLK" }, | ||
487 | |||
488 | { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" }, | ||
489 | { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" }, | ||
490 | |||
491 | { "Sto1 ADC MIXL", "DMIC Switch", "Stereo1 DMIC Mux" }, | ||
492 | { "Sto1 ADC MIXL", "ADC Switch", "AMICL" }, | ||
493 | { "Sto1 ADC MIXR", "DMIC Switch", "Stereo1 DMIC Mux" }, | ||
494 | { "Sto1 ADC MIXR", "ADC Switch", "AMICR" }, | ||
495 | |||
496 | { "ADC Power", NULL, "LDO18 IN" }, | ||
497 | { "ADC Power", NULL, "LDO18 ADC" }, | ||
498 | { "ADC Power", NULL, "LDO21" }, | ||
499 | { "ADC Power", NULL, "BG LDO18 IN" }, | ||
500 | { "ADC Power", NULL, "BG LDO21" }, | ||
501 | { "ADC Power", NULL, "BG MBIAS" }, | ||
502 | { "ADC Power", NULL, "MBIAS" }, | ||
503 | { "ADC Power", NULL, "VREF2" }, | ||
504 | { "ADC Power", NULL, "VREF1" }, | ||
505 | |||
506 | { "ADCL Power", NULL, "LDO16L" }, | ||
507 | { "ADCL Power", NULL, "ADC1L" }, | ||
508 | { "ADCL Power", NULL, "BSTL2" }, | ||
509 | { "ADCL Power", NULL, "BSTL" }, | ||
510 | { "ADCL Power", NULL, "ADCFEDL" }, | ||
511 | |||
512 | { "ADCR Power", NULL, "LDO16R" }, | ||
513 | { "ADCR Power", NULL, "ADC1R" }, | ||
514 | { "ADCR Power", NULL, "BSTR2" }, | ||
515 | { "ADCR Power", NULL, "BSTR" }, | ||
516 | { "ADCR Power", NULL, "ADCFEDR" }, | ||
517 | |||
518 | { "AMICL", NULL, "ADC CLK" }, | ||
519 | { "AMICL", NULL, "ADC Power" }, | ||
520 | { "AMICL", NULL, "ADCL Power" }, | ||
521 | { "AMICR", NULL, "ADC CLK" }, | ||
522 | { "AMICR", NULL, "ADC Power" }, | ||
523 | { "AMICR", NULL, "ADCR Power" }, | ||
524 | |||
525 | { "PLL1 LDO", NULL, "PLL1 LDO ENABLE" }, | ||
526 | { "PLL1", NULL, "PLL1 LDO" }, | ||
527 | |||
528 | { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" }, | ||
529 | { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" }, | ||
530 | |||
531 | { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" }, | ||
532 | { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" }, | ||
533 | { "Stereo1 ADC MIX", NULL, "adc stereo1 filter" }, | ||
534 | { "adc stereo1 filter", NULL, "PLL1", rt5514_is_sys_clk_from_pll }, | ||
535 | |||
536 | { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" }, | ||
537 | { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" }, | ||
538 | |||
539 | { "Sto2 ADC MIXL", "DMIC Switch", "Stereo2 DMIC Mux" }, | ||
540 | { "Sto2 ADC MIXL", "ADC Switch", "AMICL" }, | ||
541 | { "Sto2 ADC MIXR", "DMIC Switch", "Stereo2 DMIC Mux" }, | ||
542 | { "Sto2 ADC MIXR", "ADC Switch", "AMICR" }, | ||
543 | |||
544 | { "Stereo2 ADC MIXL", NULL, "Sto2 ADC MIXL" }, | ||
545 | { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" }, | ||
546 | |||
547 | { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXL" }, | ||
548 | { "Stereo2 ADC MIX", NULL, "Stereo2 ADC MIXR" }, | ||
549 | { "Stereo2 ADC MIX", NULL, "adc stereo2 filter" }, | ||
550 | { "adc stereo2 filter", NULL, "PLL1", rt5514_is_sys_clk_from_pll }, | ||
551 | |||
552 | { "AIF1TX", NULL, "Stereo1 ADC MIX"}, | ||
553 | { "AIF1TX", NULL, "Stereo2 ADC MIX"}, | ||
554 | }; | ||
555 | |||
556 | static int rt5514_hw_params(struct snd_pcm_substream *substream, | ||
557 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | ||
558 | { | ||
559 | struct snd_soc_codec *codec = dai->codec; | ||
560 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
561 | int pre_div, bclk_ms, frame_size; | ||
562 | unsigned int val_len = 0; | ||
563 | |||
564 | rt5514->lrck = params_rate(params); | ||
565 | pre_div = rl6231_get_clk_info(rt5514->sysclk, rt5514->lrck); | ||
566 | if (pre_div < 0) { | ||
567 | dev_err(codec->dev, "Unsupported clock setting\n"); | ||
568 | return -EINVAL; | ||
569 | } | ||
570 | |||
571 | frame_size = snd_soc_params_to_frame_size(params); | ||
572 | if (frame_size < 0) { | ||
573 | dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size); | ||
574 | return -EINVAL; | ||
575 | } | ||
576 | |||
577 | bclk_ms = frame_size > 32; | ||
578 | rt5514->bclk = rt5514->lrck * (32 << bclk_ms); | ||
579 | |||
580 | dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", | ||
581 | rt5514->bclk, rt5514->lrck); | ||
582 | dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", | ||
583 | bclk_ms, pre_div, dai->id); | ||
584 | |||
585 | switch (params_format(params)) { | ||
586 | case SNDRV_PCM_FORMAT_S16_LE: | ||
587 | break; | ||
588 | case SNDRV_PCM_FORMAT_S20_3LE: | ||
589 | val_len = RT5514_I2S_DL_20; | ||
590 | break; | ||
591 | case SNDRV_PCM_FORMAT_S24_LE: | ||
592 | val_len = RT5514_I2S_DL_24; | ||
593 | break; | ||
594 | case SNDRV_PCM_FORMAT_S8: | ||
595 | val_len = RT5514_I2S_DL_8; | ||
596 | break; | ||
597 | default: | ||
598 | return -EINVAL; | ||
599 | } | ||
600 | |||
601 | regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_I2S_DL_MASK, | ||
602 | val_len); | ||
603 | regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2, | ||
604 | RT5514_CLK_SYS_DIV_OUT_MASK | RT5514_SEL_ADC_OSR_MASK, | ||
605 | pre_div << RT5514_CLK_SYS_DIV_OUT_SFT | | ||
606 | pre_div << RT5514_SEL_ADC_OSR_SFT); | ||
607 | |||
608 | return 0; | ||
609 | } | ||
610 | |||
611 | static int rt5514_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | ||
612 | { | ||
613 | struct snd_soc_codec *codec = dai->codec; | ||
614 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
615 | unsigned int reg_val = 0; | ||
616 | |||
617 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { | ||
618 | case SND_SOC_DAIFMT_NB_NF: | ||
619 | break; | ||
620 | |||
621 | case SND_SOC_DAIFMT_NB_IF: | ||
622 | reg_val |= RT5514_I2S_LR_INV; | ||
623 | break; | ||
624 | |||
625 | case SND_SOC_DAIFMT_IB_NF: | ||
626 | reg_val |= RT5514_I2S_BP_INV; | ||
627 | break; | ||
628 | |||
629 | case SND_SOC_DAIFMT_IB_IF: | ||
630 | reg_val |= RT5514_I2S_BP_INV | RT5514_I2S_LR_INV; | ||
631 | break; | ||
632 | |||
633 | default: | ||
634 | return -EINVAL; | ||
635 | } | ||
636 | |||
637 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | ||
638 | case SND_SOC_DAIFMT_I2S: | ||
639 | break; | ||
640 | |||
641 | case SND_SOC_DAIFMT_LEFT_J: | ||
642 | reg_val |= RT5514_I2S_DF_LEFT; | ||
643 | break; | ||
644 | |||
645 | case SND_SOC_DAIFMT_DSP_A: | ||
646 | reg_val |= RT5514_I2S_DF_PCM_A; | ||
647 | break; | ||
648 | |||
649 | case SND_SOC_DAIFMT_DSP_B: | ||
650 | reg_val |= RT5514_I2S_DF_PCM_B; | ||
651 | break; | ||
652 | |||
653 | default: | ||
654 | return -EINVAL; | ||
655 | } | ||
656 | |||
657 | regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, | ||
658 | RT5514_I2S_DF_MASK | RT5514_I2S_BP_MASK | RT5514_I2S_LR_MASK, | ||
659 | reg_val); | ||
660 | |||
661 | return 0; | ||
662 | } | ||
663 | |||
664 | static int rt5514_set_dai_sysclk(struct snd_soc_dai *dai, | ||
665 | int clk_id, unsigned int freq, int dir) | ||
666 | { | ||
667 | struct snd_soc_codec *codec = dai->codec; | ||
668 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
669 | unsigned int reg_val = 0; | ||
670 | |||
671 | if (freq == rt5514->sysclk && clk_id == rt5514->sysclk_src) | ||
672 | return 0; | ||
673 | |||
674 | switch (clk_id) { | ||
675 | case RT5514_SCLK_S_MCLK: | ||
676 | reg_val |= RT5514_CLK_SYS_PRE_SEL_MCLK; | ||
677 | break; | ||
678 | |||
679 | case RT5514_SCLK_S_PLL1: | ||
680 | reg_val |= RT5514_CLK_SYS_PRE_SEL_PLL; | ||
681 | break; | ||
682 | |||
683 | default: | ||
684 | dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); | ||
685 | return -EINVAL; | ||
686 | } | ||
687 | |||
688 | regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2, | ||
689 | RT5514_CLK_SYS_PRE_SEL_MASK, reg_val); | ||
690 | |||
691 | rt5514->sysclk = freq; | ||
692 | rt5514->sysclk_src = clk_id; | ||
693 | |||
694 | dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id); | ||
695 | |||
696 | return 0; | ||
697 | } | ||
698 | |||
699 | static int rt5514_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | ||
700 | unsigned int freq_in, unsigned int freq_out) | ||
701 | { | ||
702 | struct snd_soc_codec *codec = dai->codec; | ||
703 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
704 | struct rl6231_pll_code pll_code; | ||
705 | int ret; | ||
706 | |||
707 | if (!freq_in || !freq_out) { | ||
708 | dev_dbg(codec->dev, "PLL disabled\n"); | ||
709 | |||
710 | rt5514->pll_in = 0; | ||
711 | rt5514->pll_out = 0; | ||
712 | regmap_update_bits(rt5514->regmap, RT5514_CLK_CTRL2, | ||
713 | RT5514_CLK_SYS_PRE_SEL_MASK, | ||
714 | RT5514_CLK_SYS_PRE_SEL_MCLK); | ||
715 | |||
716 | return 0; | ||
717 | } | ||
718 | |||
719 | if (source == rt5514->pll_src && freq_in == rt5514->pll_in && | ||
720 | freq_out == rt5514->pll_out) | ||
721 | return 0; | ||
722 | |||
723 | switch (source) { | ||
724 | case RT5514_PLL1_S_MCLK: | ||
725 | regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL, | ||
726 | RT5514_PLL_1_SEL_MASK, RT5514_PLL_1_SEL_MCLK); | ||
727 | break; | ||
728 | |||
729 | case RT5514_PLL1_S_BCLK: | ||
730 | regmap_update_bits(rt5514->regmap, RT5514_PLL_SOURCE_CTRL, | ||
731 | RT5514_PLL_1_SEL_MASK, RT5514_PLL_1_SEL_SCLK); | ||
732 | break; | ||
733 | |||
734 | default: | ||
735 | dev_err(codec->dev, "Unknown PLL source %d\n", source); | ||
736 | return -EINVAL; | ||
737 | } | ||
738 | |||
739 | ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); | ||
740 | if (ret < 0) { | ||
741 | dev_err(codec->dev, "Unsupport input clock %d\n", freq_in); | ||
742 | return ret; | ||
743 | } | ||
744 | |||
745 | dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", | ||
746 | pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code), | ||
747 | pll_code.n_code, pll_code.k_code); | ||
748 | |||
749 | regmap_write(rt5514->regmap, RT5514_ANA_CTRL_PLL1_1, | ||
750 | pll_code.k_code << RT5514_PLL_K_SFT | | ||
751 | pll_code.n_code << RT5514_PLL_N_SFT | | ||
752 | (pll_code.m_bp ? 0 : pll_code.m_code) << RT5514_PLL_M_SFT); | ||
753 | regmap_update_bits(rt5514->regmap, RT5514_ANA_CTRL_PLL1_2, | ||
754 | RT5514_PLL_M_BP, pll_code.m_bp << RT5514_PLL_M_BP_SFT); | ||
755 | |||
756 | rt5514->pll_in = freq_in; | ||
757 | rt5514->pll_out = freq_out; | ||
758 | rt5514->pll_src = source; | ||
759 | |||
760 | return 0; | ||
761 | } | ||
762 | |||
763 | static int rt5514_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, | ||
764 | unsigned int rx_mask, int slots, int slot_width) | ||
765 | { | ||
766 | struct snd_soc_codec *codec = dai->codec; | ||
767 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
768 | unsigned int val = 0; | ||
769 | |||
770 | if (rx_mask || tx_mask) | ||
771 | val |= RT5514_TDM_MODE; | ||
772 | |||
773 | if (slots == 4) | ||
774 | val |= RT5514_TDMSLOT_SEL_RX_4CH | RT5514_TDMSLOT_SEL_TX_4CH; | ||
775 | |||
776 | |||
777 | switch (slot_width) { | ||
778 | case 20: | ||
779 | val |= RT5514_CH_LEN_RX_20 | RT5514_CH_LEN_TX_20; | ||
780 | break; | ||
781 | |||
782 | case 24: | ||
783 | val |= RT5514_CH_LEN_RX_24 | RT5514_CH_LEN_TX_24; | ||
784 | break; | ||
785 | |||
786 | case 32: | ||
787 | val |= RT5514_CH_LEN_RX_32 | RT5514_CH_LEN_TX_32; | ||
788 | break; | ||
789 | |||
790 | case 16: | ||
791 | default: | ||
792 | break; | ||
793 | } | ||
794 | |||
795 | regmap_update_bits(rt5514->regmap, RT5514_I2S_CTRL1, RT5514_TDM_MODE | | ||
796 | RT5514_TDMSLOT_SEL_RX_MASK | RT5514_TDMSLOT_SEL_TX_MASK | | ||
797 | RT5514_CH_LEN_RX_MASK | RT5514_CH_LEN_TX_MASK, val); | ||
798 | |||
799 | return 0; | ||
800 | } | ||
801 | |||
802 | static int rt5514_probe(struct snd_soc_codec *codec) | ||
803 | { | ||
804 | struct rt5514_priv *rt5514 = snd_soc_codec_get_drvdata(codec); | ||
805 | |||
806 | rt5514->codec = codec; | ||
807 | |||
808 | return 0; | ||
809 | } | ||
810 | |||
811 | static int rt5514_i2c_read(void *context, unsigned int reg, unsigned int *val) | ||
812 | { | ||
813 | struct i2c_client *client = context; | ||
814 | struct rt5514_priv *rt5514 = i2c_get_clientdata(client); | ||
815 | |||
816 | regmap_read(rt5514->i2c_regmap, reg | RT5514_DSP_MAPPING, val); | ||
817 | |||
818 | return 0; | ||
819 | } | ||
820 | |||
821 | static int rt5514_i2c_write(void *context, unsigned int reg, unsigned int val) | ||
822 | { | ||
823 | struct i2c_client *client = context; | ||
824 | struct rt5514_priv *rt5514 = i2c_get_clientdata(client); | ||
825 | |||
826 | regmap_write(rt5514->i2c_regmap, reg | RT5514_DSP_MAPPING, val); | ||
827 | |||
828 | return 0; | ||
829 | } | ||
830 | |||
831 | #define RT5514_STEREO_RATES SNDRV_PCM_RATE_8000_192000 | ||
832 | #define RT5514_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ | ||
833 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) | ||
834 | |||
835 | struct snd_soc_dai_ops rt5514_aif_dai_ops = { | ||
836 | .hw_params = rt5514_hw_params, | ||
837 | .set_fmt = rt5514_set_dai_fmt, | ||
838 | .set_sysclk = rt5514_set_dai_sysclk, | ||
839 | .set_pll = rt5514_set_dai_pll, | ||
840 | .set_tdm_slot = rt5514_set_tdm_slot, | ||
841 | }; | ||
842 | |||
843 | struct snd_soc_dai_driver rt5514_dai[] = { | ||
844 | { | ||
845 | .name = "rt5514-aif1", | ||
846 | .id = 0, | ||
847 | .capture = { | ||
848 | .stream_name = "AIF1 Capture", | ||
849 | .channels_min = 1, | ||
850 | .channels_max = 4, | ||
851 | .rates = RT5514_STEREO_RATES, | ||
852 | .formats = RT5514_FORMATS, | ||
853 | }, | ||
854 | .ops = &rt5514_aif_dai_ops, | ||
855 | } | ||
856 | }; | ||
857 | |||
858 | static struct snd_soc_codec_driver soc_codec_dev_rt5514 = { | ||
859 | .probe = rt5514_probe, | ||
860 | .idle_bias_off = true, | ||
861 | .controls = rt5514_snd_controls, | ||
862 | .num_controls = ARRAY_SIZE(rt5514_snd_controls), | ||
863 | .dapm_widgets = rt5514_dapm_widgets, | ||
864 | .num_dapm_widgets = ARRAY_SIZE(rt5514_dapm_widgets), | ||
865 | .dapm_routes = rt5514_dapm_routes, | ||
866 | .num_dapm_routes = ARRAY_SIZE(rt5514_dapm_routes), | ||
867 | }; | ||
868 | |||
869 | static const struct regmap_config rt5514_i2c_regmap = { | ||
870 | .name = "i2c", | ||
871 | .reg_bits = 32, | ||
872 | .val_bits = 32, | ||
873 | |||
874 | .max_register = RT5514_DSP_MAPPING | RT5514_VENDOR_ID2, | ||
875 | .readable_reg = rt5514_i2c_readable_register, | ||
876 | |||
877 | .cache_type = REGCACHE_NONE, | ||
878 | }; | ||
879 | |||
880 | static const struct regmap_config rt5514_regmap = { | ||
881 | .reg_bits = 16, | ||
882 | .val_bits = 32, | ||
883 | |||
884 | .max_register = RT5514_VENDOR_ID2, | ||
885 | .volatile_reg = rt5514_volatile_register, | ||
886 | .readable_reg = rt5514_readable_register, | ||
887 | .reg_read = rt5514_i2c_read, | ||
888 | .reg_write = rt5514_i2c_write, | ||
889 | |||
890 | .cache_type = REGCACHE_RBTREE, | ||
891 | .reg_defaults = rt5514_reg, | ||
892 | .num_reg_defaults = ARRAY_SIZE(rt5514_reg), | ||
893 | .use_single_rw = true, | ||
894 | }; | ||
895 | |||
896 | static const struct i2c_device_id rt5514_i2c_id[] = { | ||
897 | { "rt5514", 0 }, | ||
898 | { } | ||
899 | }; | ||
900 | MODULE_DEVICE_TABLE(i2c, rt5514_i2c_id); | ||
901 | |||
902 | #if defined(CONFIG_OF) | ||
903 | static const struct of_device_id rt5514_of_match[] = { | ||
904 | { .compatible = "realtek,rt5514", }, | ||
905 | {}, | ||
906 | }; | ||
907 | MODULE_DEVICE_TABLE(of, rt5514_of_match); | ||
908 | #endif | ||
909 | |||
910 | static int rt5514_i2c_probe(struct i2c_client *i2c, | ||
911 | const struct i2c_device_id *id) | ||
912 | { | ||
913 | struct rt5514_priv *rt5514; | ||
914 | int ret; | ||
915 | unsigned int val; | ||
916 | |||
917 | rt5514 = devm_kzalloc(&i2c->dev, sizeof(struct rt5514_priv), | ||
918 | GFP_KERNEL); | ||
919 | if (rt5514 == NULL) | ||
920 | return -ENOMEM; | ||
921 | |||
922 | i2c_set_clientdata(i2c, rt5514); | ||
923 | |||
924 | rt5514->i2c_regmap = devm_regmap_init_i2c(i2c, &rt5514_i2c_regmap); | ||
925 | if (IS_ERR(rt5514->i2c_regmap)) { | ||
926 | ret = PTR_ERR(rt5514->i2c_regmap); | ||
927 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", | ||
928 | ret); | ||
929 | return ret; | ||
930 | } | ||
931 | |||
932 | rt5514->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt5514_regmap); | ||
933 | if (IS_ERR(rt5514->regmap)) { | ||
934 | ret = PTR_ERR(rt5514->regmap); | ||
935 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", | ||
936 | ret); | ||
937 | return ret; | ||
938 | } | ||
939 | |||
940 | regmap_read(rt5514->regmap, RT5514_VENDOR_ID2, &val); | ||
941 | if (val != RT5514_DEVICE_ID) { | ||
942 | dev_err(&i2c->dev, | ||
943 | "Device with ID register %x is not rt5514\n", val); | ||
944 | return -ENODEV; | ||
945 | } | ||
946 | |||
947 | ret = regmap_register_patch(rt5514->i2c_regmap, rt5514_i2c_patch, | ||
948 | ARRAY_SIZE(rt5514_i2c_patch)); | ||
949 | if (ret != 0) | ||
950 | dev_warn(&i2c->dev, "Failed to apply i2c_regmap patch: %d\n", | ||
951 | ret); | ||
952 | |||
953 | ret = regmap_register_patch(rt5514->regmap, rt5514_patch, | ||
954 | ARRAY_SIZE(rt5514_patch)); | ||
955 | if (ret != 0) | ||
956 | dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); | ||
957 | |||
958 | return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5514, | ||
959 | rt5514_dai, ARRAY_SIZE(rt5514_dai)); | ||
960 | } | ||
961 | |||
962 | static int rt5514_i2c_remove(struct i2c_client *i2c) | ||
963 | { | ||
964 | snd_soc_unregister_codec(&i2c->dev); | ||
965 | |||
966 | return 0; | ||
967 | } | ||
968 | |||
969 | struct i2c_driver rt5514_i2c_driver = { | ||
970 | .driver = { | ||
971 | .name = "rt5514", | ||
972 | .of_match_table = of_match_ptr(rt5514_of_match), | ||
973 | }, | ||
974 | .probe = rt5514_i2c_probe, | ||
975 | .remove = rt5514_i2c_remove, | ||
976 | .id_table = rt5514_i2c_id, | ||
977 | }; | ||
978 | module_i2c_driver(rt5514_i2c_driver); | ||
979 | |||
980 | MODULE_DESCRIPTION("ASoC RT5514 driver"); | ||
981 | MODULE_AUTHOR("Oder Chiou <oder_chiou@realtek.com>"); | ||
982 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/sound/soc/codecs/rt5514.h b/sound/soc/codecs/rt5514.h new file mode 100644 index 000000000000..6ad8a612f659 --- /dev/null +++ b/sound/soc/codecs/rt5514.h | |||
@@ -0,0 +1,252 @@ | |||
1 | /* | ||
2 | * rt5514.h -- RT5514 ALSA SoC audio driver | ||
3 | * | ||
4 | * Copyright 2015 Realtek Microelectronics | ||
5 | * Author: Oder Chiou <oder_chiou@realtek.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __RT5514_H__ | ||
13 | #define __RT5514_H__ | ||
14 | |||
15 | #define RT5514_DEVICE_ID 0x10ec5514 | ||
16 | |||
17 | #define RT5514_RESET 0x2000 | ||
18 | #define RT5514_PWR_ANA1 0x2004 | ||
19 | #define RT5514_PWR_ANA2 0x2008 | ||
20 | #define RT5514_I2S_CTRL1 0x2010 | ||
21 | #define RT5514_I2S_CTRL2 0x2014 | ||
22 | #define RT5514_VAD_CTRL6 0x2030 | ||
23 | #define RT5514_EXT_VAD_CTRL 0x206c | ||
24 | #define RT5514_DIG_IO_CTRL 0x2070 | ||
25 | #define RT5514_PAD_CTRL1 0x2080 | ||
26 | #define RT5514_DMIC_DATA_CTRL 0x20a0 | ||
27 | #define RT5514_DIG_SOURCE_CTRL 0x20a4 | ||
28 | #define RT5514_SRC_CTRL 0x20ac | ||
29 | #define RT5514_DOWNFILTER2_CTRL1 0x20d0 | ||
30 | #define RT5514_PLL_SOURCE_CTRL 0x2100 | ||
31 | #define RT5514_CLK_CTRL1 0x2104 | ||
32 | #define RT5514_CLK_CTRL2 0x2108 | ||
33 | #define RT5514_PLL3_CALIB_CTRL1 0x2110 | ||
34 | #define RT5514_PLL3_CALIB_CTRL5 0x2124 | ||
35 | #define RT5514_DELAY_BUF_CTRL1 0x2140 | ||
36 | #define RT5514_DELAY_BUF_CTRL3 0x2148 | ||
37 | #define RT5514_DOWNFILTER0_CTRL1 0x2190 | ||
38 | #define RT5514_DOWNFILTER0_CTRL2 0x2194 | ||
39 | #define RT5514_DOWNFILTER0_CTRL3 0x2198 | ||
40 | #define RT5514_DOWNFILTER1_CTRL1 0x21a0 | ||
41 | #define RT5514_DOWNFILTER1_CTRL2 0x21a4 | ||
42 | #define RT5514_DOWNFILTER1_CTRL3 0x21a8 | ||
43 | #define RT5514_ANA_CTRL_LDO10 0x2200 | ||
44 | #define RT5514_ANA_CTRL_LDO18_16 0x2204 | ||
45 | #define RT5514_ANA_CTRL_ADC12 0x2210 | ||
46 | #define RT5514_ANA_CTRL_ADC21 0x2214 | ||
47 | #define RT5514_ANA_CTRL_ADC22 0x2218 | ||
48 | #define RT5514_ANA_CTRL_ADC23 0x221c | ||
49 | #define RT5514_ANA_CTRL_MICBST 0x2220 | ||
50 | #define RT5514_ANA_CTRL_ADCFED 0x2224 | ||
51 | #define RT5514_ANA_CTRL_INBUF 0x2228 | ||
52 | #define RT5514_ANA_CTRL_VREF 0x222c | ||
53 | #define RT5514_ANA_CTRL_PLL3 0x2240 | ||
54 | #define RT5514_ANA_CTRL_PLL1_1 0x2260 | ||
55 | #define RT5514_ANA_CTRL_PLL1_2 0x2264 | ||
56 | #define RT5514_DMIC_LP_CTRL 0x2e00 | ||
57 | #define RT5514_MISC_CTRL_DSP 0x2e04 | ||
58 | #define RT5514_DSP_CTRL1 0x2f00 | ||
59 | #define RT5514_DSP_CTRL3 0x2f08 | ||
60 | #define RT5514_DSP_CTRL4 0x2f10 | ||
61 | #define RT5514_VENDOR_ID1 0x2ff0 | ||
62 | #define RT5514_VENDOR_ID2 0x2ff4 | ||
63 | |||
64 | #define RT5514_DSP_MAPPING 0x18000000 | ||
65 | |||
66 | /* RT5514_PWR_ANA1 (0x2004) */ | ||
67 | #define RT5514_POW_LDO18_IN (0x1 << 5) | ||
68 | #define RT5514_POW_LDO18_IN_BIT 5 | ||
69 | #define RT5514_POW_LDO18_ADC (0x1 << 4) | ||
70 | #define RT5514_POW_LDO18_ADC_BIT 4 | ||
71 | #define RT5514_POW_LDO21 (0x1 << 3) | ||
72 | #define RT5514_POW_LDO21_BIT 3 | ||
73 | #define RT5514_POW_BG_LDO18_IN (0x1 << 2) | ||
74 | #define RT5514_POW_BG_LDO18_IN_BIT 2 | ||
75 | #define RT5514_POW_BG_LDO21 (0x1 << 1) | ||
76 | #define RT5514_POW_BG_LDO21_BIT 1 | ||
77 | |||
78 | /* RT5514_PWR_ANA2 (0x2008) */ | ||
79 | #define RT5514_POW_PLL1 (0x1 << 18) | ||
80 | #define RT5514_POW_PLL1_BIT 18 | ||
81 | #define RT5514_POW_PLL1_LDO (0x1 << 16) | ||
82 | #define RT5514_POW_PLL1_LDO_BIT 16 | ||
83 | #define RT5514_POW_BG_MBIAS (0x1 << 15) | ||
84 | #define RT5514_POW_BG_MBIAS_BIT 15 | ||
85 | #define RT5514_POW_MBIAS (0x1 << 14) | ||
86 | #define RT5514_POW_MBIAS_BIT 14 | ||
87 | #define RT5514_POW_VREF2 (0x1 << 13) | ||
88 | #define RT5514_POW_VREF2_BIT 13 | ||
89 | #define RT5514_POW_VREF1 (0x1 << 12) | ||
90 | #define RT5514_POW_VREF1_BIT 12 | ||
91 | #define RT5514_POWR_LDO16 (0x1 << 11) | ||
92 | #define RT5514_POWR_LDO16_BIT 11 | ||
93 | #define RT5514_POWL_LDO16 (0x1 << 10) | ||
94 | #define RT5514_POWL_LDO16_BIT 10 | ||
95 | #define RT5514_POW_ADC2 (0x1 << 9) | ||
96 | #define RT5514_POW_ADC2_BIT 9 | ||
97 | #define RT5514_POW_INPUT_BUF (0x1 << 8) | ||
98 | #define RT5514_POW_INPUT_BUF_BIT 8 | ||
99 | #define RT5514_POW_ADC1_R (0x1 << 7) | ||
100 | #define RT5514_POW_ADC1_R_BIT 7 | ||
101 | #define RT5514_POW_ADC1_L (0x1 << 6) | ||
102 | #define RT5514_POW_ADC1_L_BIT 6 | ||
103 | #define RT5514_POW2_BSTR (0x1 << 5) | ||
104 | #define RT5514_POW2_BSTR_BIT 5 | ||
105 | #define RT5514_POW2_BSTL (0x1 << 4) | ||
106 | #define RT5514_POW2_BSTL_BIT 4 | ||
107 | #define RT5514_POW_BSTR (0x1 << 3) | ||
108 | #define RT5514_POW_BSTR_BIT 3 | ||
109 | #define RT5514_POW_BSTL (0x1 << 2) | ||
110 | #define RT5514_POW_BSTL_BIT 2 | ||
111 | #define RT5514_POW_ADCFEDR (0x1 << 1) | ||
112 | #define RT5514_POW_ADCFEDR_BIT 1 | ||
113 | #define RT5514_POW_ADCFEDL (0x1 << 0) | ||
114 | #define RT5514_POW_ADCFEDL_BIT 0 | ||
115 | |||
116 | /* RT5514_I2S_CTRL1 (0x2010) */ | ||
117 | #define RT5514_TDM_MODE (0x1 << 28) | ||
118 | #define RT5514_TDM_MODE_SFT 28 | ||
119 | #define RT5514_I2S_LR_MASK (0x1 << 26) | ||
120 | #define RT5514_I2S_LR_SFT 26 | ||
121 | #define RT5514_I2S_LR_NOR (0x0 << 26) | ||
122 | #define RT5514_I2S_LR_INV (0x1 << 26) | ||
123 | #define RT5514_I2S_BP_MASK (0x1 << 25) | ||
124 | #define RT5514_I2S_BP_SFT 25 | ||
125 | #define RT5514_I2S_BP_NOR (0x0 << 25) | ||
126 | #define RT5514_I2S_BP_INV (0x1 << 25) | ||
127 | #define RT5514_I2S_DF_MASK (0x7 << 16) | ||
128 | #define RT5514_I2S_DF_SFT 16 | ||
129 | #define RT5514_I2S_DF_I2S (0x0 << 16) | ||
130 | #define RT5514_I2S_DF_LEFT (0x1 << 16) | ||
131 | #define RT5514_I2S_DF_PCM_A (0x2 << 16) | ||
132 | #define RT5514_I2S_DF_PCM_B (0x3 << 16) | ||
133 | #define RT5514_TDMSLOT_SEL_RX_MASK (0x3 << 10) | ||
134 | #define RT5514_TDMSLOT_SEL_RX_SFT 10 | ||
135 | #define RT5514_TDMSLOT_SEL_RX_4CH (0x1 << 10) | ||
136 | #define RT5514_CH_LEN_RX_MASK (0x3 << 8) | ||
137 | #define RT5514_CH_LEN_RX_SFT 8 | ||
138 | #define RT5514_CH_LEN_RX_16 (0x0 << 8) | ||
139 | #define RT5514_CH_LEN_RX_20 (0x1 << 8) | ||
140 | #define RT5514_CH_LEN_RX_24 (0x2 << 8) | ||
141 | #define RT5514_CH_LEN_RX_32 (0x3 << 8) | ||
142 | #define RT5514_TDMSLOT_SEL_TX_MASK (0x3 << 6) | ||
143 | #define RT5514_TDMSLOT_SEL_TX_SFT 6 | ||
144 | #define RT5514_TDMSLOT_SEL_TX_4CH (0x1 << 6) | ||
145 | #define RT5514_CH_LEN_TX_MASK (0x3 << 4) | ||
146 | #define RT5514_CH_LEN_TX_SFT 4 | ||
147 | #define RT5514_CH_LEN_TX_16 (0x0 << 4) | ||
148 | #define RT5514_CH_LEN_TX_20 (0x1 << 4) | ||
149 | #define RT5514_CH_LEN_TX_24 (0x2 << 4) | ||
150 | #define RT5514_CH_LEN_TX_32 (0x3 << 4) | ||
151 | #define RT5514_I2S_DL_MASK (0x3 << 0) | ||
152 | #define RT5514_I2S_DL_SFT 0 | ||
153 | #define RT5514_I2S_DL_16 (0x0 << 0) | ||
154 | #define RT5514_I2S_DL_20 (0x1 << 0) | ||
155 | #define RT5514_I2S_DL_24 (0x2 << 0) | ||
156 | #define RT5514_I2S_DL_8 (0x3 << 0) | ||
157 | |||
158 | /* RT5514_DIG_SOURCE_CTRL (0x20a4) */ | ||
159 | #define RT5514_AD1_DMIC_INPUT_SEL (0x1 << 1) | ||
160 | #define RT5514_AD1_DMIC_INPUT_SEL_SFT 1 | ||
161 | #define RT5514_AD0_DMIC_INPUT_SEL (0x1 << 0) | ||
162 | #define RT5514_AD0_DMIC_INPUT_SEL_SFT 0 | ||
163 | |||
164 | /* RT5514_PLL_SOURCE_CTRL (0x2100) */ | ||
165 | #define RT5514_PLL_1_SEL_MASK (0x7 << 12) | ||
166 | #define RT5514_PLL_1_SEL_SFT 12 | ||
167 | #define RT5514_PLL_1_SEL_SCLK (0x3 << 12) | ||
168 | #define RT5514_PLL_1_SEL_MCLK (0x4 << 12) | ||
169 | |||
170 | /* RT5514_CLK_CTRL1 (0x2104) */ | ||
171 | #define RT5514_CLK_AD_ANA1_EN (0x1 << 31) | ||
172 | #define RT5514_CLK_AD_ANA1_EN_BIT 31 | ||
173 | #define RT5514_CLK_AD1_EN (0x1 << 24) | ||
174 | #define RT5514_CLK_AD1_EN_BIT 24 | ||
175 | #define RT5514_CLK_AD0_EN (0x1 << 23) | ||
176 | #define RT5514_CLK_AD0_EN_BIT 23 | ||
177 | #define RT5514_CLK_DMIC_OUT_SEL_MASK (0x7 << 8) | ||
178 | #define RT5514_CLK_DMIC_OUT_SEL_SFT 8 | ||
179 | |||
180 | /* RT5514_CLK_CTRL2 (0x2108) */ | ||
181 | #define RT5514_CLK_SYS_DIV_OUT_MASK (0x7 << 8) | ||
182 | #define RT5514_CLK_SYS_DIV_OUT_SFT 8 | ||
183 | #define RT5514_SEL_ADC_OSR_MASK (0x7 << 4) | ||
184 | #define RT5514_SEL_ADC_OSR_SFT 4 | ||
185 | #define RT5514_CLK_SYS_PRE_SEL_MASK (0x3 << 0) | ||
186 | #define RT5514_CLK_SYS_PRE_SEL_SFT 0 | ||
187 | #define RT5514_CLK_SYS_PRE_SEL_MCLK (0x2 << 0) | ||
188 | #define RT5514_CLK_SYS_PRE_SEL_PLL (0x3 << 0) | ||
189 | |||
190 | /* RT5514_DOWNFILTER_CTRL (0x2190 0x2194 0x21a0 0x21a4) */ | ||
191 | #define RT5514_AD_DMIC_MIX (0x1 << 11) | ||
192 | #define RT5514_AD_DMIC_MIX_BIT 11 | ||
193 | #define RT5514_AD_AD_MIX (0x1 << 10) | ||
194 | #define RT5514_AD_AD_MIX_BIT 10 | ||
195 | #define RT5514_AD_AD_MUTE (0x1 << 7) | ||
196 | #define RT5514_AD_AD_MUTE_BIT 7 | ||
197 | #define RT5514_AD_GAIN_MASK (0x7f << 0) | ||
198 | #define RT5514_AD_GAIN_SFT 0 | ||
199 | |||
200 | /* RT5514_ANA_CTRL_MICBST (0x2220) */ | ||
201 | #define RT5514_SEL_BSTL_MASK (0xf << 4) | ||
202 | #define RT5514_SEL_BSTL_SFT 4 | ||
203 | #define RT5514_SEL_BSTR_MASK (0xf << 0) | ||
204 | #define RT5514_SEL_BSTR_SFT 0 | ||
205 | |||
206 | /* RT5514_ANA_CTRL_PLL1_1 (0x2260) */ | ||
207 | #define RT5514_PLL_K_MAX 0x1f | ||
208 | #define RT5514_PLL_K_MASK (RT5514_PLL_K_MAX << 16) | ||
209 | #define RT5514_PLL_K_SFT 16 | ||
210 | #define RT5514_PLL_N_MAX 0x1ff | ||
211 | #define RT5514_PLL_N_MASK (RT5514_PLL_N_MAX << 7) | ||
212 | #define RT5514_PLL_N_SFT 4 | ||
213 | #define RT5514_PLL_M_MAX 0xf | ||
214 | #define RT5514_PLL_M_MASK (RT5514_PLL_M_MAX << 0) | ||
215 | #define RT5514_PLL_M_SFT 0 | ||
216 | |||
217 | /* RT5514_ANA_CTRL_PLL1_2 (0x2264) */ | ||
218 | #define RT5514_PLL_M_BP (0x1 << 2) | ||
219 | #define RT5514_PLL_M_BP_SFT 2 | ||
220 | #define RT5514_PLL_K_BP (0x1 << 1) | ||
221 | #define RT5514_PLL_K_BP_SFT 1 | ||
222 | #define RT5514_EN_LDO_PLL1 (0x1 << 0) | ||
223 | #define RT5514_EN_LDO_PLL1_BIT 0 | ||
224 | |||
225 | #define RT5514_PLL_INP_MAX 40000000 | ||
226 | #define RT5514_PLL_INP_MIN 256000 | ||
227 | |||
228 | /* System Clock Source */ | ||
229 | enum { | ||
230 | RT5514_SCLK_S_MCLK, | ||
231 | RT5514_SCLK_S_PLL1, | ||
232 | }; | ||
233 | |||
234 | /* PLL1 Source */ | ||
235 | enum { | ||
236 | RT5514_PLL1_S_MCLK, | ||
237 | RT5514_PLL1_S_BCLK, | ||
238 | }; | ||
239 | |||
240 | struct rt5514_priv { | ||
241 | struct snd_soc_codec *codec; | ||
242 | struct regmap *i2c_regmap, *regmap; | ||
243 | int sysclk; | ||
244 | int sysclk_src; | ||
245 | int lrck; | ||
246 | int bclk; | ||
247 | int pll_src; | ||
248 | int pll_in; | ||
249 | int pll_out; | ||
250 | }; | ||
251 | |||
252 | #endif /* __RT5514_H__ */ | ||
diff --git a/sound/soc/codecs/rt5616.c b/sound/soc/codecs/rt5616.c index 1c10d8ed39d2..f527b5b2817b 100644 --- a/sound/soc/codecs/rt5616.c +++ b/sound/soc/codecs/rt5616.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/moduleparam.h> | 13 | #include <linux/moduleparam.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/clk.h> | ||
15 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
16 | #include <linux/pm.h> | 17 | #include <linux/pm.h> |
17 | #include <linux/i2c.h> | 18 | #include <linux/i2c.h> |
@@ -53,6 +54,7 @@ static const struct reg_sequence init_list[] = { | |||
53 | {RT5616_PR_BASE + 0x21, 0x4040}, | 54 | {RT5616_PR_BASE + 0x21, 0x4040}, |
54 | {RT5616_PR_BASE + 0x23, 0x0004}, | 55 | {RT5616_PR_BASE + 0x23, 0x0004}, |
55 | }; | 56 | }; |
57 | |||
56 | #define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list) | 58 | #define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list) |
57 | 59 | ||
58 | static const struct reg_default rt5616_reg[] = { | 60 | static const struct reg_default rt5616_reg[] = { |
@@ -143,6 +145,7 @@ struct rt5616_priv { | |||
143 | struct snd_soc_codec *codec; | 145 | struct snd_soc_codec *codec; |
144 | struct delayed_work patch_work; | 146 | struct delayed_work patch_work; |
145 | struct regmap *regmap; | 147 | struct regmap *regmap; |
148 | struct clk *mclk; | ||
146 | 149 | ||
147 | int sysclk; | 150 | int sysclk; |
148 | int sysclk_src; | 151 | int sysclk_src; |
@@ -162,9 +165,8 @@ static bool rt5616_volatile_register(struct device *dev, unsigned int reg) | |||
162 | 165 | ||
163 | for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { | 166 | for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { |
164 | if (reg >= rt5616_ranges[i].range_min && | 167 | if (reg >= rt5616_ranges[i].range_min && |
165 | reg <= rt5616_ranges[i].range_max) { | 168 | reg <= rt5616_ranges[i].range_max) |
166 | return true; | 169 | return true; |
167 | } | ||
168 | } | 170 | } |
169 | 171 | ||
170 | switch (reg) { | 172 | switch (reg) { |
@@ -190,9 +192,8 @@ static bool rt5616_readable_register(struct device *dev, unsigned int reg) | |||
190 | 192 | ||
191 | for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { | 193 | for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) { |
192 | if (reg >= rt5616_ranges[i].range_min && | 194 | if (reg >= rt5616_ranges[i].range_min && |
193 | reg <= rt5616_ranges[i].range_max) { | 195 | reg <= rt5616_ranges[i].range_max) |
194 | return true; | 196 | return true; |
195 | } | ||
196 | } | 197 | } |
197 | 198 | ||
198 | switch (reg) { | 199 | switch (reg) { |
@@ -307,45 +308,47 @@ static unsigned int bst_tlv[] = { | |||
307 | static const struct snd_kcontrol_new rt5616_snd_controls[] = { | 308 | static const struct snd_kcontrol_new rt5616_snd_controls[] = { |
308 | /* Headphone Output Volume */ | 309 | /* Headphone Output Volume */ |
309 | SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL, | 310 | SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL, |
310 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), | 311 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), |
312 | SOC_DOUBLE("HPVOL Playback Switch", RT5616_HP_VOL, | ||
313 | RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1), | ||
311 | SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL, | 314 | SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL, |
312 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), | 315 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), |
313 | /* OUTPUT Control */ | 316 | /* OUTPUT Control */ |
314 | SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1, | 317 | SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1, |
315 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), | 318 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), |
316 | SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1, | 319 | SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1, |
317 | RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1), | 320 | RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1), |
318 | SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1, | 321 | SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1, |
319 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), | 322 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv), |
320 | 323 | ||
321 | /* DAC Digital Volume */ | 324 | /* DAC Digital Volume */ |
322 | SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL, | 325 | SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL, |
323 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, | 326 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, |
324 | 175, 0, dac_vol_tlv), | 327 | 175, 0, dac_vol_tlv), |
325 | /* IN1/IN2 Control */ | 328 | /* IN1/IN2 Control */ |
326 | SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2, | 329 | SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2, |
327 | RT5616_BST_SFT1, 8, 0, bst_tlv), | 330 | RT5616_BST_SFT1, 8, 0, bst_tlv), |
328 | SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2, | 331 | SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2, |
329 | RT5616_BST_SFT2, 8, 0, bst_tlv), | 332 | RT5616_BST_SFT2, 8, 0, bst_tlv), |
330 | /* INL/INR Volume Control */ | 333 | /* INL/INR Volume Control */ |
331 | SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL, | 334 | SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL, |
332 | RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT, | 335 | RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT, |
333 | 31, 1, in_vol_tlv), | 336 | 31, 1, in_vol_tlv), |
334 | /* ADC Digital Volume Control */ | 337 | /* ADC Digital Volume Control */ |
335 | SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL, | 338 | SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL, |
336 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), | 339 | RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1), |
337 | SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL, | 340 | SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL, |
338 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, | 341 | RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, |
339 | 127, 0, adc_vol_tlv), | 342 | 127, 0, adc_vol_tlv), |
340 | 343 | ||
341 | /* ADC Boost Volume Control */ | 344 | /* ADC Boost Volume Control */ |
342 | SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL, | 345 | SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL, |
343 | RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT, | 346 | RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT, |
344 | 3, 0, adc_bst_tlv), | 347 | 3, 0, adc_bst_tlv), |
345 | }; | 348 | }; |
346 | 349 | ||
347 | static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, | 350 | static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source, |
348 | struct snd_soc_dapm_widget *sink) | 351 | struct snd_soc_dapm_widget *sink) |
349 | { | 352 | { |
350 | unsigned int val; | 353 | unsigned int val; |
351 | 354 | ||
@@ -462,20 +465,20 @@ static const struct snd_kcontrol_new rt5616_lout_mix[] = { | |||
462 | }; | 465 | }; |
463 | 466 | ||
464 | static int rt5616_adc_event(struct snd_soc_dapm_widget *w, | 467 | static int rt5616_adc_event(struct snd_soc_dapm_widget *w, |
465 | struct snd_kcontrol *kcontrol, int event) | 468 | struct snd_kcontrol *kcontrol, int event) |
466 | { | 469 | { |
467 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 470 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
468 | 471 | ||
469 | switch (event) { | 472 | switch (event) { |
470 | case SND_SOC_DAPM_POST_PMU: | 473 | case SND_SOC_DAPM_POST_PMU: |
471 | snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL, | 474 | snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL, |
472 | RT5616_L_MUTE | RT5616_R_MUTE, 0); | 475 | RT5616_L_MUTE | RT5616_R_MUTE, 0); |
473 | break; | 476 | break; |
474 | 477 | ||
475 | case SND_SOC_DAPM_POST_PMD: | 478 | case SND_SOC_DAPM_POST_PMD: |
476 | snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL, | 479 | snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL, |
477 | RT5616_L_MUTE | RT5616_R_MUTE, | 480 | RT5616_L_MUTE | RT5616_R_MUTE, |
478 | RT5616_L_MUTE | RT5616_R_MUTE); | 481 | RT5616_L_MUTE | RT5616_R_MUTE); |
479 | break; | 482 | break; |
480 | 483 | ||
481 | default: | 484 | default: |
@@ -486,7 +489,7 @@ static int rt5616_adc_event(struct snd_soc_dapm_widget *w, | |||
486 | } | 489 | } |
487 | 490 | ||
488 | static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w, | 491 | static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w, |
489 | struct snd_kcontrol *kcontrol, int event) | 492 | struct snd_kcontrol *kcontrol, int event) |
490 | { | 493 | { |
491 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 494 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
492 | 495 | ||
@@ -494,54 +497,55 @@ static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w, | |||
494 | case SND_SOC_DAPM_POST_PMU: | 497 | case SND_SOC_DAPM_POST_PMU: |
495 | /* depop parameters */ | 498 | /* depop parameters */ |
496 | snd_soc_update_bits(codec, RT5616_DEPOP_M2, | 499 | snd_soc_update_bits(codec, RT5616_DEPOP_M2, |
497 | RT5616_DEPOP_MASK, RT5616_DEPOP_MAN); | 500 | RT5616_DEPOP_MASK, RT5616_DEPOP_MAN); |
498 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 501 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
499 | RT5616_HP_CP_MASK | RT5616_HP_SG_MASK | | 502 | RT5616_HP_CP_MASK | RT5616_HP_SG_MASK | |
500 | RT5616_HP_CB_MASK, RT5616_HP_CP_PU | | 503 | RT5616_HP_CB_MASK, RT5616_HP_CP_PU | |
501 | RT5616_HP_SG_DIS | RT5616_HP_CB_PU); | 504 | RT5616_HP_SG_DIS | RT5616_HP_CB_PU); |
502 | snd_soc_write(codec, RT5616_PR_BASE + | 505 | snd_soc_write(codec, RT5616_PR_BASE + |
503 | RT5616_HP_DCC_INT1, 0x9f00); | 506 | RT5616_HP_DCC_INT1, 0x9f00); |
504 | /* headphone amp power on */ | 507 | /* headphone amp power on */ |
505 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 508 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
506 | RT5616_PWR_FV1 | RT5616_PWR_FV2, 0); | 509 | RT5616_PWR_FV1 | RT5616_PWR_FV2, 0); |
507 | snd_soc_update_bits(codec, RT5616_PWR_VOL, | 510 | snd_soc_update_bits(codec, RT5616_PWR_VOL, |
508 | RT5616_PWR_HV_L | RT5616_PWR_HV_R, | 511 | RT5616_PWR_HV_L | RT5616_PWR_HV_R, |
509 | RT5616_PWR_HV_L | RT5616_PWR_HV_R); | 512 | RT5616_PWR_HV_L | RT5616_PWR_HV_R); |
510 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 513 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
511 | RT5616_PWR_HP_L | RT5616_PWR_HP_R | | 514 | RT5616_PWR_HP_L | RT5616_PWR_HP_R | |
512 | RT5616_PWR_HA, RT5616_PWR_HP_L | | 515 | RT5616_PWR_HA, RT5616_PWR_HP_L | |
513 | RT5616_PWR_HP_R | RT5616_PWR_HA); | 516 | RT5616_PWR_HP_R | RT5616_PWR_HA); |
514 | msleep(50); | 517 | msleep(50); |
515 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 518 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
516 | RT5616_PWR_FV1 | RT5616_PWR_FV2, | 519 | RT5616_PWR_FV1 | RT5616_PWR_FV2, |
517 | RT5616_PWR_FV1 | RT5616_PWR_FV2); | 520 | RT5616_PWR_FV1 | RT5616_PWR_FV2); |
518 | 521 | ||
519 | snd_soc_update_bits(codec, RT5616_CHARGE_PUMP, | 522 | snd_soc_update_bits(codec, RT5616_CHARGE_PUMP, |
520 | RT5616_PM_HP_MASK, RT5616_PM_HP_HV); | 523 | RT5616_PM_HP_MASK, RT5616_PM_HP_HV); |
521 | snd_soc_update_bits(codec, RT5616_PR_BASE + | 524 | snd_soc_update_bits(codec, RT5616_PR_BASE + |
522 | RT5616_CHOP_DAC_ADC, 0x0200, 0x0200); | 525 | RT5616_CHOP_DAC_ADC, 0x0200, 0x0200); |
523 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 526 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
524 | RT5616_HP_CO_MASK | RT5616_HP_SG_MASK, | 527 | RT5616_HP_CO_MASK | RT5616_HP_SG_MASK, |
525 | RT5616_HP_CO_EN | RT5616_HP_SG_EN); | 528 | RT5616_HP_CO_EN | RT5616_HP_SG_EN); |
526 | break; | 529 | break; |
527 | case SND_SOC_DAPM_PRE_PMD: | 530 | case SND_SOC_DAPM_PRE_PMD: |
528 | snd_soc_update_bits(codec, RT5616_PR_BASE + | 531 | snd_soc_update_bits(codec, RT5616_PR_BASE + |
529 | RT5616_CHOP_DAC_ADC, 0x0200, 0x0); | 532 | RT5616_CHOP_DAC_ADC, 0x0200, 0x0); |
530 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 533 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
531 | RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | | 534 | RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | |
532 | RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | | 535 | RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | |
533 | RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); | 536 | RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); |
534 | /* headphone amp power down */ | 537 | /* headphone amp power down */ |
535 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 538 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
536 | RT5616_SMT_TRIG_MASK | RT5616_HP_CD_PD_MASK | | 539 | RT5616_SMT_TRIG_MASK | |
537 | RT5616_HP_CO_MASK | RT5616_HP_CP_MASK | | 540 | RT5616_HP_CD_PD_MASK | RT5616_HP_CO_MASK | |
538 | RT5616_HP_SG_MASK | RT5616_HP_CB_MASK, | 541 | RT5616_HP_CP_MASK | RT5616_HP_SG_MASK | |
539 | RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN | | 542 | RT5616_HP_CB_MASK, |
540 | RT5616_HP_CO_DIS | RT5616_HP_CP_PD | | 543 | RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN | |
541 | RT5616_HP_SG_EN | RT5616_HP_CB_PD); | 544 | RT5616_HP_CO_DIS | RT5616_HP_CP_PD | |
545 | RT5616_HP_SG_EN | RT5616_HP_CB_PD); | ||
542 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 546 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
543 | RT5616_PWR_HP_L | RT5616_PWR_HP_R | | 547 | RT5616_PWR_HP_L | RT5616_PWR_HP_R | |
544 | RT5616_PWR_HA, 0); | 548 | RT5616_PWR_HA, 0); |
545 | break; | 549 | break; |
546 | default: | 550 | default: |
547 | return 0; | 551 | return 0; |
@@ -551,7 +555,7 @@ static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w, | |||
551 | } | 555 | } |
552 | 556 | ||
553 | static int rt5616_hp_event(struct snd_soc_dapm_widget *w, | 557 | static int rt5616_hp_event(struct snd_soc_dapm_widget *w, |
554 | struct snd_kcontrol *kcontrol, int event) | 558 | struct snd_kcontrol *kcontrol, int event) |
555 | { | 559 | { |
556 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 560 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
557 | 561 | ||
@@ -559,57 +563,57 @@ static int rt5616_hp_event(struct snd_soc_dapm_widget *w, | |||
559 | case SND_SOC_DAPM_POST_PMU: | 563 | case SND_SOC_DAPM_POST_PMU: |
560 | /* headphone unmute sequence */ | 564 | /* headphone unmute sequence */ |
561 | snd_soc_update_bits(codec, RT5616_DEPOP_M3, | 565 | snd_soc_update_bits(codec, RT5616_DEPOP_M3, |
562 | RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | | 566 | RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | |
563 | RT5616_CP_FQ3_MASK, | 567 | RT5616_CP_FQ3_MASK, |
564 | (RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT) | | 568 | RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT | |
565 | (RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT) | | 569 | RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT | |
566 | (RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT)); | 570 | RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT); |
567 | snd_soc_write(codec, RT5616_PR_BASE + | 571 | snd_soc_write(codec, RT5616_PR_BASE + |
568 | RT5616_MAMP_INT_REG2, 0xfc00); | 572 | RT5616_MAMP_INT_REG2, 0xfc00); |
569 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 573 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
570 | RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN); | 574 | RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN); |
571 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 575 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
572 | RT5616_RSTN_MASK, RT5616_RSTN_EN); | 576 | RT5616_RSTN_MASK, RT5616_RSTN_EN); |
573 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 577 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
574 | RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK | | 578 | RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK | |
575 | RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS | | 579 | RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS | |
576 | RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); | 580 | RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); |
577 | snd_soc_update_bits(codec, RT5616_HP_VOL, | 581 | snd_soc_update_bits(codec, RT5616_HP_VOL, |
578 | RT5616_L_MUTE | RT5616_R_MUTE, 0); | 582 | RT5616_L_MUTE | RT5616_R_MUTE, 0); |
579 | msleep(100); | 583 | msleep(100); |
580 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 584 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
581 | RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | | 585 | RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK | |
582 | RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | | 586 | RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS | |
583 | RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); | 587 | RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS); |
584 | msleep(20); | 588 | msleep(20); |
585 | snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET, | 589 | snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET, |
586 | RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN); | 590 | RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN); |
587 | break; | 591 | break; |
588 | 592 | ||
589 | case SND_SOC_DAPM_PRE_PMD: | 593 | case SND_SOC_DAPM_PRE_PMD: |
590 | /* headphone mute sequence */ | 594 | /* headphone mute sequence */ |
591 | snd_soc_update_bits(codec, RT5616_DEPOP_M3, | 595 | snd_soc_update_bits(codec, RT5616_DEPOP_M3, |
592 | RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | | 596 | RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK | |
593 | RT5616_CP_FQ3_MASK, | 597 | RT5616_CP_FQ3_MASK, |
594 | (RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT) | | 598 | RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT | |
595 | (RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT) | | 599 | RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT | |
596 | (RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT)); | 600 | RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT); |
597 | snd_soc_write(codec, RT5616_PR_BASE + | 601 | snd_soc_write(codec, RT5616_PR_BASE + |
598 | RT5616_MAMP_INT_REG2, 0xfc00); | 602 | RT5616_MAMP_INT_REG2, 0xfc00); |
599 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 603 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
600 | RT5616_HP_SG_MASK, RT5616_HP_SG_EN); | 604 | RT5616_HP_SG_MASK, RT5616_HP_SG_EN); |
601 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 605 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
602 | RT5616_RSTP_MASK, RT5616_RSTP_EN); | 606 | RT5616_RSTP_MASK, RT5616_RSTP_EN); |
603 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, | 607 | snd_soc_update_bits(codec, RT5616_DEPOP_M1, |
604 | RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK | | 608 | RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK | |
605 | RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS | | 609 | RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS | |
606 | RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); | 610 | RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN); |
607 | snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET, | 611 | snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET, |
608 | RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS); | 612 | RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS); |
609 | msleep(90); | 613 | msleep(90); |
610 | snd_soc_update_bits(codec, RT5616_HP_VOL, | 614 | snd_soc_update_bits(codec, RT5616_HP_VOL, |
611 | RT5616_L_MUTE | RT5616_R_MUTE, | 615 | RT5616_L_MUTE | RT5616_R_MUTE, |
612 | RT5616_L_MUTE | RT5616_R_MUTE); | 616 | RT5616_L_MUTE | RT5616_R_MUTE); |
613 | msleep(30); | 617 | msleep(30); |
614 | break; | 618 | break; |
615 | 619 | ||
@@ -621,24 +625,24 @@ static int rt5616_hp_event(struct snd_soc_dapm_widget *w, | |||
621 | } | 625 | } |
622 | 626 | ||
623 | static int rt5616_lout_event(struct snd_soc_dapm_widget *w, | 627 | static int rt5616_lout_event(struct snd_soc_dapm_widget *w, |
624 | struct snd_kcontrol *kcontrol, int event) | 628 | struct snd_kcontrol *kcontrol, int event) |
625 | { | 629 | { |
626 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 630 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
627 | 631 | ||
628 | switch (event) { | 632 | switch (event) { |
629 | case SND_SOC_DAPM_POST_PMU: | 633 | case SND_SOC_DAPM_POST_PMU: |
630 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 634 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
631 | RT5616_PWR_LM, RT5616_PWR_LM); | 635 | RT5616_PWR_LM, RT5616_PWR_LM); |
632 | snd_soc_update_bits(codec, RT5616_LOUT_CTRL1, | 636 | snd_soc_update_bits(codec, RT5616_LOUT_CTRL1, |
633 | RT5616_L_MUTE | RT5616_R_MUTE, 0); | 637 | RT5616_L_MUTE | RT5616_R_MUTE, 0); |
634 | break; | 638 | break; |
635 | 639 | ||
636 | case SND_SOC_DAPM_PRE_PMD: | 640 | case SND_SOC_DAPM_PRE_PMD: |
637 | snd_soc_update_bits(codec, RT5616_LOUT_CTRL1, | 641 | snd_soc_update_bits(codec, RT5616_LOUT_CTRL1, |
638 | RT5616_L_MUTE | RT5616_R_MUTE, | 642 | RT5616_L_MUTE | RT5616_R_MUTE, |
639 | RT5616_L_MUTE | RT5616_R_MUTE); | 643 | RT5616_L_MUTE | RT5616_R_MUTE); |
640 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 644 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
641 | RT5616_PWR_LM, 0); | 645 | RT5616_PWR_LM, 0); |
642 | break; | 646 | break; |
643 | 647 | ||
644 | default: | 648 | default: |
@@ -649,19 +653,19 @@ static int rt5616_lout_event(struct snd_soc_dapm_widget *w, | |||
649 | } | 653 | } |
650 | 654 | ||
651 | static int rt5616_bst1_event(struct snd_soc_dapm_widget *w, | 655 | static int rt5616_bst1_event(struct snd_soc_dapm_widget *w, |
652 | struct snd_kcontrol *kcontrol, int event) | 656 | struct snd_kcontrol *kcontrol, int event) |
653 | { | 657 | { |
654 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 658 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
655 | 659 | ||
656 | switch (event) { | 660 | switch (event) { |
657 | case SND_SOC_DAPM_POST_PMU: | 661 | case SND_SOC_DAPM_POST_PMU: |
658 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, | 662 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, |
659 | RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2); | 663 | RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2); |
660 | break; | 664 | break; |
661 | 665 | ||
662 | case SND_SOC_DAPM_PRE_PMD: | 666 | case SND_SOC_DAPM_PRE_PMD: |
663 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, | 667 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, |
664 | RT5616_PWR_BST1_OP2, 0); | 668 | RT5616_PWR_BST1_OP2, 0); |
665 | break; | 669 | break; |
666 | 670 | ||
667 | default: | 671 | default: |
@@ -672,19 +676,19 @@ static int rt5616_bst1_event(struct snd_soc_dapm_widget *w, | |||
672 | } | 676 | } |
673 | 677 | ||
674 | static int rt5616_bst2_event(struct snd_soc_dapm_widget *w, | 678 | static int rt5616_bst2_event(struct snd_soc_dapm_widget *w, |
675 | struct snd_kcontrol *kcontrol, int event) | 679 | struct snd_kcontrol *kcontrol, int event) |
676 | { | 680 | { |
677 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 681 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
678 | 682 | ||
679 | switch (event) { | 683 | switch (event) { |
680 | case SND_SOC_DAPM_POST_PMU: | 684 | case SND_SOC_DAPM_POST_PMU: |
681 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, | 685 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, |
682 | RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2); | 686 | RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2); |
683 | break; | 687 | break; |
684 | 688 | ||
685 | case SND_SOC_DAPM_PRE_PMD: | 689 | case SND_SOC_DAPM_PRE_PMD: |
686 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, | 690 | snd_soc_update_bits(codec, RT5616_PWR_ANLG2, |
687 | RT5616_PWR_BST2_OP2, 0); | 691 | RT5616_PWR_BST2_OP2, 0); |
688 | break; | 692 | break; |
689 | 693 | ||
690 | default: | 694 | default: |
@@ -696,13 +700,13 @@ static int rt5616_bst2_event(struct snd_soc_dapm_widget *w, | |||
696 | 700 | ||
697 | static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = { | 701 | static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = { |
698 | SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2, | 702 | SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2, |
699 | RT5616_PWR_PLL_BIT, 0, NULL, 0), | 703 | RT5616_PWR_PLL_BIT, 0, NULL, 0), |
700 | /* Input Side */ | 704 | /* Input Side */ |
701 | /* micbias */ | 705 | /* micbias */ |
702 | SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1, | 706 | SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1, |
703 | RT5616_PWR_LDO_BIT, 0, NULL, 0), | 707 | RT5616_PWR_LDO_BIT, 0, NULL, 0), |
704 | SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2, | 708 | SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2, |
705 | RT5616_PWR_MB1_BIT, 0, NULL, 0), | 709 | RT5616_PWR_MB1_BIT, 0, NULL, 0), |
706 | 710 | ||
707 | /* Input Lines */ | 711 | /* Input Lines */ |
708 | SND_SOC_DAPM_INPUT("MIC1"), | 712 | SND_SOC_DAPM_INPUT("MIC1"), |
@@ -714,45 +718,47 @@ static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = { | |||
714 | 718 | ||
715 | /* Boost */ | 719 | /* Boost */ |
716 | SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2, | 720 | SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2, |
717 | RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event, | 721 | RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event, |
718 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | 722 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
719 | SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2, | 723 | SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2, |
720 | RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event, | 724 | RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event, |
721 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), | 725 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
722 | /* Input Volume */ | 726 | /* Input Volume */ |
723 | SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL, | 727 | SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL, |
724 | RT5616_PWR_IN1_L_BIT, 0, NULL, 0), | 728 | RT5616_PWR_IN1_L_BIT, 0, NULL, 0), |
725 | SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL, | 729 | SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL, |
726 | RT5616_PWR_IN1_R_BIT, 0, NULL, 0), | 730 | RT5616_PWR_IN1_R_BIT, 0, NULL, 0), |
727 | SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL, | 731 | SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL, |
728 | RT5616_PWR_IN2_L_BIT, 0, NULL, 0), | 732 | RT5616_PWR_IN2_L_BIT, 0, NULL, 0), |
729 | SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL, | 733 | SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL, |
730 | RT5616_PWR_IN2_R_BIT, 0, NULL, 0), | 734 | RT5616_PWR_IN2_R_BIT, 0, NULL, 0), |
731 | 735 | ||
732 | /* REC Mixer */ | 736 | /* REC Mixer */ |
733 | SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0, | 737 | SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0, |
734 | rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)), | 738 | rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)), |
735 | SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0, | 739 | SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0, |
736 | rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)), | 740 | rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)), |
737 | /* ADCs */ | 741 | /* ADCs */ |
738 | SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1, | 742 | SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1, |
739 | RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event, | 743 | RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event, |
740 | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), | 744 | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), |
741 | SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1, | 745 | SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1, |
742 | RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event, | 746 | RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event, |
743 | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), | 747 | SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU), |
744 | 748 | ||
745 | /* ADC Mixer */ | 749 | /* ADC Mixer */ |
746 | SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2, | 750 | SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2, |
747 | RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0), | 751 | RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0), |
748 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, | 752 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, |
749 | rt5616_sto1_adc_l_mix, ARRAY_SIZE(rt5616_sto1_adc_l_mix)), | 753 | rt5616_sto1_adc_l_mix, |
754 | ARRAY_SIZE(rt5616_sto1_adc_l_mix)), | ||
750 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, | 755 | SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, |
751 | rt5616_sto1_adc_r_mix, ARRAY_SIZE(rt5616_sto1_adc_r_mix)), | 756 | rt5616_sto1_adc_r_mix, |
757 | ARRAY_SIZE(rt5616_sto1_adc_r_mix)), | ||
752 | 758 | ||
753 | /* Digital Interface */ | 759 | /* Digital Interface */ |
754 | SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1, | 760 | SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1, |
755 | RT5616_PWR_I2S1_BIT, 0, NULL, 0), | 761 | RT5616_PWR_I2S1_BIT, 0, NULL, 0), |
756 | SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), | 762 | SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0), |
757 | SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), | 763 | SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0), |
758 | SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), | 764 | SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0), |
@@ -770,68 +776,70 @@ static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = { | |||
770 | /* Output Side */ | 776 | /* Output Side */ |
771 | /* DAC mixer before sound effect */ | 777 | /* DAC mixer before sound effect */ |
772 | SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, | 778 | SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0, |
773 | rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)), | 779 | rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)), |
774 | SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, | 780 | SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0, |
775 | rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)), | 781 | rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)), |
776 | 782 | ||
777 | SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2, | 783 | SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2, |
778 | RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0), | 784 | RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0), |
779 | 785 | ||
780 | /* DAC Mixer */ | 786 | /* DAC Mixer */ |
781 | SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, | 787 | SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0, |
782 | rt5616_sto_dac_l_mix, ARRAY_SIZE(rt5616_sto_dac_l_mix)), | 788 | rt5616_sto_dac_l_mix, |
789 | ARRAY_SIZE(rt5616_sto_dac_l_mix)), | ||
783 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, | 790 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, |
784 | rt5616_sto_dac_r_mix, ARRAY_SIZE(rt5616_sto_dac_r_mix)), | 791 | rt5616_sto_dac_r_mix, |
792 | ARRAY_SIZE(rt5616_sto_dac_r_mix)), | ||
785 | 793 | ||
786 | /* DACs */ | 794 | /* DACs */ |
787 | SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1, | 795 | SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1, |
788 | RT5616_PWR_DAC_L1_BIT, 0), | 796 | RT5616_PWR_DAC_L1_BIT, 0), |
789 | SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1, | 797 | SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1, |
790 | RT5616_PWR_DAC_R1_BIT, 0), | 798 | RT5616_PWR_DAC_R1_BIT, 0), |
791 | /* OUT Mixer */ | 799 | /* OUT Mixer */ |
792 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT, | 800 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT, |
793 | 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)), | 801 | 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)), |
794 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT, | 802 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT, |
795 | 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)), | 803 | 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)), |
796 | /* Output Volume */ | 804 | /* Output Volume */ |
797 | SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL, | 805 | SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL, |
798 | RT5616_PWR_OV_L_BIT, 0, NULL, 0), | 806 | RT5616_PWR_OV_L_BIT, 0, NULL, 0), |
799 | SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL, | 807 | SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL, |
800 | RT5616_PWR_OV_R_BIT, 0, NULL, 0), | 808 | RT5616_PWR_OV_R_BIT, 0, NULL, 0), |
801 | SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL, | 809 | SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL, |
802 | RT5616_PWR_HV_L_BIT, 0, NULL, 0), | 810 | RT5616_PWR_HV_L_BIT, 0, NULL, 0), |
803 | SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL, | 811 | SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL, |
804 | RT5616_PWR_HV_R_BIT, 0, NULL, 0), | 812 | RT5616_PWR_HV_R_BIT, 0, NULL, 0), |
805 | SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, | 813 | SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, |
806 | 0, 0, NULL, 0), | 814 | 0, 0, NULL, 0), |
807 | SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, | 815 | SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, |
808 | 0, 0, NULL, 0), | 816 | 0, 0, NULL, 0), |
809 | SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, | 817 | SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, |
810 | 0, 0, NULL, 0), | 818 | 0, 0, NULL, 0), |
811 | SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL, | 819 | SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL, |
812 | RT5616_PWR_IN1_L_BIT, 0, NULL, 0), | 820 | RT5616_PWR_IN1_L_BIT, 0, NULL, 0), |
813 | SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL, | 821 | SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL, |
814 | RT5616_PWR_IN1_R_BIT, 0, NULL, 0), | 822 | RT5616_PWR_IN1_R_BIT, 0, NULL, 0), |
815 | SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL, | 823 | SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL, |
816 | RT5616_PWR_IN2_L_BIT, 0, NULL, 0), | 824 | RT5616_PWR_IN2_L_BIT, 0, NULL, 0), |
817 | SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL, | 825 | SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL, |
818 | RT5616_PWR_IN2_R_BIT, 0, NULL, 0), | 826 | RT5616_PWR_IN2_R_BIT, 0, NULL, 0), |
819 | /* HPO/LOUT/Mono Mixer */ | 827 | /* HPO/LOUT/Mono Mixer */ |
820 | SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, | 828 | SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, |
821 | rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)), | 829 | rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)), |
822 | SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, | 830 | SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, |
823 | rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)), | 831 | rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)), |
824 | 832 | ||
825 | SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, | 833 | SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, |
826 | rt5616_hp_event, SND_SOC_DAPM_PRE_PMD | | 834 | rt5616_hp_event, SND_SOC_DAPM_PRE_PMD | |
827 | SND_SOC_DAPM_POST_PMU), | 835 | SND_SOC_DAPM_POST_PMU), |
828 | SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, | 836 | SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, |
829 | rt5616_lout_event, SND_SOC_DAPM_PRE_PMD | | 837 | rt5616_lout_event, SND_SOC_DAPM_PRE_PMD | |
830 | SND_SOC_DAPM_POST_PMU), | 838 | SND_SOC_DAPM_POST_PMU), |
831 | 839 | ||
832 | SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0, | 840 | SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0, |
833 | rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU | | 841 | rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU | |
834 | SND_SOC_DAPM_PRE_PMD), | 842 | SND_SOC_DAPM_PRE_PMD), |
835 | 843 | ||
836 | /* Output Lines */ | 844 | /* Output Lines */ |
837 | SND_SOC_DAPM_OUTPUT("HPOL"), | 845 | SND_SOC_DAPM_OUTPUT("HPOL"), |
@@ -950,7 +958,8 @@ static const struct snd_soc_dapm_route rt5616_dapm_routes[] = { | |||
950 | }; | 958 | }; |
951 | 959 | ||
952 | static int rt5616_hw_params(struct snd_pcm_substream *substream, | 960 | static int rt5616_hw_params(struct snd_pcm_substream *substream, |
953 | struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) | 961 | struct snd_pcm_hw_params *params, |
962 | struct snd_soc_dai *dai) | ||
954 | { | 963 | { |
955 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 964 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
956 | struct snd_soc_codec *codec = rtd->codec; | 965 | struct snd_soc_codec *codec = rtd->codec; |
@@ -977,7 +986,7 @@ static int rt5616_hw_params(struct snd_pcm_substream *substream, | |||
977 | dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", | 986 | dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n", |
978 | rt5616->bclk[dai->id], rt5616->lrck[dai->id]); | 987 | rt5616->bclk[dai->id], rt5616->lrck[dai->id]); |
979 | dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", | 988 | dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n", |
980 | bclk_ms, pre_div, dai->id); | 989 | bclk_ms, pre_div, dai->id); |
981 | 990 | ||
982 | switch (params_format(params)) { | 991 | switch (params_format(params)) { |
983 | case SNDRV_PCM_FORMAT_S16_LE: | 992 | case SNDRV_PCM_FORMAT_S16_LE: |
@@ -998,10 +1007,9 @@ static int rt5616_hw_params(struct snd_pcm_substream *substream, | |||
998 | mask_clk = RT5616_I2S_PD1_MASK; | 1007 | mask_clk = RT5616_I2S_PD1_MASK; |
999 | val_clk = pre_div << RT5616_I2S_PD1_SFT; | 1008 | val_clk = pre_div << RT5616_I2S_PD1_SFT; |
1000 | snd_soc_update_bits(codec, RT5616_I2S1_SDP, | 1009 | snd_soc_update_bits(codec, RT5616_I2S1_SDP, |
1001 | RT5616_I2S_DL_MASK, val_len); | 1010 | RT5616_I2S_DL_MASK, val_len); |
1002 | snd_soc_update_bits(codec, RT5616_ADDA_CLK1, mask_clk, val_clk); | 1011 | snd_soc_update_bits(codec, RT5616_ADDA_CLK1, mask_clk, val_clk); |
1003 | 1012 | ||
1004 | |||
1005 | return 0; | 1013 | return 0; |
1006 | } | 1014 | } |
1007 | 1015 | ||
@@ -1050,15 +1058,14 @@ static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) | |||
1050 | } | 1058 | } |
1051 | 1059 | ||
1052 | snd_soc_update_bits(codec, RT5616_I2S1_SDP, | 1060 | snd_soc_update_bits(codec, RT5616_I2S1_SDP, |
1053 | RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK | | 1061 | RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK | |
1054 | RT5616_I2S_DF_MASK, reg_val); | 1062 | RT5616_I2S_DF_MASK, reg_val); |
1055 | |||
1056 | 1063 | ||
1057 | return 0; | 1064 | return 0; |
1058 | } | 1065 | } |
1059 | 1066 | ||
1060 | static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai, | 1067 | static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai, |
1061 | int clk_id, unsigned int freq, int dir) | 1068 | int clk_id, unsigned int freq, int dir) |
1062 | { | 1069 | { |
1063 | struct snd_soc_codec *codec = dai->codec; | 1070 | struct snd_soc_codec *codec = dai->codec; |
1064 | struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); | 1071 | struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); |
@@ -1078,8 +1085,9 @@ static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai, | |||
1078 | dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); | 1085 | dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id); |
1079 | return -EINVAL; | 1086 | return -EINVAL; |
1080 | } | 1087 | } |
1088 | |||
1081 | snd_soc_update_bits(codec, RT5616_GLB_CLK, | 1089 | snd_soc_update_bits(codec, RT5616_GLB_CLK, |
1082 | RT5616_SCLK_SRC_MASK, reg_val); | 1090 | RT5616_SCLK_SRC_MASK, reg_val); |
1083 | rt5616->sysclk = freq; | 1091 | rt5616->sysclk = freq; |
1084 | rt5616->sysclk_src = clk_id; | 1092 | rt5616->sysclk_src = clk_id; |
1085 | 1093 | ||
@@ -1089,7 +1097,7 @@ static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai, | |||
1089 | } | 1097 | } |
1090 | 1098 | ||
1091 | static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | 1099 | static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, |
1092 | unsigned int freq_in, unsigned int freq_out) | 1100 | unsigned int freq_in, unsigned int freq_out) |
1093 | { | 1101 | { |
1094 | struct snd_soc_codec *codec = dai->codec; | 1102 | struct snd_soc_codec *codec = dai->codec; |
1095 | struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); | 1103 | struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); |
@@ -1106,19 +1114,22 @@ static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | |||
1106 | rt5616->pll_in = 0; | 1114 | rt5616->pll_in = 0; |
1107 | rt5616->pll_out = 0; | 1115 | rt5616->pll_out = 0; |
1108 | snd_soc_update_bits(codec, RT5616_GLB_CLK, | 1116 | snd_soc_update_bits(codec, RT5616_GLB_CLK, |
1109 | RT5616_SCLK_SRC_MASK, RT5616_SCLK_SRC_MCLK); | 1117 | RT5616_SCLK_SRC_MASK, |
1118 | RT5616_SCLK_SRC_MCLK); | ||
1110 | return 0; | 1119 | return 0; |
1111 | } | 1120 | } |
1112 | 1121 | ||
1113 | switch (source) { | 1122 | switch (source) { |
1114 | case RT5616_PLL1_S_MCLK: | 1123 | case RT5616_PLL1_S_MCLK: |
1115 | snd_soc_update_bits(codec, RT5616_GLB_CLK, | 1124 | snd_soc_update_bits(codec, RT5616_GLB_CLK, |
1116 | RT5616_PLL1_SRC_MASK, RT5616_PLL1_SRC_MCLK); | 1125 | RT5616_PLL1_SRC_MASK, |
1126 | RT5616_PLL1_SRC_MCLK); | ||
1117 | break; | 1127 | break; |
1118 | case RT5616_PLL1_S_BCLK1: | 1128 | case RT5616_PLL1_S_BCLK1: |
1119 | case RT5616_PLL1_S_BCLK2: | 1129 | case RT5616_PLL1_S_BCLK2: |
1120 | snd_soc_update_bits(codec, RT5616_GLB_CLK, | 1130 | snd_soc_update_bits(codec, RT5616_GLB_CLK, |
1121 | RT5616_PLL1_SRC_MASK, RT5616_PLL1_SRC_BCLK1); | 1131 | RT5616_PLL1_SRC_MASK, |
1132 | RT5616_PLL1_SRC_BCLK1); | ||
1122 | break; | 1133 | break; |
1123 | default: | 1134 | default: |
1124 | dev_err(codec->dev, "Unknown PLL source %d\n", source); | 1135 | dev_err(codec->dev, "Unknown PLL source %d\n", source); |
@@ -1136,10 +1147,11 @@ static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | |||
1136 | pll_code.n_code, pll_code.k_code); | 1147 | pll_code.n_code, pll_code.k_code); |
1137 | 1148 | ||
1138 | snd_soc_write(codec, RT5616_PLL_CTRL1, | 1149 | snd_soc_write(codec, RT5616_PLL_CTRL1, |
1139 | pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code); | 1150 | pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code); |
1140 | snd_soc_write(codec, RT5616_PLL_CTRL2, | 1151 | snd_soc_write(codec, RT5616_PLL_CTRL2, |
1141 | (pll_code.m_bp ? 0 : pll_code.m_code) << RT5616_PLL_M_SFT | | 1152 | (pll_code.m_bp ? 0 : pll_code.m_code) << |
1142 | pll_code.m_bp << RT5616_PLL_M_BP_SFT); | 1153 | RT5616_PLL_M_SFT | |
1154 | pll_code.m_bp << RT5616_PLL_M_BP_SFT); | ||
1143 | 1155 | ||
1144 | rt5616->pll_in = freq_in; | 1156 | rt5616->pll_in = freq_in; |
1145 | rt5616->pll_out = freq_out; | 1157 | rt5616->pll_out = freq_out; |
@@ -1149,22 +1161,50 @@ static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | |||
1149 | } | 1161 | } |
1150 | 1162 | ||
1151 | static int rt5616_set_bias_level(struct snd_soc_codec *codec, | 1163 | static int rt5616_set_bias_level(struct snd_soc_codec *codec, |
1152 | enum snd_soc_bias_level level) | 1164 | enum snd_soc_bias_level level) |
1153 | { | 1165 | { |
1166 | struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); | ||
1167 | int ret; | ||
1168 | |||
1154 | switch (level) { | 1169 | switch (level) { |
1170 | |||
1171 | case SND_SOC_BIAS_ON: | ||
1172 | break; | ||
1173 | |||
1174 | case SND_SOC_BIAS_PREPARE: | ||
1175 | /* | ||
1176 | * SND_SOC_BIAS_PREPARE is called while preparing for a | ||
1177 | * transition to ON or away from ON. If current bias_level | ||
1178 | * is SND_SOC_BIAS_ON, then it is preparing for a transition | ||
1179 | * away from ON. Disable the clock in that case, otherwise | ||
1180 | * enable it. | ||
1181 | */ | ||
1182 | if (IS_ERR(rt5616->mclk)) | ||
1183 | break; | ||
1184 | |||
1185 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) { | ||
1186 | clk_disable_unprepare(rt5616->mclk); | ||
1187 | } else { | ||
1188 | ret = clk_prepare_enable(rt5616->mclk); | ||
1189 | if (ret) | ||
1190 | return ret; | ||
1191 | } | ||
1192 | break; | ||
1193 | |||
1155 | case SND_SOC_BIAS_STANDBY: | 1194 | case SND_SOC_BIAS_STANDBY: |
1156 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { | 1195 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { |
1157 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 1196 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
1158 | RT5616_PWR_VREF1 | RT5616_PWR_MB | | 1197 | RT5616_PWR_VREF1 | RT5616_PWR_MB | |
1159 | RT5616_PWR_BG | RT5616_PWR_VREF2, | 1198 | RT5616_PWR_BG | RT5616_PWR_VREF2, |
1160 | RT5616_PWR_VREF1 | RT5616_PWR_MB | | 1199 | RT5616_PWR_VREF1 | RT5616_PWR_MB | |
1161 | RT5616_PWR_BG | RT5616_PWR_VREF2); | 1200 | RT5616_PWR_BG | RT5616_PWR_VREF2); |
1162 | mdelay(10); | 1201 | mdelay(10); |
1163 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, | 1202 | snd_soc_update_bits(codec, RT5616_PWR_ANLG1, |
1164 | RT5616_PWR_FV1 | RT5616_PWR_FV2, | 1203 | RT5616_PWR_FV1 | RT5616_PWR_FV2, |
1165 | RT5616_PWR_FV1 | RT5616_PWR_FV2); | 1204 | RT5616_PWR_FV1 | RT5616_PWR_FV2); |
1166 | snd_soc_update_bits(codec, RT5616_D_MISC, | 1205 | snd_soc_update_bits(codec, RT5616_D_MISC, |
1167 | RT5616_D_GATE_EN, RT5616_D_GATE_EN); | 1206 | RT5616_D_GATE_EN, |
1207 | RT5616_D_GATE_EN); | ||
1168 | } | 1208 | } |
1169 | break; | 1209 | break; |
1170 | 1210 | ||
@@ -1189,6 +1229,11 @@ static int rt5616_probe(struct snd_soc_codec *codec) | |||
1189 | { | 1229 | { |
1190 | struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); | 1230 | struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec); |
1191 | 1231 | ||
1232 | /* Check if MCLK provided */ | ||
1233 | rt5616->mclk = devm_clk_get(codec->dev, "mclk"); | ||
1234 | if (PTR_ERR(rt5616->mclk) == -EPROBE_DEFER) | ||
1235 | return -EPROBE_DEFER; | ||
1236 | |||
1192 | rt5616->codec = codec; | 1237 | rt5616->codec = codec; |
1193 | 1238 | ||
1194 | return 0; | 1239 | return 0; |
@@ -1218,11 +1263,10 @@ static int rt5616_resume(struct snd_soc_codec *codec) | |||
1218 | #define rt5616_resume NULL | 1263 | #define rt5616_resume NULL |
1219 | #endif | 1264 | #endif |
1220 | 1265 | ||
1221 | #define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_96000 | 1266 | #define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_192000 |
1222 | #define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ | 1267 | #define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ |
1223 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) | 1268 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) |
1224 | 1269 | ||
1225 | |||
1226 | struct snd_soc_dai_ops rt5616_aif_dai_ops = { | 1270 | struct snd_soc_dai_ops rt5616_aif_dai_ops = { |
1227 | .hw_params = rt5616_hw_params, | 1271 | .hw_params = rt5616_hw_params, |
1228 | .set_fmt = rt5616_set_dai_fmt, | 1272 | .set_fmt = rt5616_set_dai_fmt, |
@@ -1296,15 +1340,15 @@ MODULE_DEVICE_TABLE(of, rt5616_of_match); | |||
1296 | #endif | 1340 | #endif |
1297 | 1341 | ||
1298 | static int rt5616_i2c_probe(struct i2c_client *i2c, | 1342 | static int rt5616_i2c_probe(struct i2c_client *i2c, |
1299 | const struct i2c_device_id *id) | 1343 | const struct i2c_device_id *id) |
1300 | { | 1344 | { |
1301 | struct rt5616_priv *rt5616; | 1345 | struct rt5616_priv *rt5616; |
1302 | unsigned int val; | 1346 | unsigned int val; |
1303 | int ret; | 1347 | int ret; |
1304 | 1348 | ||
1305 | rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv), | 1349 | rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv), |
1306 | GFP_KERNEL); | 1350 | GFP_KERNEL); |
1307 | if (rt5616 == NULL) | 1351 | if (!rt5616) |
1308 | return -ENOMEM; | 1352 | return -ENOMEM; |
1309 | 1353 | ||
1310 | i2c_set_clientdata(i2c, rt5616); | 1354 | i2c_set_clientdata(i2c, rt5616); |
@@ -1326,14 +1370,14 @@ static int rt5616_i2c_probe(struct i2c_client *i2c, | |||
1326 | } | 1370 | } |
1327 | regmap_write(rt5616->regmap, RT5616_RESET, 0); | 1371 | regmap_write(rt5616->regmap, RT5616_RESET, 0); |
1328 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, | 1372 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, |
1329 | RT5616_PWR_VREF1 | RT5616_PWR_MB | | 1373 | RT5616_PWR_VREF1 | RT5616_PWR_MB | |
1330 | RT5616_PWR_BG | RT5616_PWR_VREF2, | 1374 | RT5616_PWR_BG | RT5616_PWR_VREF2, |
1331 | RT5616_PWR_VREF1 | RT5616_PWR_MB | | 1375 | RT5616_PWR_VREF1 | RT5616_PWR_MB | |
1332 | RT5616_PWR_BG | RT5616_PWR_VREF2); | 1376 | RT5616_PWR_BG | RT5616_PWR_VREF2); |
1333 | mdelay(10); | 1377 | mdelay(10); |
1334 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, | 1378 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, |
1335 | RT5616_PWR_FV1 | RT5616_PWR_FV2, | 1379 | RT5616_PWR_FV1 | RT5616_PWR_FV2, |
1336 | RT5616_PWR_FV1 | RT5616_PWR_FV2); | 1380 | RT5616_PWR_FV1 | RT5616_PWR_FV2); |
1337 | 1381 | ||
1338 | ret = regmap_register_patch(rt5616->regmap, init_list, | 1382 | ret = regmap_register_patch(rt5616->regmap, init_list, |
1339 | ARRAY_SIZE(init_list)); | 1383 | ARRAY_SIZE(init_list)); |
@@ -1341,11 +1385,10 @@ static int rt5616_i2c_probe(struct i2c_client *i2c, | |||
1341 | dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); | 1385 | dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret); |
1342 | 1386 | ||
1343 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, | 1387 | regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1, |
1344 | RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V); | 1388 | RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V); |
1345 | 1389 | ||
1346 | return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5616, | 1390 | return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5616, |
1347 | rt5616_dai, ARRAY_SIZE(rt5616_dai)); | 1391 | rt5616_dai, ARRAY_SIZE(rt5616_dai)); |
1348 | |||
1349 | } | 1392 | } |
1350 | 1393 | ||
1351 | static int rt5616_i2c_remove(struct i2c_client *i2c) | 1394 | static int rt5616_i2c_remove(struct i2c_client *i2c) |
@@ -1361,7 +1404,6 @@ static void rt5616_i2c_shutdown(struct i2c_client *client) | |||
1361 | 1404 | ||
1362 | regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8); | 1405 | regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8); |
1363 | regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8); | 1406 | regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8); |
1364 | |||
1365 | } | 1407 | } |
1366 | 1408 | ||
1367 | static struct i2c_driver rt5616_i2c_driver = { | 1409 | static struct i2c_driver rt5616_i2c_driver = { |
diff --git a/sound/soc/codecs/rt5640.c b/sound/soc/codecs/rt5640.c index 11d032cdc658..e8b5ba04417a 100644 --- a/sound/soc/codecs/rt5640.c +++ b/sound/soc/codecs/rt5640.c | |||
@@ -1217,11 +1217,14 @@ static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = { | |||
1217 | SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0, | 1217 | SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0, |
1218 | rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)), | 1218 | rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)), |
1219 | /* DACs */ | 1219 | /* DACs */ |
1220 | SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1, | 1220 | SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, |
1221 | RT5640_PWR_DAC_L1_BIT, 0), | 1221 | 0, 0), |
1222 | SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1, | 1222 | SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, |
1223 | RT5640_PWR_DAC_R1_BIT, 0), | 1223 | 0, 0), |
1224 | 1224 | SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5640_PWR_DIG1, | |
1225 | RT5640_PWR_DAC_L1_BIT, 0, NULL, 0), | ||
1226 | SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5640_PWR_DIG1, | ||
1227 | RT5640_PWR_DAC_R1_BIT, 0, NULL, 0), | ||
1225 | /* SPK/OUT Mixer */ | 1228 | /* SPK/OUT Mixer */ |
1226 | SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT, | 1229 | SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT, |
1227 | 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)), | 1230 | 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)), |
@@ -1298,9 +1301,9 @@ static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = { | |||
1298 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, | 1301 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, |
1299 | rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)), | 1302 | rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)), |
1300 | 1303 | ||
1301 | SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_R2_BIT, | 1304 | SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, |
1302 | 0), | 1305 | 0), |
1303 | SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1, RT5640_PWR_DAC_L2_BIT, | 1306 | SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, |
1304 | 0), | 1307 | 0), |
1305 | 1308 | ||
1306 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT, | 1309 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT, |
@@ -1317,6 +1320,10 @@ static const struct snd_soc_dapm_widget rt5640_specific_dapm_widgets[] = { | |||
1317 | rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)), | 1320 | rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)), |
1318 | SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1, | 1321 | SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1, |
1319 | RT5640_PWR_MA_BIT, 0, NULL, 0), | 1322 | RT5640_PWR_MA_BIT, 0, NULL, 0), |
1323 | SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5640_PWR_DIG1, | ||
1324 | RT5640_PWR_DAC_L2_BIT, 0, NULL, 0), | ||
1325 | SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5640_PWR_DIG1, | ||
1326 | RT5640_PWR_DAC_R2_BIT, 0, NULL, 0), | ||
1320 | 1327 | ||
1321 | SND_SOC_DAPM_OUTPUT("MONOP"), | 1328 | SND_SOC_DAPM_OUTPUT("MONOP"), |
1322 | SND_SOC_DAPM_OUTPUT("MONON"), | 1329 | SND_SOC_DAPM_OUTPUT("MONON"), |
@@ -1328,11 +1335,6 @@ static const struct snd_soc_dapm_widget rt5639_specific_dapm_widgets[] = { | |||
1328 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, | 1335 | SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0, |
1329 | rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)), | 1336 | rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)), |
1330 | 1337 | ||
1331 | SND_SOC_DAPM_SUPPLY("DAC L2 Filter", RT5640_PWR_DIG1, | ||
1332 | RT5640_PWR_DAC_L2_BIT, 0, NULL, 0), | ||
1333 | SND_SOC_DAPM_SUPPLY("DAC R2 Filter", RT5640_PWR_DIG1, | ||
1334 | RT5640_PWR_DAC_R2_BIT, 0, NULL, 0), | ||
1335 | |||
1336 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT, | 1338 | SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT, |
1337 | 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)), | 1339 | 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)), |
1338 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT, | 1340 | SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT, |
@@ -1493,8 +1495,10 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = { | |||
1493 | 1495 | ||
1494 | {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"}, | 1496 | {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"}, |
1495 | {"DAC MIXL", "INF1 Switch", "IF1 DAC L"}, | 1497 | {"DAC MIXL", "INF1 Switch", "IF1 DAC L"}, |
1498 | {"DAC MIXL", NULL, "DAC L1 Power"}, | ||
1496 | {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"}, | 1499 | {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"}, |
1497 | {"DAC MIXR", "INF1 Switch", "IF1 DAC R"}, | 1500 | {"DAC MIXR", "INF1 Switch", "IF1 DAC R"}, |
1501 | {"DAC MIXR", NULL, "DAC R1 Power"}, | ||
1498 | 1502 | ||
1499 | {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"}, | 1503 | {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"}, |
1500 | {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"}, | 1504 | {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"}, |
@@ -1507,8 +1511,10 @@ static const struct snd_soc_dapm_route rt5640_dapm_routes[] = { | |||
1507 | 1511 | ||
1508 | {"DAC L1", NULL, "Stereo DAC MIXL"}, | 1512 | {"DAC L1", NULL, "Stereo DAC MIXL"}, |
1509 | {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll}, | 1513 | {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll}, |
1514 | {"DAC L1", NULL, "DAC L1 Power"}, | ||
1510 | {"DAC R1", NULL, "Stereo DAC MIXR"}, | 1515 | {"DAC R1", NULL, "Stereo DAC MIXR"}, |
1511 | {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll}, | 1516 | {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll}, |
1517 | {"DAC R1", NULL, "DAC R1 Power"}, | ||
1512 | 1518 | ||
1513 | {"SPK MIXL", "REC MIXL Switch", "RECMIXL"}, | 1519 | {"SPK MIXL", "REC MIXL Switch", "RECMIXL"}, |
1514 | {"SPK MIXL", "INL Switch", "INL VOL"}, | 1520 | {"SPK MIXL", "INL Switch", "INL VOL"}, |
@@ -1595,8 +1601,9 @@ static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = { | |||
1595 | 1601 | ||
1596 | {"DAC L2 Mux", "IF2", "IF2 DAC L"}, | 1602 | {"DAC L2 Mux", "IF2", "IF2 DAC L"}, |
1597 | {"DAC L2 Mux", "Base L/R", "Audio DSP"}, | 1603 | {"DAC L2 Mux", "Base L/R", "Audio DSP"}, |
1598 | 1604 | {"DAC L2 Mux", NULL, "DAC L2 Power"}, | |
1599 | {"DAC R2 Mux", "IF2", "IF2 DAC R"}, | 1605 | {"DAC R2 Mux", "IF2", "IF2 DAC R"}, |
1606 | {"DAC R2 Mux", NULL, "DAC R2 Power"}, | ||
1600 | 1607 | ||
1601 | {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"}, | 1608 | {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"}, |
1602 | {"Stereo DAC MIXL", "ANC Switch", "ANC"}, | 1609 | {"Stereo DAC MIXL", "ANC Switch", "ANC"}, |
@@ -1614,8 +1621,10 @@ static const struct snd_soc_dapm_route rt5640_specific_dapm_routes[] = { | |||
1614 | 1621 | ||
1615 | {"DAC L2", NULL, "Mono DAC MIXL"}, | 1622 | {"DAC L2", NULL, "Mono DAC MIXL"}, |
1616 | {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll}, | 1623 | {"DAC L2", NULL, "PLL1", is_sys_clk_from_pll}, |
1624 | {"DAC L2", NULL, "DAC L2 Power"}, | ||
1617 | {"DAC R2", NULL, "Mono DAC MIXR"}, | 1625 | {"DAC R2", NULL, "Mono DAC MIXR"}, |
1618 | {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll}, | 1626 | {"DAC R2", NULL, "PLL1", is_sys_clk_from_pll}, |
1627 | {"DAC R2", NULL, "DAC R2 Power"}, | ||
1619 | 1628 | ||
1620 | {"SPK MIXL", "DAC L2 Switch", "DAC L2"}, | 1629 | {"SPK MIXL", "DAC L2 Switch", "DAC L2"}, |
1621 | {"SPK MIXR", "DAC R2 Switch", "DAC R2"}, | 1630 | {"SPK MIXR", "DAC R2 Switch", "DAC R2"}, |
@@ -1656,8 +1665,8 @@ static const struct snd_soc_dapm_route rt5639_specific_dapm_routes[] = { | |||
1656 | {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"}, | 1665 | {"DIG MIXL", "DAC L2 Switch", "IF2 DAC L"}, |
1657 | {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"}, | 1666 | {"DIG MIXR", "DAC R2 Switch", "IF2 DAC R"}, |
1658 | 1667 | ||
1659 | {"IF2 DAC L", NULL, "DAC L2 Filter"}, | 1668 | {"IF2 DAC L", NULL, "DAC L2 Power"}, |
1660 | {"IF2 DAC R", NULL, "DAC R2 Filter"}, | 1669 | {"IF2 DAC R", NULL, "DAC R2 Power"}, |
1661 | }; | 1670 | }; |
1662 | 1671 | ||
1663 | static int get_sdp_info(struct snd_soc_codec *codec, int dai_id) | 1672 | static int get_sdp_info(struct snd_soc_codec *codec, int dai_id) |
@@ -1880,7 +1889,7 @@ static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | |||
1880 | struct snd_soc_codec *codec = dai->codec; | 1889 | struct snd_soc_codec *codec = dai->codec; |
1881 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); | 1890 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); |
1882 | struct rl6231_pll_code pll_code; | 1891 | struct rl6231_pll_code pll_code; |
1883 | int ret, dai_sel; | 1892 | int ret; |
1884 | 1893 | ||
1885 | if (source == rt5640->pll_src && freq_in == rt5640->pll_in && | 1894 | if (source == rt5640->pll_src && freq_in == rt5640->pll_in && |
1886 | freq_out == rt5640->pll_out) | 1895 | freq_out == rt5640->pll_out) |
@@ -1902,21 +1911,12 @@ static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | |||
1902 | RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK); | 1911 | RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK); |
1903 | break; | 1912 | break; |
1904 | case RT5640_PLL1_S_BCLK1: | 1913 | case RT5640_PLL1_S_BCLK1: |
1914 | snd_soc_update_bits(codec, RT5640_GLB_CLK, | ||
1915 | RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1); | ||
1916 | break; | ||
1905 | case RT5640_PLL1_S_BCLK2: | 1917 | case RT5640_PLL1_S_BCLK2: |
1906 | dai_sel = get_sdp_info(codec, dai->id); | 1918 | snd_soc_update_bits(codec, RT5640_GLB_CLK, |
1907 | if (dai_sel < 0) { | 1919 | RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2); |
1908 | dev_err(codec->dev, | ||
1909 | "Failed to get sdp info: %d\n", dai_sel); | ||
1910 | return -EINVAL; | ||
1911 | } | ||
1912 | if (dai_sel & RT5640_U_IF1) { | ||
1913 | snd_soc_update_bits(codec, RT5640_GLB_CLK, | ||
1914 | RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1); | ||
1915 | } | ||
1916 | if (dai_sel & RT5640_U_IF2) { | ||
1917 | snd_soc_update_bits(codec, RT5640_GLB_CLK, | ||
1918 | RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2); | ||
1919 | } | ||
1920 | break; | 1920 | break; |
1921 | default: | 1921 | default: |
1922 | dev_err(codec->dev, "Unknown PLL source %d\n", source); | 1922 | dev_err(codec->dev, "Unknown PLL source %d\n", source); |
@@ -1949,7 +1949,33 @@ static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source, | |||
1949 | static int rt5640_set_bias_level(struct snd_soc_codec *codec, | 1949 | static int rt5640_set_bias_level(struct snd_soc_codec *codec, |
1950 | enum snd_soc_bias_level level) | 1950 | enum snd_soc_bias_level level) |
1951 | { | 1951 | { |
1952 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); | ||
1953 | int ret; | ||
1954 | |||
1952 | switch (level) { | 1955 | switch (level) { |
1956 | case SND_SOC_BIAS_ON: | ||
1957 | break; | ||
1958 | |||
1959 | case SND_SOC_BIAS_PREPARE: | ||
1960 | /* | ||
1961 | * SND_SOC_BIAS_PREPARE is called while preparing for a | ||
1962 | * transition to ON or away from ON. If current bias_level | ||
1963 | * is SND_SOC_BIAS_ON, then it is preparing for a transition | ||
1964 | * away from ON. Disable the clock in that case, otherwise | ||
1965 | * enable it. | ||
1966 | */ | ||
1967 | if (IS_ERR(rt5640->mclk)) | ||
1968 | break; | ||
1969 | |||
1970 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_ON) { | ||
1971 | clk_disable_unprepare(rt5640->mclk); | ||
1972 | } else { | ||
1973 | ret = clk_prepare_enable(rt5640->mclk); | ||
1974 | if (ret) | ||
1975 | return ret; | ||
1976 | } | ||
1977 | break; | ||
1978 | |||
1953 | case SND_SOC_BIAS_STANDBY: | 1979 | case SND_SOC_BIAS_STANDBY: |
1954 | if (SND_SOC_BIAS_OFF == snd_soc_codec_get_bias_level(codec)) { | 1980 | if (SND_SOC_BIAS_OFF == snd_soc_codec_get_bias_level(codec)) { |
1955 | snd_soc_update_bits(codec, RT5640_PWR_ANLG1, | 1981 | snd_soc_update_bits(codec, RT5640_PWR_ANLG1, |
@@ -2088,6 +2114,11 @@ static int rt5640_probe(struct snd_soc_codec *codec) | |||
2088 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); | 2114 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
2089 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); | 2115 | struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec); |
2090 | 2116 | ||
2117 | /* Check if MCLK provided */ | ||
2118 | rt5640->mclk = devm_clk_get(codec->dev, "mclk"); | ||
2119 | if (PTR_ERR(rt5640->mclk) == -EPROBE_DEFER) | ||
2120 | return -EPROBE_DEFER; | ||
2121 | |||
2091 | rt5640->codec = codec; | 2122 | rt5640->codec = codec; |
2092 | 2123 | ||
2093 | snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); | 2124 | snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_OFF); |
diff --git a/sound/soc/codecs/rt5640.h b/sound/soc/codecs/rt5640.h index 83a7150ddc24..1761c3a98b76 100644 --- a/sound/soc/codecs/rt5640.h +++ b/sound/soc/codecs/rt5640.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #ifndef _RT5640_H | 12 | #ifndef _RT5640_H |
13 | #define _RT5640_H | 13 | #define _RT5640_H |
14 | 14 | ||
15 | #include <linux/clk.h> | ||
15 | #include <sound/rt5640.h> | 16 | #include <sound/rt5640.h> |
16 | 17 | ||
17 | /* Info */ | 18 | /* Info */ |
@@ -2097,6 +2098,7 @@ struct rt5640_priv { | |||
2097 | struct snd_soc_codec *codec; | 2098 | struct snd_soc_codec *codec; |
2098 | struct rt5640_platform_data pdata; | 2099 | struct rt5640_platform_data pdata; |
2099 | struct regmap *regmap; | 2100 | struct regmap *regmap; |
2101 | struct clk *mclk; | ||
2100 | 2102 | ||
2101 | int sysclk; | 2103 | int sysclk; |
2102 | int sysclk_src; | 2104 | int sysclk_src; |
diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index 93e8c9017633..7af5e7380d61 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c | |||
@@ -1674,7 +1674,7 @@ static void hp_amp_power(struct snd_soc_codec *codec, int on) | |||
1674 | regmap_write(rt5645->regmap, RT5645_PR_BASE + | 1674 | regmap_write(rt5645->regmap, RT5645_PR_BASE + |
1675 | RT5645_MAMP_INT_REG2, 0xfc00); | 1675 | RT5645_MAMP_INT_REG2, 0xfc00); |
1676 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140); | 1676 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140); |
1677 | msleep(70); | 1677 | msleep(90); |
1678 | rt5645->hp_on = true; | 1678 | rt5645->hp_on = true; |
1679 | } else { | 1679 | } else { |
1680 | /* depop parameters */ | 1680 | /* depop parameters */ |
@@ -3029,13 +3029,18 @@ static int rt5645_set_bias_level(struct snd_soc_codec *codec, | |||
3029 | RT5645_PWR_BG | RT5645_PWR_VREF2, | 3029 | RT5645_PWR_BG | RT5645_PWR_VREF2, |
3030 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | 3030 | RT5645_PWR_VREF1 | RT5645_PWR_MB | |
3031 | RT5645_PWR_BG | RT5645_PWR_VREF2); | 3031 | RT5645_PWR_BG | RT5645_PWR_VREF2); |
3032 | mdelay(10); | ||
3032 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | 3033 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, |
3033 | RT5645_PWR_FV1 | RT5645_PWR_FV2, | 3034 | RT5645_PWR_FV1 | RT5645_PWR_FV2, |
3034 | RT5645_PWR_FV1 | RT5645_PWR_FV2); | 3035 | RT5645_PWR_FV1 | RT5645_PWR_FV2); |
3035 | if (rt5645->en_button_func && | 3036 | if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { |
3036 | snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) | 3037 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1140); |
3037 | queue_delayed_work(system_power_efficient_wq, | 3038 | msleep(40); |
3038 | &rt5645->jack_detect_work, msecs_to_jiffies(0)); | 3039 | if (rt5645->en_button_func) |
3040 | queue_delayed_work(system_power_efficient_wq, | ||
3041 | &rt5645->jack_detect_work, | ||
3042 | msecs_to_jiffies(0)); | ||
3043 | } | ||
3039 | break; | 3044 | break; |
3040 | 3045 | ||
3041 | case SND_SOC_BIAS_OFF: | 3046 | case SND_SOC_BIAS_OFF: |
diff --git a/sound/soc/codecs/rt5659.c b/sound/soc/codecs/rt5659.c index fb8ea05c0de1..1b30914c2d91 100644 --- a/sound/soc/codecs/rt5659.c +++ b/sound/soc/codecs/rt5659.c | |||
@@ -4176,7 +4176,7 @@ static int rt5659_i2c_remove(struct i2c_client *i2c) | |||
4176 | return 0; | 4176 | return 0; |
4177 | } | 4177 | } |
4178 | 4178 | ||
4179 | void rt5659_i2c_shutdown(struct i2c_client *client) | 4179 | static void rt5659_i2c_shutdown(struct i2c_client *client) |
4180 | { | 4180 | { |
4181 | struct rt5659_priv *rt5659 = i2c_get_clientdata(client); | 4181 | struct rt5659_priv *rt5659 = i2c_get_clientdata(client); |
4182 | 4182 | ||
diff --git a/sound/soc/codecs/ssm4567.c b/sound/soc/codecs/ssm4567.c index e619d5651b09..080c78e88e10 100644 --- a/sound/soc/codecs/ssm4567.c +++ b/sound/soc/codecs/ssm4567.c | |||
@@ -352,6 +352,11 @@ static int ssm4567_set_power(struct ssm4567 *ssm4567, bool enable) | |||
352 | regcache_cache_only(ssm4567->regmap, !enable); | 352 | regcache_cache_only(ssm4567->regmap, !enable); |
353 | 353 | ||
354 | if (enable) { | 354 | if (enable) { |
355 | ret = regmap_write(ssm4567->regmap, SSM4567_REG_SOFT_RESET, | ||
356 | 0x00); | ||
357 | if (ret) | ||
358 | return ret; | ||
359 | |||
355 | ret = regmap_update_bits(ssm4567->regmap, | 360 | ret = regmap_update_bits(ssm4567->regmap, |
356 | SSM4567_REG_POWER_CTRL, | 361 | SSM4567_REG_POWER_CTRL, |
357 | SSM4567_POWER_SPWDN, 0x00); | 362 | SSM4567_POWER_SPWDN, 0x00); |
diff --git a/sound/soc/codecs/wm5102.c b/sound/soc/codecs/wm5102.c index 64637d1cf4e5..a8b3e3f701f9 100644 --- a/sound/soc/codecs/wm5102.c +++ b/sound/soc/codecs/wm5102.c | |||
@@ -619,7 +619,7 @@ static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, | |||
619 | { | 619 | { |
620 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 620 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
621 | struct arizona *arizona = dev_get_drvdata(codec->dev->parent); | 621 | struct arizona *arizona = dev_get_drvdata(codec->dev->parent); |
622 | unsigned int v; | 622 | unsigned int v = 0; |
623 | int ret; | 623 | int ret; |
624 | 624 | ||
625 | switch (event) { | 625 | switch (event) { |
@@ -654,7 +654,7 @@ static int wm5102_adsp_power_ev(struct snd_soc_dapm_widget *w, | |||
654 | break; | 654 | break; |
655 | } | 655 | } |
656 | 656 | ||
657 | return wm_adsp2_early_event(w, kcontrol, event); | 657 | return wm_adsp2_early_event(w, kcontrol, event, v); |
658 | } | 658 | } |
659 | 659 | ||
660 | static int wm5102_out_comp_coeff_get(struct snd_kcontrol *kcontrol, | 660 | static int wm5102_out_comp_coeff_get(struct snd_kcontrol *kcontrol, |
@@ -1408,7 +1408,7 @@ ARIZONA_MUX_WIDGETS(ISRC2DEC2, "ISRC2DEC2"), | |||
1408 | ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), | 1408 | ARIZONA_MUX_WIDGETS(ISRC2INT1, "ISRC2INT1"), |
1409 | ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), | 1409 | ARIZONA_MUX_WIDGETS(ISRC2INT2, "ISRC2INT2"), |
1410 | 1410 | ||
1411 | WM_ADSP2_E("DSP1", 0, wm5102_adsp_power_ev), | 1411 | WM_ADSP2("DSP1", 0, wm5102_adsp_power_ev), |
1412 | 1412 | ||
1413 | SND_SOC_DAPM_OUTPUT("HPOUT1L"), | 1413 | SND_SOC_DAPM_OUTPUT("HPOUT1L"), |
1414 | SND_SOC_DAPM_OUTPUT("HPOUT1R"), | 1414 | SND_SOC_DAPM_OUTPUT("HPOUT1R"), |
@@ -1599,6 +1599,9 @@ static const struct snd_soc_dapm_route wm5102_dapm_routes[] = { | |||
1599 | { "Slim2 Capture", NULL, "SYSCLK" }, | 1599 | { "Slim2 Capture", NULL, "SYSCLK" }, |
1600 | { "Slim3 Capture", NULL, "SYSCLK" }, | 1600 | { "Slim3 Capture", NULL, "SYSCLK" }, |
1601 | 1601 | ||
1602 | { "Audio Trace DSP", NULL, "DSP1" }, | ||
1603 | { "Audio Trace DSP", NULL, "SYSCLK" }, | ||
1604 | |||
1602 | { "IN1L PGA", NULL, "IN1L" }, | 1605 | { "IN1L PGA", NULL, "IN1L" }, |
1603 | { "IN1R PGA", NULL, "IN1R" }, | 1606 | { "IN1R PGA", NULL, "IN1R" }, |
1604 | 1607 | ||
@@ -1735,7 +1738,7 @@ static int wm5102_set_fll(struct snd_soc_codec *codec, int fll_id, int source, | |||
1735 | } | 1738 | } |
1736 | } | 1739 | } |
1737 | 1740 | ||
1738 | #define WM5102_RATES SNDRV_PCM_RATE_8000_192000 | 1741 | #define WM5102_RATES SNDRV_PCM_RATE_KNOT |
1739 | 1742 | ||
1740 | #define WM5102_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | 1743 | #define WM5102_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
1741 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | 1744 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
@@ -1864,14 +1867,67 @@ static struct snd_soc_dai_driver wm5102_dai[] = { | |||
1864 | }, | 1867 | }, |
1865 | .ops = &arizona_simple_dai_ops, | 1868 | .ops = &arizona_simple_dai_ops, |
1866 | }, | 1869 | }, |
1870 | { | ||
1871 | .name = "wm5102-cpu-trace", | ||
1872 | .capture = { | ||
1873 | .stream_name = "Audio Trace CPU", | ||
1874 | .channels_min = 1, | ||
1875 | .channels_max = 6, | ||
1876 | .rates = WM5102_RATES, | ||
1877 | .formats = WM5102_FORMATS, | ||
1878 | }, | ||
1879 | .compress_new = snd_soc_new_compress, | ||
1880 | }, | ||
1881 | { | ||
1882 | .name = "wm5102-dsp-trace", | ||
1883 | .capture = { | ||
1884 | .stream_name = "Audio Trace DSP", | ||
1885 | .channels_min = 1, | ||
1886 | .channels_max = 4, | ||
1887 | .rates = WM5102_RATES, | ||
1888 | .formats = WM5102_FORMATS, | ||
1889 | }, | ||
1890 | }, | ||
1867 | }; | 1891 | }; |
1868 | 1892 | ||
1893 | static int wm5102_open(struct snd_compr_stream *stream) | ||
1894 | { | ||
1895 | struct snd_soc_pcm_runtime *rtd = stream->private_data; | ||
1896 | struct wm5102_priv *priv = snd_soc_codec_get_drvdata(rtd->codec); | ||
1897 | |||
1898 | return wm_adsp_compr_open(&priv->core.adsp[0], stream); | ||
1899 | } | ||
1900 | |||
1901 | static irqreturn_t wm5102_adsp2_irq(int irq, void *data) | ||
1902 | { | ||
1903 | struct wm5102_priv *priv = data; | ||
1904 | struct arizona *arizona = priv->core.arizona; | ||
1905 | int ret; | ||
1906 | |||
1907 | ret = wm_adsp_compr_handle_irq(&priv->core.adsp[0]); | ||
1908 | if (ret == -ENODEV) { | ||
1909 | dev_err(arizona->dev, "Spurious compressed data IRQ\n"); | ||
1910 | return IRQ_NONE; | ||
1911 | } | ||
1912 | |||
1913 | return IRQ_HANDLED; | ||
1914 | } | ||
1915 | |||
1869 | static int wm5102_codec_probe(struct snd_soc_codec *codec) | 1916 | static int wm5102_codec_probe(struct snd_soc_codec *codec) |
1870 | { | 1917 | { |
1871 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); | 1918 | struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); |
1872 | struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); | 1919 | struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec); |
1920 | struct arizona *arizona = priv->core.arizona; | ||
1873 | int ret; | 1921 | int ret; |
1874 | 1922 | ||
1923 | ret = arizona_request_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, | ||
1924 | "ADSP2 Compressed IRQ", wm5102_adsp2_irq, | ||
1925 | priv); | ||
1926 | if (ret != 0) { | ||
1927 | dev_err(codec->dev, "Failed to request DSP IRQ: %d\n", ret); | ||
1928 | return ret; | ||
1929 | } | ||
1930 | |||
1875 | ret = wm_adsp2_codec_probe(&priv->core.adsp[0], codec); | 1931 | ret = wm_adsp2_codec_probe(&priv->core.adsp[0], codec); |
1876 | if (ret) | 1932 | if (ret) |
1877 | return ret; | 1933 | return ret; |
@@ -1946,6 +2002,20 @@ static struct snd_soc_codec_driver soc_codec_dev_wm5102 = { | |||
1946 | .num_dapm_routes = ARRAY_SIZE(wm5102_dapm_routes), | 2002 | .num_dapm_routes = ARRAY_SIZE(wm5102_dapm_routes), |
1947 | }; | 2003 | }; |
1948 | 2004 | ||
2005 | static struct snd_compr_ops wm5102_compr_ops = { | ||
2006 | .open = wm5102_open, | ||
2007 | .free = wm_adsp_compr_free, | ||
2008 | .set_params = wm_adsp_compr_set_params, | ||
2009 | .get_caps = wm_adsp_compr_get_caps, | ||
2010 | .trigger = wm_adsp_compr_trigger, | ||
2011 | .pointer = wm_adsp_compr_pointer, | ||
2012 | .copy = wm_adsp_compr_copy, | ||
2013 | }; | ||
2014 | |||
2015 | static struct snd_soc_platform_driver wm5102_compr_platform = { | ||
2016 | .compr_ops = &wm5102_compr_ops, | ||
2017 | }; | ||
2018 | |||
1949 | static int wm5102_probe(struct platform_device *pdev) | 2019 | static int wm5102_probe(struct platform_device *pdev) |
1950 | { | 2020 | { |
1951 | struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); | 2021 | struct arizona *arizona = dev_get_drvdata(pdev->dev.parent); |
@@ -2005,12 +2075,25 @@ static int wm5102_probe(struct platform_device *pdev) | |||
2005 | pm_runtime_enable(&pdev->dev); | 2075 | pm_runtime_enable(&pdev->dev); |
2006 | pm_runtime_idle(&pdev->dev); | 2076 | pm_runtime_idle(&pdev->dev); |
2007 | 2077 | ||
2008 | return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, | 2078 | ret = snd_soc_register_platform(&pdev->dev, &wm5102_compr_platform); |
2079 | if (ret < 0) { | ||
2080 | dev_err(&pdev->dev, "Failed to register platform: %d\n", ret); | ||
2081 | return ret; | ||
2082 | } | ||
2083 | |||
2084 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5102, | ||
2009 | wm5102_dai, ARRAY_SIZE(wm5102_dai)); | 2085 | wm5102_dai, ARRAY_SIZE(wm5102_dai)); |
2086 | if (ret < 0) { | ||
2087 | dev_err(&pdev->dev, "Failed to register codec: %d\n", ret); | ||
2088 | snd_soc_unregister_platform(&pdev->dev); | ||
2089 | } | ||
2090 | |||
2091 | return ret; | ||
2010 | } | 2092 | } |
2011 | 2093 | ||
2012 | static int wm5102_remove(struct platform_device *pdev) | 2094 | static int wm5102_remove(struct platform_device *pdev) |
2013 | { | 2095 | { |
2096 | snd_soc_unregister_platform(&pdev->dev); | ||
2014 | snd_soc_unregister_codec(&pdev->dev); | 2097 | snd_soc_unregister_codec(&pdev->dev); |
2015 | pm_runtime_disable(&pdev->dev); | 2098 | pm_runtime_disable(&pdev->dev); |
2016 | 2099 | ||
diff --git a/sound/soc/codecs/wm5110.c b/sound/soc/codecs/wm5110.c index 97c0f1e23886..83ba70fe16e6 100644 --- a/sound/soc/codecs/wm5110.c +++ b/sound/soc/codecs/wm5110.c | |||
@@ -191,6 +191,25 @@ static int wm5110_sysclk_ev(struct snd_soc_dapm_widget *w, | |||
191 | return 0; | 191 | return 0; |
192 | } | 192 | } |
193 | 193 | ||
194 | static int wm5110_adsp_power_ev(struct snd_soc_dapm_widget *w, | ||
195 | struct snd_kcontrol *kcontrol, int event) | ||
196 | { | ||
197 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | ||
198 | struct arizona *arizona = dev_get_drvdata(codec->dev->parent); | ||
199 | unsigned int v; | ||
200 | int ret; | ||
201 | |||
202 | ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &v); | ||
203 | if (ret != 0) { | ||
204 | dev_err(codec->dev, "Failed to read SYSCLK state: %d\n", ret); | ||
205 | return ret; | ||
206 | } | ||
207 | |||
208 | v = (v & ARIZONA_SYSCLK_FREQ_MASK) >> ARIZONA_SYSCLK_FREQ_SHIFT; | ||
209 | |||
210 | return wm_adsp2_early_event(w, kcontrol, event, v); | ||
211 | } | ||
212 | |||
194 | static const struct reg_sequence wm5110_no_dre_left_enable[] = { | 213 | static const struct reg_sequence wm5110_no_dre_left_enable[] = { |
195 | { 0x3024, 0xE410 }, | 214 | { 0x3024, 0xE410 }, |
196 | { 0x3025, 0x0056 }, | 215 | { 0x3025, 0x0056 }, |
@@ -1179,10 +1198,10 @@ SND_SOC_DAPM_PGA("ASRC2L", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2L_ENA_SHIFT, 0, | |||
1179 | SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, | 1198 | SND_SOC_DAPM_PGA("ASRC2R", ARIZONA_ASRC_ENABLE, ARIZONA_ASRC2R_ENA_SHIFT, 0, |
1180 | NULL, 0), | 1199 | NULL, 0), |
1181 | 1200 | ||
1182 | WM_ADSP2("DSP1", 0), | 1201 | WM_ADSP2("DSP1", 0, wm5110_adsp_power_ev), |
1183 | WM_ADSP2("DSP2", 1), | 1202 | WM_ADSP2("DSP2", 1, wm5110_adsp_power_ev), |
1184 | WM_ADSP2("DSP3", 2), | 1203 | WM_ADSP2("DSP3", 2, wm5110_adsp_power_ev), |
1185 | WM_ADSP2("DSP4", 3), | 1204 | WM_ADSP2("DSP4", 3, wm5110_adsp_power_ev), |
1186 | 1205 | ||
1187 | SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, | 1206 | SND_SOC_DAPM_PGA("ISRC1INT1", ARIZONA_ISRC_1_CTRL_3, |
1188 | ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), | 1207 | ARIZONA_ISRC1_INT0_ENA_SHIFT, 0, NULL, 0), |
@@ -1809,6 +1828,9 @@ static const struct snd_soc_dapm_route wm5110_dapm_routes[] = { | |||
1809 | { "Voice Control DSP", NULL, "DSP3" }, | 1828 | { "Voice Control DSP", NULL, "DSP3" }, |
1810 | { "Voice Control DSP", NULL, "SYSCLK" }, | 1829 | { "Voice Control DSP", NULL, "SYSCLK" }, |
1811 | 1830 | ||
1831 | { "Audio Trace DSP", NULL, "DSP1" }, | ||
1832 | { "Audio Trace DSP", NULL, "SYSCLK" }, | ||
1833 | |||
1812 | { "IN1L PGA", NULL, "IN1L" }, | 1834 | { "IN1L PGA", NULL, "IN1L" }, |
1813 | { "IN1R PGA", NULL, "IN1R" }, | 1835 | { "IN1R PGA", NULL, "IN1R" }, |
1814 | 1836 | ||
@@ -2002,7 +2024,7 @@ static int wm5110_set_fll(struct snd_soc_codec *codec, int fll_id, int source, | |||
2002 | } | 2024 | } |
2003 | } | 2025 | } |
2004 | 2026 | ||
2005 | #define WM5110_RATES SNDRV_PCM_RATE_8000_192000 | 2027 | #define WM5110_RATES SNDRV_PCM_RATE_KNOT |
2006 | 2028 | ||
2007 | #define WM5110_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | 2029 | #define WM5110_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
2008 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | 2030 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
@@ -2152,6 +2174,27 @@ static struct snd_soc_dai_driver wm5110_dai[] = { | |||
2152 | .formats = WM5110_FORMATS, | 2174 | .formats = WM5110_FORMATS, |
2153 | }, | 2175 | }, |
2154 | }, | 2176 | }, |
2177 | { | ||
2178 | .name = "wm5110-cpu-trace", | ||
2179 | .capture = { | ||
2180 | .stream_name = "Audio Trace CPU", | ||
2181 | .channels_min = 1, | ||
2182 | .channels_max = 6, | ||
2183 | .rates = WM5110_RATES, | ||
2184 | .formats = WM5110_FORMATS, | ||
2185 | }, | ||
2186 | .compress_new = snd_soc_new_compress, | ||
2187 | }, | ||
2188 | { | ||
2189 | .name = "wm5110-dsp-trace", | ||
2190 | .capture = { | ||
2191 | .stream_name = "Audio Trace DSP", | ||
2192 | .channels_min = 1, | ||
2193 | .channels_max = 6, | ||
2194 | .rates = WM5110_RATES, | ||
2195 | .formats = WM5110_FORMATS, | ||
2196 | }, | ||
2197 | }, | ||
2155 | }; | 2198 | }; |
2156 | 2199 | ||
2157 | static int wm5110_open(struct snd_compr_stream *stream) | 2200 | static int wm5110_open(struct snd_compr_stream *stream) |
@@ -2163,6 +2206,8 @@ static int wm5110_open(struct snd_compr_stream *stream) | |||
2163 | 2206 | ||
2164 | if (strcmp(rtd->codec_dai->name, "wm5110-dsp-voicectrl") == 0) { | 2207 | if (strcmp(rtd->codec_dai->name, "wm5110-dsp-voicectrl") == 0) { |
2165 | n_adsp = 2; | 2208 | n_adsp = 2; |
2209 | } else if (strcmp(rtd->codec_dai->name, "wm5110-dsp-trace") == 0) { | ||
2210 | n_adsp = 0; | ||
2166 | } else { | 2211 | } else { |
2167 | dev_err(arizona->dev, | 2212 | dev_err(arizona->dev, |
2168 | "No suitable compressed stream for DAI '%s'\n", | 2213 | "No suitable compressed stream for DAI '%s'\n", |
@@ -2175,12 +2220,21 @@ static int wm5110_open(struct snd_compr_stream *stream) | |||
2175 | 2220 | ||
2176 | static irqreturn_t wm5110_adsp2_irq(int irq, void *data) | 2221 | static irqreturn_t wm5110_adsp2_irq(int irq, void *data) |
2177 | { | 2222 | { |
2178 | struct wm5110_priv *florida = data; | 2223 | struct wm5110_priv *priv = data; |
2179 | int ret; | 2224 | struct arizona *arizona = priv->core.arizona; |
2225 | int serviced = 0; | ||
2226 | int i, ret; | ||
2180 | 2227 | ||
2181 | ret = wm_adsp_compr_handle_irq(&florida->core.adsp[2]); | 2228 | for (i = 0; i < WM5110_NUM_ADSP; ++i) { |
2182 | if (ret == -ENODEV) | 2229 | ret = wm_adsp_compr_handle_irq(&priv->core.adsp[i]); |
2230 | if (ret != -ENODEV) | ||
2231 | serviced++; | ||
2232 | } | ||
2233 | |||
2234 | if (!serviced) { | ||
2235 | dev_err(arizona->dev, "Spurious compressed data IRQ\n"); | ||
2183 | return IRQ_NONE; | 2236 | return IRQ_NONE; |
2237 | } | ||
2184 | 2238 | ||
2185 | return IRQ_HANDLED; | 2239 | return IRQ_HANDLED; |
2186 | } | 2240 | } |
@@ -2366,7 +2420,7 @@ static int wm5110_probe(struct platform_device *pdev) | |||
2366 | ret = snd_soc_register_platform(&pdev->dev, &wm5110_compr_platform); | 2420 | ret = snd_soc_register_platform(&pdev->dev, &wm5110_compr_platform); |
2367 | if (ret < 0) { | 2421 | if (ret < 0) { |
2368 | dev_err(&pdev->dev, "Failed to register platform: %d\n", ret); | 2422 | dev_err(&pdev->dev, "Failed to register platform: %d\n", ret); |
2369 | goto error; | 2423 | return ret; |
2370 | } | 2424 | } |
2371 | 2425 | ||
2372 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5110, | 2426 | ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_wm5110, |
@@ -2376,7 +2430,6 @@ static int wm5110_probe(struct platform_device *pdev) | |||
2376 | snd_soc_unregister_platform(&pdev->dev); | 2430 | snd_soc_unregister_platform(&pdev->dev); |
2377 | } | 2431 | } |
2378 | 2432 | ||
2379 | error: | ||
2380 | return ret; | 2433 | return ret; |
2381 | } | 2434 | } |
2382 | 2435 | ||
diff --git a/sound/soc/codecs/wm8974.c b/sound/soc/codecs/wm8974.c index c284c7b6db8b..dc8c3b1ebb6f 100644 --- a/sound/soc/codecs/wm8974.c +++ b/sound/soc/codecs/wm8974.c | |||
@@ -28,6 +28,11 @@ | |||
28 | 28 | ||
29 | #include "wm8974.h" | 29 | #include "wm8974.h" |
30 | 30 | ||
31 | struct wm8974_priv { | ||
32 | unsigned int mclk; | ||
33 | unsigned int fs; | ||
34 | }; | ||
35 | |||
31 | static const struct reg_default wm8974_reg_defaults[] = { | 36 | static const struct reg_default wm8974_reg_defaults[] = { |
32 | { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 }, | 37 | { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 }, |
33 | { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 }, | 38 | { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 }, |
@@ -379,6 +384,79 @@ static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai, | |||
379 | return 0; | 384 | return 0; |
380 | } | 385 | } |
381 | 386 | ||
387 | static unsigned int wm8974_get_mclkdiv(unsigned int f_in, unsigned int f_out, | ||
388 | int *mclkdiv) | ||
389 | { | ||
390 | unsigned int ratio = 2 * f_in / f_out; | ||
391 | |||
392 | if (ratio <= 2) { | ||
393 | *mclkdiv = WM8974_MCLKDIV_1; | ||
394 | ratio = 2; | ||
395 | } else if (ratio == 3) { | ||
396 | *mclkdiv = WM8974_MCLKDIV_1_5; | ||
397 | } else if (ratio == 4) { | ||
398 | *mclkdiv = WM8974_MCLKDIV_2; | ||
399 | } else if (ratio <= 6) { | ||
400 | *mclkdiv = WM8974_MCLKDIV_3; | ||
401 | ratio = 6; | ||
402 | } else if (ratio <= 8) { | ||
403 | *mclkdiv = WM8974_MCLKDIV_4; | ||
404 | ratio = 8; | ||
405 | } else if (ratio <= 12) { | ||
406 | *mclkdiv = WM8974_MCLKDIV_6; | ||
407 | ratio = 12; | ||
408 | } else if (ratio <= 16) { | ||
409 | *mclkdiv = WM8974_MCLKDIV_8; | ||
410 | ratio = 16; | ||
411 | } else { | ||
412 | *mclkdiv = WM8974_MCLKDIV_12; | ||
413 | ratio = 24; | ||
414 | } | ||
415 | |||
416 | return f_out * ratio / 2; | ||
417 | } | ||
418 | |||
419 | static int wm8974_update_clocks(struct snd_soc_dai *dai) | ||
420 | { | ||
421 | struct snd_soc_codec *codec = dai->codec; | ||
422 | struct wm8974_priv *priv = snd_soc_codec_get_drvdata(codec); | ||
423 | unsigned int fs256; | ||
424 | unsigned int fpll = 0; | ||
425 | unsigned int f; | ||
426 | int mclkdiv; | ||
427 | |||
428 | if (!priv->mclk || !priv->fs) | ||
429 | return 0; | ||
430 | |||
431 | fs256 = 256 * priv->fs; | ||
432 | |||
433 | f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv); | ||
434 | |||
435 | if (f != priv->mclk) { | ||
436 | /* The PLL performs best around 90MHz */ | ||
437 | fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv); | ||
438 | } | ||
439 | |||
440 | wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll); | ||
441 | wm8974_set_dai_clkdiv(dai, WM8974_MCLKDIV, mclkdiv); | ||
442 | |||
443 | return 0; | ||
444 | } | ||
445 | |||
446 | static int wm8974_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, | ||
447 | unsigned int freq, int dir) | ||
448 | { | ||
449 | struct snd_soc_codec *codec = dai->codec; | ||
450 | struct wm8974_priv *priv = snd_soc_codec_get_drvdata(codec); | ||
451 | |||
452 | if (dir != SND_SOC_CLOCK_IN) | ||
453 | return -EINVAL; | ||
454 | |||
455 | priv->mclk = freq; | ||
456 | |||
457 | return wm8974_update_clocks(dai); | ||
458 | } | ||
459 | |||
382 | static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai, | 460 | static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai, |
383 | unsigned int fmt) | 461 | unsigned int fmt) |
384 | { | 462 | { |
@@ -441,8 +519,15 @@ static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream, | |||
441 | struct snd_soc_dai *dai) | 519 | struct snd_soc_dai *dai) |
442 | { | 520 | { |
443 | struct snd_soc_codec *codec = dai->codec; | 521 | struct snd_soc_codec *codec = dai->codec; |
522 | struct wm8974_priv *priv = snd_soc_codec_get_drvdata(codec); | ||
444 | u16 iface = snd_soc_read(codec, WM8974_IFACE) & 0x19f; | 523 | u16 iface = snd_soc_read(codec, WM8974_IFACE) & 0x19f; |
445 | u16 adn = snd_soc_read(codec, WM8974_ADD) & 0x1f1; | 524 | u16 adn = snd_soc_read(codec, WM8974_ADD) & 0x1f1; |
525 | int err; | ||
526 | |||
527 | priv->fs = params_rate(params); | ||
528 | err = wm8974_update_clocks(dai); | ||
529 | if (err) | ||
530 | return err; | ||
446 | 531 | ||
447 | /* bit size */ | 532 | /* bit size */ |
448 | switch (params_width(params)) { | 533 | switch (params_width(params)) { |
@@ -547,6 +632,7 @@ static const struct snd_soc_dai_ops wm8974_ops = { | |||
547 | .set_fmt = wm8974_set_dai_fmt, | 632 | .set_fmt = wm8974_set_dai_fmt, |
548 | .set_clkdiv = wm8974_set_dai_clkdiv, | 633 | .set_clkdiv = wm8974_set_dai_clkdiv, |
549 | .set_pll = wm8974_set_dai_pll, | 634 | .set_pll = wm8974_set_dai_pll, |
635 | .set_sysclk = wm8974_set_dai_sysclk, | ||
550 | }; | 636 | }; |
551 | 637 | ||
552 | static struct snd_soc_dai_driver wm8974_dai = { | 638 | static struct snd_soc_dai_driver wm8974_dai = { |
@@ -606,9 +692,16 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8974 = { | |||
606 | static int wm8974_i2c_probe(struct i2c_client *i2c, | 692 | static int wm8974_i2c_probe(struct i2c_client *i2c, |
607 | const struct i2c_device_id *id) | 693 | const struct i2c_device_id *id) |
608 | { | 694 | { |
695 | struct wm8974_priv *priv; | ||
609 | struct regmap *regmap; | 696 | struct regmap *regmap; |
610 | int ret; | 697 | int ret; |
611 | 698 | ||
699 | priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL); | ||
700 | if (!priv) | ||
701 | return -ENOMEM; | ||
702 | |||
703 | i2c_set_clientdata(i2c, priv); | ||
704 | |||
612 | regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap); | 705 | regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap); |
613 | if (IS_ERR(regmap)) | 706 | if (IS_ERR(regmap)) |
614 | return PTR_ERR(regmap); | 707 | return PTR_ERR(regmap); |
diff --git a/sound/soc/codecs/wm8997.c b/sound/soc/codecs/wm8997.c index b4dba3a02aba..52d766efe14f 100644 --- a/sound/soc/codecs/wm8997.c +++ b/sound/soc/codecs/wm8997.c | |||
@@ -943,7 +943,7 @@ static int wm8997_set_fll(struct snd_soc_codec *codec, int fll_id, int source, | |||
943 | } | 943 | } |
944 | } | 944 | } |
945 | 945 | ||
946 | #define WM8997_RATES SNDRV_PCM_RATE_8000_192000 | 946 | #define WM8997_RATES SNDRV_PCM_RATE_KNOT |
947 | 947 | ||
948 | #define WM8997_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | 948 | #define WM8997_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
949 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | 949 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
diff --git a/sound/soc/codecs/wm8998.c b/sound/soc/codecs/wm8998.c index 7719bc509e50..012396074a8a 100644 --- a/sound/soc/codecs/wm8998.c +++ b/sound/soc/codecs/wm8998.c | |||
@@ -1170,7 +1170,7 @@ static const struct snd_soc_dapm_route wm8998_dapm_routes[] = { | |||
1170 | { "DRC1 Signal Activity", NULL, "DRC1R" }, | 1170 | { "DRC1 Signal Activity", NULL, "DRC1R" }, |
1171 | }; | 1171 | }; |
1172 | 1172 | ||
1173 | #define WM8998_RATES SNDRV_PCM_RATE_8000_192000 | 1173 | #define WM8998_RATES SNDRV_PCM_RATE_KNOT |
1174 | 1174 | ||
1175 | #define WM8998_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ | 1175 | #define WM8998_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ |
1176 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) | 1176 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) |
diff --git a/sound/soc/codecs/wm_adsp.c b/sound/soc/codecs/wm_adsp.c index b9195b9c2b05..d3b1cb15e7f0 100644 --- a/sound/soc/codecs/wm_adsp.c +++ b/sound/soc/codecs/wm_adsp.c | |||
@@ -32,9 +32,6 @@ | |||
32 | #include <sound/initval.h> | 32 | #include <sound/initval.h> |
33 | #include <sound/tlv.h> | 33 | #include <sound/tlv.h> |
34 | 34 | ||
35 | #include <linux/mfd/arizona/registers.h> | ||
36 | |||
37 | #include "arizona.h" | ||
38 | #include "wm_adsp.h" | 35 | #include "wm_adsp.h" |
39 | 36 | ||
40 | #define adsp_crit(_dsp, fmt, ...) \ | 37 | #define adsp_crit(_dsp, fmt, ...) \ |
@@ -295,6 +292,8 @@ struct wm_adsp_compr { | |||
295 | 292 | ||
296 | u32 *raw_buf; | 293 | u32 *raw_buf; |
297 | unsigned int copied_total; | 294 | unsigned int copied_total; |
295 | |||
296 | unsigned int sample_rate; | ||
298 | }; | 297 | }; |
299 | 298 | ||
300 | #define WM_ADSP_DATA_WORD_SIZE 3 | 299 | #define WM_ADSP_DATA_WORD_SIZE 3 |
@@ -328,7 +327,7 @@ struct wm_adsp_buffer_region_def { | |||
328 | unsigned int size_offset; | 327 | unsigned int size_offset; |
329 | }; | 328 | }; |
330 | 329 | ||
331 | static struct wm_adsp_buffer_region_def ez2control_regions[] = { | 330 | static const struct wm_adsp_buffer_region_def default_regions[] = { |
332 | { | 331 | { |
333 | .mem_type = WMFW_ADSP2_XM, | 332 | .mem_type = WMFW_ADSP2_XM, |
334 | .base_offset = HOST_BUFFER_FIELD(X_buf_base), | 333 | .base_offset = HOST_BUFFER_FIELD(X_buf_base), |
@@ -350,10 +349,10 @@ struct wm_adsp_fw_caps { | |||
350 | u32 id; | 349 | u32 id; |
351 | struct snd_codec_desc desc; | 350 | struct snd_codec_desc desc; |
352 | int num_regions; | 351 | int num_regions; |
353 | struct wm_adsp_buffer_region_def *region_defs; | 352 | const struct wm_adsp_buffer_region_def *region_defs; |
354 | }; | 353 | }; |
355 | 354 | ||
356 | static const struct wm_adsp_fw_caps ez2control_caps[] = { | 355 | static const struct wm_adsp_fw_caps ctrl_caps[] = { |
357 | { | 356 | { |
358 | .id = SND_AUDIOCODEC_BESPOKE, | 357 | .id = SND_AUDIOCODEC_BESPOKE, |
359 | .desc = { | 358 | .desc = { |
@@ -362,8 +361,26 @@ static const struct wm_adsp_fw_caps ez2control_caps[] = { | |||
362 | .num_sample_rates = 1, | 361 | .num_sample_rates = 1, |
363 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 362 | .formats = SNDRV_PCM_FMTBIT_S16_LE, |
364 | }, | 363 | }, |
365 | .num_regions = ARRAY_SIZE(ez2control_regions), | 364 | .num_regions = ARRAY_SIZE(default_regions), |
366 | .region_defs = ez2control_regions, | 365 | .region_defs = default_regions, |
366 | }, | ||
367 | }; | ||
368 | |||
369 | static const struct wm_adsp_fw_caps trace_caps[] = { | ||
370 | { | ||
371 | .id = SND_AUDIOCODEC_BESPOKE, | ||
372 | .desc = { | ||
373 | .max_ch = 8, | ||
374 | .sample_rates = { | ||
375 | 4000, 8000, 11025, 12000, 16000, 22050, | ||
376 | 24000, 32000, 44100, 48000, 64000, 88200, | ||
377 | 96000, 176400, 192000 | ||
378 | }, | ||
379 | .num_sample_rates = 15, | ||
380 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | ||
381 | }, | ||
382 | .num_regions = ARRAY_SIZE(default_regions), | ||
383 | .region_defs = default_regions, | ||
367 | }, | 384 | }, |
368 | }; | 385 | }; |
369 | 386 | ||
@@ -382,11 +399,16 @@ static const struct { | |||
382 | [WM_ADSP_FW_CTRL] = { | 399 | [WM_ADSP_FW_CTRL] = { |
383 | .file = "ctrl", | 400 | .file = "ctrl", |
384 | .compr_direction = SND_COMPRESS_CAPTURE, | 401 | .compr_direction = SND_COMPRESS_CAPTURE, |
385 | .num_caps = ARRAY_SIZE(ez2control_caps), | 402 | .num_caps = ARRAY_SIZE(ctrl_caps), |
386 | .caps = ez2control_caps, | 403 | .caps = ctrl_caps, |
387 | }, | 404 | }, |
388 | [WM_ADSP_FW_ASR] = { .file = "asr" }, | 405 | [WM_ADSP_FW_ASR] = { .file = "asr" }, |
389 | [WM_ADSP_FW_TRACE] = { .file = "trace" }, | 406 | [WM_ADSP_FW_TRACE] = { |
407 | .file = "trace", | ||
408 | .compr_direction = SND_COMPRESS_CAPTURE, | ||
409 | .num_caps = ARRAY_SIZE(trace_caps), | ||
410 | .caps = trace_caps, | ||
411 | }, | ||
390 | [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" }, | 412 | [WM_ADSP_FW_SPK_PROT] = { .file = "spk-prot" }, |
391 | [WM_ADSP_FW_MISC] = { .file = "misc" }, | 413 | [WM_ADSP_FW_MISC] = { .file = "misc" }, |
392 | }; | 414 | }; |
@@ -719,19 +741,19 @@ static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, | |||
719 | reg = ctl->alg_region.base + ctl->offset; | 741 | reg = ctl->alg_region.base + ctl->offset; |
720 | reg = wm_adsp_region_to_reg(mem, reg); | 742 | reg = wm_adsp_region_to_reg(mem, reg); |
721 | 743 | ||
722 | scratch = kmemdup(buf, ctl->len, GFP_KERNEL | GFP_DMA); | 744 | scratch = kmemdup(buf, len, GFP_KERNEL | GFP_DMA); |
723 | if (!scratch) | 745 | if (!scratch) |
724 | return -ENOMEM; | 746 | return -ENOMEM; |
725 | 747 | ||
726 | ret = regmap_raw_write(dsp->regmap, reg, scratch, | 748 | ret = regmap_raw_write(dsp->regmap, reg, scratch, |
727 | ctl->len); | 749 | len); |
728 | if (ret) { | 750 | if (ret) { |
729 | adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", | 751 | adsp_err(dsp, "Failed to write %zu bytes to %x: %d\n", |
730 | ctl->len, reg, ret); | 752 | len, reg, ret); |
731 | kfree(scratch); | 753 | kfree(scratch); |
732 | return ret; | 754 | return ret; |
733 | } | 755 | } |
734 | adsp_dbg(dsp, "Wrote %zu bytes to %x\n", ctl->len, reg); | 756 | adsp_dbg(dsp, "Wrote %zu bytes to %x\n", len, reg); |
735 | 757 | ||
736 | kfree(scratch); | 758 | kfree(scratch); |
737 | 759 | ||
@@ -778,20 +800,20 @@ static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, | |||
778 | reg = ctl->alg_region.base + ctl->offset; | 800 | reg = ctl->alg_region.base + ctl->offset; |
779 | reg = wm_adsp_region_to_reg(mem, reg); | 801 | reg = wm_adsp_region_to_reg(mem, reg); |
780 | 802 | ||
781 | scratch = kmalloc(ctl->len, GFP_KERNEL | GFP_DMA); | 803 | scratch = kmalloc(len, GFP_KERNEL | GFP_DMA); |
782 | if (!scratch) | 804 | if (!scratch) |
783 | return -ENOMEM; | 805 | return -ENOMEM; |
784 | 806 | ||
785 | ret = regmap_raw_read(dsp->regmap, reg, scratch, ctl->len); | 807 | ret = regmap_raw_read(dsp->regmap, reg, scratch, len); |
786 | if (ret) { | 808 | if (ret) { |
787 | adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", | 809 | adsp_err(dsp, "Failed to read %zu bytes from %x: %d\n", |
788 | ctl->len, reg, ret); | 810 | len, reg, ret); |
789 | kfree(scratch); | 811 | kfree(scratch); |
790 | return ret; | 812 | return ret; |
791 | } | 813 | } |
792 | adsp_dbg(dsp, "Read %zu bytes from %x\n", ctl->len, reg); | 814 | adsp_dbg(dsp, "Read %zu bytes from %x\n", len, reg); |
793 | 815 | ||
794 | memcpy(buf, scratch, ctl->len); | 816 | memcpy(buf, scratch, len); |
795 | kfree(scratch); | 817 | kfree(scratch); |
796 | 818 | ||
797 | return 0; | 819 | return 0; |
@@ -855,17 +877,18 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl) | |||
855 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ; | 877 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_READ; |
856 | if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) | 878 | if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) |
857 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; | 879 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; |
880 | } else { | ||
881 | kcontrol->access = SNDRV_CTL_ELEM_ACCESS_READWRITE; | ||
882 | kcontrol->access |= SNDRV_CTL_ELEM_ACCESS_VOLATILE; | ||
858 | } | 883 | } |
859 | 884 | ||
860 | ret = snd_soc_add_card_controls(dsp->card, | 885 | ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1); |
861 | kcontrol, 1); | ||
862 | if (ret < 0) | 886 | if (ret < 0) |
863 | goto err_kcontrol; | 887 | goto err_kcontrol; |
864 | 888 | ||
865 | kfree(kcontrol); | 889 | kfree(kcontrol); |
866 | 890 | ||
867 | ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, | 891 | ctl->kcontrol = snd_soc_card_get_kcontrol(dsp->card, ctl->name); |
868 | ctl->name); | ||
869 | 892 | ||
870 | return 0; | 893 | return 0; |
871 | 894 | ||
@@ -885,9 +908,7 @@ static int wm_coeff_init_control_caches(struct wm_adsp *dsp) | |||
885 | if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) | 908 | if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) |
886 | continue; | 909 | continue; |
887 | 910 | ||
888 | ret = wm_coeff_read_control(ctl, | 911 | ret = wm_coeff_read_control(ctl, ctl->cache, ctl->len); |
889 | ctl->cache, | ||
890 | ctl->len); | ||
891 | if (ret < 0) | 912 | if (ret < 0) |
892 | return ret; | 913 | return ret; |
893 | } | 914 | } |
@@ -904,9 +925,7 @@ static int wm_coeff_sync_controls(struct wm_adsp *dsp) | |||
904 | if (!ctl->enabled) | 925 | if (!ctl->enabled) |
905 | continue; | 926 | continue; |
906 | if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) { | 927 | if (ctl->set && !(ctl->flags & WMFW_CTL_FLAG_VOLATILE)) { |
907 | ret = wm_coeff_write_control(ctl, | 928 | ret = wm_coeff_write_control(ctl, ctl->cache, ctl->len); |
908 | ctl->cache, | ||
909 | ctl->len); | ||
910 | if (ret < 0) | 929 | if (ret < 0) |
911 | return ret; | 930 | return ret; |
912 | } | 931 | } |
@@ -1502,8 +1521,7 @@ static void *wm_adsp_read_algs(struct wm_adsp *dsp, size_t n_algs, | |||
1502 | 1521 | ||
1503 | ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2); | 1522 | ret = regmap_raw_read(dsp->regmap, pos, alg, len * 2); |
1504 | if (ret != 0) { | 1523 | if (ret != 0) { |
1505 | adsp_err(dsp, "Failed to read algorithm list: %d\n", | 1524 | adsp_err(dsp, "Failed to read algorithm list: %d\n", ret); |
1506 | ret); | ||
1507 | kfree(alg); | 1525 | kfree(alg); |
1508 | return ERR_PTR(ret); | 1526 | return ERR_PTR(ret); |
1509 | } | 1527 | } |
@@ -2002,8 +2020,7 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, | |||
2002 | goto err_mutex; | 2020 | goto err_mutex; |
2003 | } | 2021 | } |
2004 | 2022 | ||
2005 | val = (val & dsp->sysclk_mask) | 2023 | val = (val & dsp->sysclk_mask) >> dsp->sysclk_shift; |
2006 | >> dsp->sysclk_shift; | ||
2007 | 2024 | ||
2008 | ret = regmap_update_bits(dsp->regmap, | 2025 | ret = regmap_update_bits(dsp->regmap, |
2009 | dsp->base + ADSP1_CONTROL_31, | 2026 | dsp->base + ADSP1_CONTROL_31, |
@@ -2096,8 +2113,7 @@ static int wm_adsp2_ena(struct wm_adsp *dsp) | |||
2096 | 2113 | ||
2097 | /* Wait for the RAM to start, should be near instantaneous */ | 2114 | /* Wait for the RAM to start, should be near instantaneous */ |
2098 | for (count = 0; count < 10; ++count) { | 2115 | for (count = 0; count < 10; ++count) { |
2099 | ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, | 2116 | ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, &val); |
2100 | &val); | ||
2101 | if (ret != 0) | 2117 | if (ret != 0) |
2102 | return ret; | 2118 | return ret; |
2103 | 2119 | ||
@@ -2123,30 +2139,9 @@ static void wm_adsp2_boot_work(struct work_struct *work) | |||
2123 | struct wm_adsp, | 2139 | struct wm_adsp, |
2124 | boot_work); | 2140 | boot_work); |
2125 | int ret; | 2141 | int ret; |
2126 | unsigned int val; | ||
2127 | 2142 | ||
2128 | mutex_lock(&dsp->pwr_lock); | 2143 | mutex_lock(&dsp->pwr_lock); |
2129 | 2144 | ||
2130 | /* | ||
2131 | * For simplicity set the DSP clock rate to be the | ||
2132 | * SYSCLK rate rather than making it configurable. | ||
2133 | */ | ||
2134 | ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); | ||
2135 | if (ret != 0) { | ||
2136 | adsp_err(dsp, "Failed to read SYSCLK state: %d\n", ret); | ||
2137 | goto err_mutex; | ||
2138 | } | ||
2139 | val = (val & ARIZONA_SYSCLK_FREQ_MASK) | ||
2140 | >> ARIZONA_SYSCLK_FREQ_SHIFT; | ||
2141 | |||
2142 | ret = regmap_update_bits_async(dsp->regmap, | ||
2143 | dsp->base + ADSP2_CLOCKING, | ||
2144 | ADSP2_CLK_SEL_MASK, val); | ||
2145 | if (ret != 0) { | ||
2146 | adsp_err(dsp, "Failed to set clock rate: %d\n", ret); | ||
2147 | goto err_mutex; | ||
2148 | } | ||
2149 | |||
2150 | ret = wm_adsp2_ena(dsp); | 2145 | ret = wm_adsp2_ena(dsp); |
2151 | if (ret != 0) | 2146 | if (ret != 0) |
2152 | goto err_mutex; | 2147 | goto err_mutex; |
@@ -2186,8 +2181,21 @@ err_mutex: | |||
2186 | mutex_unlock(&dsp->pwr_lock); | 2181 | mutex_unlock(&dsp->pwr_lock); |
2187 | } | 2182 | } |
2188 | 2183 | ||
2184 | static void wm_adsp2_set_dspclk(struct wm_adsp *dsp, unsigned int freq) | ||
2185 | { | ||
2186 | int ret; | ||
2187 | |||
2188 | ret = regmap_update_bits_async(dsp->regmap, | ||
2189 | dsp->base + ADSP2_CLOCKING, | ||
2190 | ADSP2_CLK_SEL_MASK, | ||
2191 | freq << ADSP2_CLK_SEL_SHIFT); | ||
2192 | if (ret != 0) | ||
2193 | adsp_err(dsp, "Failed to set clock rate: %d\n", ret); | ||
2194 | } | ||
2195 | |||
2189 | int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, | 2196 | int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, |
2190 | struct snd_kcontrol *kcontrol, int event) | 2197 | struct snd_kcontrol *kcontrol, int event, |
2198 | unsigned int freq) | ||
2191 | { | 2199 | { |
2192 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); | 2200 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
2193 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); | 2201 | struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); |
@@ -2197,6 +2205,7 @@ int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, | |||
2197 | 2205 | ||
2198 | switch (event) { | 2206 | switch (event) { |
2199 | case SND_SOC_DAPM_PRE_PMU: | 2207 | case SND_SOC_DAPM_PRE_PMU: |
2208 | wm_adsp2_set_dspclk(dsp, freq); | ||
2200 | queue_work(system_unbound_wq, &dsp->boot_work); | 2209 | queue_work(system_unbound_wq, &dsp->boot_work); |
2201 | break; | 2210 | break; |
2202 | default: | 2211 | default: |
@@ -2471,6 +2480,8 @@ int wm_adsp_compr_set_params(struct snd_compr_stream *stream, | |||
2471 | if (!compr->raw_buf) | 2480 | if (!compr->raw_buf) |
2472 | return -ENOMEM; | 2481 | return -ENOMEM; |
2473 | 2482 | ||
2483 | compr->sample_rate = params->codec.sample_rate; | ||
2484 | |||
2474 | return 0; | 2485 | return 0; |
2475 | } | 2486 | } |
2476 | EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); | 2487 | EXPORT_SYMBOL_GPL(wm_adsp_compr_set_params); |
@@ -2810,7 +2821,6 @@ int wm_adsp_compr_handle_irq(struct wm_adsp *dsp) | |||
2810 | mutex_lock(&dsp->pwr_lock); | 2821 | mutex_lock(&dsp->pwr_lock); |
2811 | 2822 | ||
2812 | if (!buf) { | 2823 | if (!buf) { |
2813 | adsp_err(dsp, "Spurious buffer IRQ\n"); | ||
2814 | ret = -ENODEV; | 2824 | ret = -ENODEV; |
2815 | goto out; | 2825 | goto out; |
2816 | } | 2826 | } |
@@ -2841,7 +2851,7 @@ int wm_adsp_compr_handle_irq(struct wm_adsp *dsp) | |||
2841 | goto out; | 2851 | goto out; |
2842 | } | 2852 | } |
2843 | 2853 | ||
2844 | if (compr->stream) | 2854 | if (compr && compr->stream) |
2845 | snd_compr_fragment_elapsed(compr->stream); | 2855 | snd_compr_fragment_elapsed(compr->stream); |
2846 | 2856 | ||
2847 | out: | 2857 | out: |
@@ -2911,6 +2921,7 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, | |||
2911 | 2921 | ||
2912 | tstamp->copied_total = compr->copied_total; | 2922 | tstamp->copied_total = compr->copied_total; |
2913 | tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; | 2923 | tstamp->copied_total += buf->avail * WM_ADSP_DATA_WORD_SIZE; |
2924 | tstamp->sampling_rate = compr->sample_rate; | ||
2914 | 2925 | ||
2915 | out: | 2926 | out: |
2916 | mutex_unlock(&dsp->pwr_lock); | 2927 | mutex_unlock(&dsp->pwr_lock); |
diff --git a/sound/soc/codecs/wm_adsp.h b/sound/soc/codecs/wm_adsp.h index 1a928ec54741..b61cb57e600f 100644 --- a/sound/soc/codecs/wm_adsp.h +++ b/sound/soc/codecs/wm_adsp.h | |||
@@ -80,7 +80,7 @@ struct wm_adsp { | |||
80 | SND_SOC_DAPM_PGA_E(wname, SND_SOC_NOPM, num, 0, NULL, 0, \ | 80 | SND_SOC_DAPM_PGA_E(wname, SND_SOC_NOPM, num, 0, NULL, 0, \ |
81 | wm_adsp1_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD) | 81 | wm_adsp1_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD) |
82 | 82 | ||
83 | #define WM_ADSP2_E(wname, num, event_fn) \ | 83 | #define WM_ADSP2(wname, num, event_fn) \ |
84 | { .id = snd_soc_dapm_dai_link, .name = wname " Preloader", \ | 84 | { .id = snd_soc_dapm_dai_link, .name = wname " Preloader", \ |
85 | .reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \ | 85 | .reg = SND_SOC_NOPM, .shift = num, .event = event_fn, \ |
86 | .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD }, \ | 86 | .event_flags = SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD }, \ |
@@ -88,9 +88,6 @@ struct wm_adsp { | |||
88 | .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_event, \ | 88 | .reg = SND_SOC_NOPM, .shift = num, .event = wm_adsp2_event, \ |
89 | .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } | 89 | .event_flags = SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD } |
90 | 90 | ||
91 | #define WM_ADSP2(wname, num) \ | ||
92 | WM_ADSP2_E(wname, num, wm_adsp2_early_event) | ||
93 | |||
94 | extern const struct snd_kcontrol_new wm_adsp_fw_controls[]; | 91 | extern const struct snd_kcontrol_new wm_adsp_fw_controls[]; |
95 | 92 | ||
96 | int wm_adsp1_init(struct wm_adsp *dsp); | 93 | int wm_adsp1_init(struct wm_adsp *dsp); |
@@ -100,7 +97,8 @@ int wm_adsp2_codec_remove(struct wm_adsp *dsp, struct snd_soc_codec *codec); | |||
100 | int wm_adsp1_event(struct snd_soc_dapm_widget *w, | 97 | int wm_adsp1_event(struct snd_soc_dapm_widget *w, |
101 | struct snd_kcontrol *kcontrol, int event); | 98 | struct snd_kcontrol *kcontrol, int event); |
102 | int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, | 99 | int wm_adsp2_early_event(struct snd_soc_dapm_widget *w, |
103 | struct snd_kcontrol *kcontrol, int event); | 100 | struct snd_kcontrol *kcontrol, int event, |
101 | unsigned int freq); | ||
104 | int wm_adsp2_event(struct snd_soc_dapm_widget *w, | 102 | int wm_adsp2_event(struct snd_soc_dapm_widget *w, |
105 | struct snd_kcontrol *kcontrol, int event); | 103 | struct snd_kcontrol *kcontrol, int event); |
106 | 104 | ||
diff --git a/sound/soc/davinci/Kconfig b/sound/soc/davinci/Kconfig index 3736d9aabc56..50ca291cc225 100644 --- a/sound/soc/davinci/Kconfig +++ b/sound/soc/davinci/Kconfig | |||
@@ -5,7 +5,7 @@ config SND_DAVINCI_SOC | |||
5 | 5 | ||
6 | config SND_EDMA_SOC | 6 | config SND_EDMA_SOC |
7 | tristate "SoC Audio for Texas Instruments chips using eDMA" | 7 | tristate "SoC Audio for Texas Instruments chips using eDMA" |
8 | depends on SOC_AM33XX || SOC_AM43XX || ARCH_DAVINCI | 8 | depends on TI_EDMA |
9 | select SND_SOC_GENERIC_DMAENGINE_PCM | 9 | select SND_SOC_GENERIC_DMAENGINE_PCM |
10 | help | 10 | help |
11 | Say Y or M here if you want audio support for TI SoC which uses eDMA. | 11 | Say Y or M here if you want audio support for TI SoC which uses eDMA. |
@@ -13,6 +13,7 @@ config SND_EDMA_SOC | |||
13 | - daVinci devices | 13 | - daVinci devices |
14 | - AM335x | 14 | - AM335x |
15 | - AM437x/AM438x | 15 | - AM437x/AM438x |
16 | - DRA7xx family | ||
16 | 17 | ||
17 | config SND_DAVINCI_SOC_I2S | 18 | config SND_DAVINCI_SOC_I2S |
18 | tristate | 19 | tristate |
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 2ccb8bccc9d4..e1324989bd6b 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c | |||
@@ -77,6 +77,7 @@ struct davinci_mcasp { | |||
77 | u32 fifo_base; | 77 | u32 fifo_base; |
78 | struct device *dev; | 78 | struct device *dev; |
79 | struct snd_pcm_substream *substreams[2]; | 79 | struct snd_pcm_substream *substreams[2]; |
80 | unsigned int dai_fmt; | ||
80 | 81 | ||
81 | /* McASP specific data */ | 82 | /* McASP specific data */ |
82 | int tdm_slots; | 83 | int tdm_slots; |
@@ -398,6 +399,9 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
398 | bool fs_pol_rising; | 399 | bool fs_pol_rising; |
399 | bool inv_fs = false; | 400 | bool inv_fs = false; |
400 | 401 | ||
402 | if (!fmt) | ||
403 | return 0; | ||
404 | |||
401 | pm_runtime_get_sync(mcasp->dev); | 405 | pm_runtime_get_sync(mcasp->dev); |
402 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { | 406 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
403 | case SND_SOC_DAIFMT_DSP_A: | 407 | case SND_SOC_DAIFMT_DSP_A: |
@@ -529,6 +533,8 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
529 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); | 533 | mcasp_set_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); |
530 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); | 534 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); |
531 | } | 535 | } |
536 | |||
537 | mcasp->dai_fmt = fmt; | ||
532 | out: | 538 | out: |
533 | pm_runtime_put(mcasp->dev); | 539 | pm_runtime_put(mcasp->dev); |
534 | return ret; | 540 | return ret; |
@@ -1026,6 +1032,10 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, | |||
1026 | int period_size = params_period_size(params); | 1032 | int period_size = params_period_size(params); |
1027 | int ret; | 1033 | int ret; |
1028 | 1034 | ||
1035 | ret = davinci_mcasp_set_dai_fmt(cpu_dai, mcasp->dai_fmt); | ||
1036 | if (ret) | ||
1037 | return ret; | ||
1038 | |||
1029 | /* | 1039 | /* |
1030 | * If mcasp is BCLK master, and a BCLK divider was not provided by | 1040 | * If mcasp is BCLK master, and a BCLK divider was not provided by |
1031 | * the machine driver, we need to calculate the ratio. | 1041 | * the machine driver, we need to calculate the ratio. |
@@ -1517,6 +1527,8 @@ static int mcasp_reparent_fck(struct platform_device *pdev) | |||
1517 | if (!parent_name) | 1527 | if (!parent_name) |
1518 | return 0; | 1528 | return 0; |
1519 | 1529 | ||
1530 | dev_warn(&pdev->dev, "Update the bindings to use assigned-clocks!\n"); | ||
1531 | |||
1520 | gfclk = clk_get(&pdev->dev, "fck"); | 1532 | gfclk = clk_get(&pdev->dev, "fck"); |
1521 | if (IS_ERR(gfclk)) { | 1533 | if (IS_ERR(gfclk)) { |
1522 | dev_err(&pdev->dev, "failed to get fck\n"); | 1534 | dev_err(&pdev->dev, "failed to get fck\n"); |
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig index 14dfdee05fd5..35aabf9dc503 100644 --- a/sound/soc/fsl/Kconfig +++ b/sound/soc/fsl/Kconfig | |||
@@ -292,8 +292,8 @@ config SND_SOC_FSL_ASOC_CARD | |||
292 | select SND_SOC_FSL_SSI | 292 | select SND_SOC_FSL_SSI |
293 | help | 293 | help |
294 | ALSA SoC Audio support with ASRC feature for Freescale SoCs that have | 294 | ALSA SoC Audio support with ASRC feature for Freescale SoCs that have |
295 | ESAI/SAI/SSI and connect with external CODECs such as WM8962, CS42888 | 295 | ESAI/SAI/SSI and connect with external CODECs such as WM8962, CS42888, |
296 | and SGTL5000. | 296 | CS4271, CS4272 and SGTL5000. |
297 | Say Y if you want to add support for Freescale Generic ASoC Sound Card. | 297 | Say Y if you want to add support for Freescale Generic ASoC Sound Card. |
298 | 298 | ||
299 | endif # SND_IMX_SOC | 299 | endif # SND_IMX_SOC |
diff --git a/sound/soc/fsl/fsl-asoc-card.c b/sound/soc/fsl/fsl-asoc-card.c index 562b3bd22d9a..dffd549a0e2a 100644 --- a/sound/soc/fsl/fsl-asoc-card.c +++ b/sound/soc/fsl/fsl-asoc-card.c | |||
@@ -28,6 +28,8 @@ | |||
28 | #include "../codecs/wm8962.h" | 28 | #include "../codecs/wm8962.h" |
29 | #include "../codecs/wm8960.h" | 29 | #include "../codecs/wm8960.h" |
30 | 30 | ||
31 | #define CS427x_SYSCLK_MCLK 0 | ||
32 | |||
31 | #define RX 0 | 33 | #define RX 0 |
32 | #define TX 1 | 34 | #define TX 1 |
33 | 35 | ||
@@ -99,19 +101,26 @@ struct fsl_asoc_card_priv { | |||
99 | /** | 101 | /** |
100 | * This dapm route map exsits for DPCM link only. | 102 | * This dapm route map exsits for DPCM link only. |
101 | * The other routes shall go through Device Tree. | 103 | * The other routes shall go through Device Tree. |
104 | * | ||
105 | * Note: keep all ASRC routes in the second half | ||
106 | * to drop them easily for non-ASRC cases. | ||
102 | */ | 107 | */ |
103 | static const struct snd_soc_dapm_route audio_map[] = { | 108 | static const struct snd_soc_dapm_route audio_map[] = { |
104 | {"CPU-Playback", NULL, "ASRC-Playback"}, | 109 | /* 1st half -- Normal DAPM routes */ |
105 | {"Playback", NULL, "CPU-Playback"}, | 110 | {"Playback", NULL, "CPU-Playback"}, |
106 | {"ASRC-Capture", NULL, "CPU-Capture"}, | ||
107 | {"CPU-Capture", NULL, "Capture"}, | 111 | {"CPU-Capture", NULL, "Capture"}, |
112 | /* 2nd half -- ASRC DAPM routes */ | ||
113 | {"CPU-Playback", NULL, "ASRC-Playback"}, | ||
114 | {"ASRC-Capture", NULL, "CPU-Capture"}, | ||
108 | }; | 115 | }; |
109 | 116 | ||
110 | static const struct snd_soc_dapm_route audio_map_ac97[] = { | 117 | static const struct snd_soc_dapm_route audio_map_ac97[] = { |
111 | {"AC97 Playback", NULL, "ASRC-Playback"}, | 118 | /* 1st half -- Normal DAPM routes */ |
112 | {"Playback", NULL, "AC97 Playback"}, | 119 | {"Playback", NULL, "AC97 Playback"}, |
113 | {"ASRC-Capture", NULL, "AC97 Capture"}, | ||
114 | {"AC97 Capture", NULL, "Capture"}, | 120 | {"AC97 Capture", NULL, "Capture"}, |
121 | /* 2nd half -- ASRC DAPM routes */ | ||
122 | {"AC97 Playback", NULL, "ASRC-Playback"}, | ||
123 | {"ASRC-Capture", NULL, "AC97 Capture"}, | ||
115 | }; | 124 | }; |
116 | 125 | ||
117 | /* Add all possible widgets into here without being redundant */ | 126 | /* Add all possible widgets into here without being redundant */ |
@@ -528,6 +537,10 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) | |||
528 | priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_OUT; | 537 | priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_OUT; |
529 | priv->cpu_priv.slot_width = 32; | 538 | priv->cpu_priv.slot_width = 32; |
530 | priv->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS; | 539 | priv->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS; |
540 | } else if (of_device_is_compatible(np, "fsl,imx-audio-cs427x")) { | ||
541 | codec_dai_name = "cs4271-hifi"; | ||
542 | priv->codec_priv.mclk_id = CS427x_SYSCLK_MCLK; | ||
543 | priv->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM; | ||
531 | } else if (of_device_is_compatible(np, "fsl,imx-audio-sgtl5000")) { | 544 | } else if (of_device_is_compatible(np, "fsl,imx-audio-sgtl5000")) { |
532 | codec_dai_name = "sgtl5000"; | 545 | codec_dai_name = "sgtl5000"; |
533 | priv->codec_priv.mclk_id = SGTL5000_SYSCLK; | 546 | priv->codec_priv.mclk_id = SGTL5000_SYSCLK; |
@@ -593,6 +606,10 @@ static int fsl_asoc_card_probe(struct platform_device *pdev) | |||
593 | priv->card.dapm_widgets = fsl_asoc_card_dapm_widgets; | 606 | priv->card.dapm_widgets = fsl_asoc_card_dapm_widgets; |
594 | priv->card.num_dapm_widgets = ARRAY_SIZE(fsl_asoc_card_dapm_widgets); | 607 | priv->card.num_dapm_widgets = ARRAY_SIZE(fsl_asoc_card_dapm_widgets); |
595 | 608 | ||
609 | /* Drop the second half of DAPM routes -- ASRC */ | ||
610 | if (!asrc_pdev) | ||
611 | priv->card.num_dapm_routes /= 2; | ||
612 | |||
596 | memcpy(priv->dai_link, fsl_asoc_card_dai, | 613 | memcpy(priv->dai_link, fsl_asoc_card_dai, |
597 | sizeof(struct snd_soc_dai_link) * ARRAY_SIZE(priv->dai_link)); | 614 | sizeof(struct snd_soc_dai_link) * ARRAY_SIZE(priv->dai_link)); |
598 | 615 | ||
@@ -681,6 +698,7 @@ fail: | |||
681 | static const struct of_device_id fsl_asoc_card_dt_ids[] = { | 698 | static const struct of_device_id fsl_asoc_card_dt_ids[] = { |
682 | { .compatible = "fsl,imx-audio-ac97", }, | 699 | { .compatible = "fsl,imx-audio-ac97", }, |
683 | { .compatible = "fsl,imx-audio-cs42888", }, | 700 | { .compatible = "fsl,imx-audio-cs42888", }, |
701 | { .compatible = "fsl,imx-audio-cs427x", }, | ||
684 | { .compatible = "fsl,imx-audio-sgtl5000", }, | 702 | { .compatible = "fsl,imx-audio-sgtl5000", }, |
685 | { .compatible = "fsl,imx-audio-wm8962", }, | 703 | { .compatible = "fsl,imx-audio-wm8962", }, |
686 | { .compatible = "fsl,imx-audio-wm8960", }, | 704 | { .compatible = "fsl,imx-audio-wm8960", }, |
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index fef264d27fd3..0754df771e3b 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/of_address.h> | 17 | #include <linux/of_address.h> |
18 | #include <linux/regmap.h> | 18 | #include <linux/regmap.h> |
19 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
20 | #include <linux/time.h> | ||
20 | #include <sound/core.h> | 21 | #include <sound/core.h> |
21 | #include <sound/dmaengine_pcm.h> | 22 | #include <sound/dmaengine_pcm.h> |
22 | #include <sound/pcm_params.h> | 23 | #include <sound/pcm_params.h> |
@@ -919,7 +920,7 @@ static int fsl_sai_resume(struct device *dev) | |||
919 | regcache_cache_only(sai->regmap, false); | 920 | regcache_cache_only(sai->regmap, false); |
920 | regmap_write(sai->regmap, FSL_SAI_TCSR, FSL_SAI_CSR_SR); | 921 | regmap_write(sai->regmap, FSL_SAI_TCSR, FSL_SAI_CSR_SR); |
921 | regmap_write(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_SR); | 922 | regmap_write(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_SR); |
922 | msleep(1); | 923 | usleep_range(1000, 2000); |
923 | regmap_write(sai->regmap, FSL_SAI_TCSR, 0); | 924 | regmap_write(sai->regmap, FSL_SAI_TCSR, 0); |
924 | regmap_write(sai->regmap, FSL_SAI_RCSR, 0); | 925 | regmap_write(sai->regmap, FSL_SAI_RCSR, 0); |
925 | return regcache_sync(sai->regmap); | 926 | return regcache_sync(sai->regmap); |
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index 40dfd8a36484..ed8de1035cda 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c | |||
@@ -112,20 +112,6 @@ struct fsl_ssi_rxtx_reg_val { | |||
112 | struct fsl_ssi_reg_val tx; | 112 | struct fsl_ssi_reg_val tx; |
113 | }; | 113 | }; |
114 | 114 | ||
115 | static const struct reg_default fsl_ssi_reg_defaults[] = { | ||
116 | {CCSR_SSI_SCR, 0x00000000}, | ||
117 | {CCSR_SSI_SIER, 0x00003003}, | ||
118 | {CCSR_SSI_STCR, 0x00000200}, | ||
119 | {CCSR_SSI_SRCR, 0x00000200}, | ||
120 | {CCSR_SSI_STCCR, 0x00040000}, | ||
121 | {CCSR_SSI_SRCCR, 0x00040000}, | ||
122 | {CCSR_SSI_SACNT, 0x00000000}, | ||
123 | {CCSR_SSI_STMSK, 0x00000000}, | ||
124 | {CCSR_SSI_SRMSK, 0x00000000}, | ||
125 | {CCSR_SSI_SACCEN, 0x00000000}, | ||
126 | {CCSR_SSI_SACCDIS, 0x00000000}, | ||
127 | }; | ||
128 | |||
129 | static bool fsl_ssi_readable_reg(struct device *dev, unsigned int reg) | 115 | static bool fsl_ssi_readable_reg(struct device *dev, unsigned int reg) |
130 | { | 116 | { |
131 | switch (reg) { | 117 | switch (reg) { |
@@ -190,8 +176,7 @@ static const struct regmap_config fsl_ssi_regconfig = { | |||
190 | .val_bits = 32, | 176 | .val_bits = 32, |
191 | .reg_stride = 4, | 177 | .reg_stride = 4, |
192 | .val_format_endian = REGMAP_ENDIAN_NATIVE, | 178 | .val_format_endian = REGMAP_ENDIAN_NATIVE, |
193 | .reg_defaults = fsl_ssi_reg_defaults, | 179 | .num_reg_defaults_raw = CCSR_SSI_SACCDIS / sizeof(uint32_t) + 1, |
194 | .num_reg_defaults = ARRAY_SIZE(fsl_ssi_reg_defaults), | ||
195 | .readable_reg = fsl_ssi_readable_reg, | 180 | .readable_reg = fsl_ssi_readable_reg, |
196 | .volatile_reg = fsl_ssi_volatile_reg, | 181 | .volatile_reg = fsl_ssi_volatile_reg, |
197 | .precious_reg = fsl_ssi_precious_reg, | 182 | .precious_reg = fsl_ssi_precious_reg, |
@@ -201,6 +186,7 @@ static const struct regmap_config fsl_ssi_regconfig = { | |||
201 | 186 | ||
202 | struct fsl_ssi_soc_data { | 187 | struct fsl_ssi_soc_data { |
203 | bool imx; | 188 | bool imx; |
189 | bool imx21regs; /* imx21-class SSI - no SACC{ST,EN,DIS} regs */ | ||
204 | bool offline_config; | 190 | bool offline_config; |
205 | u32 sisr_write_mask; | 191 | u32 sisr_write_mask; |
206 | }; | 192 | }; |
@@ -303,6 +289,7 @@ static struct fsl_ssi_soc_data fsl_ssi_mpc8610 = { | |||
303 | 289 | ||
304 | static struct fsl_ssi_soc_data fsl_ssi_imx21 = { | 290 | static struct fsl_ssi_soc_data fsl_ssi_imx21 = { |
305 | .imx = true, | 291 | .imx = true, |
292 | .imx21regs = true, | ||
306 | .offline_config = true, | 293 | .offline_config = true, |
307 | .sisr_write_mask = 0, | 294 | .sisr_write_mask = 0, |
308 | }; | 295 | }; |
@@ -586,8 +573,12 @@ static void fsl_ssi_setup_ac97(struct fsl_ssi_private *ssi_private) | |||
586 | */ | 573 | */ |
587 | regmap_write(regs, CCSR_SSI_SACNT, | 574 | regmap_write(regs, CCSR_SSI_SACNT, |
588 | CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV); | 575 | CCSR_SSI_SACNT_AC97EN | CCSR_SSI_SACNT_FV); |
589 | regmap_write(regs, CCSR_SSI_SACCDIS, 0xff); | 576 | |
590 | regmap_write(regs, CCSR_SSI_SACCEN, 0x300); | 577 | /* no SACC{ST,EN,DIS} regs on imx21-class SSI */ |
578 | if (!ssi_private->soc->imx21regs) { | ||
579 | regmap_write(regs, CCSR_SSI_SACCDIS, 0xff); | ||
580 | regmap_write(regs, CCSR_SSI_SACCEN, 0x300); | ||
581 | } | ||
591 | 582 | ||
592 | /* | 583 | /* |
593 | * Enable SSI, Transmit and Receive. AC97 has to communicate with the | 584 | * Enable SSI, Transmit and Receive. AC97 has to communicate with the |
@@ -1397,6 +1388,7 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
1397 | struct resource *res; | 1388 | struct resource *res; |
1398 | void __iomem *iomem; | 1389 | void __iomem *iomem; |
1399 | char name[64]; | 1390 | char name[64]; |
1391 | struct regmap_config regconfig = fsl_ssi_regconfig; | ||
1400 | 1392 | ||
1401 | of_id = of_match_device(fsl_ssi_ids, &pdev->dev); | 1393 | of_id = of_match_device(fsl_ssi_ids, &pdev->dev); |
1402 | if (!of_id || !of_id->data) | 1394 | if (!of_id || !of_id->data) |
@@ -1444,15 +1436,25 @@ static int fsl_ssi_probe(struct platform_device *pdev) | |||
1444 | return PTR_ERR(iomem); | 1436 | return PTR_ERR(iomem); |
1445 | ssi_private->ssi_phys = res->start; | 1437 | ssi_private->ssi_phys = res->start; |
1446 | 1438 | ||
1439 | if (ssi_private->soc->imx21regs) { | ||
1440 | /* | ||
1441 | * According to datasheet imx21-class SSI | ||
1442 | * don't have SACC{ST,EN,DIS} regs. | ||
1443 | */ | ||
1444 | regconfig.max_register = CCSR_SSI_SRMSK; | ||
1445 | regconfig.num_reg_defaults_raw = | ||
1446 | CCSR_SSI_SRMSK / sizeof(uint32_t) + 1; | ||
1447 | } | ||
1448 | |||
1447 | ret = of_property_match_string(np, "clock-names", "ipg"); | 1449 | ret = of_property_match_string(np, "clock-names", "ipg"); |
1448 | if (ret < 0) { | 1450 | if (ret < 0) { |
1449 | ssi_private->has_ipg_clk_name = false; | 1451 | ssi_private->has_ipg_clk_name = false; |
1450 | ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem, | 1452 | ssi_private->regs = devm_regmap_init_mmio(&pdev->dev, iomem, |
1451 | &fsl_ssi_regconfig); | 1453 | ®config); |
1452 | } else { | 1454 | } else { |
1453 | ssi_private->has_ipg_clk_name = true; | 1455 | ssi_private->has_ipg_clk_name = true; |
1454 | ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev, | 1456 | ssi_private->regs = devm_regmap_init_mmio_clk(&pdev->dev, |
1455 | "ipg", iomem, &fsl_ssi_regconfig); | 1457 | "ipg", iomem, ®config); |
1456 | } | 1458 | } |
1457 | if (IS_ERR(ssi_private->regs)) { | 1459 | if (IS_ERR(ssi_private->regs)) { |
1458 | dev_err(&pdev->dev, "Failed to init register map\n"); | 1460 | dev_err(&pdev->dev, "Failed to init register map\n"); |
diff --git a/sound/soc/fsl/mpc5200_psc_ac97.c b/sound/soc/fsl/mpc5200_psc_ac97.c index 0bab76051fd8..243700cc29e6 100644 --- a/sound/soc/fsl/mpc5200_psc_ac97.c +++ b/sound/soc/fsl/mpc5200_psc_ac97.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/of_device.h> | 13 | #include <linux/of_device.h> |
14 | #include <linux/of_platform.h> | 14 | #include <linux/of_platform.h> |
15 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
16 | #include <linux/time.h> | ||
16 | 17 | ||
17 | #include <sound/pcm.h> | 18 | #include <sound/pcm.h> |
18 | #include <sound/pcm_params.h> | 19 | #include <sound/pcm_params.h> |
@@ -127,7 +128,7 @@ static void psc_ac97_cold_reset(struct snd_ac97 *ac97) | |||
127 | 128 | ||
128 | mutex_unlock(&psc_dma->mutex); | 129 | mutex_unlock(&psc_dma->mutex); |
129 | 130 | ||
130 | msleep(1); | 131 | usleep_range(1000, 2000); |
131 | psc_ac97_warm_reset(ac97); | 132 | psc_ac97_warm_reset(ac97); |
132 | } | 133 | } |
133 | 134 | ||
diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig index 7d7c872c280d..b3e6c2300457 100644 --- a/sound/soc/intel/Kconfig +++ b/sound/soc/intel/Kconfig | |||
@@ -163,6 +163,7 @@ config SND_SOC_INTEL_SKYLAKE | |||
163 | tristate | 163 | tristate |
164 | select SND_HDA_EXT_CORE | 164 | select SND_HDA_EXT_CORE |
165 | select SND_SOC_TOPOLOGY | 165 | select SND_SOC_TOPOLOGY |
166 | select SND_HDA_I915 | ||
166 | select SND_SOC_INTEL_SST | 167 | select SND_SOC_INTEL_SST |
167 | 168 | ||
168 | config SND_SOC_INTEL_SKL_RT286_MACH | 169 | config SND_SOC_INTEL_SKL_RT286_MACH |
@@ -172,6 +173,7 @@ config SND_SOC_INTEL_SKL_RT286_MACH | |||
172 | select SND_SOC_INTEL_SKYLAKE | 173 | select SND_SOC_INTEL_SKYLAKE |
173 | select SND_SOC_RT286 | 174 | select SND_SOC_RT286 |
174 | select SND_SOC_DMIC | 175 | select SND_SOC_DMIC |
176 | select SND_SOC_HDAC_HDMI | ||
175 | help | 177 | help |
176 | This adds support for ASoC machine driver for Skylake platforms | 178 | This adds support for ASoC machine driver for Skylake platforms |
177 | with RT286 I2S audio codec. | 179 | with RT286 I2S audio codec. |
@@ -186,6 +188,7 @@ config SND_SOC_INTEL_SKL_NAU88L25_SSM4567_MACH | |||
186 | select SND_SOC_NAU8825 | 188 | select SND_SOC_NAU8825 |
187 | select SND_SOC_SSM4567 | 189 | select SND_SOC_SSM4567 |
188 | select SND_SOC_DMIC | 190 | select SND_SOC_DMIC |
191 | select SND_SOC_HDAC_HDMI | ||
189 | help | 192 | help |
190 | This adds support for ASoC Onboard Codec I2S machine driver. This will | 193 | This adds support for ASoC Onboard Codec I2S machine driver. This will |
191 | create an alsa sound card for NAU88L25 + SSM4567. | 194 | create an alsa sound card for NAU88L25 + SSM4567. |
@@ -200,6 +203,7 @@ config SND_SOC_INTEL_SKL_NAU88L25_MAX98357A_MACH | |||
200 | select SND_SOC_NAU8825 | 203 | select SND_SOC_NAU8825 |
201 | select SND_SOC_MAX98357A | 204 | select SND_SOC_MAX98357A |
202 | select SND_SOC_DMIC | 205 | select SND_SOC_DMIC |
206 | select SND_SOC_HDAC_HDMI | ||
203 | help | 207 | help |
204 | This adds support for ASoC Onboard Codec I2S machine driver. This will | 208 | This adds support for ASoC Onboard Codec I2S machine driver. This will |
205 | create an alsa sound card for NAU88L25 + MAX98357A. | 209 | create an alsa sound card for NAU88L25 + MAX98357A. |
diff --git a/sound/soc/intel/atom/sst/sst_acpi.c b/sound/soc/intel/atom/sst/sst_acpi.c index 4fce03fc1870..3bc4b63b2f9d 100644 --- a/sound/soc/intel/atom/sst/sst_acpi.c +++ b/sound/soc/intel/atom/sst/sst_acpi.c | |||
@@ -342,6 +342,10 @@ static struct sst_acpi_mach sst_acpi_chv[] = { | |||
342 | &chv_platform_data }, | 342 | &chv_platform_data }, |
343 | {"193C9890", "cht-bsw-max98090", "intel/fw_sst_22a8.bin", "cht-bsw", NULL, | 343 | {"193C9890", "cht-bsw-max98090", "intel/fw_sst_22a8.bin", "cht-bsw", NULL, |
344 | &chv_platform_data }, | 344 | &chv_platform_data }, |
345 | /* some CHT-T platforms rely on RT5640, use Baytrail machine driver */ | ||
346 | {"10EC5640", "bytcr_rt5640", "intel/fw_sst_22a8.bin", "bytcr_rt5640", NULL, | ||
347 | &chv_platform_data }, | ||
348 | |||
345 | {}, | 349 | {}, |
346 | }; | 350 | }; |
347 | 351 | ||
diff --git a/sound/soc/intel/atom/sst/sst_ipc.c b/sound/soc/intel/atom/sst/sst_ipc.c index 3dc7358828b3..8afa6fe7b0b0 100644 --- a/sound/soc/intel/atom/sst/sst_ipc.c +++ b/sound/soc/intel/atom/sst/sst_ipc.c | |||
@@ -318,7 +318,6 @@ void sst_process_reply_mrfld(struct intel_sst_drv *sst_drv_ctx, | |||
318 | union ipc_header_high msg_high; | 318 | union ipc_header_high msg_high; |
319 | u32 msg_low; | 319 | u32 msg_low; |
320 | struct ipc_dsp_hdr *dsp_hdr; | 320 | struct ipc_dsp_hdr *dsp_hdr; |
321 | unsigned int cmd_id; | ||
322 | 321 | ||
323 | msg_high = msg->mrfld_header.p.header_high; | 322 | msg_high = msg->mrfld_header.p.header_high; |
324 | msg_low = msg->mrfld_header.p.header_low_payload; | 323 | msg_low = msg->mrfld_header.p.header_low_payload; |
@@ -357,7 +356,6 @@ void sst_process_reply_mrfld(struct intel_sst_drv *sst_drv_ctx, | |||
357 | return; | 356 | return; |
358 | /* Copy command id so that we can use to put sst to reset */ | 357 | /* Copy command id so that we can use to put sst to reset */ |
359 | dsp_hdr = (struct ipc_dsp_hdr *)data; | 358 | dsp_hdr = (struct ipc_dsp_hdr *)data; |
360 | cmd_id = dsp_hdr->cmd_id; | ||
361 | dev_dbg(sst_drv_ctx->dev, "cmd_id %d\n", dsp_hdr->cmd_id); | 359 | dev_dbg(sst_drv_ctx->dev, "cmd_id %d\n", dsp_hdr->cmd_id); |
362 | if (sst_wake_up_block(sst_drv_ctx, msg_high.part.result, | 360 | if (sst_wake_up_block(sst_drv_ctx, msg_high.part.result, |
363 | msg_high.part.drv_id, | 361 | msg_high.part.drv_id, |
diff --git a/sound/soc/intel/boards/bytcr_rt5640.c b/sound/soc/intel/boards/bytcr_rt5640.c index 9a1752df45a9..032a2e753f0b 100644 --- a/sound/soc/intel/boards/bytcr_rt5640.c +++ b/sound/soc/intel/boards/bytcr_rt5640.c | |||
@@ -32,6 +32,18 @@ | |||
32 | #include "../atom/sst-atom-controls.h" | 32 | #include "../atom/sst-atom-controls.h" |
33 | #include "../common/sst-acpi.h" | 33 | #include "../common/sst-acpi.h" |
34 | 34 | ||
35 | enum { | ||
36 | BYT_RT5640_DMIC1_MAP, | ||
37 | BYT_RT5640_DMIC2_MAP, | ||
38 | BYT_RT5640_IN1_MAP, | ||
39 | }; | ||
40 | |||
41 | #define BYT_RT5640_MAP(quirk) ((quirk) & 0xff) | ||
42 | #define BYT_RT5640_DMIC_EN BIT(16) | ||
43 | |||
44 | static unsigned long byt_rt5640_quirk = BYT_RT5640_DMIC1_MAP | | ||
45 | BYT_RT5640_DMIC_EN; | ||
46 | |||
35 | static const struct snd_soc_dapm_widget byt_rt5640_widgets[] = { | 47 | static const struct snd_soc_dapm_widget byt_rt5640_widgets[] = { |
36 | SND_SOC_DAPM_HP("Headphone", NULL), | 48 | SND_SOC_DAPM_HP("Headphone", NULL), |
37 | SND_SOC_DAPM_MIC("Headset Mic", NULL), | 49 | SND_SOC_DAPM_MIC("Headset Mic", NULL), |
@@ -70,18 +82,6 @@ static const struct snd_soc_dapm_route byt_rt5640_intmic_in1_map[] = { | |||
70 | {"IN1P", NULL, "Internal Mic"}, | 82 | {"IN1P", NULL, "Internal Mic"}, |
71 | }; | 83 | }; |
72 | 84 | ||
73 | enum { | ||
74 | BYT_RT5640_DMIC1_MAP, | ||
75 | BYT_RT5640_DMIC2_MAP, | ||
76 | BYT_RT5640_IN1_MAP, | ||
77 | }; | ||
78 | |||
79 | #define BYT_RT5640_MAP(quirk) ((quirk) & 0xff) | ||
80 | #define BYT_RT5640_DMIC_EN BIT(16) | ||
81 | |||
82 | static unsigned long byt_rt5640_quirk = BYT_RT5640_DMIC1_MAP | | ||
83 | BYT_RT5640_DMIC_EN; | ||
84 | |||
85 | static const struct snd_kcontrol_new byt_rt5640_controls[] = { | 85 | static const struct snd_kcontrol_new byt_rt5640_controls[] = { |
86 | SOC_DAPM_PIN_SWITCH("Headphone"), | 86 | SOC_DAPM_PIN_SWITCH("Headphone"), |
87 | SOC_DAPM_PIN_SWITCH("Headset Mic"), | 87 | SOC_DAPM_PIN_SWITCH("Headset Mic"), |
@@ -174,7 +174,6 @@ static int byt_rt5640_init(struct snd_soc_pcm_runtime *runtime) | |||
174 | return ret; | 174 | return ret; |
175 | } | 175 | } |
176 | 176 | ||
177 | dmi_check_system(byt_rt5640_quirk_table); | ||
178 | switch (BYT_RT5640_MAP(byt_rt5640_quirk)) { | 177 | switch (BYT_RT5640_MAP(byt_rt5640_quirk)) { |
179 | case BYT_RT5640_IN1_MAP: | 178 | case BYT_RT5640_IN1_MAP: |
180 | custom_map = byt_rt5640_intmic_in1_map; | 179 | custom_map = byt_rt5640_intmic_in1_map; |
@@ -341,15 +340,34 @@ static int snd_byt_rt5640_mc_probe(struct platform_device *pdev) | |||
341 | { | 340 | { |
342 | int ret_val = 0; | 341 | int ret_val = 0; |
343 | struct sst_acpi_mach *mach; | 342 | struct sst_acpi_mach *mach; |
343 | const char *i2c_name = NULL; | ||
344 | int i; | ||
345 | int dai_index; | ||
344 | 346 | ||
345 | /* register the soc card */ | 347 | /* register the soc card */ |
346 | byt_rt5640_card.dev = &pdev->dev; | 348 | byt_rt5640_card.dev = &pdev->dev; |
347 | mach = byt_rt5640_card.dev->platform_data; | 349 | mach = byt_rt5640_card.dev->platform_data; |
348 | 350 | ||
351 | /* fix index of codec dai */ | ||
352 | dai_index = MERR_DPCM_COMPR + 1; | ||
353 | for (i = 0; i < ARRAY_SIZE(byt_rt5640_dais); i++) { | ||
354 | if (!strcmp(byt_rt5640_dais[i].codec_name, "i2c-10EC5640:00")) { | ||
355 | dai_index = i; | ||
356 | break; | ||
357 | } | ||
358 | } | ||
359 | |||
349 | /* fixup codec name based on HID */ | 360 | /* fixup codec name based on HID */ |
350 | snprintf(byt_rt5640_codec_name, sizeof(byt_rt5640_codec_name), | 361 | i2c_name = sst_acpi_find_name_from_hid(mach->id); |
351 | "%s%s%s", "i2c-", mach->id, ":00"); | 362 | if (i2c_name != NULL) { |
352 | byt_rt5640_dais[MERR_DPCM_COMPR+1].codec_name = byt_rt5640_codec_name; | 363 | snprintf(byt_rt5640_codec_name, sizeof(byt_rt5640_codec_name), |
364 | "%s%s", "i2c-", i2c_name); | ||
365 | |||
366 | byt_rt5640_dais[dai_index].codec_name = byt_rt5640_codec_name; | ||
367 | } | ||
368 | |||
369 | /* check quirks before creating card */ | ||
370 | dmi_check_system(byt_rt5640_quirk_table); | ||
353 | 371 | ||
354 | ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5640_card); | 372 | ret_val = devm_snd_soc_register_card(&pdev->dev, &byt_rt5640_card); |
355 | 373 | ||
diff --git a/sound/soc/intel/boards/cht_bsw_max98090_ti.c b/sound/soc/intel/boards/cht_bsw_max98090_ti.c index 90588d6e64fc..e609f089593a 100644 --- a/sound/soc/intel/boards/cht_bsw_max98090_ti.c +++ b/sound/soc/intel/boards/cht_bsw_max98090_ti.c | |||
@@ -287,33 +287,20 @@ static struct snd_soc_card snd_soc_card_cht = { | |||
287 | .num_controls = ARRAY_SIZE(cht_mc_controls), | 287 | .num_controls = ARRAY_SIZE(cht_mc_controls), |
288 | }; | 288 | }; |
289 | 289 | ||
290 | static acpi_status snd_acpi_codec_match(acpi_handle handle, u32 level, | ||
291 | void *context, void **ret) | ||
292 | { | ||
293 | *(bool *)context = true; | ||
294 | return AE_OK; | ||
295 | } | ||
296 | |||
297 | static int snd_cht_mc_probe(struct platform_device *pdev) | 290 | static int snd_cht_mc_probe(struct platform_device *pdev) |
298 | { | 291 | { |
299 | int ret_val = 0; | 292 | int ret_val = 0; |
300 | bool found = false; | ||
301 | struct cht_mc_private *drv; | 293 | struct cht_mc_private *drv; |
302 | 294 | ||
303 | drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC); | 295 | drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC); |
304 | if (!drv) | 296 | if (!drv) |
305 | return -ENOMEM; | 297 | return -ENOMEM; |
306 | 298 | ||
307 | if (ACPI_SUCCESS(acpi_get_devices( | 299 | drv->ts3a227e_present = acpi_dev_present("104C227E"); |
308 | "104C227E", | 300 | if (!drv->ts3a227e_present) { |
309 | snd_acpi_codec_match, | ||
310 | &found, NULL)) && found) { | ||
311 | drv->ts3a227e_present = true; | ||
312 | } else { | ||
313 | /* no need probe TI jack detection chip */ | 301 | /* no need probe TI jack detection chip */ |
314 | snd_soc_card_cht.aux_dev = NULL; | 302 | snd_soc_card_cht.aux_dev = NULL; |
315 | snd_soc_card_cht.num_aux_devs = 0; | 303 | snd_soc_card_cht.num_aux_devs = 0; |
316 | drv->ts3a227e_present = false; | ||
317 | } | 304 | } |
318 | 305 | ||
319 | /* register the soc card */ | 306 | /* register the soc card */ |
diff --git a/sound/soc/intel/boards/cht_bsw_rt5645.c b/sound/soc/intel/boards/cht_bsw_rt5645.c index a7b96a9a4e0e..2a6f80843bc9 100644 --- a/sound/soc/intel/boards/cht_bsw_rt5645.c +++ b/sound/soc/intel/boards/cht_bsw_rt5645.c | |||
@@ -147,6 +147,17 @@ static const struct snd_kcontrol_new cht_mc_controls[] = { | |||
147 | SOC_DAPM_PIN_SWITCH("Ext Spk"), | 147 | SOC_DAPM_PIN_SWITCH("Ext Spk"), |
148 | }; | 148 | }; |
149 | 149 | ||
150 | static struct snd_soc_jack_pin cht_bsw_jack_pins[] = { | ||
151 | { | ||
152 | .pin = "Headphone", | ||
153 | .mask = SND_JACK_HEADPHONE, | ||
154 | }, | ||
155 | { | ||
156 | .pin = "Headset Mic", | ||
157 | .mask = SND_JACK_MICROPHONE, | ||
158 | }, | ||
159 | }; | ||
160 | |||
150 | static int cht_aif1_hw_params(struct snd_pcm_substream *substream, | 161 | static int cht_aif1_hw_params(struct snd_pcm_substream *substream, |
151 | struct snd_pcm_hw_params *params) | 162 | struct snd_pcm_hw_params *params) |
152 | { | 163 | { |
@@ -202,9 +213,9 @@ static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) | |||
202 | else | 213 | else |
203 | jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE; | 214 | jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE; |
204 | 215 | ||
205 | ret = snd_soc_card_jack_new(runtime->card, "Headset Jack", | 216 | ret = snd_soc_card_jack_new(runtime->card, "Headset", |
206 | jack_type, &ctx->jack, | 217 | jack_type, &ctx->jack, |
207 | NULL, 0); | 218 | cht_bsw_jack_pins, ARRAY_SIZE(cht_bsw_jack_pins)); |
208 | if (ret) { | 219 | if (ret) { |
209 | dev_err(runtime->dev, "Headset jack creation failed %d\n", ret); | 220 | dev_err(runtime->dev, "Headset jack creation failed %d\n", ret); |
210 | return ret; | 221 | return ret; |
@@ -333,20 +344,12 @@ static struct cht_acpi_card snd_soc_cards[] = { | |||
333 | {"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650}, | 344 | {"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650}, |
334 | }; | 345 | }; |
335 | 346 | ||
336 | static acpi_status snd_acpi_codec_match(acpi_handle handle, u32 level, | ||
337 | void *context, void **ret) | ||
338 | { | ||
339 | *(bool *)context = true; | ||
340 | return AE_OK; | ||
341 | } | ||
342 | |||
343 | static int snd_cht_mc_probe(struct platform_device *pdev) | 347 | static int snd_cht_mc_probe(struct platform_device *pdev) |
344 | { | 348 | { |
345 | int ret_val = 0; | 349 | int ret_val = 0; |
346 | int i; | 350 | int i; |
347 | struct cht_mc_private *drv; | 351 | struct cht_mc_private *drv; |
348 | struct snd_soc_card *card = snd_soc_cards[0].soc_card; | 352 | struct snd_soc_card *card = snd_soc_cards[0].soc_card; |
349 | bool found = false; | ||
350 | char codec_name[16]; | 353 | char codec_name[16]; |
351 | 354 | ||
352 | drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC); | 355 | drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_ATOMIC); |
@@ -354,10 +357,7 @@ static int snd_cht_mc_probe(struct platform_device *pdev) | |||
354 | return -ENOMEM; | 357 | return -ENOMEM; |
355 | 358 | ||
356 | for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) { | 359 | for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) { |
357 | if (ACPI_SUCCESS(acpi_get_devices( | 360 | if (acpi_dev_present(snd_soc_cards[i].codec_id)) { |
358 | snd_soc_cards[i].codec_id, | ||
359 | snd_acpi_codec_match, | ||
360 | &found, NULL)) && found) { | ||
361 | dev_dbg(&pdev->dev, | 361 | dev_dbg(&pdev->dev, |
362 | "found codec %s\n", snd_soc_cards[i].codec_id); | 362 | "found codec %s\n", snd_soc_cards[i].codec_id); |
363 | card = snd_soc_cards[i].soc_card; | 363 | card = snd_soc_cards[i].soc_card; |
diff --git a/sound/soc/intel/boards/skl_nau88l25_max98357a.c b/sound/soc/intel/boards/skl_nau88l25_max98357a.c index ab7da9c304b2..72176b79a18d 100644 --- a/sound/soc/intel/boards/skl_nau88l25_max98357a.c +++ b/sound/soc/intel/boards/skl_nau88l25_max98357a.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <sound/pcm_params.h> | 22 | #include <sound/pcm_params.h> |
23 | #include <sound/soc.h> | 23 | #include <sound/soc.h> |
24 | #include "../../codecs/nau8825.h" | 24 | #include "../../codecs/nau8825.h" |
25 | #include "../../codecs/hdac_hdmi.h" | ||
25 | 26 | ||
26 | #define SKL_NUVOTON_CODEC_DAI "nau8825-hifi" | 27 | #define SKL_NUVOTON_CODEC_DAI "nau8825-hifi" |
27 | #define SKL_MAXIM_CODEC_DAI "HiFi" | 28 | #define SKL_MAXIM_CODEC_DAI "HiFi" |
@@ -29,6 +30,16 @@ | |||
29 | static struct snd_soc_jack skylake_headset; | 30 | static struct snd_soc_jack skylake_headset; |
30 | static struct snd_soc_card skylake_audio_card; | 31 | static struct snd_soc_card skylake_audio_card; |
31 | 32 | ||
33 | enum { | ||
34 | SKL_DPCM_AUDIO_PB = 0, | ||
35 | SKL_DPCM_AUDIO_CP, | ||
36 | SKL_DPCM_AUDIO_REF_CP, | ||
37 | SKL_DPCM_AUDIO_DMIC_CP, | ||
38 | SKL_DPCM_AUDIO_HDMI1_PB, | ||
39 | SKL_DPCM_AUDIO_HDMI2_PB, | ||
40 | SKL_DPCM_AUDIO_HDMI3_PB, | ||
41 | }; | ||
42 | |||
32 | static inline struct snd_soc_dai *skl_get_codec_dai(struct snd_soc_card *card) | 43 | static inline struct snd_soc_dai *skl_get_codec_dai(struct snd_soc_card *card) |
33 | { | 44 | { |
34 | struct snd_soc_pcm_runtime *rtd; | 45 | struct snd_soc_pcm_runtime *rtd; |
@@ -87,7 +98,6 @@ static const struct snd_soc_dapm_widget skylake_widgets[] = { | |||
87 | SND_SOC_DAPM_MIC("Headset Mic", NULL), | 98 | SND_SOC_DAPM_MIC("Headset Mic", NULL), |
88 | SND_SOC_DAPM_SPK("Spk", NULL), | 99 | SND_SOC_DAPM_SPK("Spk", NULL), |
89 | SND_SOC_DAPM_MIC("SoC DMIC", NULL), | 100 | SND_SOC_DAPM_MIC("SoC DMIC", NULL), |
90 | SND_SOC_DAPM_SINK("WoV Sink"), | ||
91 | SND_SOC_DAPM_SPK("DP", NULL), | 101 | SND_SOC_DAPM_SPK("DP", NULL), |
92 | SND_SOC_DAPM_SPK("HDMI", NULL), | 102 | SND_SOC_DAPM_SPK("HDMI", NULL), |
93 | SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, | 103 | SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, |
@@ -107,7 +117,6 @@ static const struct snd_soc_dapm_route skylake_map[] = { | |||
107 | { "MIC", NULL, "Headset Mic" }, | 117 | { "MIC", NULL, "Headset Mic" }, |
108 | { "DMic", NULL, "SoC DMIC" }, | 118 | { "DMic", NULL, "SoC DMIC" }, |
109 | 119 | ||
110 | {"WoV Sink", NULL, "hwd_in sink"}, | ||
111 | {"HDMI", NULL, "hif5 Output"}, | 120 | {"HDMI", NULL, "hif5 Output"}, |
112 | {"DP", NULL, "hif6 Output"}, | 121 | {"DP", NULL, "hif6 Output"}, |
113 | 122 | ||
@@ -124,8 +133,14 @@ static const struct snd_soc_dapm_route skylake_map[] = { | |||
124 | /* DMIC */ | 133 | /* DMIC */ |
125 | { "dmic01_hifi", NULL, "DMIC01 Rx" }, | 134 | { "dmic01_hifi", NULL, "DMIC01 Rx" }, |
126 | { "DMIC01 Rx", NULL, "DMIC AIF" }, | 135 | { "DMIC01 Rx", NULL, "DMIC AIF" }, |
127 | { "hifi1", NULL, "iDisp Tx"}, | 136 | |
128 | { "iDisp Tx", NULL, "iDisp_out"}, | 137 | { "hifi3", NULL, "iDisp3 Tx"}, |
138 | { "iDisp3 Tx", NULL, "iDisp3_out"}, | ||
139 | { "hifi2", NULL, "iDisp2 Tx"}, | ||
140 | { "iDisp2 Tx", NULL, "iDisp2_out"}, | ||
141 | { "hifi1", NULL, "iDisp1 Tx"}, | ||
142 | { "iDisp1 Tx", NULL, "iDisp1_out"}, | ||
143 | |||
129 | { "Headphone Jack", NULL, "Platform Clock" }, | 144 | { "Headphone Jack", NULL, "Platform Clock" }, |
130 | { "Headset Mic", NULL, "Platform Clock" }, | 145 | { "Headset Mic", NULL, "Platform Clock" }, |
131 | }; | 146 | }; |
@@ -171,11 +186,31 @@ static int skylake_nau8825_codec_init(struct snd_soc_pcm_runtime *rtd) | |||
171 | nau8825_enable_jack_detect(codec, &skylake_headset); | 186 | nau8825_enable_jack_detect(codec, &skylake_headset); |
172 | 187 | ||
173 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC"); | 188 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC"); |
174 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "WoV Sink"); | ||
175 | 189 | ||
176 | return ret; | 190 | return ret; |
177 | } | 191 | } |
178 | 192 | ||
193 | static int skylake_hdmi1_init(struct snd_soc_pcm_runtime *rtd) | ||
194 | { | ||
195 | struct snd_soc_dai *dai = rtd->codec_dai; | ||
196 | |||
197 | return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI1_PB); | ||
198 | } | ||
199 | |||
200 | static int skylake_hdmi2_init(struct snd_soc_pcm_runtime *rtd) | ||
201 | { | ||
202 | struct snd_soc_dai *dai = rtd->codec_dai; | ||
203 | |||
204 | return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI2_PB); | ||
205 | } | ||
206 | |||
207 | static int skylake_hdmi3_init(struct snd_soc_pcm_runtime *rtd) | ||
208 | { | ||
209 | struct snd_soc_dai *dai = rtd->codec_dai; | ||
210 | |||
211 | return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI3_PB); | ||
212 | } | ||
213 | |||
179 | static int skylake_nau8825_fe_init(struct snd_soc_pcm_runtime *rtd) | 214 | static int skylake_nau8825_fe_init(struct snd_soc_pcm_runtime *rtd) |
180 | { | 215 | { |
181 | struct snd_soc_dapm_context *dapm; | 216 | struct snd_soc_dapm_context *dapm; |
@@ -318,7 +353,7 @@ static struct snd_soc_ops skylaye_refcap_ops = { | |||
318 | /* skylake digital audio interface glue - connects codec <--> CPU */ | 353 | /* skylake digital audio interface glue - connects codec <--> CPU */ |
319 | static struct snd_soc_dai_link skylake_dais[] = { | 354 | static struct snd_soc_dai_link skylake_dais[] = { |
320 | /* Front End DAI links */ | 355 | /* Front End DAI links */ |
321 | { | 356 | [SKL_DPCM_AUDIO_PB] = { |
322 | .name = "Skl Audio Port", | 357 | .name = "Skl Audio Port", |
323 | .stream_name = "Audio", | 358 | .stream_name = "Audio", |
324 | .cpu_dai_name = "System Pin", | 359 | .cpu_dai_name = "System Pin", |
@@ -333,7 +368,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
333 | .dpcm_playback = 1, | 368 | .dpcm_playback = 1, |
334 | .ops = &skylake_nau8825_fe_ops, | 369 | .ops = &skylake_nau8825_fe_ops, |
335 | }, | 370 | }, |
336 | { | 371 | [SKL_DPCM_AUDIO_CP] = { |
337 | .name = "Skl Audio Capture Port", | 372 | .name = "Skl Audio Capture Port", |
338 | .stream_name = "Audio Record", | 373 | .stream_name = "Audio Record", |
339 | .cpu_dai_name = "System Pin", | 374 | .cpu_dai_name = "System Pin", |
@@ -347,7 +382,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
347 | .dpcm_capture = 1, | 382 | .dpcm_capture = 1, |
348 | .ops = &skylake_nau8825_fe_ops, | 383 | .ops = &skylake_nau8825_fe_ops, |
349 | }, | 384 | }, |
350 | { | 385 | [SKL_DPCM_AUDIO_REF_CP] = { |
351 | .name = "Skl Audio Reference cap", | 386 | .name = "Skl Audio Reference cap", |
352 | .stream_name = "Wake on Voice", | 387 | .stream_name = "Wake on Voice", |
353 | .cpu_dai_name = "Reference Pin", | 388 | .cpu_dai_name = "Reference Pin", |
@@ -361,7 +396,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
361 | .dynamic = 1, | 396 | .dynamic = 1, |
362 | .ops = &skylaye_refcap_ops, | 397 | .ops = &skylaye_refcap_ops, |
363 | }, | 398 | }, |
364 | { | 399 | [SKL_DPCM_AUDIO_DMIC_CP] = { |
365 | .name = "Skl Audio DMIC cap", | 400 | .name = "Skl Audio DMIC cap", |
366 | .stream_name = "dmiccap", | 401 | .stream_name = "dmiccap", |
367 | .cpu_dai_name = "DMIC Pin", | 402 | .cpu_dai_name = "DMIC Pin", |
@@ -374,15 +409,45 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
374 | .dynamic = 1, | 409 | .dynamic = 1, |
375 | .ops = &skylake_dmic_ops, | 410 | .ops = &skylake_dmic_ops, |
376 | }, | 411 | }, |
377 | { | 412 | [SKL_DPCM_AUDIO_HDMI1_PB] = { |
378 | .name = "Skl HDMI Port", | 413 | .name = "Skl HDMI Port1", |
379 | .stream_name = "Hdmi", | 414 | .stream_name = "Hdmi1", |
380 | .cpu_dai_name = "HDMI Pin", | 415 | .cpu_dai_name = "HDMI1 Pin", |
416 | .codec_name = "snd-soc-dummy", | ||
417 | .codec_dai_name = "snd-soc-dummy-dai", | ||
418 | .platform_name = "0000:00:1f.3", | ||
419 | .dpcm_playback = 1, | ||
420 | .init = NULL, | ||
421 | .trigger = { | ||
422 | SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
423 | .nonatomic = 1, | ||
424 | .dynamic = 1, | ||
425 | }, | ||
426 | [SKL_DPCM_AUDIO_HDMI2_PB] = { | ||
427 | .name = "Skl HDMI Port2", | ||
428 | .stream_name = "Hdmi2", | ||
429 | .cpu_dai_name = "HDMI2 Pin", | ||
381 | .codec_name = "snd-soc-dummy", | 430 | .codec_name = "snd-soc-dummy", |
382 | .codec_dai_name = "snd-soc-dummy-dai", | 431 | .codec_dai_name = "snd-soc-dummy-dai", |
383 | .platform_name = "0000:00:1f.3", | 432 | .platform_name = "0000:00:1f.3", |
384 | .dpcm_playback = 1, | 433 | .dpcm_playback = 1, |
385 | .init = NULL, | 434 | .init = NULL, |
435 | .trigger = { | ||
436 | SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
437 | .nonatomic = 1, | ||
438 | .dynamic = 1, | ||
439 | }, | ||
440 | [SKL_DPCM_AUDIO_HDMI3_PB] = { | ||
441 | .name = "Skl HDMI Port3", | ||
442 | .stream_name = "Hdmi3", | ||
443 | .cpu_dai_name = "HDMI3 Pin", | ||
444 | .codec_name = "snd-soc-dummy", | ||
445 | .codec_dai_name = "snd-soc-dummy-dai", | ||
446 | .platform_name = "0000:00:1f.3", | ||
447 | .trigger = { | ||
448 | SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
449 | .dpcm_playback = 1, | ||
450 | .init = NULL, | ||
386 | .nonatomic = 1, | 451 | .nonatomic = 1, |
387 | .dynamic = 1, | 452 | .dynamic = 1, |
388 | }, | 453 | }, |
@@ -407,7 +472,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
407 | { | 472 | { |
408 | /* SSP1 - Codec */ | 473 | /* SSP1 - Codec */ |
409 | .name = "SSP1-Codec", | 474 | .name = "SSP1-Codec", |
410 | .be_id = 0, | 475 | .be_id = 1, |
411 | .cpu_dai_name = "SSP1 Pin", | 476 | .cpu_dai_name = "SSP1 Pin", |
412 | .platform_name = "0000:00:1f.3", | 477 | .platform_name = "0000:00:1f.3", |
413 | .no_pcm = 1, | 478 | .no_pcm = 1, |
@@ -424,7 +489,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
424 | }, | 489 | }, |
425 | { | 490 | { |
426 | .name = "dmic01", | 491 | .name = "dmic01", |
427 | .be_id = 1, | 492 | .be_id = 2, |
428 | .cpu_dai_name = "DMIC01 Pin", | 493 | .cpu_dai_name = "DMIC01 Pin", |
429 | .codec_name = "dmic-codec", | 494 | .codec_name = "dmic-codec", |
430 | .codec_dai_name = "dmic-hifi", | 495 | .codec_dai_name = "dmic-hifi", |
@@ -435,13 +500,36 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
435 | .no_pcm = 1, | 500 | .no_pcm = 1, |
436 | }, | 501 | }, |
437 | { | 502 | { |
438 | .name = "iDisp", | 503 | .name = "iDisp1", |
439 | .be_id = 3, | 504 | .be_id = 3, |
440 | .cpu_dai_name = "iDisp Pin", | 505 | .cpu_dai_name = "iDisp1 Pin", |
441 | .codec_name = "ehdaudio0D2", | 506 | .codec_name = "ehdaudio0D2", |
442 | .codec_dai_name = "intel-hdmi-hifi1", | 507 | .codec_dai_name = "intel-hdmi-hifi1", |
443 | .platform_name = "0000:00:1f.3", | 508 | .platform_name = "0000:00:1f.3", |
444 | .dpcm_playback = 1, | 509 | .dpcm_playback = 1, |
510 | .init = skylake_hdmi1_init, | ||
511 | .no_pcm = 1, | ||
512 | }, | ||
513 | { | ||
514 | .name = "iDisp2", | ||
515 | .be_id = 4, | ||
516 | .cpu_dai_name = "iDisp2 Pin", | ||
517 | .codec_name = "ehdaudio0D2", | ||
518 | .codec_dai_name = "intel-hdmi-hifi2", | ||
519 | .platform_name = "0000:00:1f.3", | ||
520 | .init = skylake_hdmi2_init, | ||
521 | .dpcm_playback = 1, | ||
522 | .no_pcm = 1, | ||
523 | }, | ||
524 | { | ||
525 | .name = "iDisp3", | ||
526 | .be_id = 5, | ||
527 | .cpu_dai_name = "iDisp3 Pin", | ||
528 | .codec_name = "ehdaudio0D2", | ||
529 | .codec_dai_name = "intel-hdmi-hifi3", | ||
530 | .platform_name = "0000:00:1f.3", | ||
531 | .init = skylake_hdmi3_init, | ||
532 | .dpcm_playback = 1, | ||
445 | .no_pcm = 1, | 533 | .no_pcm = 1, |
446 | }, | 534 | }, |
447 | }; | 535 | }; |
diff --git a/sound/soc/intel/boards/skl_nau88l25_ssm4567.c b/sound/soc/intel/boards/skl_nau88l25_ssm4567.c index c071812f31e5..5f1ca99ae9b0 100644 --- a/sound/soc/intel/boards/skl_nau88l25_ssm4567.c +++ b/sound/soc/intel/boards/skl_nau88l25_ssm4567.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <sound/jack.h> | 26 | #include <sound/jack.h> |
27 | #include <sound/pcm_params.h> | 27 | #include <sound/pcm_params.h> |
28 | #include "../../codecs/nau8825.h" | 28 | #include "../../codecs/nau8825.h" |
29 | #include "../../codecs/hdac_hdmi.h" | ||
29 | 30 | ||
30 | #define SKL_NUVOTON_CODEC_DAI "nau8825-hifi" | 31 | #define SKL_NUVOTON_CODEC_DAI "nau8825-hifi" |
31 | #define SKL_SSM_CODEC_DAI "ssm4567-hifi" | 32 | #define SKL_SSM_CODEC_DAI "ssm4567-hifi" |
@@ -33,6 +34,16 @@ | |||
33 | static struct snd_soc_jack skylake_headset; | 34 | static struct snd_soc_jack skylake_headset; |
34 | static struct snd_soc_card skylake_audio_card; | 35 | static struct snd_soc_card skylake_audio_card; |
35 | 36 | ||
37 | enum { | ||
38 | SKL_DPCM_AUDIO_PB = 0, | ||
39 | SKL_DPCM_AUDIO_CP, | ||
40 | SKL_DPCM_AUDIO_REF_CP, | ||
41 | SKL_DPCM_AUDIO_DMIC_CP, | ||
42 | SKL_DPCM_AUDIO_HDMI1_PB, | ||
43 | SKL_DPCM_AUDIO_HDMI2_PB, | ||
44 | SKL_DPCM_AUDIO_HDMI3_PB, | ||
45 | }; | ||
46 | |||
36 | static inline struct snd_soc_dai *skl_get_codec_dai(struct snd_soc_card *card) | 47 | static inline struct snd_soc_dai *skl_get_codec_dai(struct snd_soc_card *card) |
37 | { | 48 | { |
38 | struct snd_soc_pcm_runtime *rtd; | 49 | struct snd_soc_pcm_runtime *rtd; |
@@ -92,7 +103,6 @@ static const struct snd_soc_dapm_widget skylake_widgets[] = { | |||
92 | SND_SOC_DAPM_SPK("Left Speaker", NULL), | 103 | SND_SOC_DAPM_SPK("Left Speaker", NULL), |
93 | SND_SOC_DAPM_SPK("Right Speaker", NULL), | 104 | SND_SOC_DAPM_SPK("Right Speaker", NULL), |
94 | SND_SOC_DAPM_MIC("SoC DMIC", NULL), | 105 | SND_SOC_DAPM_MIC("SoC DMIC", NULL), |
95 | SND_SOC_DAPM_SINK("WoV Sink"), | ||
96 | SND_SOC_DAPM_SPK("DP", NULL), | 106 | SND_SOC_DAPM_SPK("DP", NULL), |
97 | SND_SOC_DAPM_SPK("HDMI", NULL), | 107 | SND_SOC_DAPM_SPK("HDMI", NULL), |
98 | SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, | 108 | SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, |
@@ -113,8 +123,6 @@ static const struct snd_soc_dapm_route skylake_map[] = { | |||
113 | {"MIC", NULL, "Headset Mic"}, | 123 | {"MIC", NULL, "Headset Mic"}, |
114 | {"DMic", NULL, "SoC DMIC"}, | 124 | {"DMic", NULL, "SoC DMIC"}, |
115 | 125 | ||
116 | {"WoV Sink", NULL, "hwd_in sink"}, | ||
117 | |||
118 | {"HDMI", NULL, "hif5 Output"}, | 126 | {"HDMI", NULL, "hif5 Output"}, |
119 | {"DP", NULL, "hif6 Output"}, | 127 | {"DP", NULL, "hif6 Output"}, |
120 | /* CODEC BE connections */ | 128 | /* CODEC BE connections */ |
@@ -122,6 +130,11 @@ static const struct snd_soc_dapm_route skylake_map[] = { | |||
122 | { "Right Playback", NULL, "ssp0 Tx"}, | 130 | { "Right Playback", NULL, "ssp0 Tx"}, |
123 | { "ssp0 Tx", NULL, "codec0_out"}, | 131 | { "ssp0 Tx", NULL, "codec0_out"}, |
124 | 132 | ||
133 | /* IV feedback path */ | ||
134 | { "codec0_lp_in", NULL, "ssp0 Rx"}, | ||
135 | { "ssp0 Rx", NULL, "Left Capture Sense" }, | ||
136 | { "ssp0 Rx", NULL, "Right Capture Sense" }, | ||
137 | |||
125 | { "Playback", NULL, "ssp1 Tx"}, | 138 | { "Playback", NULL, "ssp1 Tx"}, |
126 | { "ssp1 Tx", NULL, "codec1_out"}, | 139 | { "ssp1 Tx", NULL, "codec1_out"}, |
127 | 140 | ||
@@ -131,8 +144,14 @@ static const struct snd_soc_dapm_route skylake_map[] = { | |||
131 | /* DMIC */ | 144 | /* DMIC */ |
132 | { "dmic01_hifi", NULL, "DMIC01 Rx" }, | 145 | { "dmic01_hifi", NULL, "DMIC01 Rx" }, |
133 | { "DMIC01 Rx", NULL, "DMIC AIF" }, | 146 | { "DMIC01 Rx", NULL, "DMIC AIF" }, |
134 | { "hifi1", NULL, "iDisp Tx"}, | 147 | |
135 | { "iDisp Tx", NULL, "iDisp_out"}, | 148 | { "hifi3", NULL, "iDisp3 Tx"}, |
149 | { "iDisp3 Tx", NULL, "iDisp3_out"}, | ||
150 | { "hifi2", NULL, "iDisp2 Tx"}, | ||
151 | { "iDisp2 Tx", NULL, "iDisp2_out"}, | ||
152 | { "hifi1", NULL, "iDisp1 Tx"}, | ||
153 | { "iDisp1 Tx", NULL, "iDisp1_out"}, | ||
154 | |||
136 | { "Headphone Jack", NULL, "Platform Clock" }, | 155 | { "Headphone Jack", NULL, "Platform Clock" }, |
137 | { "Headset Mic", NULL, "Platform Clock" }, | 156 | { "Headset Mic", NULL, "Platform Clock" }, |
138 | }; | 157 | }; |
@@ -197,11 +216,32 @@ static int skylake_nau8825_codec_init(struct snd_soc_pcm_runtime *rtd) | |||
197 | nau8825_enable_jack_detect(codec, &skylake_headset); | 216 | nau8825_enable_jack_detect(codec, &skylake_headset); |
198 | 217 | ||
199 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC"); | 218 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC"); |
200 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "WoV Sink"); | ||
201 | 219 | ||
202 | return ret; | 220 | return ret; |
203 | } | 221 | } |
204 | 222 | ||
223 | static int skylake_hdmi1_init(struct snd_soc_pcm_runtime *rtd) | ||
224 | { | ||
225 | struct snd_soc_dai *dai = rtd->codec_dai; | ||
226 | |||
227 | return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI1_PB); | ||
228 | } | ||
229 | |||
230 | static int skylake_hdmi2_init(struct snd_soc_pcm_runtime *rtd) | ||
231 | { | ||
232 | struct snd_soc_dai *dai = rtd->codec_dai; | ||
233 | |||
234 | return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI2_PB); | ||
235 | } | ||
236 | |||
237 | |||
238 | static int skylake_hdmi3_init(struct snd_soc_pcm_runtime *rtd) | ||
239 | { | ||
240 | struct snd_soc_dai *dai = rtd->codec_dai; | ||
241 | |||
242 | return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI3_PB); | ||
243 | } | ||
244 | |||
205 | static int skylake_nau8825_fe_init(struct snd_soc_pcm_runtime *rtd) | 245 | static int skylake_nau8825_fe_init(struct snd_soc_pcm_runtime *rtd) |
206 | { | 246 | { |
207 | struct snd_soc_dapm_context *dapm; | 247 | struct snd_soc_dapm_context *dapm; |
@@ -362,7 +402,7 @@ static struct snd_soc_ops skylaye_refcap_ops = { | |||
362 | /* skylake digital audio interface glue - connects codec <--> CPU */ | 402 | /* skylake digital audio interface glue - connects codec <--> CPU */ |
363 | static struct snd_soc_dai_link skylake_dais[] = { | 403 | static struct snd_soc_dai_link skylake_dais[] = { |
364 | /* Front End DAI links */ | 404 | /* Front End DAI links */ |
365 | { | 405 | [SKL_DPCM_AUDIO_PB] = { |
366 | .name = "Skl Audio Port", | 406 | .name = "Skl Audio Port", |
367 | .stream_name = "Audio", | 407 | .stream_name = "Audio", |
368 | .cpu_dai_name = "System Pin", | 408 | .cpu_dai_name = "System Pin", |
@@ -377,7 +417,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
377 | .dpcm_playback = 1, | 417 | .dpcm_playback = 1, |
378 | .ops = &skylake_nau8825_fe_ops, | 418 | .ops = &skylake_nau8825_fe_ops, |
379 | }, | 419 | }, |
380 | { | 420 | [SKL_DPCM_AUDIO_CP] = { |
381 | .name = "Skl Audio Capture Port", | 421 | .name = "Skl Audio Capture Port", |
382 | .stream_name = "Audio Record", | 422 | .stream_name = "Audio Record", |
383 | .cpu_dai_name = "System Pin", | 423 | .cpu_dai_name = "System Pin", |
@@ -391,7 +431,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
391 | .dpcm_capture = 1, | 431 | .dpcm_capture = 1, |
392 | .ops = &skylake_nau8825_fe_ops, | 432 | .ops = &skylake_nau8825_fe_ops, |
393 | }, | 433 | }, |
394 | { | 434 | [SKL_DPCM_AUDIO_REF_CP] = { |
395 | .name = "Skl Audio Reference cap", | 435 | .name = "Skl Audio Reference cap", |
396 | .stream_name = "Wake on Voice", | 436 | .stream_name = "Wake on Voice", |
397 | .cpu_dai_name = "Reference Pin", | 437 | .cpu_dai_name = "Reference Pin", |
@@ -405,7 +445,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
405 | .dynamic = 1, | 445 | .dynamic = 1, |
406 | .ops = &skylaye_refcap_ops, | 446 | .ops = &skylaye_refcap_ops, |
407 | }, | 447 | }, |
408 | { | 448 | [SKL_DPCM_AUDIO_DMIC_CP] = { |
409 | .name = "Skl Audio DMIC cap", | 449 | .name = "Skl Audio DMIC cap", |
410 | .stream_name = "dmiccap", | 450 | .stream_name = "dmiccap", |
411 | .cpu_dai_name = "DMIC Pin", | 451 | .cpu_dai_name = "DMIC Pin", |
@@ -418,13 +458,43 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
418 | .dynamic = 1, | 458 | .dynamic = 1, |
419 | .ops = &skylake_dmic_ops, | 459 | .ops = &skylake_dmic_ops, |
420 | }, | 460 | }, |
421 | { | 461 | [SKL_DPCM_AUDIO_HDMI1_PB] = { |
422 | .name = "Skl HDMI Port", | 462 | .name = "Skl HDMI Port1", |
423 | .stream_name = "Hdmi", | 463 | .stream_name = "Hdmi1", |
424 | .cpu_dai_name = "HDMI Pin", | 464 | .cpu_dai_name = "HDMI1 Pin", |
465 | .codec_name = "snd-soc-dummy", | ||
466 | .codec_dai_name = "snd-soc-dummy-dai", | ||
467 | .platform_name = "0000:00:1f.3", | ||
468 | .dpcm_playback = 1, | ||
469 | .init = NULL, | ||
470 | .trigger = { | ||
471 | SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
472 | .nonatomic = 1, | ||
473 | .dynamic = 1, | ||
474 | }, | ||
475 | [SKL_DPCM_AUDIO_HDMI2_PB] = { | ||
476 | .name = "Skl HDMI Port2", | ||
477 | .stream_name = "Hdmi2", | ||
478 | .cpu_dai_name = "HDMI2 Pin", | ||
479 | .codec_name = "snd-soc-dummy", | ||
480 | .codec_dai_name = "snd-soc-dummy-dai", | ||
481 | .platform_name = "0000:00:1f.3", | ||
482 | .dpcm_playback = 1, | ||
483 | .init = NULL, | ||
484 | .trigger = { | ||
485 | SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
486 | .nonatomic = 1, | ||
487 | .dynamic = 1, | ||
488 | }, | ||
489 | [SKL_DPCM_AUDIO_HDMI3_PB] = { | ||
490 | .name = "Skl HDMI Port3", | ||
491 | .stream_name = "Hdmi3", | ||
492 | .cpu_dai_name = "HDMI3 Pin", | ||
425 | .codec_name = "snd-soc-dummy", | 493 | .codec_name = "snd-soc-dummy", |
426 | .codec_dai_name = "snd-soc-dummy-dai", | 494 | .codec_dai_name = "snd-soc-dummy-dai", |
427 | .platform_name = "0000:00:1f.3", | 495 | .platform_name = "0000:00:1f.3", |
496 | .trigger = { | ||
497 | SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
428 | .dpcm_playback = 1, | 498 | .dpcm_playback = 1, |
429 | .init = NULL, | 499 | .init = NULL, |
430 | .nonatomic = 1, | 500 | .nonatomic = 1, |
@@ -448,11 +518,12 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
448 | .ignore_pmdown_time = 1, | 518 | .ignore_pmdown_time = 1, |
449 | .be_hw_params_fixup = skylake_ssp_fixup, | 519 | .be_hw_params_fixup = skylake_ssp_fixup, |
450 | .dpcm_playback = 1, | 520 | .dpcm_playback = 1, |
521 | .dpcm_capture = 1, | ||
451 | }, | 522 | }, |
452 | { | 523 | { |
453 | /* SSP1 - Codec */ | 524 | /* SSP1 - Codec */ |
454 | .name = "SSP1-Codec", | 525 | .name = "SSP1-Codec", |
455 | .be_id = 0, | 526 | .be_id = 1, |
456 | .cpu_dai_name = "SSP1 Pin", | 527 | .cpu_dai_name = "SSP1 Pin", |
457 | .platform_name = "0000:00:1f.3", | 528 | .platform_name = "0000:00:1f.3", |
458 | .no_pcm = 1, | 529 | .no_pcm = 1, |
@@ -469,7 +540,7 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
469 | }, | 540 | }, |
470 | { | 541 | { |
471 | .name = "dmic01", | 542 | .name = "dmic01", |
472 | .be_id = 1, | 543 | .be_id = 2, |
473 | .cpu_dai_name = "DMIC01 Pin", | 544 | .cpu_dai_name = "DMIC01 Pin", |
474 | .codec_name = "dmic-codec", | 545 | .codec_name = "dmic-codec", |
475 | .codec_dai_name = "dmic-hifi", | 546 | .codec_dai_name = "dmic-hifi", |
@@ -480,13 +551,36 @@ static struct snd_soc_dai_link skylake_dais[] = { | |||
480 | .no_pcm = 1, | 551 | .no_pcm = 1, |
481 | }, | 552 | }, |
482 | { | 553 | { |
483 | .name = "iDisp", | 554 | .name = "iDisp1", |
484 | .be_id = 3, | 555 | .be_id = 3, |
485 | .cpu_dai_name = "iDisp Pin", | 556 | .cpu_dai_name = "iDisp1 Pin", |
486 | .codec_name = "ehdaudio0D2", | 557 | .codec_name = "ehdaudio0D2", |
487 | .codec_dai_name = "intel-hdmi-hifi1", | 558 | .codec_dai_name = "intel-hdmi-hifi1", |
488 | .platform_name = "0000:00:1f.3", | 559 | .platform_name = "0000:00:1f.3", |
489 | .dpcm_playback = 1, | 560 | .dpcm_playback = 1, |
561 | .init = skylake_hdmi1_init, | ||
562 | .no_pcm = 1, | ||
563 | }, | ||
564 | { | ||
565 | .name = "iDisp2", | ||
566 | .be_id = 4, | ||
567 | .cpu_dai_name = "iDisp2 Pin", | ||
568 | .codec_name = "ehdaudio0D2", | ||
569 | .codec_dai_name = "intel-hdmi-hifi2", | ||
570 | .platform_name = "0000:00:1f.3", | ||
571 | .init = skylake_hdmi2_init, | ||
572 | .dpcm_playback = 1, | ||
573 | .no_pcm = 1, | ||
574 | }, | ||
575 | { | ||
576 | .name = "iDisp3", | ||
577 | .be_id = 5, | ||
578 | .cpu_dai_name = "iDisp3 Pin", | ||
579 | .codec_name = "ehdaudio0D2", | ||
580 | .codec_dai_name = "intel-hdmi-hifi3", | ||
581 | .platform_name = "0000:00:1f.3", | ||
582 | .init = skylake_hdmi3_init, | ||
583 | .dpcm_playback = 1, | ||
490 | .no_pcm = 1, | 584 | .no_pcm = 1, |
491 | }, | 585 | }, |
492 | }; | 586 | }; |
diff --git a/sound/soc/intel/boards/skl_rt286.c b/sound/soc/intel/boards/skl_rt286.c index 2cbcbe412661..2016397a8e75 100644 --- a/sound/soc/intel/boards/skl_rt286.c +++ b/sound/soc/intel/boards/skl_rt286.c | |||
@@ -26,8 +26,20 @@ | |||
26 | #include <sound/jack.h> | 26 | #include <sound/jack.h> |
27 | #include <sound/pcm_params.h> | 27 | #include <sound/pcm_params.h> |
28 | #include "../../codecs/rt286.h" | 28 | #include "../../codecs/rt286.h" |
29 | #include "../../codecs/hdac_hdmi.h" | ||
29 | 30 | ||
30 | static struct snd_soc_jack skylake_headset; | 31 | static struct snd_soc_jack skylake_headset; |
32 | |||
33 | enum { | ||
34 | SKL_DPCM_AUDIO_PB = 0, | ||
35 | SKL_DPCM_AUDIO_CP, | ||
36 | SKL_DPCM_AUDIO_REF_CP, | ||
37 | SKL_DPCM_AUDIO_DMIC_CP, | ||
38 | SKL_DPCM_AUDIO_HDMI1_PB, | ||
39 | SKL_DPCM_AUDIO_HDMI2_PB, | ||
40 | SKL_DPCM_AUDIO_HDMI3_PB, | ||
41 | }; | ||
42 | |||
31 | /* Headset jack detection DAPM pins */ | 43 | /* Headset jack detection DAPM pins */ |
32 | static struct snd_soc_jack_pin skylake_headset_pins[] = { | 44 | static struct snd_soc_jack_pin skylake_headset_pins[] = { |
33 | { | 45 | { |
@@ -52,7 +64,9 @@ static const struct snd_soc_dapm_widget skylake_widgets[] = { | |||
52 | SND_SOC_DAPM_MIC("Mic Jack", NULL), | 64 | SND_SOC_DAPM_MIC("Mic Jack", NULL), |
53 | SND_SOC_DAPM_MIC("DMIC2", NULL), | 65 | SND_SOC_DAPM_MIC("DMIC2", NULL), |
54 | SND_SOC_DAPM_MIC("SoC DMIC", NULL), | 66 | SND_SOC_DAPM_MIC("SoC DMIC", NULL), |
55 | SND_SOC_DAPM_SINK("WoV Sink"), | 67 | SND_SOC_DAPM_SPK("HDMI1", NULL), |
68 | SND_SOC_DAPM_SPK("HDMI2", NULL), | ||
69 | SND_SOC_DAPM_SPK("HDMI3", NULL), | ||
56 | }; | 70 | }; |
57 | 71 | ||
58 | static const struct snd_soc_dapm_route skylake_rt286_map[] = { | 72 | static const struct snd_soc_dapm_route skylake_rt286_map[] = { |
@@ -70,7 +84,9 @@ static const struct snd_soc_dapm_route skylake_rt286_map[] = { | |||
70 | {"DMIC1 Pin", NULL, "DMIC2"}, | 84 | {"DMIC1 Pin", NULL, "DMIC2"}, |
71 | {"DMic", NULL, "SoC DMIC"}, | 85 | {"DMic", NULL, "SoC DMIC"}, |
72 | 86 | ||
73 | {"WoV Sink", NULL, "hwd_in sink"}, | 87 | {"HDMI1", NULL, "hif5 Output"}, |
88 | {"HDMI2", NULL, "hif6 Output"}, | ||
89 | {"HDMI3", NULL, "hif7 Output"}, | ||
74 | 90 | ||
75 | /* CODEC BE connections */ | 91 | /* CODEC BE connections */ |
76 | { "AIF1 Playback", NULL, "ssp0 Tx"}, | 92 | { "AIF1 Playback", NULL, "ssp0 Tx"}, |
@@ -84,8 +100,12 @@ static const struct snd_soc_dapm_route skylake_rt286_map[] = { | |||
84 | { "dmic01_hifi", NULL, "DMIC01 Rx" }, | 100 | { "dmic01_hifi", NULL, "DMIC01 Rx" }, |
85 | { "DMIC01 Rx", NULL, "DMIC AIF" }, | 101 | { "DMIC01 Rx", NULL, "DMIC AIF" }, |
86 | 102 | ||
87 | { "hif1", NULL, "iDisp Tx"}, | 103 | { "hifi3", NULL, "iDisp3 Tx"}, |
88 | { "iDisp Tx", NULL, "iDisp_out"}, | 104 | { "iDisp3 Tx", NULL, "iDisp3_out"}, |
105 | { "hifi2", NULL, "iDisp2 Tx"}, | ||
106 | { "iDisp2 Tx", NULL, "iDisp2_out"}, | ||
107 | { "hifi1", NULL, "iDisp1 Tx"}, | ||
108 | { "iDisp1 Tx", NULL, "iDisp1_out"}, | ||
89 | 109 | ||
90 | }; | 110 | }; |
91 | 111 | ||
@@ -116,11 +136,17 @@ static int skylake_rt286_codec_init(struct snd_soc_pcm_runtime *rtd) | |||
116 | rt286_mic_detect(codec, &skylake_headset); | 136 | rt286_mic_detect(codec, &skylake_headset); |
117 | 137 | ||
118 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC"); | 138 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "SoC DMIC"); |
119 | snd_soc_dapm_ignore_suspend(&rtd->card->dapm, "WoV Sink"); | ||
120 | 139 | ||
121 | return 0; | 140 | return 0; |
122 | } | 141 | } |
123 | 142 | ||
143 | static int skylake_hdmi_init(struct snd_soc_pcm_runtime *rtd) | ||
144 | { | ||
145 | struct snd_soc_dai *dai = rtd->codec_dai; | ||
146 | |||
147 | return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI1_PB + dai->id); | ||
148 | } | ||
149 | |||
124 | static unsigned int rates[] = { | 150 | static unsigned int rates[] = { |
125 | 48000, | 151 | 48000, |
126 | }; | 152 | }; |
@@ -249,7 +275,7 @@ static struct snd_soc_ops skylake_dmic_ops = { | |||
249 | /* skylake digital audio interface glue - connects codec <--> CPU */ | 275 | /* skylake digital audio interface glue - connects codec <--> CPU */ |
250 | static struct snd_soc_dai_link skylake_rt286_dais[] = { | 276 | static struct snd_soc_dai_link skylake_rt286_dais[] = { |
251 | /* Front End DAI links */ | 277 | /* Front End DAI links */ |
252 | { | 278 | [SKL_DPCM_AUDIO_PB] = { |
253 | .name = "Skl Audio Port", | 279 | .name = "Skl Audio Port", |
254 | .stream_name = "Audio", | 280 | .stream_name = "Audio", |
255 | .cpu_dai_name = "System Pin", | 281 | .cpu_dai_name = "System Pin", |
@@ -266,7 +292,7 @@ static struct snd_soc_dai_link skylake_rt286_dais[] = { | |||
266 | .dpcm_playback = 1, | 292 | .dpcm_playback = 1, |
267 | .ops = &skylake_rt286_fe_ops, | 293 | .ops = &skylake_rt286_fe_ops, |
268 | }, | 294 | }, |
269 | { | 295 | [SKL_DPCM_AUDIO_CP] = { |
270 | .name = "Skl Audio Capture Port", | 296 | .name = "Skl Audio Capture Port", |
271 | .stream_name = "Audio Record", | 297 | .stream_name = "Audio Record", |
272 | .cpu_dai_name = "System Pin", | 298 | .cpu_dai_name = "System Pin", |
@@ -282,7 +308,7 @@ static struct snd_soc_dai_link skylake_rt286_dais[] = { | |||
282 | .dpcm_capture = 1, | 308 | .dpcm_capture = 1, |
283 | .ops = &skylake_rt286_fe_ops, | 309 | .ops = &skylake_rt286_fe_ops, |
284 | }, | 310 | }, |
285 | { | 311 | [SKL_DPCM_AUDIO_REF_CP] = { |
286 | .name = "Skl Audio Reference cap", | 312 | .name = "Skl Audio Reference cap", |
287 | .stream_name = "refcap", | 313 | .stream_name = "refcap", |
288 | .cpu_dai_name = "Reference Pin", | 314 | .cpu_dai_name = "Reference Pin", |
@@ -295,7 +321,7 @@ static struct snd_soc_dai_link skylake_rt286_dais[] = { | |||
295 | .nonatomic = 1, | 321 | .nonatomic = 1, |
296 | .dynamic = 1, | 322 | .dynamic = 1, |
297 | }, | 323 | }, |
298 | { | 324 | [SKL_DPCM_AUDIO_DMIC_CP] = { |
299 | .name = "Skl Audio DMIC cap", | 325 | .name = "Skl Audio DMIC cap", |
300 | .stream_name = "dmiccap", | 326 | .stream_name = "dmiccap", |
301 | .cpu_dai_name = "DMIC Pin", | 327 | .cpu_dai_name = "DMIC Pin", |
@@ -308,6 +334,42 @@ static struct snd_soc_dai_link skylake_rt286_dais[] = { | |||
308 | .dynamic = 1, | 334 | .dynamic = 1, |
309 | .ops = &skylake_dmic_ops, | 335 | .ops = &skylake_dmic_ops, |
310 | }, | 336 | }, |
337 | [SKL_DPCM_AUDIO_HDMI1_PB] = { | ||
338 | .name = "Skl HDMI Port1", | ||
339 | .stream_name = "Hdmi1", | ||
340 | .cpu_dai_name = "HDMI1 Pin", | ||
341 | .codec_name = "snd-soc-dummy", | ||
342 | .codec_dai_name = "snd-soc-dummy-dai", | ||
343 | .platform_name = "0000:00:1f.3", | ||
344 | .dpcm_playback = 1, | ||
345 | .init = NULL, | ||
346 | .nonatomic = 1, | ||
347 | .dynamic = 1, | ||
348 | }, | ||
349 | [SKL_DPCM_AUDIO_HDMI2_PB] = { | ||
350 | .name = "Skl HDMI Port2", | ||
351 | .stream_name = "Hdmi2", | ||
352 | .cpu_dai_name = "HDMI2 Pin", | ||
353 | .codec_name = "snd-soc-dummy", | ||
354 | .codec_dai_name = "snd-soc-dummy-dai", | ||
355 | .platform_name = "0000:00:1f.3", | ||
356 | .dpcm_playback = 1, | ||
357 | .init = NULL, | ||
358 | .nonatomic = 1, | ||
359 | .dynamic = 1, | ||
360 | }, | ||
361 | [SKL_DPCM_AUDIO_HDMI3_PB] = { | ||
362 | .name = "Skl HDMI Port3", | ||
363 | .stream_name = "Hdmi3", | ||
364 | .cpu_dai_name = "HDMI3 Pin", | ||
365 | .codec_name = "snd-soc-dummy", | ||
366 | .codec_dai_name = "snd-soc-dummy-dai", | ||
367 | .platform_name = "0000:00:1f.3", | ||
368 | .dpcm_playback = 1, | ||
369 | .init = NULL, | ||
370 | .nonatomic = 1, | ||
371 | .dynamic = 1, | ||
372 | }, | ||
311 | 373 | ||
312 | /* Back End DAI links */ | 374 | /* Back End DAI links */ |
313 | { | 375 | { |
@@ -341,6 +403,39 @@ static struct snd_soc_dai_link skylake_rt286_dais[] = { | |||
341 | .dpcm_capture = 1, | 403 | .dpcm_capture = 1, |
342 | .no_pcm = 1, | 404 | .no_pcm = 1, |
343 | }, | 405 | }, |
406 | { | ||
407 | .name = "iDisp1", | ||
408 | .be_id = 2, | ||
409 | .cpu_dai_name = "iDisp1 Pin", | ||
410 | .codec_name = "ehdaudio0D2", | ||
411 | .codec_dai_name = "intel-hdmi-hifi1", | ||
412 | .platform_name = "0000:00:1f.3", | ||
413 | .init = skylake_hdmi_init, | ||
414 | .dpcm_playback = 1, | ||
415 | .no_pcm = 1, | ||
416 | }, | ||
417 | { | ||
418 | .name = "iDisp2", | ||
419 | .be_id = 3, | ||
420 | .cpu_dai_name = "iDisp2 Pin", | ||
421 | .codec_name = "ehdaudio0D2", | ||
422 | .codec_dai_name = "intel-hdmi-hifi2", | ||
423 | .platform_name = "0000:00:1f.3", | ||
424 | .init = skylake_hdmi_init, | ||
425 | .dpcm_playback = 1, | ||
426 | .no_pcm = 1, | ||
427 | }, | ||
428 | { | ||
429 | .name = "iDisp3", | ||
430 | .be_id = 4, | ||
431 | .cpu_dai_name = "iDisp3 Pin", | ||
432 | .codec_name = "ehdaudio0D2", | ||
433 | .codec_dai_name = "intel-hdmi-hifi3", | ||
434 | .platform_name = "0000:00:1f.3", | ||
435 | .init = skylake_hdmi_init, | ||
436 | .dpcm_playback = 1, | ||
437 | .no_pcm = 1, | ||
438 | }, | ||
344 | }; | 439 | }; |
345 | 440 | ||
346 | /* skylake audio machine driver for SPT + RT286S */ | 441 | /* skylake audio machine driver for SPT + RT286S */ |
diff --git a/sound/soc/intel/common/sst-acpi.h b/sound/soc/intel/common/sst-acpi.h index 3ee3b7ab5d03..4dcfb7e5ed70 100644 --- a/sound/soc/intel/common/sst-acpi.h +++ b/sound/soc/intel/common/sst-acpi.h | |||
@@ -14,6 +14,9 @@ | |||
14 | 14 | ||
15 | #include <linux/acpi.h> | 15 | #include <linux/acpi.h> |
16 | 16 | ||
17 | /* translation fron HID to I2C name, needed for DAI codec_name */ | ||
18 | const char *sst_acpi_find_name_from_hid(const u8 hid[ACPI_ID_LEN]); | ||
19 | |||
17 | /* acpi match */ | 20 | /* acpi match */ |
18 | struct sst_acpi_mach *sst_acpi_find_machine(struct sst_acpi_mach *machines); | 21 | struct sst_acpi_mach *sst_acpi_find_machine(struct sst_acpi_mach *machines); |
19 | 22 | ||
diff --git a/sound/soc/intel/common/sst-dsp-priv.h b/sound/soc/intel/common/sst-dsp-priv.h index 81aa1ed64201..97dc1ae05e69 100644 --- a/sound/soc/intel/common/sst-dsp-priv.h +++ b/sound/soc/intel/common/sst-dsp-priv.h | |||
@@ -317,6 +317,7 @@ struct sst_dsp { | |||
317 | struct skl_cl_dev cl_dev; | 317 | struct skl_cl_dev cl_dev; |
318 | u32 intr_status; | 318 | u32 intr_status; |
319 | const struct firmware *fw; | 319 | const struct firmware *fw; |
320 | struct snd_dma_buffer dmab; | ||
320 | }; | 321 | }; |
321 | 322 | ||
322 | /* Size optimised DRAM/IRAM memcpy */ | 323 | /* Size optimised DRAM/IRAM memcpy */ |
diff --git a/sound/soc/intel/common/sst-match-acpi.c b/sound/soc/intel/common/sst-match-acpi.c index 3b4539d21492..789843307a49 100644 --- a/sound/soc/intel/common/sst-match-acpi.c +++ b/sound/soc/intel/common/sst-match-acpi.c | |||
@@ -13,17 +13,53 @@ | |||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
14 | * more details. | 14 | * more details. |
15 | */ | 15 | */ |
16 | #include <linux/acpi.h> | ||
17 | #include <linux/device.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | 16 | ||
21 | #include "sst-acpi.h" | 17 | #include "sst-acpi.h" |
22 | 18 | ||
19 | static acpi_status sst_acpi_find_name(acpi_handle handle, u32 level, | ||
20 | void *context, void **ret) | ||
21 | { | ||
22 | struct acpi_device *adev; | ||
23 | const char *name = NULL; | ||
24 | |||
25 | if (acpi_bus_get_device(handle, &adev)) | ||
26 | return AE_OK; | ||
27 | |||
28 | if (adev->status.present && adev->status.functional) { | ||
29 | name = acpi_dev_name(adev); | ||
30 | *(const char **)ret = name; | ||
31 | return AE_CTRL_TERMINATE; | ||
32 | } | ||
33 | |||
34 | return AE_OK; | ||
35 | } | ||
36 | |||
37 | const char *sst_acpi_find_name_from_hid(const u8 hid[ACPI_ID_LEN]) | ||
38 | { | ||
39 | const char *name = NULL; | ||
40 | acpi_status status; | ||
41 | |||
42 | status = acpi_get_devices(hid, sst_acpi_find_name, NULL, | ||
43 | (void **)&name); | ||
44 | |||
45 | if (ACPI_FAILURE(status) || name[0] == '\0') | ||
46 | return NULL; | ||
47 | |||
48 | return name; | ||
49 | } | ||
50 | EXPORT_SYMBOL_GPL(sst_acpi_find_name_from_hid); | ||
51 | |||
23 | static acpi_status sst_acpi_mach_match(acpi_handle handle, u32 level, | 52 | static acpi_status sst_acpi_mach_match(acpi_handle handle, u32 level, |
24 | void *context, void **ret) | 53 | void *context, void **ret) |
25 | { | 54 | { |
55 | unsigned long long sta; | ||
56 | acpi_status status; | ||
57 | |||
26 | *(bool *)context = true; | 58 | *(bool *)context = true; |
59 | status = acpi_evaluate_integer(handle, "_STA", NULL, &sta); | ||
60 | if (ACPI_FAILURE(status) || !(sta & ACPI_STA_DEVICE_PRESENT)) | ||
61 | *(bool *)context = false; | ||
62 | |||
27 | return AE_OK; | 63 | return AE_OK; |
28 | } | 64 | } |
29 | 65 | ||
@@ -37,7 +73,6 @@ struct sst_acpi_mach *sst_acpi_find_machine(struct sst_acpi_mach *machines) | |||
37 | sst_acpi_mach_match, | 73 | sst_acpi_mach_match, |
38 | &found, NULL)) && found) | 74 | &found, NULL)) && found) |
39 | return mach; | 75 | return mach; |
40 | |||
41 | return NULL; | 76 | return NULL; |
42 | } | 77 | } |
43 | EXPORT_SYMBOL_GPL(sst_acpi_find_machine); | 78 | EXPORT_SYMBOL_GPL(sst_acpi_find_machine); |
diff --git a/sound/soc/intel/skylake/skl-messages.c b/sound/soc/intel/skylake/skl-messages.c index 4629372d7c8e..79c5089b85d6 100644 --- a/sound/soc/intel/skylake/skl-messages.c +++ b/sound/soc/intel/skylake/skl-messages.c | |||
@@ -72,17 +72,47 @@ static void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable) | |||
72 | skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask); | 72 | skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask); |
73 | } | 73 | } |
74 | 74 | ||
75 | static struct skl_dsp_loader_ops skl_get_loader_ops(void) | ||
76 | { | ||
77 | struct skl_dsp_loader_ops loader_ops; | ||
78 | |||
79 | memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops)); | ||
80 | |||
81 | loader_ops.alloc_dma_buf = skl_alloc_dma_buf; | ||
82 | loader_ops.free_dma_buf = skl_free_dma_buf; | ||
83 | |||
84 | return loader_ops; | ||
85 | }; | ||
86 | |||
87 | static const struct skl_dsp_ops dsp_ops[] = { | ||
88 | { | ||
89 | .id = 0x9d70, | ||
90 | .loader_ops = skl_get_loader_ops, | ||
91 | .init = skl_sst_dsp_init, | ||
92 | .cleanup = skl_sst_dsp_cleanup | ||
93 | }, | ||
94 | }; | ||
95 | |||
96 | static int skl_get_dsp_ops(int pci_id) | ||
97 | { | ||
98 | int i; | ||
99 | |||
100 | for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) { | ||
101 | if (dsp_ops[i].id == pci_id) | ||
102 | return i; | ||
103 | } | ||
104 | |||
105 | return -EINVAL; | ||
106 | } | ||
107 | |||
75 | int skl_init_dsp(struct skl *skl) | 108 | int skl_init_dsp(struct skl *skl) |
76 | { | 109 | { |
77 | void __iomem *mmio_base; | 110 | void __iomem *mmio_base; |
78 | struct hdac_ext_bus *ebus = &skl->ebus; | 111 | struct hdac_ext_bus *ebus = &skl->ebus; |
79 | struct hdac_bus *bus = ebus_to_hbus(ebus); | 112 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
80 | int irq = bus->irq; | ||
81 | struct skl_dsp_loader_ops loader_ops; | 113 | struct skl_dsp_loader_ops loader_ops; |
82 | int ret; | 114 | int irq = bus->irq; |
83 | 115 | int ret, index; | |
84 | loader_ops.alloc_dma_buf = skl_alloc_dma_buf; | ||
85 | loader_ops.free_dma_buf = skl_free_dma_buf; | ||
86 | 116 | ||
87 | /* enable ppcap interrupt */ | 117 | /* enable ppcap interrupt */ |
88 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); | 118 | snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); |
@@ -95,8 +125,14 @@ int skl_init_dsp(struct skl *skl) | |||
95 | return -ENXIO; | 125 | return -ENXIO; |
96 | } | 126 | } |
97 | 127 | ||
98 | ret = skl_sst_dsp_init(bus->dev, mmio_base, irq, | 128 | index = skl_get_dsp_ops(skl->pci->device); |
129 | if (index < 0) | ||
130 | return -EINVAL; | ||
131 | |||
132 | loader_ops = dsp_ops[index].loader_ops(); | ||
133 | ret = dsp_ops[index].init(bus->dev, mmio_base, irq, | ||
99 | skl->fw_name, loader_ops, &skl->skl_sst); | 134 | skl->fw_name, loader_ops, &skl->skl_sst); |
135 | |||
100 | if (ret < 0) | 136 | if (ret < 0) |
101 | return ret; | 137 | return ret; |
102 | 138 | ||
@@ -106,18 +142,26 @@ int skl_init_dsp(struct skl *skl) | |||
106 | return ret; | 142 | return ret; |
107 | } | 143 | } |
108 | 144 | ||
109 | void skl_free_dsp(struct skl *skl) | 145 | int skl_free_dsp(struct skl *skl) |
110 | { | 146 | { |
111 | struct hdac_ext_bus *ebus = &skl->ebus; | 147 | struct hdac_ext_bus *ebus = &skl->ebus; |
112 | struct hdac_bus *bus = ebus_to_hbus(ebus); | 148 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
113 | struct skl_sst *ctx = skl->skl_sst; | 149 | struct skl_sst *ctx = skl->skl_sst; |
150 | int index; | ||
114 | 151 | ||
115 | /* disable ppcap interrupt */ | 152 | /* disable ppcap interrupt */ |
116 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); | 153 | snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); |
117 | 154 | ||
118 | skl_sst_dsp_cleanup(bus->dev, ctx); | 155 | index = skl_get_dsp_ops(skl->pci->device); |
156 | if (index < 0) | ||
157 | return -EIO; | ||
158 | |||
159 | dsp_ops[index].cleanup(bus->dev, ctx); | ||
160 | |||
119 | if (ctx->dsp->addr.lpe) | 161 | if (ctx->dsp->addr.lpe) |
120 | iounmap(ctx->dsp->addr.lpe); | 162 | iounmap(ctx->dsp->addr.lpe); |
163 | |||
164 | return 0; | ||
121 | } | 165 | } |
122 | 166 | ||
123 | int skl_suspend_dsp(struct skl *skl) | 167 | int skl_suspend_dsp(struct skl *skl) |
@@ -238,9 +282,8 @@ static void skl_copy_copier_caps(struct skl_module_cfg *mconfig, | |||
238 | * Calculate the gatewat settings required for copier module, type of | 282 | * Calculate the gatewat settings required for copier module, type of |
239 | * gateway and index of gateway to use | 283 | * gateway and index of gateway to use |
240 | */ | 284 | */ |
241 | static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, | 285 | static u32 skl_get_node_id(struct skl_sst *ctx, |
242 | struct skl_module_cfg *mconfig, | 286 | struct skl_module_cfg *mconfig) |
243 | struct skl_cpr_cfg *cpr_mconfig) | ||
244 | { | 287 | { |
245 | union skl_connector_node_id node_id = {0}; | 288 | union skl_connector_node_id node_id = {0}; |
246 | union skl_ssp_dma_node ssp_node = {0}; | 289 | union skl_ssp_dma_node ssp_node = {0}; |
@@ -289,13 +332,24 @@ static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, | |||
289 | break; | 332 | break; |
290 | 333 | ||
291 | default: | 334 | default: |
292 | cpr_mconfig->gtw_cfg.node_id = SKL_NON_GATEWAY_CPR_NODE_ID; | 335 | node_id.val = 0xFFFFFFFF; |
336 | break; | ||
337 | } | ||
338 | |||
339 | return node_id.val; | ||
340 | } | ||
341 | |||
342 | static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, | ||
343 | struct skl_module_cfg *mconfig, | ||
344 | struct skl_cpr_cfg *cpr_mconfig) | ||
345 | { | ||
346 | cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig); | ||
347 | |||
348 | if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) { | ||
293 | cpr_mconfig->cpr_feature_mask = 0; | 349 | cpr_mconfig->cpr_feature_mask = 0; |
294 | return; | 350 | return; |
295 | } | 351 | } |
296 | 352 | ||
297 | cpr_mconfig->gtw_cfg.node_id = node_id.val; | ||
298 | |||
299 | if (SKL_CONN_SOURCE == mconfig->hw_conn_type) | 353 | if (SKL_CONN_SOURCE == mconfig->hw_conn_type) |
300 | cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs; | 354 | cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs; |
301 | else | 355 | else |
@@ -307,6 +361,46 @@ static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, | |||
307 | skl_copy_copier_caps(mconfig, cpr_mconfig); | 361 | skl_copy_copier_caps(mconfig, cpr_mconfig); |
308 | } | 362 | } |
309 | 363 | ||
364 | #define DMA_CONTROL_ID 5 | ||
365 | |||
366 | int skl_dsp_set_dma_control(struct skl_sst *ctx, struct skl_module_cfg *mconfig) | ||
367 | { | ||
368 | struct skl_dma_control *dma_ctrl; | ||
369 | struct skl_i2s_config_blob config_blob; | ||
370 | struct skl_ipc_large_config_msg msg = {0}; | ||
371 | int err = 0; | ||
372 | |||
373 | |||
374 | /* | ||
375 | * if blob size is same as capablity size, then no dma control | ||
376 | * present so return | ||
377 | */ | ||
378 | if (mconfig->formats_config.caps_size == sizeof(config_blob)) | ||
379 | return 0; | ||
380 | |||
381 | msg.large_param_id = DMA_CONTROL_ID; | ||
382 | msg.param_data_size = sizeof(struct skl_dma_control) + | ||
383 | mconfig->formats_config.caps_size; | ||
384 | |||
385 | dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL); | ||
386 | if (dma_ctrl == NULL) | ||
387 | return -ENOMEM; | ||
388 | |||
389 | dma_ctrl->node_id = skl_get_node_id(ctx, mconfig); | ||
390 | |||
391 | /* size in dwords */ | ||
392 | dma_ctrl->config_length = sizeof(config_blob) / 4; | ||
393 | |||
394 | memcpy(dma_ctrl->config_data, mconfig->formats_config.caps, | ||
395 | mconfig->formats_config.caps_size); | ||
396 | |||
397 | err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl); | ||
398 | |||
399 | kfree(dma_ctrl); | ||
400 | |||
401 | return err; | ||
402 | } | ||
403 | |||
310 | static void skl_setup_out_format(struct skl_sst *ctx, | 404 | static void skl_setup_out_format(struct skl_sst *ctx, |
311 | struct skl_module_cfg *mconfig, | 405 | struct skl_module_cfg *mconfig, |
312 | struct skl_audio_data_format *out_fmt) | 406 | struct skl_audio_data_format *out_fmt) |
diff --git a/sound/soc/intel/skylake/skl-nhlt.c b/sound/soc/intel/skylake/skl-nhlt.c index 6e4b21cdb1bd..14d1916ea9f8 100644 --- a/sound/soc/intel/skylake/skl-nhlt.c +++ b/sound/soc/intel/skylake/skl-nhlt.c | |||
@@ -145,3 +145,37 @@ struct nhlt_specific_cfg | |||
145 | 145 | ||
146 | return NULL; | 146 | return NULL; |
147 | } | 147 | } |
148 | |||
149 | static void skl_nhlt_trim_space(struct skl *skl) | ||
150 | { | ||
151 | char *s = skl->tplg_name; | ||
152 | int cnt; | ||
153 | int i; | ||
154 | |||
155 | cnt = 0; | ||
156 | for (i = 0; s[i]; i++) { | ||
157 | if (!isspace(s[i])) | ||
158 | s[cnt++] = s[i]; | ||
159 | } | ||
160 | |||
161 | s[cnt] = '\0'; | ||
162 | } | ||
163 | |||
164 | int skl_nhlt_update_topology_bin(struct skl *skl) | ||
165 | { | ||
166 | struct nhlt_acpi_table *nhlt = (struct nhlt_acpi_table *)skl->nhlt; | ||
167 | struct hdac_bus *bus = ebus_to_hbus(&skl->ebus); | ||
168 | struct device *dev = bus->dev; | ||
169 | |||
170 | dev_dbg(dev, "oem_id %.6s, oem_table_id %8s oem_revision %d\n", | ||
171 | nhlt->header.oem_id, nhlt->header.oem_table_id, | ||
172 | nhlt->header.oem_revision); | ||
173 | |||
174 | snprintf(skl->tplg_name, sizeof(skl->tplg_name), "%x-%.6s-%.8s-%d%s", | ||
175 | skl->pci_id, nhlt->header.oem_id, nhlt->header.oem_table_id, | ||
176 | nhlt->header.oem_revision, "-tplg.bin"); | ||
177 | |||
178 | skl_nhlt_trim_space(skl); | ||
179 | |||
180 | return 0; | ||
181 | } | ||
diff --git a/sound/soc/intel/skylake/skl-pcm.c b/sound/soc/intel/skylake/skl-pcm.c index b6e6b61d10ec..dab0900eef26 100644 --- a/sound/soc/intel/skylake/skl-pcm.c +++ b/sound/soc/intel/skylake/skl-pcm.c | |||
@@ -206,6 +206,23 @@ static int skl_get_format(struct snd_pcm_substream *substream, | |||
206 | return format_val; | 206 | return format_val; |
207 | } | 207 | } |
208 | 208 | ||
209 | static int skl_be_prepare(struct snd_pcm_substream *substream, | ||
210 | struct snd_soc_dai *dai) | ||
211 | { | ||
212 | struct skl *skl = get_skl_ctx(dai->dev); | ||
213 | struct skl_sst *ctx = skl->skl_sst; | ||
214 | struct skl_module_cfg *mconfig; | ||
215 | |||
216 | if ((dai->playback_active > 1) || (dai->capture_active > 1)) | ||
217 | return 0; | ||
218 | |||
219 | mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream); | ||
220 | if (mconfig == NULL) | ||
221 | return -EINVAL; | ||
222 | |||
223 | return skl_dsp_set_dma_control(ctx, mconfig); | ||
224 | } | ||
225 | |||
209 | static int skl_pcm_prepare(struct snd_pcm_substream *substream, | 226 | static int skl_pcm_prepare(struct snd_pcm_substream *substream, |
210 | struct snd_soc_dai *dai) | 227 | struct snd_soc_dai *dai) |
211 | { | 228 | { |
@@ -458,7 +475,7 @@ static int skl_link_hw_params(struct snd_pcm_substream *substream, | |||
458 | struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); | 475 | struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev); |
459 | struct hdac_ext_stream *link_dev; | 476 | struct hdac_ext_stream *link_dev; |
460 | struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); | 477 | struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream); |
461 | struct skl_dma_params *dma_params; | 478 | struct hdac_ext_dma_params *dma_params; |
462 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | 479 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
463 | struct skl_pipe_params p_params = {0}; | 480 | struct skl_pipe_params p_params = {0}; |
464 | 481 | ||
@@ -470,11 +487,9 @@ static int skl_link_hw_params(struct snd_pcm_substream *substream, | |||
470 | snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev); | 487 | snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev); |
471 | 488 | ||
472 | /* set the stream tag in the codec dai dma params */ | 489 | /* set the stream tag in the codec dai dma params */ |
473 | dma_params = (struct skl_dma_params *) | 490 | dma_params = snd_soc_dai_get_dma_data(codec_dai, substream); |
474 | snd_soc_dai_get_dma_data(codec_dai, substream); | ||
475 | if (dma_params) | 491 | if (dma_params) |
476 | dma_params->stream_tag = hdac_stream(link_dev)->stream_tag; | 492 | dma_params->stream_tag = hdac_stream(link_dev)->stream_tag; |
477 | snd_soc_dai_set_dma_data(codec_dai, substream, (void *)dma_params); | ||
478 | 493 | ||
479 | p_params.s_fmt = snd_pcm_format_width(params_format(params)); | 494 | p_params.s_fmt = snd_pcm_format_width(params_format(params)); |
480 | p_params.ch = params_channels(params); | 495 | p_params.ch = params_channels(params); |
@@ -588,6 +603,7 @@ static struct snd_soc_dai_ops skl_dmic_dai_ops = { | |||
588 | 603 | ||
589 | static struct snd_soc_dai_ops skl_be_ssp_dai_ops = { | 604 | static struct snd_soc_dai_ops skl_be_ssp_dai_ops = { |
590 | .hw_params = skl_be_hw_params, | 605 | .hw_params = skl_be_hw_params, |
606 | .prepare = skl_be_prepare, | ||
591 | }; | 607 | }; |
592 | 608 | ||
593 | static struct snd_soc_dai_ops skl_link_dai_ops = { | 609 | static struct snd_soc_dai_ops skl_link_dai_ops = { |
@@ -660,6 +676,51 @@ static struct snd_soc_dai_driver skl_platform_dai[] = { | |||
660 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, | 676 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE, |
661 | }, | 677 | }, |
662 | }, | 678 | }, |
679 | { | ||
680 | .name = "HDMI1 Pin", | ||
681 | .ops = &skl_pcm_dai_ops, | ||
682 | .playback = { | ||
683 | .stream_name = "HDMI1 Playback", | ||
684 | .channels_min = HDA_STEREO, | ||
685 | .channels_max = HDA_STEREO, | ||
686 | .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | | ||
687 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | | ||
688 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | | ||
689 | SNDRV_PCM_RATE_192000, | ||
690 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | | ||
691 | SNDRV_PCM_FMTBIT_S32_LE, | ||
692 | }, | ||
693 | }, | ||
694 | { | ||
695 | .name = "HDMI2 Pin", | ||
696 | .ops = &skl_pcm_dai_ops, | ||
697 | .playback = { | ||
698 | .stream_name = "HDMI2 Playback", | ||
699 | .channels_min = HDA_STEREO, | ||
700 | .channels_max = HDA_STEREO, | ||
701 | .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | | ||
702 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | | ||
703 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | | ||
704 | SNDRV_PCM_RATE_192000, | ||
705 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | | ||
706 | SNDRV_PCM_FMTBIT_S32_LE, | ||
707 | }, | ||
708 | }, | ||
709 | { | ||
710 | .name = "HDMI3 Pin", | ||
711 | .ops = &skl_pcm_dai_ops, | ||
712 | .playback = { | ||
713 | .stream_name = "HDMI3 Playback", | ||
714 | .channels_min = HDA_STEREO, | ||
715 | .channels_max = HDA_STEREO, | ||
716 | .rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | | ||
717 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | | ||
718 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | | ||
719 | SNDRV_PCM_RATE_192000, | ||
720 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | | ||
721 | SNDRV_PCM_FMTBIT_S32_LE, | ||
722 | }, | ||
723 | }, | ||
663 | 724 | ||
664 | /* BE CPU Dais */ | 725 | /* BE CPU Dais */ |
665 | { | 726 | { |
@@ -699,14 +760,41 @@ static struct snd_soc_dai_driver skl_platform_dai[] = { | |||
699 | }, | 760 | }, |
700 | }, | 761 | }, |
701 | { | 762 | { |
702 | .name = "iDisp Pin", | 763 | .name = "iDisp1 Pin", |
703 | .ops = &skl_link_dai_ops, | 764 | .ops = &skl_link_dai_ops, |
704 | .playback = { | 765 | .playback = { |
705 | .stream_name = "iDisp Tx", | 766 | .stream_name = "iDisp1 Tx", |
706 | .channels_min = HDA_STEREO, | 767 | .channels_min = HDA_STEREO, |
707 | .channels_max = HDA_STEREO, | 768 | .channels_max = HDA_STEREO, |
708 | .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000, | 769 | .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000, |
709 | .formats = SNDRV_PCM_FMTBIT_S16_LE, | 770 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE | |
771 | SNDRV_PCM_FMTBIT_S24_LE, | ||
772 | }, | ||
773 | }, | ||
774 | { | ||
775 | .name = "iDisp2 Pin", | ||
776 | .ops = &skl_link_dai_ops, | ||
777 | .playback = { | ||
778 | .stream_name = "iDisp2 Tx", | ||
779 | .channels_min = HDA_STEREO, | ||
780 | .channels_max = HDA_STEREO, | ||
781 | .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000| | ||
782 | SNDRV_PCM_RATE_48000, | ||
783 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE | | ||
784 | SNDRV_PCM_FMTBIT_S24_LE, | ||
785 | }, | ||
786 | }, | ||
787 | { | ||
788 | .name = "iDisp3 Pin", | ||
789 | .ops = &skl_link_dai_ops, | ||
790 | .playback = { | ||
791 | .stream_name = "iDisp3 Tx", | ||
792 | .channels_min = HDA_STEREO, | ||
793 | .channels_max = HDA_STEREO, | ||
794 | .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000| | ||
795 | SNDRV_PCM_RATE_48000, | ||
796 | .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE | | ||
797 | SNDRV_PCM_FMTBIT_S24_LE, | ||
710 | }, | 798 | }, |
711 | }, | 799 | }, |
712 | { | 800 | { |
@@ -863,7 +951,9 @@ static int skl_get_delay_from_lpib(struct hdac_ext_bus *ebus, | |||
863 | else | 951 | else |
864 | delay += hstream->bufsize; | 952 | delay += hstream->bufsize; |
865 | } | 953 | } |
866 | delay = (hstream->bufsize == delay) ? 0 : delay; | 954 | |
955 | if (hstream->bufsize == delay) | ||
956 | delay = 0; | ||
867 | 957 | ||
868 | if (delay >= hstream->period_bytes) { | 958 | if (delay >= hstream->period_bytes) { |
869 | dev_info(bus->dev, | 959 | dev_info(bus->dev, |
diff --git a/sound/soc/intel/skylake/skl-sst-dsp.c b/sound/soc/intel/skylake/skl-sst-dsp.c index 1bfb7f63b572..a5267e8a96e0 100644 --- a/sound/soc/intel/skylake/skl-sst-dsp.c +++ b/sound/soc/intel/skylake/skl-sst-dsp.c | |||
@@ -34,7 +34,7 @@ void skl_dsp_set_state_locked(struct sst_dsp *ctx, int state) | |||
34 | mutex_unlock(&ctx->mutex); | 34 | mutex_unlock(&ctx->mutex); |
35 | } | 35 | } |
36 | 36 | ||
37 | static int skl_dsp_core_set_reset_state(struct sst_dsp *ctx) | 37 | static int skl_dsp_core_set_reset_state(struct sst_dsp *ctx) |
38 | { | 38 | { |
39 | int ret; | 39 | int ret; |
40 | 40 | ||
@@ -60,7 +60,7 @@ static int skl_dsp_core_set_reset_state(struct sst_dsp *ctx) | |||
60 | return ret; | 60 | return ret; |
61 | } | 61 | } |
62 | 62 | ||
63 | static int skl_dsp_core_unset_reset_state(struct sst_dsp *ctx) | 63 | static int skl_dsp_core_unset_reset_state(struct sst_dsp *ctx) |
64 | { | 64 | { |
65 | int ret; | 65 | int ret; |
66 | 66 | ||
@@ -87,7 +87,7 @@ static int skl_dsp_core_unset_reset_state(struct sst_dsp *ctx) | |||
87 | return ret; | 87 | return ret; |
88 | } | 88 | } |
89 | 89 | ||
90 | static bool is_skl_dsp_core_enable(struct sst_dsp *ctx) | 90 | static bool is_skl_dsp_core_enable(struct sst_dsp *ctx) |
91 | { | 91 | { |
92 | int val; | 92 | int val; |
93 | bool is_enable; | 93 | bool is_enable; |
@@ -140,7 +140,7 @@ static int skl_dsp_start_core(struct sst_dsp *ctx) | |||
140 | return ret; | 140 | return ret; |
141 | } | 141 | } |
142 | 142 | ||
143 | static int skl_dsp_core_power_up(struct sst_dsp *ctx) | 143 | static int skl_dsp_core_power_up(struct sst_dsp *ctx) |
144 | { | 144 | { |
145 | int ret; | 145 | int ret; |
146 | 146 | ||
@@ -166,7 +166,7 @@ static int skl_dsp_core_power_up(struct sst_dsp *ctx) | |||
166 | return ret; | 166 | return ret; |
167 | } | 167 | } |
168 | 168 | ||
169 | static int skl_dsp_core_power_down(struct sst_dsp *ctx) | 169 | static int skl_dsp_core_power_down(struct sst_dsp *ctx) |
170 | { | 170 | { |
171 | /* update bits */ | 171 | /* update bits */ |
172 | sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, | 172 | sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, |
@@ -181,7 +181,7 @@ static int skl_dsp_core_power_down(struct sst_dsp *ctx) | |||
181 | "Power down"); | 181 | "Power down"); |
182 | } | 182 | } |
183 | 183 | ||
184 | static int skl_dsp_enable_core(struct sst_dsp *ctx) | 184 | int skl_dsp_enable_core(struct sst_dsp *ctx) |
185 | { | 185 | { |
186 | int ret; | 186 | int ret; |
187 | 187 | ||
@@ -195,7 +195,7 @@ static int skl_dsp_enable_core(struct sst_dsp *ctx) | |||
195 | return skl_dsp_start_core(ctx); | 195 | return skl_dsp_start_core(ctx); |
196 | } | 196 | } |
197 | 197 | ||
198 | int skl_dsp_disable_core(struct sst_dsp *ctx) | 198 | int skl_dsp_disable_core(struct sst_dsp *ctx) |
199 | { | 199 | { |
200 | int ret; | 200 | int ret; |
201 | 201 | ||
diff --git a/sound/soc/intel/skylake/skl-sst-dsp.h b/sound/soc/intel/skylake/skl-sst-dsp.h index cbb40751c37e..b6e310d49dd6 100644 --- a/sound/soc/intel/skylake/skl-sst-dsp.h +++ b/sound/soc/intel/skylake/skl-sst-dsp.h | |||
@@ -53,6 +53,10 @@ struct sst_dsp_device; | |||
53 | /* HIPCT */ | 53 | /* HIPCT */ |
54 | #define SKL_ADSP_REG_HIPCT_BUSY BIT(31) | 54 | #define SKL_ADSP_REG_HIPCT_BUSY BIT(31) |
55 | 55 | ||
56 | /* FW base IDs */ | ||
57 | #define SKL_INSTANCE_ID 0 | ||
58 | #define SKL_BASE_FW_MODULE_ID 0 | ||
59 | |||
56 | /* Intel HD Audio SRAM Window 1 */ | 60 | /* Intel HD Audio SRAM Window 1 */ |
57 | #define SKL_ADSP_SRAM1_BASE 0xA000 | 61 | #define SKL_ADSP_SRAM1_BASE 0xA000 |
58 | 62 | ||
@@ -144,7 +148,8 @@ int skl_cldma_prepare(struct sst_dsp *ctx); | |||
144 | void skl_dsp_set_state_locked(struct sst_dsp *ctx, int state); | 148 | void skl_dsp_set_state_locked(struct sst_dsp *ctx, int state); |
145 | struct sst_dsp *skl_dsp_ctx_init(struct device *dev, | 149 | struct sst_dsp *skl_dsp_ctx_init(struct device *dev, |
146 | struct sst_dsp_device *sst_dev, int irq); | 150 | struct sst_dsp_device *sst_dev, int irq); |
147 | int skl_dsp_disable_core(struct sst_dsp *ctx); | 151 | int skl_dsp_enable_core(struct sst_dsp *ctx); |
152 | int skl_dsp_disable_core(struct sst_dsp *ctx); | ||
148 | bool is_skl_dsp_running(struct sst_dsp *ctx); | 153 | bool is_skl_dsp_running(struct sst_dsp *ctx); |
149 | irqreturn_t skl_dsp_sst_interrupt(int irq, void *dev_id); | 154 | irqreturn_t skl_dsp_sst_interrupt(int irq, void *dev_id); |
150 | int skl_dsp_wake(struct sst_dsp *ctx); | 155 | int skl_dsp_wake(struct sst_dsp *ctx); |
diff --git a/sound/soc/intel/skylake/skl-sst.c b/sound/soc/intel/skylake/skl-sst.c index e26f4746afb7..348a734f8e24 100644 --- a/sound/soc/intel/skylake/skl-sst.c +++ b/sound/soc/intel/skylake/skl-sst.c | |||
@@ -35,9 +35,6 @@ | |||
35 | #define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE | 35 | #define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE |
36 | #define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4) | 36 | #define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4) |
37 | 37 | ||
38 | #define SKL_INSTANCE_ID 0 | ||
39 | #define SKL_BASE_FW_MODULE_ID 0 | ||
40 | |||
41 | #define SKL_NUM_MODULES 1 | 38 | #define SKL_NUM_MODULES 1 |
42 | 39 | ||
43 | static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status) | 40 | static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status) |
diff --git a/sound/soc/intel/skylake/skl-topology.c b/sound/soc/intel/skylake/skl-topology.c index 5a4837dcfce3..545b4e77b8aa 100644 --- a/sound/soc/intel/skylake/skl-topology.c +++ b/sound/soc/intel/skylake/skl-topology.c | |||
@@ -260,6 +260,65 @@ static void skl_tplg_update_buffer_size(struct skl_sst *ctx, | |||
260 | multiplier; | 260 | multiplier; |
261 | } | 261 | } |
262 | 262 | ||
263 | static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w, | ||
264 | struct skl_sst *ctx) | ||
265 | { | ||
266 | struct skl_module_cfg *m_cfg = w->priv; | ||
267 | int link_type, dir; | ||
268 | u32 ch, s_freq, s_fmt; | ||
269 | struct nhlt_specific_cfg *cfg; | ||
270 | struct skl *skl = get_skl_ctx(ctx->dev); | ||
271 | |||
272 | /* check if we already have blob */ | ||
273 | if (m_cfg->formats_config.caps_size > 0) | ||
274 | return 0; | ||
275 | |||
276 | dev_dbg(ctx->dev, "Applying default cfg blob\n"); | ||
277 | switch (m_cfg->dev_type) { | ||
278 | case SKL_DEVICE_DMIC: | ||
279 | link_type = NHLT_LINK_DMIC; | ||
280 | dir = SNDRV_PCM_STREAM_CAPTURE; | ||
281 | s_freq = m_cfg->in_fmt[0].s_freq; | ||
282 | s_fmt = m_cfg->in_fmt[0].bit_depth; | ||
283 | ch = m_cfg->in_fmt[0].channels; | ||
284 | break; | ||
285 | |||
286 | case SKL_DEVICE_I2S: | ||
287 | link_type = NHLT_LINK_SSP; | ||
288 | if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) { | ||
289 | dir = SNDRV_PCM_STREAM_PLAYBACK; | ||
290 | s_freq = m_cfg->out_fmt[0].s_freq; | ||
291 | s_fmt = m_cfg->out_fmt[0].bit_depth; | ||
292 | ch = m_cfg->out_fmt[0].channels; | ||
293 | } else { | ||
294 | dir = SNDRV_PCM_STREAM_CAPTURE; | ||
295 | s_freq = m_cfg->in_fmt[0].s_freq; | ||
296 | s_fmt = m_cfg->in_fmt[0].bit_depth; | ||
297 | ch = m_cfg->in_fmt[0].channels; | ||
298 | } | ||
299 | break; | ||
300 | |||
301 | default: | ||
302 | return -EINVAL; | ||
303 | } | ||
304 | |||
305 | /* update the blob based on virtual bus_id and default params */ | ||
306 | cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type, | ||
307 | s_fmt, ch, s_freq, dir); | ||
308 | if (cfg) { | ||
309 | m_cfg->formats_config.caps_size = cfg->size; | ||
310 | m_cfg->formats_config.caps = (u32 *) &cfg->caps; | ||
311 | } else { | ||
312 | dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n", | ||
313 | m_cfg->vbus_id, link_type, dir); | ||
314 | dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n", | ||
315 | ch, s_freq, s_fmt); | ||
316 | return -EIO; | ||
317 | } | ||
318 | |||
319 | return 0; | ||
320 | } | ||
321 | |||
263 | static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w, | 322 | static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w, |
264 | struct skl_sst *ctx) | 323 | struct skl_sst *ctx) |
265 | { | 324 | { |
@@ -433,6 +492,9 @@ skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe) | |||
433 | return ret; | 492 | return ret; |
434 | } | 493 | } |
435 | 494 | ||
495 | /* update blob if blob is null for be with default value */ | ||
496 | skl_tplg_update_be_blob(w, ctx); | ||
497 | |||
436 | /* | 498 | /* |
437 | * apply fix/conversion to module params based on | 499 | * apply fix/conversion to module params based on |
438 | * FE/BE params | 500 | * FE/BE params |
@@ -545,6 +607,66 @@ static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, | |||
545 | return 0; | 607 | return 0; |
546 | } | 608 | } |
547 | 609 | ||
610 | /* | ||
611 | * Some modules require params to be set after the module is bound to | ||
612 | * all pins connected. | ||
613 | * | ||
614 | * The module provider initializes set_param flag for such modules and we | ||
615 | * send params after binding | ||
616 | */ | ||
617 | static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w, | ||
618 | struct skl_module_cfg *mcfg, struct skl_sst *ctx) | ||
619 | { | ||
620 | int i, ret; | ||
621 | struct skl_module_cfg *mconfig = w->priv; | ||
622 | const struct snd_kcontrol_new *k; | ||
623 | struct soc_bytes_ext *sb; | ||
624 | struct skl_algo_data *bc; | ||
625 | struct skl_specific_cfg *sp_cfg; | ||
626 | |||
627 | /* | ||
628 | * check all out/in pins are in bind state. | ||
629 | * if so set the module param | ||
630 | */ | ||
631 | for (i = 0; i < mcfg->max_out_queue; i++) { | ||
632 | if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE) | ||
633 | return 0; | ||
634 | } | ||
635 | |||
636 | for (i = 0; i < mcfg->max_in_queue; i++) { | ||
637 | if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE) | ||
638 | return 0; | ||
639 | } | ||
640 | |||
641 | if (mconfig->formats_config.caps_size > 0 && | ||
642 | mconfig->formats_config.set_params == SKL_PARAM_BIND) { | ||
643 | sp_cfg = &mconfig->formats_config; | ||
644 | ret = skl_set_module_params(ctx, sp_cfg->caps, | ||
645 | sp_cfg->caps_size, | ||
646 | sp_cfg->param_id, mconfig); | ||
647 | if (ret < 0) | ||
648 | return ret; | ||
649 | } | ||
650 | |||
651 | for (i = 0; i < w->num_kcontrols; i++) { | ||
652 | k = &w->kcontrol_news[i]; | ||
653 | if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { | ||
654 | sb = (void *) k->private_value; | ||
655 | bc = (struct skl_algo_data *)sb->dobj.private; | ||
656 | |||
657 | if (bc->set_params == SKL_PARAM_BIND) { | ||
658 | ret = skl_set_module_params(ctx, | ||
659 | (u32 *)bc->params, bc->max, | ||
660 | bc->param_id, mconfig); | ||
661 | if (ret < 0) | ||
662 | return ret; | ||
663 | } | ||
664 | } | ||
665 | } | ||
666 | |||
667 | return 0; | ||
668 | } | ||
669 | |||
548 | static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w, | 670 | static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w, |
549 | struct skl *skl, | 671 | struct skl *skl, |
550 | struct snd_soc_dapm_widget *src_w, | 672 | struct snd_soc_dapm_widget *src_w, |
@@ -579,11 +701,19 @@ static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w, | |||
579 | sink = p->sink; | 701 | sink = p->sink; |
580 | sink_mconfig = sink->priv; | 702 | sink_mconfig = sink->priv; |
581 | 703 | ||
704 | if (src_mconfig->m_state == SKL_MODULE_UNINIT || | ||
705 | sink_mconfig->m_state == SKL_MODULE_UNINIT) | ||
706 | continue; | ||
707 | |||
582 | /* Bind source to sink, mixin is always source */ | 708 | /* Bind source to sink, mixin is always source */ |
583 | ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); | 709 | ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); |
584 | if (ret) | 710 | if (ret) |
585 | return ret; | 711 | return ret; |
586 | 712 | ||
713 | /* set module params after bind */ | ||
714 | skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx); | ||
715 | skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx); | ||
716 | |||
587 | /* Start sinks pipe first */ | 717 | /* Start sinks pipe first */ |
588 | if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) { | 718 | if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) { |
589 | if (sink_mconfig->pipe->conn_type != | 719 | if (sink_mconfig->pipe->conn_type != |
@@ -714,6 +844,10 @@ static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w, | |||
714 | if (ret) | 844 | if (ret) |
715 | return ret; | 845 | return ret; |
716 | 846 | ||
847 | /* set module params after bind */ | ||
848 | skl_tplg_set_module_bind_params(source, src_mconfig, ctx); | ||
849 | skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx); | ||
850 | |||
717 | if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) | 851 | if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) |
718 | ret = skl_run_pipe(ctx, sink_mconfig->pipe); | 852 | ret = skl_run_pipe(ctx, sink_mconfig->pipe); |
719 | } | 853 | } |
@@ -1091,6 +1225,66 @@ skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream) | |||
1091 | return NULL; | 1225 | return NULL; |
1092 | } | 1226 | } |
1093 | 1227 | ||
1228 | static struct skl_module_cfg *skl_get_mconfig_pb_cpr( | ||
1229 | struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w) | ||
1230 | { | ||
1231 | struct snd_soc_dapm_path *p; | ||
1232 | struct skl_module_cfg *mconfig = NULL; | ||
1233 | |||
1234 | snd_soc_dapm_widget_for_each_source_path(w, p) { | ||
1235 | if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) { | ||
1236 | if (p->connect && | ||
1237 | (p->sink->id == snd_soc_dapm_aif_out) && | ||
1238 | p->source->priv) { | ||
1239 | mconfig = p->source->priv; | ||
1240 | return mconfig; | ||
1241 | } | ||
1242 | mconfig = skl_get_mconfig_pb_cpr(dai, p->source); | ||
1243 | if (mconfig) | ||
1244 | return mconfig; | ||
1245 | } | ||
1246 | } | ||
1247 | return mconfig; | ||
1248 | } | ||
1249 | |||
1250 | static struct skl_module_cfg *skl_get_mconfig_cap_cpr( | ||
1251 | struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w) | ||
1252 | { | ||
1253 | struct snd_soc_dapm_path *p; | ||
1254 | struct skl_module_cfg *mconfig = NULL; | ||
1255 | |||
1256 | snd_soc_dapm_widget_for_each_sink_path(w, p) { | ||
1257 | if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) { | ||
1258 | if (p->connect && | ||
1259 | (p->source->id == snd_soc_dapm_aif_in) && | ||
1260 | p->sink->priv) { | ||
1261 | mconfig = p->sink->priv; | ||
1262 | return mconfig; | ||
1263 | } | ||
1264 | mconfig = skl_get_mconfig_cap_cpr(dai, p->sink); | ||
1265 | if (mconfig) | ||
1266 | return mconfig; | ||
1267 | } | ||
1268 | } | ||
1269 | return mconfig; | ||
1270 | } | ||
1271 | |||
1272 | struct skl_module_cfg * | ||
1273 | skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream) | ||
1274 | { | ||
1275 | struct snd_soc_dapm_widget *w; | ||
1276 | struct skl_module_cfg *mconfig; | ||
1277 | |||
1278 | if (stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
1279 | w = dai->playback_widget; | ||
1280 | mconfig = skl_get_mconfig_pb_cpr(dai, w); | ||
1281 | } else { | ||
1282 | w = dai->capture_widget; | ||
1283 | mconfig = skl_get_mconfig_cap_cpr(dai, w); | ||
1284 | } | ||
1285 | return mconfig; | ||
1286 | } | ||
1287 | |||
1094 | static u8 skl_tplg_be_link_type(int dev_type) | 1288 | static u8 skl_tplg_be_link_type(int dev_type) |
1095 | { | 1289 | { |
1096 | int ret; | 1290 | int ret; |
@@ -1464,8 +1658,7 @@ static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be, | |||
1464 | if (!ac->params) | 1658 | if (!ac->params) |
1465 | return -ENOMEM; | 1659 | return -ENOMEM; |
1466 | 1660 | ||
1467 | if (dfw_ac->params) | 1661 | memcpy(ac->params, dfw_ac->params, ac->max); |
1468 | memcpy(ac->params, dfw_ac->params, ac->max); | ||
1469 | } | 1662 | } |
1470 | 1663 | ||
1471 | be->dobj.private = ac; | 1664 | be->dobj.private = ac; |
@@ -1523,11 +1716,16 @@ int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus) | |||
1523 | struct hdac_bus *bus = ebus_to_hbus(ebus); | 1716 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
1524 | struct skl *skl = ebus_to_skl(ebus); | 1717 | struct skl *skl = ebus_to_skl(ebus); |
1525 | 1718 | ||
1526 | ret = request_firmware(&fw, "dfw_sst.bin", bus->dev); | 1719 | ret = request_firmware(&fw, skl->tplg_name, bus->dev); |
1527 | if (ret < 0) { | 1720 | if (ret < 0) { |
1528 | dev_err(bus->dev, "tplg fw %s load failed with %d\n", | 1721 | dev_err(bus->dev, "tplg fw %s load failed with %d\n", |
1529 | "dfw_sst.bin", ret); | 1722 | skl->tplg_name, ret); |
1530 | return ret; | 1723 | ret = request_firmware(&fw, "dfw_sst.bin", bus->dev); |
1724 | if (ret < 0) { | ||
1725 | dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n", | ||
1726 | "dfw_sst.bin", ret); | ||
1727 | return ret; | ||
1728 | } | ||
1531 | } | 1729 | } |
1532 | 1730 | ||
1533 | /* | 1731 | /* |
diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h index 9aa2a2b6598a..de3c401284d9 100644 --- a/sound/soc/intel/skylake/skl-topology.h +++ b/sound/soc/intel/skylake/skl-topology.h | |||
@@ -113,6 +113,29 @@ struct skl_cpr_gtw_cfg { | |||
113 | u32 config_data[1]; | 113 | u32 config_data[1]; |
114 | } __packed; | 114 | } __packed; |
115 | 115 | ||
116 | struct skl_i2s_config_blob { | ||
117 | u32 gateway_attrib; | ||
118 | u32 tdm_ts_group[8]; | ||
119 | u32 ssc0; | ||
120 | u32 ssc1; | ||
121 | u32 sscto; | ||
122 | u32 sspsp; | ||
123 | u32 sstsa; | ||
124 | u32 ssrsa; | ||
125 | u32 ssc2; | ||
126 | u32 sspsp2; | ||
127 | u32 ssc3; | ||
128 | u32 ssioc; | ||
129 | u32 mdivc; | ||
130 | u32 mdivr; | ||
131 | } __packed; | ||
132 | |||
133 | struct skl_dma_control { | ||
134 | u32 node_id; | ||
135 | u32 config_length; | ||
136 | u32 config_data[1]; | ||
137 | } __packed; | ||
138 | |||
116 | struct skl_cpr_cfg { | 139 | struct skl_cpr_cfg { |
117 | struct skl_base_cfg base_cfg; | 140 | struct skl_base_cfg base_cfg; |
118 | struct skl_audio_data_format out_fmt; | 141 | struct skl_audio_data_format out_fmt; |
@@ -313,6 +336,8 @@ static inline struct skl *get_skl_ctx(struct device *dev) | |||
313 | 336 | ||
314 | int skl_tplg_be_update_params(struct snd_soc_dai *dai, | 337 | int skl_tplg_be_update_params(struct snd_soc_dai *dai, |
315 | struct skl_pipe_params *params); | 338 | struct skl_pipe_params *params); |
339 | int skl_dsp_set_dma_control(struct skl_sst *ctx, | ||
340 | struct skl_module_cfg *mconfig); | ||
316 | void skl_tplg_set_be_dmic_config(struct snd_soc_dai *dai, | 341 | void skl_tplg_set_be_dmic_config(struct snd_soc_dai *dai, |
317 | struct skl_pipe_params *params, int stream); | 342 | struct skl_pipe_params *params, int stream); |
318 | int skl_tplg_init(struct snd_soc_platform *platform, | 343 | int skl_tplg_init(struct snd_soc_platform *platform, |
@@ -345,5 +370,7 @@ int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size, | |||
345 | int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size, | 370 | int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size, |
346 | u32 param_id, struct skl_module_cfg *mcfg); | 371 | u32 param_id, struct skl_module_cfg *mcfg); |
347 | 372 | ||
373 | struct skl_module_cfg *skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, | ||
374 | int stream); | ||
348 | enum skl_bitdepth skl_get_bit_depth(int params); | 375 | enum skl_bitdepth skl_get_bit_depth(int params); |
349 | #endif | 376 | #endif |
diff --git a/sound/soc/intel/skylake/skl-tplg-interface.h b/sound/soc/intel/skylake/skl-tplg-interface.h index c9ae010b3cc8..1db88a63ac17 100644 --- a/sound/soc/intel/skylake/skl-tplg-interface.h +++ b/sound/soc/intel/skylake/skl-tplg-interface.h | |||
@@ -144,7 +144,8 @@ enum module_pin_type { | |||
144 | enum skl_module_param_type { | 144 | enum skl_module_param_type { |
145 | SKL_PARAM_DEFAULT = 0, | 145 | SKL_PARAM_DEFAULT = 0, |
146 | SKL_PARAM_INIT, | 146 | SKL_PARAM_INIT, |
147 | SKL_PARAM_SET | 147 | SKL_PARAM_SET, |
148 | SKL_PARAM_BIND | ||
148 | }; | 149 | }; |
149 | 150 | ||
150 | struct skl_dfw_module_pin { | 151 | struct skl_dfw_module_pin { |
diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index 092705e73db4..ab5e25aaeee3 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c | |||
@@ -28,6 +28,9 @@ | |||
28 | #include <linux/firmware.h> | 28 | #include <linux/firmware.h> |
29 | #include <sound/pcm.h> | 29 | #include <sound/pcm.h> |
30 | #include "../common/sst-acpi.h" | 30 | #include "../common/sst-acpi.h" |
31 | #include <sound/hda_register.h> | ||
32 | #include <sound/hdaudio.h> | ||
33 | #include <sound/hda_i915.h> | ||
31 | #include "skl.h" | 34 | #include "skl.h" |
32 | #include "skl-sst-dsp.h" | 35 | #include "skl-sst-dsp.h" |
33 | #include "skl-sst-ipc.h" | 36 | #include "skl-sst-ipc.h" |
@@ -243,6 +246,16 @@ static int skl_resume(struct device *dev) | |||
243 | struct hdac_bus *bus = ebus_to_hbus(ebus); | 246 | struct hdac_bus *bus = ebus_to_hbus(ebus); |
244 | int ret; | 247 | int ret; |
245 | 248 | ||
249 | /* Turned OFF in HDMI codec driver after codec reconfiguration */ | ||
250 | if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { | ||
251 | ret = snd_hdac_display_power(bus, true); | ||
252 | if (ret < 0) { | ||
253 | dev_err(bus->dev, | ||
254 | "Cannot turn on display power on i915\n"); | ||
255 | return ret; | ||
256 | } | ||
257 | } | ||
258 | |||
246 | /* | 259 | /* |
247 | * resume only when we are not in suspend active, otherwise need to | 260 | * resume only when we are not in suspend active, otherwise need to |
248 | * restore the device | 261 | * restore the device |
@@ -481,6 +494,27 @@ static int skl_create(struct pci_dev *pci, | |||
481 | return 0; | 494 | return 0; |
482 | } | 495 | } |
483 | 496 | ||
497 | static int skl_i915_init(struct hdac_bus *bus) | ||
498 | { | ||
499 | int err; | ||
500 | |||
501 | /* | ||
502 | * The HDMI codec is in GPU so we need to ensure that it is powered | ||
503 | * up and ready for probe | ||
504 | */ | ||
505 | err = snd_hdac_i915_init(bus); | ||
506 | if (err < 0) | ||
507 | return err; | ||
508 | |||
509 | err = snd_hdac_display_power(bus, true); | ||
510 | if (err < 0) { | ||
511 | dev_err(bus->dev, "Cannot turn on display power on i915\n"); | ||
512 | return err; | ||
513 | } | ||
514 | |||
515 | return err; | ||
516 | } | ||
517 | |||
484 | static int skl_first_init(struct hdac_ext_bus *ebus) | 518 | static int skl_first_init(struct hdac_ext_bus *ebus) |
485 | { | 519 | { |
486 | struct skl *skl = ebus_to_skl(ebus); | 520 | struct skl *skl = ebus_to_skl(ebus); |
@@ -543,6 +577,12 @@ static int skl_first_init(struct hdac_ext_bus *ebus) | |||
543 | /* initialize chip */ | 577 | /* initialize chip */ |
544 | skl_init_pci(skl); | 578 | skl_init_pci(skl); |
545 | 579 | ||
580 | if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { | ||
581 | err = skl_i915_init(bus); | ||
582 | if (err < 0) | ||
583 | return err; | ||
584 | } | ||
585 | |||
546 | skl_init_chip(bus, true); | 586 | skl_init_chip(bus, true); |
547 | 587 | ||
548 | /* codec detection */ | 588 | /* codec detection */ |
@@ -573,11 +613,15 @@ static int skl_probe(struct pci_dev *pci, | |||
573 | if (err < 0) | 613 | if (err < 0) |
574 | goto out_free; | 614 | goto out_free; |
575 | 615 | ||
616 | skl->pci_id = pci->device; | ||
617 | |||
576 | skl->nhlt = skl_nhlt_init(bus->dev); | 618 | skl->nhlt = skl_nhlt_init(bus->dev); |
577 | 619 | ||
578 | if (skl->nhlt == NULL) | 620 | if (skl->nhlt == NULL) |
579 | goto out_free; | 621 | goto out_free; |
580 | 622 | ||
623 | skl_nhlt_update_topology_bin(skl); | ||
624 | |||
581 | pci_set_drvdata(skl->pci, ebus); | 625 | pci_set_drvdata(skl->pci, ebus); |
582 | 626 | ||
583 | /* check if dsp is there */ | 627 | /* check if dsp is there */ |
@@ -613,6 +657,14 @@ static int skl_probe(struct pci_dev *pci, | |||
613 | if (err < 0) | 657 | if (err < 0) |
614 | goto out_unregister; | 658 | goto out_unregister; |
615 | 659 | ||
660 | if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { | ||
661 | err = snd_hdac_display_power(bus, false); | ||
662 | if (err < 0) { | ||
663 | dev_err(bus->dev, "Cannot turn off display power on i915\n"); | ||
664 | return err; | ||
665 | } | ||
666 | } | ||
667 | |||
616 | /*configure PM */ | 668 | /*configure PM */ |
617 | pm_runtime_put_noidle(bus->dev); | 669 | pm_runtime_put_noidle(bus->dev); |
618 | pm_runtime_allow(bus->dev); | 670 | pm_runtime_allow(bus->dev); |
@@ -634,6 +686,31 @@ out_free: | |||
634 | return err; | 686 | return err; |
635 | } | 687 | } |
636 | 688 | ||
689 | static void skl_shutdown(struct pci_dev *pci) | ||
690 | { | ||
691 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); | ||
692 | struct hdac_bus *bus = ebus_to_hbus(ebus); | ||
693 | struct hdac_stream *s; | ||
694 | struct hdac_ext_stream *stream; | ||
695 | struct skl *skl; | ||
696 | |||
697 | if (ebus == NULL) | ||
698 | return; | ||
699 | |||
700 | skl = ebus_to_skl(ebus); | ||
701 | |||
702 | if (skl->init_failed) | ||
703 | return; | ||
704 | |||
705 | snd_hdac_ext_stop_streams(ebus); | ||
706 | list_for_each_entry(s, &bus->stream_list, list) { | ||
707 | stream = stream_to_hdac_ext_stream(s); | ||
708 | snd_hdac_ext_stream_decouple(ebus, stream, false); | ||
709 | } | ||
710 | |||
711 | snd_hdac_bus_stop_chip(bus); | ||
712 | } | ||
713 | |||
637 | static void skl_remove(struct pci_dev *pci) | 714 | static void skl_remove(struct pci_dev *pci) |
638 | { | 715 | { |
639 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); | 716 | struct hdac_ext_bus *ebus = pci_get_drvdata(pci); |
@@ -642,6 +719,9 @@ static void skl_remove(struct pci_dev *pci) | |||
642 | if (skl->tplg) | 719 | if (skl->tplg) |
643 | release_firmware(skl->tplg); | 720 | release_firmware(skl->tplg); |
644 | 721 | ||
722 | if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) | ||
723 | snd_hdac_i915_exit(&ebus->bus); | ||
724 | |||
645 | if (pci_dev_run_wake(pci)) | 725 | if (pci_dev_run_wake(pci)) |
646 | pm_runtime_get_noresume(&pci->dev); | 726 | pm_runtime_get_noresume(&pci->dev); |
647 | pci_dev_put(pci); | 727 | pci_dev_put(pci); |
@@ -662,11 +742,18 @@ static struct sst_acpi_mach sst_skl_devdata[] = { | |||
662 | {} | 742 | {} |
663 | }; | 743 | }; |
664 | 744 | ||
745 | static struct sst_acpi_mach sst_bxtp_devdata[] = { | ||
746 | { "INT343A", "bxt_alc298s_i2s", "intel/dsp_fw_bxtn.bin", NULL, NULL, NULL }, | ||
747 | }; | ||
748 | |||
665 | /* PCI IDs */ | 749 | /* PCI IDs */ |
666 | static const struct pci_device_id skl_ids[] = { | 750 | static const struct pci_device_id skl_ids[] = { |
667 | /* Sunrise Point-LP */ | 751 | /* Sunrise Point-LP */ |
668 | { PCI_DEVICE(0x8086, 0x9d70), | 752 | { PCI_DEVICE(0x8086, 0x9d70), |
669 | .driver_data = (unsigned long)&sst_skl_devdata}, | 753 | .driver_data = (unsigned long)&sst_skl_devdata}, |
754 | /* BXT-P */ | ||
755 | { PCI_DEVICE(0x8086, 0x5a98), | ||
756 | .driver_data = (unsigned long)&sst_bxtp_devdata}, | ||
670 | { 0, } | 757 | { 0, } |
671 | }; | 758 | }; |
672 | MODULE_DEVICE_TABLE(pci, skl_ids); | 759 | MODULE_DEVICE_TABLE(pci, skl_ids); |
@@ -677,6 +764,7 @@ static struct pci_driver skl_driver = { | |||
677 | .id_table = skl_ids, | 764 | .id_table = skl_ids, |
678 | .probe = skl_probe, | 765 | .probe = skl_probe, |
679 | .remove = skl_remove, | 766 | .remove = skl_remove, |
767 | .shutdown = skl_shutdown, | ||
680 | .driver = { | 768 | .driver = { |
681 | .pm = &skl_pm, | 769 | .pm = &skl_pm, |
682 | }, | 770 | }, |
diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h index 4d18293b5537..39e16fa7a92b 100644 --- a/sound/soc/intel/skylake/skl.h +++ b/sound/soc/intel/skylake/skl.h | |||
@@ -73,6 +73,8 @@ struct skl { | |||
73 | struct list_head ppl_list; | 73 | struct list_head ppl_list; |
74 | 74 | ||
75 | const char *fw_name; | 75 | const char *fw_name; |
76 | char tplg_name[64]; | ||
77 | unsigned short pci_id; | ||
76 | const struct firmware *tplg; | 78 | const struct firmware *tplg; |
77 | 79 | ||
78 | int supend_active; | 80 | int supend_active; |
@@ -88,6 +90,16 @@ struct skl_dma_params { | |||
88 | u8 stream_tag; | 90 | u8 stream_tag; |
89 | }; | 91 | }; |
90 | 92 | ||
93 | struct skl_dsp_ops { | ||
94 | int id; | ||
95 | struct skl_dsp_loader_ops (*loader_ops)(void); | ||
96 | int (*init)(struct device *dev, void __iomem *mmio_base, | ||
97 | int irq, const char *fw_name, | ||
98 | struct skl_dsp_loader_ops loader_ops, | ||
99 | struct skl_sst **skl_sst); | ||
100 | void (*cleanup)(struct device *dev, struct skl_sst *ctx); | ||
101 | }; | ||
102 | |||
91 | int skl_platform_unregister(struct device *dev); | 103 | int skl_platform_unregister(struct device *dev); |
92 | int skl_platform_register(struct device *dev); | 104 | int skl_platform_register(struct device *dev); |
93 | 105 | ||
@@ -96,8 +108,9 @@ void skl_nhlt_free(void *addr); | |||
96 | struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance, | 108 | struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance, |
97 | u8 link_type, u8 s_fmt, u8 no_ch, u32 s_rate, u8 dirn); | 109 | u8 link_type, u8 s_fmt, u8 no_ch, u32 s_rate, u8 dirn); |
98 | 110 | ||
111 | int skl_nhlt_update_topology_bin(struct skl *skl); | ||
99 | int skl_init_dsp(struct skl *skl); | 112 | int skl_init_dsp(struct skl *skl); |
100 | void skl_free_dsp(struct skl *skl); | 113 | int skl_free_dsp(struct skl *skl); |
101 | int skl_suspend_dsp(struct skl *skl); | 114 | int skl_suspend_dsp(struct skl *skl); |
102 | int skl_resume_dsp(struct skl *skl); | 115 | int skl_resume_dsp(struct skl *skl); |
103 | #endif /* __SOUND_SOC_SKL_H */ | 116 | #endif /* __SOUND_SOC_SKL_H */ |
diff --git a/sound/soc/mediatek/Kconfig b/sound/soc/mediatek/Kconfig index 976967675387..f7e789e97fbc 100644 --- a/sound/soc/mediatek/Kconfig +++ b/sound/soc/mediatek/Kconfig | |||
@@ -17,6 +17,27 @@ config SND_SOC_MT8173_MAX98090 | |||
17 | Select Y if you have such device. | 17 | Select Y if you have such device. |
18 | If unsure select "N". | 18 | If unsure select "N". |
19 | 19 | ||
20 | config SND_SOC_MT8173_RT5650 | ||
21 | tristate "ASoC Audio driver for MT8173 with RT5650 codec" | ||
22 | depends on SND_SOC_MEDIATEK && I2C | ||
23 | select SND_SOC_RT5645 | ||
24 | help | ||
25 | This adds ASoC driver for Mediatek MT8173 boards | ||
26 | with the RT5650 audio codec. | ||
27 | Select Y if you have such device. | ||
28 | If unsure select "N". | ||
29 | |||
30 | config SND_SOC_MT8173_RT5650_RT5514 | ||
31 | tristate "ASoC Audio driver for MT8173 with RT5650 RT5514 codecs" | ||
32 | depends on SND_SOC_MEDIATEK && I2C | ||
33 | select SND_SOC_RT5645 | ||
34 | select SND_SOC_RT5514 | ||
35 | help | ||
36 | This adds ASoC driver for Mediatek MT8173 boards | ||
37 | with the RT5650 and RT5514 codecs. | ||
38 | Select Y if you have such device. | ||
39 | If unsure select "N". | ||
40 | |||
20 | config SND_SOC_MT8173_RT5650_RT5676 | 41 | config SND_SOC_MT8173_RT5650_RT5676 |
21 | tristate "ASoC Audio driver for MT8173 with RT5650 RT5676 codecs" | 42 | tristate "ASoC Audio driver for MT8173 with RT5650 RT5676 codecs" |
22 | depends on SND_SOC_MEDIATEK && I2C | 43 | depends on SND_SOC_MEDIATEK && I2C |
@@ -27,4 +48,3 @@ config SND_SOC_MT8173_RT5650_RT5676 | |||
27 | with the RT5650 and RT5676 codecs. | 48 | with the RT5650 and RT5676 codecs. |
28 | Select Y if you have such device. | 49 | Select Y if you have such device. |
29 | If unsure select "N". | 50 | If unsure select "N". |
30 | |||
diff --git a/sound/soc/mediatek/Makefile b/sound/soc/mediatek/Makefile index 75effbec438d..d486860c0a88 100644 --- a/sound/soc/mediatek/Makefile +++ b/sound/soc/mediatek/Makefile | |||
@@ -2,4 +2,6 @@ | |||
2 | obj-$(CONFIG_SND_SOC_MEDIATEK) += mtk-afe-pcm.o | 2 | obj-$(CONFIG_SND_SOC_MEDIATEK) += mtk-afe-pcm.o |
3 | # Machine support | 3 | # Machine support |
4 | obj-$(CONFIG_SND_SOC_MT8173_MAX98090) += mt8173-max98090.o | 4 | obj-$(CONFIG_SND_SOC_MT8173_MAX98090) += mt8173-max98090.o |
5 | obj-$(CONFIG_SND_SOC_MT8173_RT5650) += mt8173-rt5650.o | ||
6 | obj-$(CONFIG_SND_SOC_MT8173_RT5650_RT5514) += mt8173-rt5650-rt5514.o | ||
5 | obj-$(CONFIG_SND_SOC_MT8173_RT5650_RT5676) += mt8173-rt5650-rt5676.o | 7 | obj-$(CONFIG_SND_SOC_MT8173_RT5650_RT5676) += mt8173-rt5650-rt5676.o |
diff --git a/sound/soc/mediatek/mt8173-rt5650-rt5514.c b/sound/soc/mediatek/mt8173-rt5650-rt5514.c new file mode 100644 index 000000000000..58e083642dea --- /dev/null +++ b/sound/soc/mediatek/mt8173-rt5650-rt5514.c | |||
@@ -0,0 +1,258 @@ | |||
1 | /* | ||
2 | * mt8173-rt5650-rt5514.c -- MT8173 machine driver with RT5650/5514 codecs | ||
3 | * | ||
4 | * Copyright (c) 2016 MediaTek Inc. | ||
5 | * Author: Koro Chen <koro.chen@mediatek.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 and | ||
9 | * only version 2 as published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #include <linux/module.h> | ||
18 | #include <linux/gpio.h> | ||
19 | #include <linux/of_gpio.h> | ||
20 | #include <sound/soc.h> | ||
21 | #include <sound/jack.h> | ||
22 | #include "../codecs/rt5645.h" | ||
23 | |||
24 | #define MCLK_FOR_CODECS 12288000 | ||
25 | |||
26 | static const struct snd_soc_dapm_widget mt8173_rt5650_rt5514_widgets[] = { | ||
27 | SND_SOC_DAPM_SPK("Speaker", NULL), | ||
28 | SND_SOC_DAPM_MIC("Int Mic", NULL), | ||
29 | SND_SOC_DAPM_HP("Headphone", NULL), | ||
30 | SND_SOC_DAPM_MIC("Headset Mic", NULL), | ||
31 | }; | ||
32 | |||
33 | static const struct snd_soc_dapm_route mt8173_rt5650_rt5514_routes[] = { | ||
34 | {"Speaker", NULL, "SPOL"}, | ||
35 | {"Speaker", NULL, "SPOR"}, | ||
36 | {"Sub DMIC1L", NULL, "Int Mic"}, | ||
37 | {"Sub DMIC1R", NULL, "Int Mic"}, | ||
38 | {"Headphone", NULL, "HPOL"}, | ||
39 | {"Headphone", NULL, "HPOR"}, | ||
40 | {"Headset Mic", NULL, "micbias1"}, | ||
41 | {"Headset Mic", NULL, "micbias2"}, | ||
42 | {"IN1P", NULL, "Headset Mic"}, | ||
43 | {"IN1N", NULL, "Headset Mic"}, | ||
44 | }; | ||
45 | |||
46 | static const struct snd_kcontrol_new mt8173_rt5650_rt5514_controls[] = { | ||
47 | SOC_DAPM_PIN_SWITCH("Speaker"), | ||
48 | SOC_DAPM_PIN_SWITCH("Int Mic"), | ||
49 | SOC_DAPM_PIN_SWITCH("Headphone"), | ||
50 | SOC_DAPM_PIN_SWITCH("Headset Mic"), | ||
51 | }; | ||
52 | |||
53 | static int mt8173_rt5650_rt5514_hw_params(struct snd_pcm_substream *substream, | ||
54 | struct snd_pcm_hw_params *params) | ||
55 | { | ||
56 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
57 | int i, ret; | ||
58 | |||
59 | for (i = 0; i < rtd->num_codecs; i++) { | ||
60 | struct snd_soc_dai *codec_dai = rtd->codec_dais[i]; | ||
61 | |||
62 | /* pll from mclk 12.288M */ | ||
63 | ret = snd_soc_dai_set_pll(codec_dai, 0, 0, MCLK_FOR_CODECS, | ||
64 | params_rate(params) * 512); | ||
65 | if (ret) | ||
66 | return ret; | ||
67 | |||
68 | /* sysclk from pll */ | ||
69 | ret = snd_soc_dai_set_sysclk(codec_dai, 1, | ||
70 | params_rate(params) * 512, | ||
71 | SND_SOC_CLOCK_IN); | ||
72 | if (ret) | ||
73 | return ret; | ||
74 | } | ||
75 | return 0; | ||
76 | } | ||
77 | |||
78 | static struct snd_soc_ops mt8173_rt5650_rt5514_ops = { | ||
79 | .hw_params = mt8173_rt5650_rt5514_hw_params, | ||
80 | }; | ||
81 | |||
82 | static struct snd_soc_jack mt8173_rt5650_rt5514_jack; | ||
83 | |||
84 | static int mt8173_rt5650_rt5514_init(struct snd_soc_pcm_runtime *runtime) | ||
85 | { | ||
86 | struct snd_soc_card *card = runtime->card; | ||
87 | struct snd_soc_codec *codec = runtime->codec_dais[0]->codec; | ||
88 | int ret; | ||
89 | |||
90 | rt5645_sel_asrc_clk_src(codec, | ||
91 | RT5645_DA_STEREO_FILTER | | ||
92 | RT5645_AD_STEREO_FILTER, | ||
93 | RT5645_CLK_SEL_I2S1_ASRC); | ||
94 | |||
95 | /* enable jack detection */ | ||
96 | ret = snd_soc_card_jack_new(card, "Headset Jack", | ||
97 | SND_JACK_HEADPHONE | SND_JACK_MICROPHONE | | ||
98 | SND_JACK_BTN_0 | SND_JACK_BTN_1 | | ||
99 | SND_JACK_BTN_2 | SND_JACK_BTN_3, | ||
100 | &mt8173_rt5650_rt5514_jack, NULL, 0); | ||
101 | if (ret) { | ||
102 | dev_err(card->dev, "Can't new Headset Jack %d\n", ret); | ||
103 | return ret; | ||
104 | } | ||
105 | |||
106 | return rt5645_set_jack_detect(codec, | ||
107 | &mt8173_rt5650_rt5514_jack, | ||
108 | &mt8173_rt5650_rt5514_jack, | ||
109 | &mt8173_rt5650_rt5514_jack); | ||
110 | } | ||
111 | |||
112 | static struct snd_soc_dai_link_component mt8173_rt5650_rt5514_codecs[] = { | ||
113 | { | ||
114 | .dai_name = "rt5645-aif1", | ||
115 | }, | ||
116 | { | ||
117 | .dai_name = "rt5514-aif1", | ||
118 | }, | ||
119 | }; | ||
120 | |||
121 | enum { | ||
122 | DAI_LINK_PLAYBACK, | ||
123 | DAI_LINK_CAPTURE, | ||
124 | DAI_LINK_CODEC_I2S, | ||
125 | }; | ||
126 | |||
127 | /* Digital audio interface glue - connects codec <---> CPU */ | ||
128 | static struct snd_soc_dai_link mt8173_rt5650_rt5514_dais[] = { | ||
129 | /* Front End DAI links */ | ||
130 | [DAI_LINK_PLAYBACK] = { | ||
131 | .name = "rt5650_rt5514 Playback", | ||
132 | .stream_name = "rt5650_rt5514 Playback", | ||
133 | .cpu_dai_name = "DL1", | ||
134 | .codec_name = "snd-soc-dummy", | ||
135 | .codec_dai_name = "snd-soc-dummy-dai", | ||
136 | .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
137 | .dynamic = 1, | ||
138 | .dpcm_playback = 1, | ||
139 | }, | ||
140 | [DAI_LINK_CAPTURE] = { | ||
141 | .name = "rt5650_rt5514 Capture", | ||
142 | .stream_name = "rt5650_rt5514 Capture", | ||
143 | .cpu_dai_name = "VUL", | ||
144 | .codec_name = "snd-soc-dummy", | ||
145 | .codec_dai_name = "snd-soc-dummy-dai", | ||
146 | .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
147 | .dynamic = 1, | ||
148 | .dpcm_capture = 1, | ||
149 | }, | ||
150 | /* Back End DAI links */ | ||
151 | [DAI_LINK_CODEC_I2S] = { | ||
152 | .name = "Codec", | ||
153 | .cpu_dai_name = "I2S", | ||
154 | .no_pcm = 1, | ||
155 | .codecs = mt8173_rt5650_rt5514_codecs, | ||
156 | .num_codecs = 2, | ||
157 | .init = mt8173_rt5650_rt5514_init, | ||
158 | .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | | ||
159 | SND_SOC_DAIFMT_CBS_CFS, | ||
160 | .ops = &mt8173_rt5650_rt5514_ops, | ||
161 | .ignore_pmdown_time = 1, | ||
162 | .dpcm_playback = 1, | ||
163 | .dpcm_capture = 1, | ||
164 | }, | ||
165 | }; | ||
166 | |||
167 | static struct snd_soc_codec_conf mt8173_rt5650_rt5514_codec_conf[] = { | ||
168 | { | ||
169 | .name_prefix = "Sub", | ||
170 | }, | ||
171 | }; | ||
172 | |||
173 | static struct snd_soc_card mt8173_rt5650_rt5514_card = { | ||
174 | .name = "mtk-rt5650-rt5514", | ||
175 | .owner = THIS_MODULE, | ||
176 | .dai_link = mt8173_rt5650_rt5514_dais, | ||
177 | .num_links = ARRAY_SIZE(mt8173_rt5650_rt5514_dais), | ||
178 | .codec_conf = mt8173_rt5650_rt5514_codec_conf, | ||
179 | .num_configs = ARRAY_SIZE(mt8173_rt5650_rt5514_codec_conf), | ||
180 | .controls = mt8173_rt5650_rt5514_controls, | ||
181 | .num_controls = ARRAY_SIZE(mt8173_rt5650_rt5514_controls), | ||
182 | .dapm_widgets = mt8173_rt5650_rt5514_widgets, | ||
183 | .num_dapm_widgets = ARRAY_SIZE(mt8173_rt5650_rt5514_widgets), | ||
184 | .dapm_routes = mt8173_rt5650_rt5514_routes, | ||
185 | .num_dapm_routes = ARRAY_SIZE(mt8173_rt5650_rt5514_routes), | ||
186 | }; | ||
187 | |||
188 | static int mt8173_rt5650_rt5514_dev_probe(struct platform_device *pdev) | ||
189 | { | ||
190 | struct snd_soc_card *card = &mt8173_rt5650_rt5514_card; | ||
191 | struct device_node *platform_node; | ||
192 | int i, ret; | ||
193 | |||
194 | platform_node = of_parse_phandle(pdev->dev.of_node, | ||
195 | "mediatek,platform", 0); | ||
196 | if (!platform_node) { | ||
197 | dev_err(&pdev->dev, "Property 'platform' missing or invalid\n"); | ||
198 | return -EINVAL; | ||
199 | } | ||
200 | |||
201 | for (i = 0; i < card->num_links; i++) { | ||
202 | if (mt8173_rt5650_rt5514_dais[i].platform_name) | ||
203 | continue; | ||
204 | mt8173_rt5650_rt5514_dais[i].platform_of_node = platform_node; | ||
205 | } | ||
206 | |||
207 | mt8173_rt5650_rt5514_codecs[0].of_node = | ||
208 | of_parse_phandle(pdev->dev.of_node, "mediatek,audio-codec", 0); | ||
209 | if (!mt8173_rt5650_rt5514_codecs[0].of_node) { | ||
210 | dev_err(&pdev->dev, | ||
211 | "Property 'audio-codec' missing or invalid\n"); | ||
212 | return -EINVAL; | ||
213 | } | ||
214 | mt8173_rt5650_rt5514_codecs[1].of_node = | ||
215 | of_parse_phandle(pdev->dev.of_node, "mediatek,audio-codec", 1); | ||
216 | if (!mt8173_rt5650_rt5514_codecs[1].of_node) { | ||
217 | dev_err(&pdev->dev, | ||
218 | "Property 'audio-codec' missing or invalid\n"); | ||
219 | return -EINVAL; | ||
220 | } | ||
221 | mt8173_rt5650_rt5514_codec_conf[0].of_node = | ||
222 | mt8173_rt5650_rt5514_codecs[1].of_node; | ||
223 | |||
224 | card->dev = &pdev->dev; | ||
225 | platform_set_drvdata(pdev, card); | ||
226 | |||
227 | ret = devm_snd_soc_register_card(&pdev->dev, card); | ||
228 | if (ret) | ||
229 | dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n", | ||
230 | __func__, ret); | ||
231 | return ret; | ||
232 | } | ||
233 | |||
234 | static const struct of_device_id mt8173_rt5650_rt5514_dt_match[] = { | ||
235 | { .compatible = "mediatek,mt8173-rt5650-rt5514", }, | ||
236 | { } | ||
237 | }; | ||
238 | MODULE_DEVICE_TABLE(of, mt8173_rt5650_rt5514_dt_match); | ||
239 | |||
240 | static struct platform_driver mt8173_rt5650_rt5514_driver = { | ||
241 | .driver = { | ||
242 | .name = "mtk-rt5650-rt5514", | ||
243 | .of_match_table = mt8173_rt5650_rt5514_dt_match, | ||
244 | #ifdef CONFIG_PM | ||
245 | .pm = &snd_soc_pm_ops, | ||
246 | #endif | ||
247 | }, | ||
248 | .probe = mt8173_rt5650_rt5514_dev_probe, | ||
249 | }; | ||
250 | |||
251 | module_platform_driver(mt8173_rt5650_rt5514_driver); | ||
252 | |||
253 | /* Module information */ | ||
254 | MODULE_DESCRIPTION("MT8173 RT5650 and RT5514 SoC machine driver"); | ||
255 | MODULE_AUTHOR("Koro Chen <koro.chen@mediatek.com>"); | ||
256 | MODULE_LICENSE("GPL v2"); | ||
257 | MODULE_ALIAS("platform:mtk-rt5650-rt5514"); | ||
258 | |||
diff --git a/sound/soc/mediatek/mt8173-rt5650-rt5676.c b/sound/soc/mediatek/mt8173-rt5650-rt5676.c index 50ba538eccb3..5c4c58c69c51 100644 --- a/sound/soc/mediatek/mt8173-rt5650-rt5676.c +++ b/sound/soc/mediatek/mt8173-rt5650-rt5676.c | |||
@@ -131,10 +131,17 @@ static struct snd_soc_dai_link_component mt8173_rt5650_rt5676_codecs[] = { | |||
131 | }, | 131 | }, |
132 | }; | 132 | }; |
133 | 133 | ||
134 | enum { | ||
135 | DAI_LINK_PLAYBACK, | ||
136 | DAI_LINK_CAPTURE, | ||
137 | DAI_LINK_CODEC_I2S, | ||
138 | DAI_LINK_INTERCODEC | ||
139 | }; | ||
140 | |||
134 | /* Digital audio interface glue - connects codec <---> CPU */ | 141 | /* Digital audio interface glue - connects codec <---> CPU */ |
135 | static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { | 142 | static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { |
136 | /* Front End DAI links */ | 143 | /* Front End DAI links */ |
137 | { | 144 | [DAI_LINK_PLAYBACK] = { |
138 | .name = "rt5650_rt5676 Playback", | 145 | .name = "rt5650_rt5676 Playback", |
139 | .stream_name = "rt5650_rt5676 Playback", | 146 | .stream_name = "rt5650_rt5676 Playback", |
140 | .cpu_dai_name = "DL1", | 147 | .cpu_dai_name = "DL1", |
@@ -144,7 +151,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { | |||
144 | .dynamic = 1, | 151 | .dynamic = 1, |
145 | .dpcm_playback = 1, | 152 | .dpcm_playback = 1, |
146 | }, | 153 | }, |
147 | { | 154 | [DAI_LINK_CAPTURE] = { |
148 | .name = "rt5650_rt5676 Capture", | 155 | .name = "rt5650_rt5676 Capture", |
149 | .stream_name = "rt5650_rt5676 Capture", | 156 | .stream_name = "rt5650_rt5676 Capture", |
150 | .cpu_dai_name = "VUL", | 157 | .cpu_dai_name = "VUL", |
@@ -156,7 +163,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { | |||
156 | }, | 163 | }, |
157 | 164 | ||
158 | /* Back End DAI links */ | 165 | /* Back End DAI links */ |
159 | { | 166 | [DAI_LINK_CODEC_I2S] = { |
160 | .name = "Codec", | 167 | .name = "Codec", |
161 | .cpu_dai_name = "I2S", | 168 | .cpu_dai_name = "I2S", |
162 | .no_pcm = 1, | 169 | .no_pcm = 1, |
@@ -170,7 +177,8 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { | |||
170 | .dpcm_playback = 1, | 177 | .dpcm_playback = 1, |
171 | .dpcm_capture = 1, | 178 | .dpcm_capture = 1, |
172 | }, | 179 | }, |
173 | { /* rt5676 <-> rt5650 intercodec link: Sets rt5676 I2S2 as master */ | 180 | /* rt5676 <-> rt5650 intercodec link: Sets rt5676 I2S2 as master */ |
181 | [DAI_LINK_INTERCODEC] = { | ||
174 | .name = "rt5650_rt5676 intercodec", | 182 | .name = "rt5650_rt5676 intercodec", |
175 | .stream_name = "rt5650_rt5676 intercodec", | 183 | .stream_name = "rt5650_rt5676 intercodec", |
176 | .cpu_dai_name = "snd-soc-dummy-dai", | 184 | .cpu_dai_name = "snd-soc-dummy-dai", |
@@ -240,7 +248,7 @@ static int mt8173_rt5650_rt5676_dev_probe(struct platform_device *pdev) | |||
240 | mt8173_rt5650_rt5676_codec_conf[0].of_node = | 248 | mt8173_rt5650_rt5676_codec_conf[0].of_node = |
241 | mt8173_rt5650_rt5676_codecs[1].of_node; | 249 | mt8173_rt5650_rt5676_codecs[1].of_node; |
242 | 250 | ||
243 | mt8173_rt5650_rt5676_dais[3].codec_of_node = | 251 | mt8173_rt5650_rt5676_dais[DAI_LINK_INTERCODEC].codec_of_node = |
244 | mt8173_rt5650_rt5676_codecs[1].of_node; | 252 | mt8173_rt5650_rt5676_codecs[1].of_node; |
245 | 253 | ||
246 | card->dev = &pdev->dev; | 254 | card->dev = &pdev->dev; |
diff --git a/sound/soc/mediatek/mt8173-rt5650.c b/sound/soc/mediatek/mt8173-rt5650.c new file mode 100644 index 000000000000..bb09bb1b7f1c --- /dev/null +++ b/sound/soc/mediatek/mt8173-rt5650.c | |||
@@ -0,0 +1,236 @@ | |||
1 | /* | ||
2 | * mt8173-rt5650.c -- MT8173 machine driver with RT5650 codecs | ||
3 | * | ||
4 | * Copyright (c) 2016 MediaTek Inc. | ||
5 | * Author: Koro Chen <koro.chen@mediatek.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 and | ||
9 | * only version 2 as published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #include <linux/module.h> | ||
18 | #include <linux/gpio.h> | ||
19 | #include <linux/of_gpio.h> | ||
20 | #include <sound/soc.h> | ||
21 | #include <sound/jack.h> | ||
22 | #include "../codecs/rt5645.h" | ||
23 | |||
24 | #define MCLK_FOR_CODECS 12288000 | ||
25 | |||
26 | static const struct snd_soc_dapm_widget mt8173_rt5650_widgets[] = { | ||
27 | SND_SOC_DAPM_SPK("Speaker", NULL), | ||
28 | SND_SOC_DAPM_MIC("Int Mic", NULL), | ||
29 | SND_SOC_DAPM_HP("Headphone", NULL), | ||
30 | SND_SOC_DAPM_MIC("Headset Mic", NULL), | ||
31 | }; | ||
32 | |||
33 | static const struct snd_soc_dapm_route mt8173_rt5650_routes[] = { | ||
34 | {"Speaker", NULL, "SPOL"}, | ||
35 | {"Speaker", NULL, "SPOR"}, | ||
36 | {"DMIC L1", NULL, "Int Mic"}, | ||
37 | {"DMIC R1", NULL, "Int Mic"}, | ||
38 | {"Headphone", NULL, "HPOL"}, | ||
39 | {"Headphone", NULL, "HPOR"}, | ||
40 | {"Headset Mic", NULL, "micbias1"}, | ||
41 | {"Headset Mic", NULL, "micbias2"}, | ||
42 | {"IN1P", NULL, "Headset Mic"}, | ||
43 | {"IN1N", NULL, "Headset Mic"}, | ||
44 | }; | ||
45 | |||
46 | static const struct snd_kcontrol_new mt8173_rt5650_controls[] = { | ||
47 | SOC_DAPM_PIN_SWITCH("Speaker"), | ||
48 | SOC_DAPM_PIN_SWITCH("Int Mic"), | ||
49 | SOC_DAPM_PIN_SWITCH("Headphone"), | ||
50 | SOC_DAPM_PIN_SWITCH("Headset Mic"), | ||
51 | }; | ||
52 | |||
53 | static int mt8173_rt5650_hw_params(struct snd_pcm_substream *substream, | ||
54 | struct snd_pcm_hw_params *params) | ||
55 | { | ||
56 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
57 | int i, ret; | ||
58 | |||
59 | for (i = 0; i < rtd->num_codecs; i++) { | ||
60 | struct snd_soc_dai *codec_dai = rtd->codec_dais[i]; | ||
61 | |||
62 | /* pll from mclk 12.288M */ | ||
63 | ret = snd_soc_dai_set_pll(codec_dai, 0, 0, MCLK_FOR_CODECS, | ||
64 | params_rate(params) * 512); | ||
65 | if (ret) | ||
66 | return ret; | ||
67 | |||
68 | /* sysclk from pll */ | ||
69 | ret = snd_soc_dai_set_sysclk(codec_dai, 1, | ||
70 | params_rate(params) * 512, | ||
71 | SND_SOC_CLOCK_IN); | ||
72 | if (ret) | ||
73 | return ret; | ||
74 | } | ||
75 | return 0; | ||
76 | } | ||
77 | |||
78 | static struct snd_soc_ops mt8173_rt5650_ops = { | ||
79 | .hw_params = mt8173_rt5650_hw_params, | ||
80 | }; | ||
81 | |||
82 | static struct snd_soc_jack mt8173_rt5650_jack; | ||
83 | |||
84 | static int mt8173_rt5650_init(struct snd_soc_pcm_runtime *runtime) | ||
85 | { | ||
86 | struct snd_soc_card *card = runtime->card; | ||
87 | struct snd_soc_codec *codec = runtime->codec_dais[0]->codec; | ||
88 | int ret; | ||
89 | |||
90 | rt5645_sel_asrc_clk_src(codec, | ||
91 | RT5645_DA_STEREO_FILTER | | ||
92 | RT5645_AD_STEREO_FILTER, | ||
93 | RT5645_CLK_SEL_I2S1_ASRC); | ||
94 | /* enable jack detection */ | ||
95 | ret = snd_soc_card_jack_new(card, "Headset Jack", | ||
96 | SND_JACK_HEADPHONE | SND_JACK_MICROPHONE | | ||
97 | SND_JACK_BTN_0 | SND_JACK_BTN_1 | | ||
98 | SND_JACK_BTN_2 | SND_JACK_BTN_3, | ||
99 | &mt8173_rt5650_jack, NULL, 0); | ||
100 | if (ret) { | ||
101 | dev_err(card->dev, "Can't new Headset Jack %d\n", ret); | ||
102 | return ret; | ||
103 | } | ||
104 | |||
105 | return rt5645_set_jack_detect(codec, | ||
106 | &mt8173_rt5650_jack, | ||
107 | &mt8173_rt5650_jack, | ||
108 | &mt8173_rt5650_jack); | ||
109 | } | ||
110 | |||
111 | static struct snd_soc_dai_link_component mt8173_rt5650_codecs[] = { | ||
112 | { | ||
113 | .dai_name = "rt5645-aif1", | ||
114 | }, | ||
115 | }; | ||
116 | |||
117 | enum { | ||
118 | DAI_LINK_PLAYBACK, | ||
119 | DAI_LINK_CAPTURE, | ||
120 | DAI_LINK_CODEC_I2S, | ||
121 | }; | ||
122 | |||
123 | /* Digital audio interface glue - connects codec <---> CPU */ | ||
124 | static struct snd_soc_dai_link mt8173_rt5650_dais[] = { | ||
125 | /* Front End DAI links */ | ||
126 | [DAI_LINK_PLAYBACK] = { | ||
127 | .name = "rt5650 Playback", | ||
128 | .stream_name = "rt5650 Playback", | ||
129 | .cpu_dai_name = "DL1", | ||
130 | .codec_name = "snd-soc-dummy", | ||
131 | .codec_dai_name = "snd-soc-dummy-dai", | ||
132 | .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
133 | .dynamic = 1, | ||
134 | .dpcm_playback = 1, | ||
135 | }, | ||
136 | [DAI_LINK_CAPTURE] = { | ||
137 | .name = "rt5650 Capture", | ||
138 | .stream_name = "rt5650 Capture", | ||
139 | .cpu_dai_name = "VUL", | ||
140 | .codec_name = "snd-soc-dummy", | ||
141 | .codec_dai_name = "snd-soc-dummy-dai", | ||
142 | .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, | ||
143 | .dynamic = 1, | ||
144 | .dpcm_capture = 1, | ||
145 | }, | ||
146 | /* Back End DAI links */ | ||
147 | [DAI_LINK_CODEC_I2S] = { | ||
148 | .name = "Codec", | ||
149 | .cpu_dai_name = "I2S", | ||
150 | .no_pcm = 1, | ||
151 | .codecs = mt8173_rt5650_codecs, | ||
152 | .num_codecs = 1, | ||
153 | .init = mt8173_rt5650_init, | ||
154 | .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | | ||
155 | SND_SOC_DAIFMT_CBS_CFS, | ||
156 | .ops = &mt8173_rt5650_ops, | ||
157 | .ignore_pmdown_time = 1, | ||
158 | .dpcm_playback = 1, | ||
159 | .dpcm_capture = 1, | ||
160 | }, | ||
161 | }; | ||
162 | |||
163 | static struct snd_soc_card mt8173_rt5650_card = { | ||
164 | .name = "mtk-rt5650", | ||
165 | .owner = THIS_MODULE, | ||
166 | .dai_link = mt8173_rt5650_dais, | ||
167 | .num_links = ARRAY_SIZE(mt8173_rt5650_dais), | ||
168 | .controls = mt8173_rt5650_controls, | ||
169 | .num_controls = ARRAY_SIZE(mt8173_rt5650_controls), | ||
170 | .dapm_widgets = mt8173_rt5650_widgets, | ||
171 | .num_dapm_widgets = ARRAY_SIZE(mt8173_rt5650_widgets), | ||
172 | .dapm_routes = mt8173_rt5650_routes, | ||
173 | .num_dapm_routes = ARRAY_SIZE(mt8173_rt5650_routes), | ||
174 | }; | ||
175 | |||
176 | static int mt8173_rt5650_dev_probe(struct platform_device *pdev) | ||
177 | { | ||
178 | struct snd_soc_card *card = &mt8173_rt5650_card; | ||
179 | struct device_node *platform_node; | ||
180 | int i, ret; | ||
181 | |||
182 | platform_node = of_parse_phandle(pdev->dev.of_node, | ||
183 | "mediatek,platform", 0); | ||
184 | if (!platform_node) { | ||
185 | dev_err(&pdev->dev, "Property 'platform' missing or invalid\n"); | ||
186 | return -EINVAL; | ||
187 | } | ||
188 | |||
189 | for (i = 0; i < card->num_links; i++) { | ||
190 | if (mt8173_rt5650_dais[i].platform_name) | ||
191 | continue; | ||
192 | mt8173_rt5650_dais[i].platform_of_node = platform_node; | ||
193 | } | ||
194 | |||
195 | mt8173_rt5650_codecs[0].of_node = | ||
196 | of_parse_phandle(pdev->dev.of_node, "mediatek,audio-codec", 0); | ||
197 | if (!mt8173_rt5650_codecs[0].of_node) { | ||
198 | dev_err(&pdev->dev, | ||
199 | "Property 'audio-codec' missing or invalid\n"); | ||
200 | return -EINVAL; | ||
201 | } | ||
202 | card->dev = &pdev->dev; | ||
203 | platform_set_drvdata(pdev, card); | ||
204 | |||
205 | ret = devm_snd_soc_register_card(&pdev->dev, card); | ||
206 | if (ret) | ||
207 | dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n", | ||
208 | __func__, ret); | ||
209 | return ret; | ||
210 | } | ||
211 | |||
212 | static const struct of_device_id mt8173_rt5650_dt_match[] = { | ||
213 | { .compatible = "mediatek,mt8173-rt5650", }, | ||
214 | { } | ||
215 | }; | ||
216 | MODULE_DEVICE_TABLE(of, mt8173_rt5650_dt_match); | ||
217 | |||
218 | static struct platform_driver mt8173_rt5650_driver = { | ||
219 | .driver = { | ||
220 | .name = "mtk-rt5650", | ||
221 | .of_match_table = mt8173_rt5650_dt_match, | ||
222 | #ifdef CONFIG_PM | ||
223 | .pm = &snd_soc_pm_ops, | ||
224 | #endif | ||
225 | }, | ||
226 | .probe = mt8173_rt5650_dev_probe, | ||
227 | }; | ||
228 | |||
229 | module_platform_driver(mt8173_rt5650_driver); | ||
230 | |||
231 | /* Module information */ | ||
232 | MODULE_DESCRIPTION("MT8173 RT5650 SoC machine driver"); | ||
233 | MODULE_AUTHOR("Koro Chen <koro.chen@mediatek.com>"); | ||
234 | MODULE_LICENSE("GPL v2"); | ||
235 | MODULE_ALIAS("platform:mtk-rt5650"); | ||
236 | |||
diff --git a/sound/soc/mediatek/mtk-afe-common.h b/sound/soc/mediatek/mtk-afe-common.h index 9b1af1a70874..f341f623e887 100644 --- a/sound/soc/mediatek/mtk-afe-common.h +++ b/sound/soc/mediatek/mtk-afe-common.h | |||
@@ -87,6 +87,7 @@ struct mtk_afe_memif_data { | |||
87 | int irq_en_shift; | 87 | int irq_en_shift; |
88 | int irq_fs_shift; | 88 | int irq_fs_shift; |
89 | int irq_clr_shift; | 89 | int irq_clr_shift; |
90 | int msb_shift; | ||
90 | }; | 91 | }; |
91 | 92 | ||
92 | struct mtk_afe_memif { | 93 | struct mtk_afe_memif { |
diff --git a/sound/soc/mediatek/mtk-afe-pcm.c b/sound/soc/mediatek/mtk-afe-pcm.c index 08af9f5dc4ab..f1c58a2c12fb 100644 --- a/sound/soc/mediatek/mtk-afe-pcm.c +++ b/sound/soc/mediatek/mtk-afe-pcm.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/module.h> | 21 | #include <linux/module.h> |
22 | #include <linux/of.h> | 22 | #include <linux/of.h> |
23 | #include <linux/of_address.h> | 23 | #include <linux/of_address.h> |
24 | #include <linux/dma-mapping.h> | ||
24 | #include <linux/pm_runtime.h> | 25 | #include <linux/pm_runtime.h> |
25 | #include <sound/soc.h> | 26 | #include <sound/soc.h> |
26 | #include "mtk-afe-common.h" | 27 | #include "mtk-afe-common.h" |
@@ -35,9 +36,11 @@ | |||
35 | #define AFE_I2S_CON1 0x0034 | 36 | #define AFE_I2S_CON1 0x0034 |
36 | #define AFE_I2S_CON2 0x0038 | 37 | #define AFE_I2S_CON2 0x0038 |
37 | #define AFE_CONN_24BIT 0x006c | 38 | #define AFE_CONN_24BIT 0x006c |
39 | #define AFE_MEMIF_MSB 0x00cc | ||
38 | 40 | ||
39 | #define AFE_CONN1 0x0024 | 41 | #define AFE_CONN1 0x0024 |
40 | #define AFE_CONN2 0x0028 | 42 | #define AFE_CONN2 0x0028 |
43 | #define AFE_CONN3 0x002c | ||
41 | #define AFE_CONN7 0x0460 | 44 | #define AFE_CONN7 0x0460 |
42 | #define AFE_CONN8 0x0464 | 45 | #define AFE_CONN8 0x0464 |
43 | #define AFE_HDMI_CONN0 0x0390 | 46 | #define AFE_HDMI_CONN0 0x0390 |
@@ -61,6 +64,7 @@ | |||
61 | #define AFE_HDMI_OUT_CUR 0x0378 | 64 | #define AFE_HDMI_OUT_CUR 0x0378 |
62 | #define AFE_HDMI_OUT_END 0x037c | 65 | #define AFE_HDMI_OUT_END 0x037c |
63 | 66 | ||
67 | #define AFE_ADDA_TOP_CON0 0x0120 | ||
64 | #define AFE_ADDA2_TOP_CON0 0x0600 | 68 | #define AFE_ADDA2_TOP_CON0 0x0600 |
65 | 69 | ||
66 | #define AFE_HDMI_OUT_CON0 0x0370 | 70 | #define AFE_HDMI_OUT_CON0 0x0370 |
@@ -257,6 +261,7 @@ static int mtk_afe_set_i2s(struct mtk_afe *afe, unsigned int rate) | |||
257 | return -EINVAL; | 261 | return -EINVAL; |
258 | 262 | ||
259 | /* from external ADC */ | 263 | /* from external ADC */ |
264 | regmap_update_bits(afe->regmap, AFE_ADDA_TOP_CON0, 0x1, 0x1); | ||
260 | regmap_update_bits(afe->regmap, AFE_ADDA2_TOP_CON0, 0x1, 0x1); | 265 | regmap_update_bits(afe->regmap, AFE_ADDA2_TOP_CON0, 0x1, 0x1); |
261 | 266 | ||
262 | /* set input */ | 267 | /* set input */ |
@@ -281,20 +286,13 @@ static void mtk_afe_set_i2s_enable(struct mtk_afe *afe, bool enable) | |||
281 | 286 | ||
282 | regmap_read(afe->regmap, AFE_I2S_CON2, &val); | 287 | regmap_read(afe->regmap, AFE_I2S_CON2, &val); |
283 | if (!!(val & AFE_I2S_CON2_EN) == enable) | 288 | if (!!(val & AFE_I2S_CON2_EN) == enable) |
284 | return; /* must skip soft reset */ | 289 | return; |
285 | |||
286 | /* I2S soft reset begin */ | ||
287 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON1, 0x4, 0x4); | ||
288 | 290 | ||
289 | /* input */ | 291 | /* input */ |
290 | regmap_update_bits(afe->regmap, AFE_I2S_CON2, 0x1, enable); | 292 | regmap_update_bits(afe->regmap, AFE_I2S_CON2, 0x1, enable); |
291 | 293 | ||
292 | /* output */ | 294 | /* output */ |
293 | regmap_update_bits(afe->regmap, AFE_I2S_CON1, 0x1, enable); | 295 | regmap_update_bits(afe->regmap, AFE_I2S_CON1, 0x1, enable); |
294 | |||
295 | /* I2S soft reset end */ | ||
296 | udelay(1); | ||
297 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON1, 0x4, 0); | ||
298 | } | 296 | } |
299 | 297 | ||
300 | static int mtk_afe_dais_enable_clks(struct mtk_afe *afe, | 298 | static int mtk_afe_dais_enable_clks(struct mtk_afe *afe, |
@@ -363,6 +361,7 @@ static int mtk_afe_i2s_startup(struct snd_pcm_substream *substream, | |||
363 | return 0; | 361 | return 0; |
364 | 362 | ||
365 | mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL); | 363 | mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL); |
364 | mtk_afe_dais_enable_clks(afe, afe->clocks[MTK_CLK_I2S2_M], NULL); | ||
366 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, | 365 | regmap_update_bits(afe->regmap, AUDIO_TOP_CON0, |
367 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, 0); | 366 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, 0); |
368 | return 0; | 367 | return 0; |
@@ -382,6 +381,7 @@ static void mtk_afe_i2s_shutdown(struct snd_pcm_substream *substream, | |||
382 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, | 381 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M, |
383 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M); | 382 | AUD_TCON0_PDN_22M | AUD_TCON0_PDN_24M); |
384 | mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL); | 383 | mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S1_M], NULL); |
384 | mtk_afe_dais_disable_clks(afe, afe->clocks[MTK_CLK_I2S2_M], NULL); | ||
385 | } | 385 | } |
386 | 386 | ||
387 | static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream, | 387 | static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream, |
@@ -395,6 +395,9 @@ static int mtk_afe_i2s_prepare(struct snd_pcm_substream *substream, | |||
395 | mtk_afe_dais_set_clks(afe, | 395 | mtk_afe_dais_set_clks(afe, |
396 | afe->clocks[MTK_CLK_I2S1_M], runtime->rate * 256, | 396 | afe->clocks[MTK_CLK_I2S1_M], runtime->rate * 256, |
397 | NULL, 0); | 397 | NULL, 0); |
398 | mtk_afe_dais_set_clks(afe, | ||
399 | afe->clocks[MTK_CLK_I2S2_M], runtime->rate * 256, | ||
400 | NULL, 0); | ||
398 | /* config I2S */ | 401 | /* config I2S */ |
399 | ret = mtk_afe_set_i2s(afe, substream->runtime->rate); | 402 | ret = mtk_afe_set_i2s(afe, substream->runtime->rate); |
400 | if (ret) | 403 | if (ret) |
@@ -592,6 +595,7 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | |||
592 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 595 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
593 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); | 596 | struct mtk_afe *afe = snd_soc_platform_get_drvdata(rtd->platform); |
594 | struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; | 597 | struct mtk_afe_memif *memif = &afe->memif[rtd->cpu_dai->id]; |
598 | int msb_at_bit33 = 0; | ||
595 | int ret; | 599 | int ret; |
596 | 600 | ||
597 | dev_dbg(afe->dev, | 601 | dev_dbg(afe->dev, |
@@ -603,7 +607,8 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | |||
603 | if (ret < 0) | 607 | if (ret < 0) |
604 | return ret; | 608 | return ret; |
605 | 609 | ||
606 | memif->phys_buf_addr = substream->runtime->dma_addr; | 610 | msb_at_bit33 = upper_32_bits(substream->runtime->dma_addr) ? 1 : 0; |
611 | memif->phys_buf_addr = lower_32_bits(substream->runtime->dma_addr); | ||
607 | memif->buffer_size = substream->runtime->dma_bytes; | 612 | memif->buffer_size = substream->runtime->dma_bytes; |
608 | 613 | ||
609 | /* start */ | 614 | /* start */ |
@@ -614,6 +619,11 @@ static int mtk_afe_dais_hw_params(struct snd_pcm_substream *substream, | |||
614 | memif->data->reg_ofs_base + AFE_BASE_END_OFFSET, | 619 | memif->data->reg_ofs_base + AFE_BASE_END_OFFSET, |
615 | memif->phys_buf_addr + memif->buffer_size - 1); | 620 | memif->phys_buf_addr + memif->buffer_size - 1); |
616 | 621 | ||
622 | /* set MSB to 33-bit */ | ||
623 | regmap_update_bits(afe->regmap, AFE_MEMIF_MSB, | ||
624 | 1 << memif->data->msb_shift, | ||
625 | msb_at_bit33 << memif->data->msb_shift); | ||
626 | |||
617 | /* set channel */ | 627 | /* set channel */ |
618 | if (memif->data->mono_shift >= 0) { | 628 | if (memif->data->mono_shift >= 0) { |
619 | unsigned int mono = (params_channels(params) == 1) ? 1 : 0; | 629 | unsigned int mono = (params_channels(params) == 1) ? 1 : 0; |
@@ -894,15 +904,19 @@ static const struct snd_kcontrol_new mtk_afe_o04_mix[] = { | |||
894 | }; | 904 | }; |
895 | 905 | ||
896 | static const struct snd_kcontrol_new mtk_afe_o09_mix[] = { | 906 | static const struct snd_kcontrol_new mtk_afe_o09_mix[] = { |
907 | SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN3, 0, 1, 0), | ||
897 | SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN7, 30, 1, 0), | 908 | SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN7, 30, 1, 0), |
898 | }; | 909 | }; |
899 | 910 | ||
900 | static const struct snd_kcontrol_new mtk_afe_o10_mix[] = { | 911 | static const struct snd_kcontrol_new mtk_afe_o10_mix[] = { |
912 | SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN3, 3, 1, 0), | ||
901 | SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN8, 0, 1, 0), | 913 | SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN8, 0, 1, 0), |
902 | }; | 914 | }; |
903 | 915 | ||
904 | static const struct snd_soc_dapm_widget mtk_afe_pcm_widgets[] = { | 916 | static const struct snd_soc_dapm_widget mtk_afe_pcm_widgets[] = { |
905 | /* inter-connections */ | 917 | /* inter-connections */ |
918 | SND_SOC_DAPM_MIXER("I03", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
919 | SND_SOC_DAPM_MIXER("I04", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
906 | SND_SOC_DAPM_MIXER("I05", SND_SOC_NOPM, 0, 0, NULL, 0), | 920 | SND_SOC_DAPM_MIXER("I05", SND_SOC_NOPM, 0, 0, NULL, 0), |
907 | SND_SOC_DAPM_MIXER("I06", SND_SOC_NOPM, 0, 0, NULL, 0), | 921 | SND_SOC_DAPM_MIXER("I06", SND_SOC_NOPM, 0, 0, NULL, 0), |
908 | SND_SOC_DAPM_MIXER("I17", SND_SOC_NOPM, 0, 0, NULL, 0), | 922 | SND_SOC_DAPM_MIXER("I17", SND_SOC_NOPM, 0, 0, NULL, 0), |
@@ -925,12 +939,16 @@ static const struct snd_soc_dapm_route mtk_afe_pcm_routes[] = { | |||
925 | {"I2S Playback", NULL, "O04"}, | 939 | {"I2S Playback", NULL, "O04"}, |
926 | {"VUL", NULL, "O09"}, | 940 | {"VUL", NULL, "O09"}, |
927 | {"VUL", NULL, "O10"}, | 941 | {"VUL", NULL, "O10"}, |
942 | {"I03", NULL, "I2S Capture"}, | ||
943 | {"I04", NULL, "I2S Capture"}, | ||
928 | {"I17", NULL, "I2S Capture"}, | 944 | {"I17", NULL, "I2S Capture"}, |
929 | {"I18", NULL, "I2S Capture"}, | 945 | {"I18", NULL, "I2S Capture"}, |
930 | { "O03", "I05 Switch", "I05" }, | 946 | { "O03", "I05 Switch", "I05" }, |
931 | { "O04", "I06 Switch", "I06" }, | 947 | { "O04", "I06 Switch", "I06" }, |
932 | { "O09", "I17 Switch", "I17" }, | 948 | { "O09", "I17 Switch", "I17" }, |
949 | { "O09", "I03 Switch", "I03" }, | ||
933 | { "O10", "I18 Switch", "I18" }, | 950 | { "O10", "I18 Switch", "I18" }, |
951 | { "O10", "I04 Switch", "I04" }, | ||
934 | }; | 952 | }; |
935 | 953 | ||
936 | static const struct snd_soc_dapm_route mtk_afe_hdmi_routes[] = { | 954 | static const struct snd_soc_dapm_route mtk_afe_hdmi_routes[] = { |
@@ -978,6 +996,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
978 | .irq_en_shift = 0, | 996 | .irq_en_shift = 0, |
979 | .irq_fs_shift = 4, | 997 | .irq_fs_shift = 4, |
980 | .irq_clr_shift = 0, | 998 | .irq_clr_shift = 0, |
999 | .msb_shift = 0, | ||
981 | }, { | 1000 | }, { |
982 | .name = "DL2", | 1001 | .name = "DL2", |
983 | .id = MTK_AFE_MEMIF_DL2, | 1002 | .id = MTK_AFE_MEMIF_DL2, |
@@ -991,6 +1010,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
991 | .irq_en_shift = 2, | 1010 | .irq_en_shift = 2, |
992 | .irq_fs_shift = 16, | 1011 | .irq_fs_shift = 16, |
993 | .irq_clr_shift = 2, | 1012 | .irq_clr_shift = 2, |
1013 | .msb_shift = 1, | ||
994 | }, { | 1014 | }, { |
995 | .name = "VUL", | 1015 | .name = "VUL", |
996 | .id = MTK_AFE_MEMIF_VUL, | 1016 | .id = MTK_AFE_MEMIF_VUL, |
@@ -1004,6 +1024,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1004 | .irq_en_shift = 1, | 1024 | .irq_en_shift = 1, |
1005 | .irq_fs_shift = 8, | 1025 | .irq_fs_shift = 8, |
1006 | .irq_clr_shift = 1, | 1026 | .irq_clr_shift = 1, |
1027 | .msb_shift = 6, | ||
1007 | }, { | 1028 | }, { |
1008 | .name = "DAI", | 1029 | .name = "DAI", |
1009 | .id = MTK_AFE_MEMIF_DAI, | 1030 | .id = MTK_AFE_MEMIF_DAI, |
@@ -1017,6 +1038,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1017 | .irq_en_shift = 3, | 1038 | .irq_en_shift = 3, |
1018 | .irq_fs_shift = 20, | 1039 | .irq_fs_shift = 20, |
1019 | .irq_clr_shift = 3, | 1040 | .irq_clr_shift = 3, |
1041 | .msb_shift = 5, | ||
1020 | }, { | 1042 | }, { |
1021 | .name = "AWB", | 1043 | .name = "AWB", |
1022 | .id = MTK_AFE_MEMIF_AWB, | 1044 | .id = MTK_AFE_MEMIF_AWB, |
@@ -1030,6 +1052,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1030 | .irq_en_shift = 14, | 1052 | .irq_en_shift = 14, |
1031 | .irq_fs_shift = 24, | 1053 | .irq_fs_shift = 24, |
1032 | .irq_clr_shift = 6, | 1054 | .irq_clr_shift = 6, |
1055 | .msb_shift = 3, | ||
1033 | }, { | 1056 | }, { |
1034 | .name = "MOD_DAI", | 1057 | .name = "MOD_DAI", |
1035 | .id = MTK_AFE_MEMIF_MOD_DAI, | 1058 | .id = MTK_AFE_MEMIF_MOD_DAI, |
@@ -1043,6 +1066,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1043 | .irq_en_shift = 3, | 1066 | .irq_en_shift = 3, |
1044 | .irq_fs_shift = 20, | 1067 | .irq_fs_shift = 20, |
1045 | .irq_clr_shift = 3, | 1068 | .irq_clr_shift = 3, |
1069 | .msb_shift = 4, | ||
1046 | }, { | 1070 | }, { |
1047 | .name = "HDMI", | 1071 | .name = "HDMI", |
1048 | .id = MTK_AFE_MEMIF_HDMI, | 1072 | .id = MTK_AFE_MEMIF_HDMI, |
@@ -1056,6 +1080,7 @@ static const struct mtk_afe_memif_data memif_data[MTK_AFE_MEMIF_NUM] = { | |||
1056 | .irq_en_shift = 12, | 1080 | .irq_en_shift = 12, |
1057 | .irq_fs_shift = -1, | 1081 | .irq_fs_shift = -1, |
1058 | .irq_clr_shift = 4, | 1082 | .irq_clr_shift = 4, |
1083 | .msb_shift = 8, | ||
1059 | }, | 1084 | }, |
1060 | }; | 1085 | }; |
1061 | 1086 | ||
@@ -1189,6 +1214,10 @@ static int mtk_afe_pcm_dev_probe(struct platform_device *pdev) | |||
1189 | struct mtk_afe *afe; | 1214 | struct mtk_afe *afe; |
1190 | struct resource *res; | 1215 | struct resource *res; |
1191 | 1216 | ||
1217 | ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(33)); | ||
1218 | if (ret) | ||
1219 | return ret; | ||
1220 | |||
1192 | afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL); | 1221 | afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL); |
1193 | if (!afe) | 1222 | if (!afe) |
1194 | return -ENOMEM; | 1223 | return -ENOMEM; |
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index a6c7b8d87cd2..13631003cb7c 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c | |||
@@ -418,7 +418,7 @@ static int mxs_saif_hw_params(struct snd_pcm_substream *substream, | |||
418 | } | 418 | } |
419 | 419 | ||
420 | stat = __raw_readl(saif->base + SAIF_STAT); | 420 | stat = __raw_readl(saif->base + SAIF_STAT); |
421 | if (stat & BM_SAIF_STAT_BUSY) { | 421 | if (!saif->mclk_in_use && (stat & BM_SAIF_STAT_BUSY)) { |
422 | dev_err(cpu_dai->dev, "error: busy\n"); | 422 | dev_err(cpu_dai->dev, "error: busy\n"); |
423 | return -EBUSY; | 423 | return -EBUSY; |
424 | } | 424 | } |
diff --git a/sound/soc/omap/omap-hdmi-audio.c b/sound/soc/omap/omap-hdmi-audio.c index f83cc2bc0fc4..64425d352962 100644 --- a/sound/soc/omap/omap-hdmi-audio.c +++ b/sound/soc/omap/omap-hdmi-audio.c | |||
@@ -345,6 +345,7 @@ static int omap_hdmi_audio_probe(struct platform_device *pdev) | |||
345 | dai_drv = &omap4_hdmi_dai; | 345 | dai_drv = &omap4_hdmi_dai; |
346 | break; | 346 | break; |
347 | case OMAPDSS_VER_OMAP5: | 347 | case OMAPDSS_VER_OMAP5: |
348 | case OMAPDSS_VER_DRA7xx: | ||
348 | dai_drv = &omap5_hdmi_dai; | 349 | dai_drv = &omap5_hdmi_dai; |
349 | break; | 350 | break; |
350 | default: | 351 | default: |
diff --git a/sound/soc/pxa/brownstone.c b/sound/soc/pxa/brownstone.c index 416ea646c3b1..ec522e94b0e2 100644 --- a/sound/soc/pxa/brownstone.c +++ b/sound/soc/pxa/brownstone.c | |||
@@ -52,7 +52,6 @@ static int brownstone_wm8994_hw_params(struct snd_pcm_substream *substream, | |||
52 | struct snd_soc_dai *codec_dai = rtd->codec_dai; | 52 | struct snd_soc_dai *codec_dai = rtd->codec_dai; |
53 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; | 53 | struct snd_soc_dai *cpu_dai = rtd->cpu_dai; |
54 | int freq_out, sspa_mclk, sysclk; | 54 | int freq_out, sspa_mclk, sysclk; |
55 | int sspa_div; | ||
56 | 55 | ||
57 | if (params_rate(params) > 11025) { | 56 | if (params_rate(params) > 11025) { |
58 | freq_out = params_rate(params) * 512; | 57 | freq_out = params_rate(params) * 512; |
@@ -63,7 +62,6 @@ static int brownstone_wm8994_hw_params(struct snd_pcm_substream *substream, | |||
63 | sysclk = params_rate(params) * 512; | 62 | sysclk = params_rate(params) * 512; |
64 | sspa_mclk = params_rate(params) * 64; | 63 | sspa_mclk = params_rate(params) * 64; |
65 | } | 64 | } |
66 | sspa_div = freq_out / sspa_mclk; | ||
67 | 65 | ||
68 | snd_soc_dai_set_sysclk(cpu_dai, MMP_SSPA_CLK_AUDIO, freq_out, 0); | 66 | snd_soc_dai_set_sysclk(cpu_dai, MMP_SSPA_CLK_AUDIO, freq_out, 0); |
69 | snd_soc_dai_set_pll(cpu_dai, MMP_SYSCLK, 0, freq_out, sysclk); | 67 | snd_soc_dai_set_pll(cpu_dai, MMP_SYSCLK, 0, freq_out, sysclk); |
diff --git a/sound/soc/qcom/Kconfig b/sound/soc/qcom/Kconfig index 3cc252e55468..8ec9a074b38b 100644 --- a/sound/soc/qcom/Kconfig +++ b/sound/soc/qcom/Kconfig | |||
@@ -11,21 +11,24 @@ config SND_SOC_LPASS_CPU | |||
11 | 11 | ||
12 | config SND_SOC_LPASS_PLATFORM | 12 | config SND_SOC_LPASS_PLATFORM |
13 | tristate | 13 | tristate |
14 | depends on HAS_DMA | ||
14 | select REGMAP_MMIO | 15 | select REGMAP_MMIO |
15 | 16 | ||
16 | config SND_SOC_LPASS_IPQ806X | 17 | config SND_SOC_LPASS_IPQ806X |
17 | tristate | 18 | tristate |
19 | depends on HAS_DMA | ||
18 | select SND_SOC_LPASS_CPU | 20 | select SND_SOC_LPASS_CPU |
19 | select SND_SOC_LPASS_PLATFORM | 21 | select SND_SOC_LPASS_PLATFORM |
20 | 22 | ||
21 | config SND_SOC_LPASS_APQ8016 | 23 | config SND_SOC_LPASS_APQ8016 |
22 | tristate | 24 | tristate |
25 | depends on HAS_DMA | ||
23 | select SND_SOC_LPASS_CPU | 26 | select SND_SOC_LPASS_CPU |
24 | select SND_SOC_LPASS_PLATFORM | 27 | select SND_SOC_LPASS_PLATFORM |
25 | 28 | ||
26 | config SND_SOC_STORM | 29 | config SND_SOC_STORM |
27 | tristate "ASoC I2S support for Storm boards" | 30 | tristate "ASoC I2S support for Storm boards" |
28 | depends on SND_SOC_QCOM | 31 | depends on SND_SOC_QCOM && HAS_DMA |
29 | select SND_SOC_LPASS_IPQ806X | 32 | select SND_SOC_LPASS_IPQ806X |
30 | select SND_SOC_MAX98357A | 33 | select SND_SOC_MAX98357A |
31 | help | 34 | help |
@@ -34,7 +37,7 @@ config SND_SOC_STORM | |||
34 | 37 | ||
35 | config SND_SOC_APQ8016_SBC | 38 | config SND_SOC_APQ8016_SBC |
36 | tristate "SoC Audio support for APQ8016 SBC platforms" | 39 | tristate "SoC Audio support for APQ8016 SBC platforms" |
37 | depends on SND_SOC_QCOM | 40 | depends on SND_SOC_QCOM && HAS_DMA |
38 | select SND_SOC_LPASS_APQ8016 | 41 | select SND_SOC_LPASS_APQ8016 |
39 | help | 42 | help |
40 | Support for Qualcomm Technologies LPASS audio block in | 43 | Support for Qualcomm Technologies LPASS audio block in |
diff --git a/sound/soc/qcom/apq8016_sbc.c b/sound/soc/qcom/apq8016_sbc.c index 1efdf0088ecd..1289543c8fb2 100644 --- a/sound/soc/qcom/apq8016_sbc.c +++ b/sound/soc/qcom/apq8016_sbc.c | |||
@@ -30,6 +30,7 @@ struct apq8016_sbc_data { | |||
30 | struct snd_soc_dai_link dai_link[]; /* dynamically allocated */ | 30 | struct snd_soc_dai_link dai_link[]; /* dynamically allocated */ |
31 | }; | 31 | }; |
32 | 32 | ||
33 | #define MIC_CTRL_TER_WS_SLAVE_SEL BIT(21) | ||
33 | #define MIC_CTRL_QUA_WS_SLAVE_SEL_10 BIT(17) | 34 | #define MIC_CTRL_QUA_WS_SLAVE_SEL_10 BIT(17) |
34 | #define MIC_CTRL_TLMM_SCLK_EN BIT(1) | 35 | #define MIC_CTRL_TLMM_SCLK_EN BIT(1) |
35 | #define SPKR_CTL_PRI_WS_SLAVE_SEL_11 (BIT(17) | BIT(16)) | 36 | #define SPKR_CTL_PRI_WS_SLAVE_SEL_11 (BIT(17) | BIT(16)) |
@@ -53,6 +54,12 @@ static int apq8016_sbc_dai_init(struct snd_soc_pcm_runtime *rtd) | |||
53 | MIC_CTRL_TLMM_SCLK_EN, | 54 | MIC_CTRL_TLMM_SCLK_EN, |
54 | pdata->mic_iomux); | 55 | pdata->mic_iomux); |
55 | break; | 56 | break; |
57 | case MI2S_TERTIARY: | ||
58 | writel(readl(pdata->mic_iomux) | MIC_CTRL_TER_WS_SLAVE_SEL | | ||
59 | MIC_CTRL_TLMM_SCLK_EN, | ||
60 | pdata->mic_iomux); | ||
61 | |||
62 | break; | ||
56 | 63 | ||
57 | default: | 64 | default: |
58 | dev_err(card->dev, "unsupported cpu dai configuration\n"); | 65 | dev_err(card->dev, "unsupported cpu dai configuration\n"); |
@@ -126,9 +133,6 @@ static struct apq8016_sbc_data *apq8016_sbc_parse_of(struct snd_soc_card *card) | |||
126 | } | 133 | } |
127 | 134 | ||
128 | link->platform_of_node = link->cpu_of_node; | 135 | link->platform_of_node = link->cpu_of_node; |
129 | /* For now we only support playback */ | ||
130 | link->playback_only = true; | ||
131 | |||
132 | ret = of_property_read_string(np, "link-name", &link->name); | 136 | ret = of_property_read_string(np, "link-name", &link->name); |
133 | if (ret) { | 137 | if (ret) { |
134 | dev_err(card->dev, "error getting codec dai_link name\n"); | 138 | dev_err(card->dev, "error getting codec dai_link name\n"); |
diff --git a/sound/soc/qcom/lpass-apq8016.c b/sound/soc/qcom/lpass-apq8016.c index 94efc01020c4..3eef0c37ba50 100644 --- a/sound/soc/qcom/lpass-apq8016.c +++ b/sound/soc/qcom/lpass-apq8016.c | |||
@@ -133,23 +133,36 @@ static struct snd_soc_dai_driver apq8016_lpass_cpu_dai_driver[] = { | |||
133 | }, | 133 | }, |
134 | }; | 134 | }; |
135 | 135 | ||
136 | static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata) | 136 | static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata, |
137 | int direction) | ||
137 | { | 138 | { |
138 | struct lpass_variant *v = drvdata->variant; | 139 | struct lpass_variant *v = drvdata->variant; |
139 | int chan = find_first_zero_bit(&drvdata->rdma_ch_bit_map, | 140 | int chan = 0; |
141 | |||
142 | if (direction == SNDRV_PCM_STREAM_PLAYBACK) { | ||
143 | chan = find_first_zero_bit(&drvdata->dma_ch_bit_map, | ||
140 | v->rdma_channels); | 144 | v->rdma_channels); |
141 | 145 | ||
142 | if (chan >= v->rdma_channels) | 146 | if (chan >= v->rdma_channels) |
143 | return -EBUSY; | 147 | return -EBUSY; |
148 | } else { | ||
149 | chan = find_next_zero_bit(&drvdata->dma_ch_bit_map, | ||
150 | v->wrdma_channel_start + | ||
151 | v->wrdma_channels, | ||
152 | v->wrdma_channel_start); | ||
153 | |||
154 | if (chan >= v->wrdma_channel_start + v->wrdma_channels) | ||
155 | return -EBUSY; | ||
156 | } | ||
144 | 157 | ||
145 | set_bit(chan, &drvdata->rdma_ch_bit_map); | 158 | set_bit(chan, &drvdata->dma_ch_bit_map); |
146 | 159 | ||
147 | return chan; | 160 | return chan; |
148 | } | 161 | } |
149 | 162 | ||
150 | static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan) | 163 | static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan) |
151 | { | 164 | { |
152 | clear_bit(chan, &drvdata->rdma_ch_bit_map); | 165 | clear_bit(chan, &drvdata->dma_ch_bit_map); |
153 | 166 | ||
154 | return 0; | 167 | return 0; |
155 | } | 168 | } |
@@ -212,7 +225,11 @@ static struct lpass_variant apq8016_data = { | |||
212 | .rdma_reg_base = 0x8400, | 225 | .rdma_reg_base = 0x8400, |
213 | .rdma_reg_stride = 0x1000, | 226 | .rdma_reg_stride = 0x1000, |
214 | .rdma_channels = 2, | 227 | .rdma_channels = 2, |
215 | .rdmactl_audif_start = 1, | 228 | .dmactl_audif_start = 1, |
229 | .wrdma_reg_base = 0xB000, | ||
230 | .wrdma_reg_stride = 0x1000, | ||
231 | .wrdma_channel_start = 5, | ||
232 | .wrdma_channels = 2, | ||
216 | .dai_driver = apq8016_lpass_cpu_dai_driver, | 233 | .dai_driver = apq8016_lpass_cpu_dai_driver, |
217 | .num_dai = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver), | 234 | .num_dai = ARRAY_SIZE(apq8016_lpass_cpu_dai_driver), |
218 | .init = apq8016_lpass_init, | 235 | .init = apq8016_lpass_init, |
diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c index e5101e0d2d37..3cde9fb977fa 100644 --- a/sound/soc/qcom/lpass-cpu.c +++ b/sound/soc/qcom/lpass-cpu.c | |||
@@ -120,31 +120,60 @@ static int lpass_cpu_daiops_hw_params(struct snd_pcm_substream *substream, | |||
120 | return -EINVAL; | 120 | return -EINVAL; |
121 | } | 121 | } |
122 | 122 | ||
123 | switch (channels) { | 123 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
124 | case 1: | 124 | switch (channels) { |
125 | regval |= LPAIF_I2SCTL_SPKMODE_SD0; | 125 | case 1: |
126 | regval |= LPAIF_I2SCTL_SPKMONO_MONO; | 126 | regval |= LPAIF_I2SCTL_SPKMODE_SD0; |
127 | break; | 127 | regval |= LPAIF_I2SCTL_SPKMONO_MONO; |
128 | case 2: | 128 | break; |
129 | regval |= LPAIF_I2SCTL_SPKMODE_SD0; | 129 | case 2: |
130 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; | 130 | regval |= LPAIF_I2SCTL_SPKMODE_SD0; |
131 | break; | 131 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; |
132 | case 4: | 132 | break; |
133 | regval |= LPAIF_I2SCTL_SPKMODE_QUAD01; | 133 | case 4: |
134 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; | 134 | regval |= LPAIF_I2SCTL_SPKMODE_QUAD01; |
135 | break; | 135 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; |
136 | case 6: | 136 | break; |
137 | regval |= LPAIF_I2SCTL_SPKMODE_6CH; | 137 | case 6: |
138 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; | 138 | regval |= LPAIF_I2SCTL_SPKMODE_6CH; |
139 | break; | 139 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; |
140 | case 8: | 140 | break; |
141 | regval |= LPAIF_I2SCTL_SPKMODE_8CH; | 141 | case 8: |
142 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; | 142 | regval |= LPAIF_I2SCTL_SPKMODE_8CH; |
143 | break; | 143 | regval |= LPAIF_I2SCTL_SPKMONO_STEREO; |
144 | default: | 144 | break; |
145 | dev_err(dai->dev, "%s() invalid channels given: %u\n", | 145 | default: |
146 | __func__, channels); | 146 | dev_err(dai->dev, "%s() invalid channels given: %u\n", |
147 | return -EINVAL; | 147 | __func__, channels); |
148 | return -EINVAL; | ||
149 | } | ||
150 | } else { | ||
151 | switch (channels) { | ||
152 | case 1: | ||
153 | regval |= LPAIF_I2SCTL_MICMODE_SD0; | ||
154 | regval |= LPAIF_I2SCTL_MICMONO_MONO; | ||
155 | break; | ||
156 | case 2: | ||
157 | regval |= LPAIF_I2SCTL_MICMODE_SD0; | ||
158 | regval |= LPAIF_I2SCTL_MICMONO_STEREO; | ||
159 | break; | ||
160 | case 4: | ||
161 | regval |= LPAIF_I2SCTL_MICMODE_QUAD01; | ||
162 | regval |= LPAIF_I2SCTL_MICMONO_STEREO; | ||
163 | break; | ||
164 | case 6: | ||
165 | regval |= LPAIF_I2SCTL_MICMODE_6CH; | ||
166 | regval |= LPAIF_I2SCTL_MICMONO_STEREO; | ||
167 | break; | ||
168 | case 8: | ||
169 | regval |= LPAIF_I2SCTL_MICMODE_8CH; | ||
170 | regval |= LPAIF_I2SCTL_MICMONO_STEREO; | ||
171 | break; | ||
172 | default: | ||
173 | dev_err(dai->dev, "%s() invalid channels given: %u\n", | ||
174 | __func__, channels); | ||
175 | return -EINVAL; | ||
176 | } | ||
148 | } | 177 | } |
149 | 178 | ||
150 | ret = regmap_write(drvdata->lpaif_map, | 179 | ret = regmap_write(drvdata->lpaif_map, |
@@ -188,10 +217,19 @@ static int lpass_cpu_daiops_prepare(struct snd_pcm_substream *substream, | |||
188 | { | 217 | { |
189 | struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); | 218 | struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); |
190 | int ret; | 219 | int ret; |
220 | unsigned int val, mask; | ||
221 | |||
222 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
223 | val = LPAIF_I2SCTL_SPKEN_ENABLE; | ||
224 | mask = LPAIF_I2SCTL_SPKEN_MASK; | ||
225 | } else { | ||
226 | val = LPAIF_I2SCTL_MICEN_ENABLE; | ||
227 | mask = LPAIF_I2SCTL_MICEN_MASK; | ||
228 | } | ||
191 | 229 | ||
192 | ret = regmap_update_bits(drvdata->lpaif_map, | 230 | ret = regmap_update_bits(drvdata->lpaif_map, |
193 | LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), | 231 | LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), |
194 | LPAIF_I2SCTL_SPKEN_MASK, LPAIF_I2SCTL_SPKEN_ENABLE); | 232 | mask, val); |
195 | if (ret) | 233 | if (ret) |
196 | dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", | 234 | dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", |
197 | __func__, ret); | 235 | __func__, ret); |
@@ -204,16 +242,24 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, | |||
204 | { | 242 | { |
205 | struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); | 243 | struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai); |
206 | int ret = -EINVAL; | 244 | int ret = -EINVAL; |
245 | unsigned int val, mask; | ||
207 | 246 | ||
208 | switch (cmd) { | 247 | switch (cmd) { |
209 | case SNDRV_PCM_TRIGGER_START: | 248 | case SNDRV_PCM_TRIGGER_START: |
210 | case SNDRV_PCM_TRIGGER_RESUME: | 249 | case SNDRV_PCM_TRIGGER_RESUME: |
211 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | 250 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
251 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
252 | val = LPAIF_I2SCTL_SPKEN_ENABLE; | ||
253 | mask = LPAIF_I2SCTL_SPKEN_MASK; | ||
254 | } else { | ||
255 | val = LPAIF_I2SCTL_MICEN_ENABLE; | ||
256 | mask = LPAIF_I2SCTL_MICEN_MASK; | ||
257 | } | ||
258 | |||
212 | ret = regmap_update_bits(drvdata->lpaif_map, | 259 | ret = regmap_update_bits(drvdata->lpaif_map, |
213 | LPAIF_I2SCTL_REG(drvdata->variant, | 260 | LPAIF_I2SCTL_REG(drvdata->variant, |
214 | dai->driver->id), | 261 | dai->driver->id), |
215 | LPAIF_I2SCTL_SPKEN_MASK, | 262 | mask, val); |
216 | LPAIF_I2SCTL_SPKEN_ENABLE); | ||
217 | if (ret) | 263 | if (ret) |
218 | dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", | 264 | dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", |
219 | __func__, ret); | 265 | __func__, ret); |
@@ -221,11 +267,18 @@ static int lpass_cpu_daiops_trigger(struct snd_pcm_substream *substream, | |||
221 | case SNDRV_PCM_TRIGGER_STOP: | 267 | case SNDRV_PCM_TRIGGER_STOP: |
222 | case SNDRV_PCM_TRIGGER_SUSPEND: | 268 | case SNDRV_PCM_TRIGGER_SUSPEND: |
223 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | 269 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
270 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { | ||
271 | val = LPAIF_I2SCTL_SPKEN_DISABLE; | ||
272 | mask = LPAIF_I2SCTL_SPKEN_MASK; | ||
273 | } else { | ||
274 | val = LPAIF_I2SCTL_MICEN_DISABLE; | ||
275 | mask = LPAIF_I2SCTL_MICEN_MASK; | ||
276 | } | ||
277 | |||
224 | ret = regmap_update_bits(drvdata->lpaif_map, | 278 | ret = regmap_update_bits(drvdata->lpaif_map, |
225 | LPAIF_I2SCTL_REG(drvdata->variant, | 279 | LPAIF_I2SCTL_REG(drvdata->variant, |
226 | dai->driver->id), | 280 | dai->driver->id), |
227 | LPAIF_I2SCTL_SPKEN_MASK, | 281 | mask, val); |
228 | LPAIF_I2SCTL_SPKEN_DISABLE); | ||
229 | if (ret) | 282 | if (ret) |
230 | dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", | 283 | dev_err(dai->dev, "%s() error writing to i2sctl reg: %d\n", |
231 | __func__, ret); | 284 | __func__, ret); |
@@ -294,6 +347,17 @@ static bool lpass_cpu_regmap_writeable(struct device *dev, unsigned int reg) | |||
294 | return true; | 347 | return true; |
295 | } | 348 | } |
296 | 349 | ||
350 | for (i = 0; i < v->wrdma_channels; ++i) { | ||
351 | if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) | ||
352 | return true; | ||
353 | if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) | ||
354 | return true; | ||
355 | if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) | ||
356 | return true; | ||
357 | if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) | ||
358 | return true; | ||
359 | } | ||
360 | |||
297 | return false; | 361 | return false; |
298 | } | 362 | } |
299 | 363 | ||
@@ -327,6 +391,19 @@ static bool lpass_cpu_regmap_readable(struct device *dev, unsigned int reg) | |||
327 | return true; | 391 | return true; |
328 | } | 392 | } |
329 | 393 | ||
394 | for (i = 0; i < v->wrdma_channels; ++i) { | ||
395 | if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) | ||
396 | return true; | ||
397 | if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) | ||
398 | return true; | ||
399 | if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) | ||
400 | return true; | ||
401 | if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) | ||
402 | return true; | ||
403 | if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) | ||
404 | return true; | ||
405 | } | ||
406 | |||
330 | return false; | 407 | return false; |
331 | } | 408 | } |
332 | 409 | ||
@@ -344,6 +421,10 @@ static bool lpass_cpu_regmap_volatile(struct device *dev, unsigned int reg) | |||
344 | if (reg == LPAIF_RDMACURR_REG(v, i)) | 421 | if (reg == LPAIF_RDMACURR_REG(v, i)) |
345 | return true; | 422 | return true; |
346 | 423 | ||
424 | for (i = 0; i < v->wrdma_channels; ++i) | ||
425 | if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) | ||
426 | return true; | ||
427 | |||
347 | return false; | 428 | return false; |
348 | } | 429 | } |
349 | 430 | ||
@@ -398,8 +479,9 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) | |||
398 | return PTR_ERR((void const __force *)drvdata->lpaif); | 479 | return PTR_ERR((void const __force *)drvdata->lpaif); |
399 | } | 480 | } |
400 | 481 | ||
401 | lpass_cpu_regmap_config.max_register = LPAIF_RDMAPER_REG(variant, | 482 | lpass_cpu_regmap_config.max_register = LPAIF_WRDMAPER_REG(variant, |
402 | variant->rdma_channels); | 483 | variant->wrdma_channels + |
484 | variant->wrdma_channel_start); | ||
403 | 485 | ||
404 | drvdata->lpaif_map = devm_regmap_init_mmio(&pdev->dev, drvdata->lpaif, | 486 | drvdata->lpaif_map = devm_regmap_init_mmio(&pdev->dev, drvdata->lpaif, |
405 | &lpass_cpu_regmap_config); | 487 | &lpass_cpu_regmap_config); |
diff --git a/sound/soc/qcom/lpass-ipq806x.c b/sound/soc/qcom/lpass-ipq806x.c index 7a4167952711..608c1a92af8a 100644 --- a/sound/soc/qcom/lpass-ipq806x.c +++ b/sound/soc/qcom/lpass-ipq806x.c | |||
@@ -63,9 +63,12 @@ static struct snd_soc_dai_driver ipq806x_lpass_cpu_dai_driver = { | |||
63 | .ops = &asoc_qcom_lpass_cpu_dai_ops, | 63 | .ops = &asoc_qcom_lpass_cpu_dai_ops, |
64 | }; | 64 | }; |
65 | 65 | ||
66 | static int ipq806x_lpass_alloc_dma_channel(struct lpass_data *drvdata) | 66 | static int ipq806x_lpass_alloc_dma_channel(struct lpass_data *drvdata, int dir) |
67 | { | 67 | { |
68 | return IPQ806X_LPAIF_RDMA_CHAN_MI2S; | 68 | if (dir == SNDRV_PCM_STREAM_PLAYBACK) |
69 | return IPQ806X_LPAIF_RDMA_CHAN_MI2S; | ||
70 | else /* Capture currently not implemented */ | ||
71 | return -EINVAL; | ||
69 | } | 72 | } |
70 | 73 | ||
71 | static int ipq806x_lpass_free_dma_channel(struct lpass_data *drvdata, int chan) | 74 | static int ipq806x_lpass_free_dma_channel(struct lpass_data *drvdata, int chan) |
@@ -83,6 +86,10 @@ static struct lpass_variant ipq806x_data = { | |||
83 | .rdma_reg_base = 0x6000, | 86 | .rdma_reg_base = 0x6000, |
84 | .rdma_reg_stride = 0x1000, | 87 | .rdma_reg_stride = 0x1000, |
85 | .rdma_channels = 4, | 88 | .rdma_channels = 4, |
89 | .wrdma_reg_base = 0xB000, | ||
90 | .wrdma_reg_stride = 0x1000, | ||
91 | .wrdma_channel_start = 5, | ||
92 | .wrdma_channels = 4, | ||
86 | .dai_driver = &ipq806x_lpass_cpu_dai_driver, | 93 | .dai_driver = &ipq806x_lpass_cpu_dai_driver, |
87 | .num_dai = 1, | 94 | .num_dai = 1, |
88 | .alloc_dma_channel = ipq806x_lpass_alloc_dma_channel, | 95 | .alloc_dma_channel = ipq806x_lpass_alloc_dma_channel, |
diff --git a/sound/soc/qcom/lpass-lpaif-reg.h b/sound/soc/qcom/lpass-lpaif-reg.h index 95e22f131052..2240bc68e6ec 100644 --- a/sound/soc/qcom/lpass-lpaif-reg.h +++ b/sound/soc/qcom/lpass-lpaif-reg.h | |||
@@ -47,6 +47,28 @@ | |||
47 | #define LPAIF_I2SCTL_SPKMONO_STEREO (0 << LPAIF_I2SCTL_SPKMONO_SHIFT) | 47 | #define LPAIF_I2SCTL_SPKMONO_STEREO (0 << LPAIF_I2SCTL_SPKMONO_SHIFT) |
48 | #define LPAIF_I2SCTL_SPKMONO_MONO (1 << LPAIF_I2SCTL_SPKMONO_SHIFT) | 48 | #define LPAIF_I2SCTL_SPKMONO_MONO (1 << LPAIF_I2SCTL_SPKMONO_SHIFT) |
49 | 49 | ||
50 | #define LPAIF_I2SCTL_MICEN_MASK GENMASK(8, 8) | ||
51 | #define LPAIF_I2SCTL_MICEN_SHIFT 8 | ||
52 | #define LPAIF_I2SCTL_MICEN_DISABLE (0 << LPAIF_I2SCTL_MICEN_SHIFT) | ||
53 | #define LPAIF_I2SCTL_MICEN_ENABLE (1 << LPAIF_I2SCTL_MICEN_SHIFT) | ||
54 | |||
55 | #define LPAIF_I2SCTL_MICMODE_MASK GENMASK(7, 4) | ||
56 | #define LPAIF_I2SCTL_MICMODE_SHIFT 4 | ||
57 | #define LPAIF_I2SCTL_MICMODE_NONE (0 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
58 | #define LPAIF_I2SCTL_MICMODE_SD0 (1 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
59 | #define LPAIF_I2SCTL_MICMODE_SD1 (2 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
60 | #define LPAIF_I2SCTL_MICMODE_SD2 (3 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
61 | #define LPAIF_I2SCTL_MICMODE_SD3 (4 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
62 | #define LPAIF_I2SCTL_MICMODE_QUAD01 (5 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
63 | #define LPAIF_I2SCTL_MICMODE_QUAD23 (6 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
64 | #define LPAIF_I2SCTL_MICMODE_6CH (7 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
65 | #define LPAIF_I2SCTL_MICMODE_8CH (8 << LPAIF_I2SCTL_MICMODE_SHIFT) | ||
66 | |||
67 | #define LPAIF_I2SCTL_MIMONO_MASK GENMASK(3, 3) | ||
68 | #define LPAIF_I2SCTL_MICMONO_SHIFT 3 | ||
69 | #define LPAIF_I2SCTL_MICMONO_STEREO (0 << LPAIF_I2SCTL_MICMONO_SHIFT) | ||
70 | #define LPAIF_I2SCTL_MICMONO_MONO (1 << LPAIF_I2SCTL_MICMONO_SHIFT) | ||
71 | |||
50 | #define LPAIF_I2SCTL_WSSRC_MASK 0x0004 | 72 | #define LPAIF_I2SCTL_WSSRC_MASK 0x0004 |
51 | #define LPAIF_I2SCTL_WSSRC_SHIFT 2 | 73 | #define LPAIF_I2SCTL_WSSRC_SHIFT 2 |
52 | #define LPAIF_I2SCTL_WSSRC_INTERNAL (0 << LPAIF_I2SCTL_WSSRC_SHIFT) | 74 | #define LPAIF_I2SCTL_WSSRC_INTERNAL (0 << LPAIF_I2SCTL_WSSRC_SHIFT) |
@@ -90,37 +112,65 @@ | |||
90 | #define LPAIF_RDMAPER_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x10, (chan)) | 112 | #define LPAIF_RDMAPER_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x10, (chan)) |
91 | #define LPAIF_RDMAPERCNT_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x14, (chan)) | 113 | #define LPAIF_RDMAPERCNT_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x14, (chan)) |
92 | 114 | ||
93 | #define LPAIF_RDMACTL_BURSTEN_MASK 0x800 | 115 | #define LPAIF_WRDMA_REG_ADDR(v, addr, chan) \ |
94 | #define LPAIF_RDMACTL_BURSTEN_SHIFT 11 | 116 | (v->wrdma_reg_base + (addr) + \ |
95 | #define LPAIF_RDMACTL_BURSTEN_SINGLE (0 << LPAIF_RDMACTL_BURSTEN_SHIFT) | 117 | v->wrdma_reg_stride * (chan - v->wrdma_channel_start)) |
96 | #define LPAIF_RDMACTL_BURSTEN_INCR4 (1 << LPAIF_RDMACTL_BURSTEN_SHIFT) | 118 | |
97 | 119 | #define LPAIF_WRDMACTL_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x00, (chan)) | |
98 | #define LPAIF_RDMACTL_WPSCNT_MASK 0x700 | 120 | #define LPAIF_WRDMABASE_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x04, (chan)) |
99 | #define LPAIF_RDMACTL_WPSCNT_SHIFT 8 | 121 | #define LPAIF_WRDMABUFF_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x08, (chan)) |
100 | #define LPAIF_RDMACTL_WPSCNT_ONE (0 << LPAIF_RDMACTL_WPSCNT_SHIFT) | 122 | #define LPAIF_WRDMACURR_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x0C, (chan)) |
101 | #define LPAIF_RDMACTL_WPSCNT_TWO (1 << LPAIF_RDMACTL_WPSCNT_SHIFT) | 123 | #define LPAIF_WRDMAPER_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x10, (chan)) |
102 | #define LPAIF_RDMACTL_WPSCNT_THREE (2 << LPAIF_RDMACTL_WPSCNT_SHIFT) | 124 | #define LPAIF_WRDMAPERCNT_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x14, (chan)) |
103 | #define LPAIF_RDMACTL_WPSCNT_FOUR (3 << LPAIF_RDMACTL_WPSCNT_SHIFT) | 125 | |
104 | #define LPAIF_RDMACTL_WPSCNT_SIX (5 << LPAIF_RDMACTL_WPSCNT_SHIFT) | 126 | #define __LPAIF_DMA_REG(v, chan, dir, reg) \ |
105 | #define LPAIF_RDMACTL_WPSCNT_EIGHT (7 << LPAIF_RDMACTL_WPSCNT_SHIFT) | 127 | (dir == SNDRV_PCM_STREAM_PLAYBACK) ? \ |
106 | 128 | LPAIF_RDMA##reg##_REG(v, chan) : \ | |
107 | #define LPAIF_RDMACTL_AUDINTF_MASK 0x0F0 | 129 | LPAIF_WRDMA##reg##_REG(v, chan) |
108 | #define LPAIF_RDMACTL_AUDINTF_SHIFT 4 | 130 | |
109 | 131 | #define LPAIF_DMACTL_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, CTL) | |
110 | #define LPAIF_RDMACTL_FIFOWM_MASK 0x00E | 132 | #define LPAIF_DMABASE_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, BASE) |
111 | #define LPAIF_RDMACTL_FIFOWM_SHIFT 1 | 133 | #define LPAIF_DMABUFF_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, BUFF) |
112 | #define LPAIF_RDMACTL_FIFOWM_1 (0 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 134 | #define LPAIF_DMACURR_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, CURR) |
113 | #define LPAIF_RDMACTL_FIFOWM_2 (1 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 135 | #define LPAIF_DMAPER_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, PER) |
114 | #define LPAIF_RDMACTL_FIFOWM_3 (2 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 136 | #define LPAIF_DMAPERCNT_REG(v, chan, dir) __LPAIF_DMA_REG(v, chan, dir, PERCNT) |
115 | #define LPAIF_RDMACTL_FIFOWM_4 (3 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 137 | |
116 | #define LPAIF_RDMACTL_FIFOWM_5 (4 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 138 | #define LPAIF_DMACTL_BURSTEN_MASK 0x800 |
117 | #define LPAIF_RDMACTL_FIFOWM_6 (5 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 139 | #define LPAIF_DMACTL_BURSTEN_SHIFT 11 |
118 | #define LPAIF_RDMACTL_FIFOWM_7 (6 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 140 | #define LPAIF_DMACTL_BURSTEN_SINGLE (0 << LPAIF_DMACTL_BURSTEN_SHIFT) |
119 | #define LPAIF_RDMACTL_FIFOWM_8 (7 << LPAIF_RDMACTL_FIFOWM_SHIFT) | 141 | #define LPAIF_DMACTL_BURSTEN_INCR4 (1 << LPAIF_DMACTL_BURSTEN_SHIFT) |
120 | 142 | ||
121 | #define LPAIF_RDMACTL_ENABLE_MASK 0x1 | 143 | #define LPAIF_DMACTL_WPSCNT_MASK 0x700 |
122 | #define LPAIF_RDMACTL_ENABLE_SHIFT 0 | 144 | #define LPAIF_DMACTL_WPSCNT_SHIFT 8 |
123 | #define LPAIF_RDMACTL_ENABLE_OFF (0 << LPAIF_RDMACTL_ENABLE_SHIFT) | 145 | #define LPAIF_DMACTL_WPSCNT_ONE (0 << LPAIF_DMACTL_WPSCNT_SHIFT) |
124 | #define LPAIF_RDMACTL_ENABLE_ON (1 << LPAIF_RDMACTL_ENABLE_SHIFT) | 146 | #define LPAIF_DMACTL_WPSCNT_TWO (1 << LPAIF_DMACTL_WPSCNT_SHIFT) |
125 | 147 | #define LPAIF_DMACTL_WPSCNT_THREE (2 << LPAIF_DMACTL_WPSCNT_SHIFT) | |
148 | #define LPAIF_DMACTL_WPSCNT_FOUR (3 << LPAIF_DMACTL_WPSCNT_SHIFT) | ||
149 | #define LPAIF_DMACTL_WPSCNT_SIX (5 << LPAIF_DMACTL_WPSCNT_SHIFT) | ||
150 | #define LPAIF_DMACTL_WPSCNT_EIGHT (7 << LPAIF_DMACTL_WPSCNT_SHIFT) | ||
151 | |||
152 | #define LPAIF_DMACTL_AUDINTF_MASK 0x0F0 | ||
153 | #define LPAIF_DMACTL_AUDINTF_SHIFT 4 | ||
154 | #define LPAIF_DMACTL_AUDINTF(id) (id << LPAIF_DMACTL_AUDINTF_SHIFT) | ||
155 | |||
156 | #define LPAIF_DMACTL_FIFOWM_MASK 0x00E | ||
157 | #define LPAIF_DMACTL_FIFOWM_SHIFT 1 | ||
158 | #define LPAIF_DMACTL_FIFOWM_1 (0 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
159 | #define LPAIF_DMACTL_FIFOWM_2 (1 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
160 | #define LPAIF_DMACTL_FIFOWM_3 (2 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
161 | #define LPAIF_DMACTL_FIFOWM_4 (3 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
162 | #define LPAIF_DMACTL_FIFOWM_5 (4 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
163 | #define LPAIF_DMACTL_FIFOWM_6 (5 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
164 | #define LPAIF_DMACTL_FIFOWM_7 (6 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
165 | #define LPAIF_DMACTL_FIFOWM_8 (7 << LPAIF_DMACTL_FIFOWM_SHIFT) | ||
166 | |||
167 | #define LPAIF_DMACTL_ENABLE_MASK 0x1 | ||
168 | #define LPAIF_DMACTL_ENABLE_SHIFT 0 | ||
169 | #define LPAIF_DMACTL_ENABLE_OFF (0 << LPAIF_DMACTL_ENABLE_SHIFT) | ||
170 | #define LPAIF_DMACTL_ENABLE_ON (1 << LPAIF_DMACTL_ENABLE_SHIFT) | ||
171 | |||
172 | #define LPAIF_DMACTL_DYNCLK_MASK BIT(12) | ||
173 | #define LPAIF_DMACTL_DYNCLK_SHIFT 12 | ||
174 | #define LPAIF_DMACTL_DYNCLK_OFF (0 << LPAIF_DMACTL_DYNCLK_SHIFT) | ||
175 | #define LPAIF_DMACTL_DYNCLK_ON (1 << LPAIF_DMACTL_DYNCLK_SHIFT) | ||
126 | #endif /* __LPASS_LPAIF_REG_H__ */ | 176 | #endif /* __LPASS_LPAIF_REG_H__ */ |
diff --git a/sound/soc/qcom/lpass-platform.c b/sound/soc/qcom/lpass-platform.c index 4aeb8e1a7160..6e8665430bd5 100644 --- a/sound/soc/qcom/lpass-platform.c +++ b/sound/soc/qcom/lpass-platform.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | struct lpass_pcm_data { | 27 | struct lpass_pcm_data { |
28 | int rdma_ch; | 28 | int rdma_ch; |
29 | int wrdma_ch; | ||
29 | int i2s_port; | 30 | int i2s_port; |
30 | }; | 31 | }; |
31 | 32 | ||
@@ -90,8 +91,14 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream, | |||
90 | snd_pcm_format_t format = params_format(params); | 91 | snd_pcm_format_t format = params_format(params); |
91 | unsigned int channels = params_channels(params); | 92 | unsigned int channels = params_channels(params); |
92 | unsigned int regval; | 93 | unsigned int regval; |
94 | int ch, dir = substream->stream; | ||
93 | int bitwidth; | 95 | int bitwidth; |
94 | int ret, rdma_port = pcm_data->i2s_port + v->rdmactl_audif_start; | 96 | int ret, dma_port = pcm_data->i2s_port + v->dmactl_audif_start; |
97 | |||
98 | if (dir == SNDRV_PCM_STREAM_PLAYBACK) | ||
99 | ch = pcm_data->rdma_ch; | ||
100 | else | ||
101 | ch = pcm_data->wrdma_ch; | ||
95 | 102 | ||
96 | bitwidth = snd_pcm_format_width(format); | 103 | bitwidth = snd_pcm_format_width(format); |
97 | if (bitwidth < 0) { | 104 | if (bitwidth < 0) { |
@@ -100,25 +107,25 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream, | |||
100 | return bitwidth; | 107 | return bitwidth; |
101 | } | 108 | } |
102 | 109 | ||
103 | regval = LPAIF_RDMACTL_BURSTEN_INCR4 | | 110 | regval = LPAIF_DMACTL_BURSTEN_INCR4 | |
104 | LPAIF_RDMACTL_AUDINTF(rdma_port) | | 111 | LPAIF_DMACTL_AUDINTF(dma_port) | |
105 | LPAIF_RDMACTL_FIFOWM_8; | 112 | LPAIF_DMACTL_FIFOWM_8; |
106 | 113 | ||
107 | switch (bitwidth) { | 114 | switch (bitwidth) { |
108 | case 16: | 115 | case 16: |
109 | switch (channels) { | 116 | switch (channels) { |
110 | case 1: | 117 | case 1: |
111 | case 2: | 118 | case 2: |
112 | regval |= LPAIF_RDMACTL_WPSCNT_ONE; | 119 | regval |= LPAIF_DMACTL_WPSCNT_ONE; |
113 | break; | 120 | break; |
114 | case 4: | 121 | case 4: |
115 | regval |= LPAIF_RDMACTL_WPSCNT_TWO; | 122 | regval |= LPAIF_DMACTL_WPSCNT_TWO; |
116 | break; | 123 | break; |
117 | case 6: | 124 | case 6: |
118 | regval |= LPAIF_RDMACTL_WPSCNT_THREE; | 125 | regval |= LPAIF_DMACTL_WPSCNT_THREE; |
119 | break; | 126 | break; |
120 | case 8: | 127 | case 8: |
121 | regval |= LPAIF_RDMACTL_WPSCNT_FOUR; | 128 | regval |= LPAIF_DMACTL_WPSCNT_FOUR; |
122 | break; | 129 | break; |
123 | default: | 130 | default: |
124 | dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n", | 131 | dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n", |
@@ -130,19 +137,19 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream, | |||
130 | case 32: | 137 | case 32: |
131 | switch (channels) { | 138 | switch (channels) { |
132 | case 1: | 139 | case 1: |
133 | regval |= LPAIF_RDMACTL_WPSCNT_ONE; | 140 | regval |= LPAIF_DMACTL_WPSCNT_ONE; |
134 | break; | 141 | break; |
135 | case 2: | 142 | case 2: |
136 | regval |= LPAIF_RDMACTL_WPSCNT_TWO; | 143 | regval |= LPAIF_DMACTL_WPSCNT_TWO; |
137 | break; | 144 | break; |
138 | case 4: | 145 | case 4: |
139 | regval |= LPAIF_RDMACTL_WPSCNT_FOUR; | 146 | regval |= LPAIF_DMACTL_WPSCNT_FOUR; |
140 | break; | 147 | break; |
141 | case 6: | 148 | case 6: |
142 | regval |= LPAIF_RDMACTL_WPSCNT_SIX; | 149 | regval |= LPAIF_DMACTL_WPSCNT_SIX; |
143 | break; | 150 | break; |
144 | case 8: | 151 | case 8: |
145 | regval |= LPAIF_RDMACTL_WPSCNT_EIGHT; | 152 | regval |= LPAIF_DMACTL_WPSCNT_EIGHT; |
146 | break; | 153 | break; |
147 | default: | 154 | default: |
148 | dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n", | 155 | dev_err(soc_runtime->dev, "%s() invalid PCM config given: bw=%d, ch=%u\n", |
@@ -157,7 +164,7 @@ static int lpass_platform_pcmops_hw_params(struct snd_pcm_substream *substream, | |||
157 | } | 164 | } |
158 | 165 | ||
159 | ret = regmap_write(drvdata->lpaif_map, | 166 | ret = regmap_write(drvdata->lpaif_map, |
160 | LPAIF_RDMACTL_REG(v, pcm_data->rdma_ch), regval); | 167 | LPAIF_DMACTL_REG(v, ch, dir), regval); |
161 | if (ret) { | 168 | if (ret) { |
162 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", | 169 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", |
163 | __func__, ret); | 170 | __func__, ret); |
@@ -174,10 +181,15 @@ static int lpass_platform_pcmops_hw_free(struct snd_pcm_substream *substream) | |||
174 | struct lpass_data *drvdata = | 181 | struct lpass_data *drvdata = |
175 | snd_soc_platform_get_drvdata(soc_runtime->platform); | 182 | snd_soc_platform_get_drvdata(soc_runtime->platform); |
176 | struct lpass_variant *v = drvdata->variant; | 183 | struct lpass_variant *v = drvdata->variant; |
184 | unsigned int reg; | ||
177 | int ret; | 185 | int ret; |
178 | 186 | ||
179 | ret = regmap_write(drvdata->lpaif_map, | 187 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
180 | LPAIF_RDMACTL_REG(v, pcm_data->rdma_ch), 0); | 188 | reg = LPAIF_RDMACTL_REG(v, pcm_data->rdma_ch); |
189 | else | ||
190 | reg = LPAIF_WRDMACTL_REG(v, pcm_data->wrdma_ch); | ||
191 | |||
192 | ret = regmap_write(drvdata->lpaif_map, reg, 0); | ||
181 | if (ret) | 193 | if (ret) |
182 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", | 194 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", |
183 | __func__, ret); | 195 | __func__, ret); |
@@ -193,10 +205,15 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) | |||
193 | struct lpass_data *drvdata = | 205 | struct lpass_data *drvdata = |
194 | snd_soc_platform_get_drvdata(soc_runtime->platform); | 206 | snd_soc_platform_get_drvdata(soc_runtime->platform); |
195 | struct lpass_variant *v = drvdata->variant; | 207 | struct lpass_variant *v = drvdata->variant; |
196 | int ret, ch = pcm_data->rdma_ch; | 208 | int ret, ch, dir = substream->stream; |
209 | |||
210 | if (dir == SNDRV_PCM_STREAM_PLAYBACK) | ||
211 | ch = pcm_data->rdma_ch; | ||
212 | else | ||
213 | ch = pcm_data->wrdma_ch; | ||
197 | 214 | ||
198 | ret = regmap_write(drvdata->lpaif_map, | 215 | ret = regmap_write(drvdata->lpaif_map, |
199 | LPAIF_RDMABASE_REG(v, ch), | 216 | LPAIF_DMABASE_REG(v, ch, dir), |
200 | runtime->dma_addr); | 217 | runtime->dma_addr); |
201 | if (ret) { | 218 | if (ret) { |
202 | dev_err(soc_runtime->dev, "%s() error writing to rdmabase reg: %d\n", | 219 | dev_err(soc_runtime->dev, "%s() error writing to rdmabase reg: %d\n", |
@@ -205,7 +222,7 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) | |||
205 | } | 222 | } |
206 | 223 | ||
207 | ret = regmap_write(drvdata->lpaif_map, | 224 | ret = regmap_write(drvdata->lpaif_map, |
208 | LPAIF_RDMABUFF_REG(v, ch), | 225 | LPAIF_DMABUFF_REG(v, ch, dir), |
209 | (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1); | 226 | (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1); |
210 | if (ret) { | 227 | if (ret) { |
211 | dev_err(soc_runtime->dev, "%s() error writing to rdmabuff reg: %d\n", | 228 | dev_err(soc_runtime->dev, "%s() error writing to rdmabuff reg: %d\n", |
@@ -214,7 +231,7 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) | |||
214 | } | 231 | } |
215 | 232 | ||
216 | ret = regmap_write(drvdata->lpaif_map, | 233 | ret = regmap_write(drvdata->lpaif_map, |
217 | LPAIF_RDMAPER_REG(v, ch), | 234 | LPAIF_DMAPER_REG(v, ch, dir), |
218 | (snd_pcm_lib_period_bytes(substream) >> 2) - 1); | 235 | (snd_pcm_lib_period_bytes(substream) >> 2) - 1); |
219 | if (ret) { | 236 | if (ret) { |
220 | dev_err(soc_runtime->dev, "%s() error writing to rdmaper reg: %d\n", | 237 | dev_err(soc_runtime->dev, "%s() error writing to rdmaper reg: %d\n", |
@@ -223,8 +240,8 @@ static int lpass_platform_pcmops_prepare(struct snd_pcm_substream *substream) | |||
223 | } | 240 | } |
224 | 241 | ||
225 | ret = regmap_update_bits(drvdata->lpaif_map, | 242 | ret = regmap_update_bits(drvdata->lpaif_map, |
226 | LPAIF_RDMACTL_REG(v, ch), | 243 | LPAIF_DMACTL_REG(v, ch, dir), |
227 | LPAIF_RDMACTL_ENABLE_MASK, LPAIF_RDMACTL_ENABLE_ON); | 244 | LPAIF_DMACTL_ENABLE_MASK, LPAIF_DMACTL_ENABLE_ON); |
228 | if (ret) { | 245 | if (ret) { |
229 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", | 246 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", |
230 | __func__, ret); | 247 | __func__, ret); |
@@ -242,7 +259,12 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, | |||
242 | struct lpass_data *drvdata = | 259 | struct lpass_data *drvdata = |
243 | snd_soc_platform_get_drvdata(soc_runtime->platform); | 260 | snd_soc_platform_get_drvdata(soc_runtime->platform); |
244 | struct lpass_variant *v = drvdata->variant; | 261 | struct lpass_variant *v = drvdata->variant; |
245 | int ret, ch = pcm_data->rdma_ch; | 262 | int ret, ch, dir = substream->stream; |
263 | |||
264 | if (dir == SNDRV_PCM_STREAM_PLAYBACK) | ||
265 | ch = pcm_data->rdma_ch; | ||
266 | else | ||
267 | ch = pcm_data->wrdma_ch; | ||
246 | 268 | ||
247 | switch (cmd) { | 269 | switch (cmd) { |
248 | case SNDRV_PCM_TRIGGER_START: | 270 | case SNDRV_PCM_TRIGGER_START: |
@@ -269,9 +291,9 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, | |||
269 | } | 291 | } |
270 | 292 | ||
271 | ret = regmap_update_bits(drvdata->lpaif_map, | 293 | ret = regmap_update_bits(drvdata->lpaif_map, |
272 | LPAIF_RDMACTL_REG(v, ch), | 294 | LPAIF_DMACTL_REG(v, ch, dir), |
273 | LPAIF_RDMACTL_ENABLE_MASK, | 295 | LPAIF_DMACTL_ENABLE_MASK, |
274 | LPAIF_RDMACTL_ENABLE_ON); | 296 | LPAIF_DMACTL_ENABLE_ON); |
275 | if (ret) { | 297 | if (ret) { |
276 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", | 298 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", |
277 | __func__, ret); | 299 | __func__, ret); |
@@ -282,9 +304,9 @@ static int lpass_platform_pcmops_trigger(struct snd_pcm_substream *substream, | |||
282 | case SNDRV_PCM_TRIGGER_SUSPEND: | 304 | case SNDRV_PCM_TRIGGER_SUSPEND: |
283 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | 305 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
284 | ret = regmap_update_bits(drvdata->lpaif_map, | 306 | ret = regmap_update_bits(drvdata->lpaif_map, |
285 | LPAIF_RDMACTL_REG(v, ch), | 307 | LPAIF_DMACTL_REG(v, ch, dir), |
286 | LPAIF_RDMACTL_ENABLE_MASK, | 308 | LPAIF_DMACTL_ENABLE_MASK, |
287 | LPAIF_RDMACTL_ENABLE_OFF); | 309 | LPAIF_DMACTL_ENABLE_OFF); |
288 | if (ret) { | 310 | if (ret) { |
289 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", | 311 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", |
290 | __func__, ret); | 312 | __func__, ret); |
@@ -314,10 +336,15 @@ static snd_pcm_uframes_t lpass_platform_pcmops_pointer( | |||
314 | snd_soc_platform_get_drvdata(soc_runtime->platform); | 336 | snd_soc_platform_get_drvdata(soc_runtime->platform); |
315 | struct lpass_variant *v = drvdata->variant; | 337 | struct lpass_variant *v = drvdata->variant; |
316 | unsigned int base_addr, curr_addr; | 338 | unsigned int base_addr, curr_addr; |
317 | int ret, ch = pcm_data->rdma_ch; | 339 | int ret, ch, dir = substream->stream; |
340 | |||
341 | if (dir == SNDRV_PCM_STREAM_PLAYBACK) | ||
342 | ch = pcm_data->rdma_ch; | ||
343 | else | ||
344 | ch = pcm_data->wrdma_ch; | ||
318 | 345 | ||
319 | ret = regmap_read(drvdata->lpaif_map, | 346 | ret = regmap_read(drvdata->lpaif_map, |
320 | LPAIF_RDMABASE_REG(v, ch), &base_addr); | 347 | LPAIF_DMABASE_REG(v, ch, dir), &base_addr); |
321 | if (ret) { | 348 | if (ret) { |
322 | dev_err(soc_runtime->dev, "%s() error reading from rdmabase reg: %d\n", | 349 | dev_err(soc_runtime->dev, "%s() error reading from rdmabase reg: %d\n", |
323 | __func__, ret); | 350 | __func__, ret); |
@@ -325,7 +352,7 @@ static snd_pcm_uframes_t lpass_platform_pcmops_pointer( | |||
325 | } | 352 | } |
326 | 353 | ||
327 | ret = regmap_read(drvdata->lpaif_map, | 354 | ret = regmap_read(drvdata->lpaif_map, |
328 | LPAIF_RDMACURR_REG(v, ch), &curr_addr); | 355 | LPAIF_DMACURR_REG(v, ch, dir), &curr_addr); |
329 | if (ret) { | 356 | if (ret) { |
330 | dev_err(soc_runtime->dev, "%s() error reading from rdmacurr reg: %d\n", | 357 | dev_err(soc_runtime->dev, "%s() error reading from rdmacurr reg: %d\n", |
331 | __func__, ret); | 358 | __func__, ret); |
@@ -439,101 +466,124 @@ static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data) | |||
439 | return IRQ_HANDLED; | 466 | return IRQ_HANDLED; |
440 | } | 467 | } |
441 | 468 | ||
442 | static int lpass_platform_alloc_buffer(struct snd_pcm_substream *substream, | ||
443 | struct snd_soc_pcm_runtime *rt) | ||
444 | { | ||
445 | struct snd_dma_buffer *buf = &substream->dma_buffer; | ||
446 | size_t size = lpass_platform_pcm_hardware.buffer_bytes_max; | ||
447 | |||
448 | buf->dev.type = SNDRV_DMA_TYPE_DEV; | ||
449 | buf->dev.dev = rt->platform->dev; | ||
450 | buf->private_data = NULL; | ||
451 | buf->area = dma_alloc_coherent(rt->platform->dev, size, &buf->addr, | ||
452 | GFP_KERNEL); | ||
453 | if (!buf->area) { | ||
454 | dev_err(rt->platform->dev, "%s: Could not allocate DMA buffer\n", | ||
455 | __func__); | ||
456 | return -ENOMEM; | ||
457 | } | ||
458 | buf->bytes = size; | ||
459 | |||
460 | return 0; | ||
461 | } | ||
462 | |||
463 | static void lpass_platform_free_buffer(struct snd_pcm_substream *substream, | ||
464 | struct snd_soc_pcm_runtime *rt) | ||
465 | { | ||
466 | struct snd_dma_buffer *buf = &substream->dma_buffer; | ||
467 | |||
468 | if (buf->area) { | ||
469 | dma_free_coherent(rt->dev, buf->bytes, buf->area, | ||
470 | buf->addr); | ||
471 | } | ||
472 | buf->area = NULL; | ||
473 | } | ||
474 | |||
475 | static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime) | 469 | static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime) |
476 | { | 470 | { |
477 | struct snd_pcm *pcm = soc_runtime->pcm; | 471 | struct snd_pcm *pcm = soc_runtime->pcm; |
478 | struct snd_pcm_substream *substream = | 472 | struct snd_pcm_substream *psubstream, *csubstream; |
479 | pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; | ||
480 | struct snd_soc_dai *cpu_dai = soc_runtime->cpu_dai; | 473 | struct snd_soc_dai *cpu_dai = soc_runtime->cpu_dai; |
481 | struct lpass_data *drvdata = | 474 | struct lpass_data *drvdata = |
482 | snd_soc_platform_get_drvdata(soc_runtime->platform); | 475 | snd_soc_platform_get_drvdata(soc_runtime->platform); |
483 | struct lpass_variant *v = drvdata->variant; | 476 | struct lpass_variant *v = drvdata->variant; |
484 | int ret; | 477 | int ret; |
485 | struct lpass_pcm_data *data; | 478 | struct lpass_pcm_data *data; |
479 | size_t size = lpass_platform_pcm_hardware.buffer_bytes_max; | ||
486 | 480 | ||
487 | data = devm_kzalloc(soc_runtime->dev, sizeof(*data), GFP_KERNEL); | 481 | data = devm_kzalloc(soc_runtime->dev, sizeof(*data), GFP_KERNEL); |
488 | if (!data) | 482 | if (!data) |
489 | return -ENOMEM; | 483 | return -ENOMEM; |
490 | 484 | ||
491 | if (v->alloc_dma_channel) | 485 | data->i2s_port = cpu_dai->driver->id; |
492 | data->rdma_ch = v->alloc_dma_channel(drvdata); | 486 | snd_soc_pcm_set_drvdata(soc_runtime, data); |
493 | 487 | ||
494 | if (IS_ERR_VALUE(data->rdma_ch)) | 488 | psubstream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; |
495 | return data->rdma_ch; | 489 | if (psubstream) { |
490 | if (v->alloc_dma_channel) | ||
491 | data->rdma_ch = v->alloc_dma_channel(drvdata, | ||
492 | SNDRV_PCM_STREAM_PLAYBACK); | ||
496 | 493 | ||
497 | drvdata->substream[data->rdma_ch] = substream; | 494 | if (IS_ERR_VALUE(data->rdma_ch)) |
498 | data->i2s_port = cpu_dai->driver->id; | 495 | return data->rdma_ch; |
499 | 496 | ||
500 | snd_soc_pcm_set_drvdata(soc_runtime, data); | 497 | drvdata->substream[data->rdma_ch] = psubstream; |
501 | 498 | ||
502 | ret = lpass_platform_alloc_buffer(substream, soc_runtime); | 499 | ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, |
503 | if (ret) | 500 | soc_runtime->platform->dev, |
504 | return ret; | 501 | size, &psubstream->dma_buffer); |
502 | if (ret) | ||
503 | goto playback_alloc_err; | ||
505 | 504 | ||
506 | ret = regmap_write(drvdata->lpaif_map, | 505 | ret = regmap_write(drvdata->lpaif_map, |
507 | LPAIF_RDMACTL_REG(v, data->rdma_ch), 0); | 506 | LPAIF_RDMACTL_REG(v, data->rdma_ch), 0); |
508 | if (ret) { | 507 | if (ret) { |
509 | dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n", | 508 | dev_err(soc_runtime->dev, |
509 | "%s() error writing to rdmactl reg: %d\n", | ||
510 | __func__, ret); | ||
511 | goto capture_alloc_err; | ||
512 | } | ||
513 | } | ||
514 | |||
515 | csubstream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream; | ||
516 | if (csubstream) { | ||
517 | if (v->alloc_dma_channel) | ||
518 | data->wrdma_ch = v->alloc_dma_channel(drvdata, | ||
519 | SNDRV_PCM_STREAM_CAPTURE); | ||
520 | |||
521 | if (IS_ERR_VALUE(data->wrdma_ch)) | ||
522 | goto capture_alloc_err; | ||
523 | |||
524 | drvdata->substream[data->wrdma_ch] = csubstream; | ||
525 | |||
526 | ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, | ||
527 | soc_runtime->platform->dev, | ||
528 | size, &csubstream->dma_buffer); | ||
529 | if (ret) | ||
530 | goto capture_alloc_err; | ||
531 | |||
532 | ret = regmap_write(drvdata->lpaif_map, | ||
533 | LPAIF_WRDMACTL_REG(v, data->wrdma_ch), 0); | ||
534 | if (ret) { | ||
535 | dev_err(soc_runtime->dev, | ||
536 | "%s() error writing to wrdmactl reg: %d\n", | ||
510 | __func__, ret); | 537 | __func__, ret); |
511 | goto err_buf; | 538 | goto capture_reg_err; |
539 | } | ||
512 | } | 540 | } |
513 | 541 | ||
514 | return 0; | 542 | return 0; |
515 | 543 | ||
516 | err_buf: | 544 | capture_reg_err: |
517 | lpass_platform_free_buffer(substream, soc_runtime); | 545 | if (csubstream) |
546 | snd_dma_free_pages(&csubstream->dma_buffer); | ||
547 | |||
548 | capture_alloc_err: | ||
549 | if (psubstream) | ||
550 | snd_dma_free_pages(&psubstream->dma_buffer); | ||
551 | |||
552 | playback_alloc_err: | ||
553 | dev_err(soc_runtime->dev, "Cannot allocate buffer(s)\n"); | ||
554 | |||
518 | return ret; | 555 | return ret; |
519 | } | 556 | } |
520 | 557 | ||
521 | static void lpass_platform_pcm_free(struct snd_pcm *pcm) | 558 | static void lpass_platform_pcm_free(struct snd_pcm *pcm) |
522 | { | 559 | { |
523 | struct snd_pcm_substream *substream = | 560 | struct snd_soc_pcm_runtime *rt; |
524 | pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; | 561 | struct lpass_data *drvdata; |
525 | struct snd_soc_pcm_runtime *soc_runtime = substream->private_data; | 562 | struct lpass_pcm_data *data; |
526 | struct lpass_data *drvdata = | 563 | struct lpass_variant *v; |
527 | snd_soc_platform_get_drvdata(soc_runtime->platform); | 564 | struct snd_pcm_substream *substream; |
528 | struct lpass_pcm_data *data = snd_soc_pcm_get_drvdata(soc_runtime); | 565 | int ch, i; |
529 | struct lpass_variant *v = drvdata->variant; | 566 | |
530 | 567 | for (i = 0; i < ARRAY_SIZE(pcm->streams); i++) { | |
531 | drvdata->substream[data->rdma_ch] = NULL; | 568 | substream = pcm->streams[i].substream; |
532 | 569 | if (substream) { | |
533 | if (v->free_dma_channel) | 570 | rt = substream->private_data; |
534 | v->free_dma_channel(drvdata, data->rdma_ch); | 571 | data = snd_soc_pcm_get_drvdata(rt); |
535 | 572 | drvdata = snd_soc_platform_get_drvdata(rt->platform); | |
536 | lpass_platform_free_buffer(substream, soc_runtime); | 573 | |
574 | ch = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | ||
575 | ? data->rdma_ch | ||
576 | : data->wrdma_ch; | ||
577 | v = drvdata->variant; | ||
578 | drvdata->substream[ch] = NULL; | ||
579 | if (v->free_dma_channel) | ||
580 | v->free_dma_channel(drvdata, ch); | ||
581 | |||
582 | snd_dma_free_pages(&substream->dma_buffer); | ||
583 | substream->dma_buffer.area = NULL; | ||
584 | substream->dma_buffer.addr = 0; | ||
585 | } | ||
586 | } | ||
537 | } | 587 | } |
538 | 588 | ||
539 | static struct snd_soc_platform_driver lpass_platform_driver = { | 589 | static struct snd_soc_platform_driver lpass_platform_driver = { |
diff --git a/sound/soc/qcom/lpass.h b/sound/soc/qcom/lpass.h index 0b63e2e5bcc9..30714ad1e138 100644 --- a/sound/soc/qcom/lpass.h +++ b/sound/soc/qcom/lpass.h | |||
@@ -50,7 +50,7 @@ struct lpass_data { | |||
50 | struct lpass_variant *variant; | 50 | struct lpass_variant *variant; |
51 | 51 | ||
52 | /* bit map to keep track of static channel allocations */ | 52 | /* bit map to keep track of static channel allocations */ |
53 | unsigned long rdma_ch_bit_map; | 53 | unsigned long dma_ch_bit_map; |
54 | 54 | ||
55 | /* used it for handling interrupt per dma channel */ | 55 | /* used it for handling interrupt per dma channel */ |
56 | struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS]; | 56 | struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS]; |
@@ -71,16 +71,20 @@ struct lpass_variant { | |||
71 | u32 rdma_reg_base; | 71 | u32 rdma_reg_base; |
72 | u32 rdma_reg_stride; | 72 | u32 rdma_reg_stride; |
73 | u32 rdma_channels; | 73 | u32 rdma_channels; |
74 | u32 wrdma_reg_base; | ||
75 | u32 wrdma_reg_stride; | ||
76 | u32 wrdma_channels; | ||
74 | 77 | ||
75 | /** | 78 | /** |
76 | * on SOCs like APQ8016 the channel control bits start | 79 | * on SOCs like APQ8016 the channel control bits start |
77 | * at different offset to ipq806x | 80 | * at different offset to ipq806x |
78 | **/ | 81 | **/ |
79 | u32 rdmactl_audif_start; | 82 | u32 dmactl_audif_start; |
83 | u32 wrdma_channel_start; | ||
80 | /* SOC specific intialization like clocks */ | 84 | /* SOC specific intialization like clocks */ |
81 | int (*init)(struct platform_device *pdev); | 85 | int (*init)(struct platform_device *pdev); |
82 | int (*exit)(struct platform_device *pdev); | 86 | int (*exit)(struct platform_device *pdev); |
83 | int (*alloc_dma_channel)(struct lpass_data *data); | 87 | int (*alloc_dma_channel)(struct lpass_data *data, int direction); |
84 | int (*free_dma_channel)(struct lpass_data *data, int ch); | 88 | int (*free_dma_channel)(struct lpass_data *data, int ch); |
85 | 89 | ||
86 | /* SOC specific dais */ | 90 | /* SOC specific dais */ |
diff --git a/sound/soc/rockchip/rockchip_i2s.c b/sound/soc/rockchip/rockchip_i2s.c index 6561c4cc2edd..2f8e20416bd3 100644 --- a/sound/soc/rockchip/rockchip_i2s.c +++ b/sound/soc/rockchip/rockchip_i2s.c | |||
@@ -440,11 +440,21 @@ static bool rockchip_i2s_precious_reg(struct device *dev, unsigned int reg) | |||
440 | } | 440 | } |
441 | } | 441 | } |
442 | 442 | ||
443 | static const struct reg_default rockchip_i2s_reg_defaults[] = { | ||
444 | {0x00, 0x0000000f}, | ||
445 | {0x04, 0x0000000f}, | ||
446 | {0x08, 0x00071f1f}, | ||
447 | {0x10, 0x001f0000}, | ||
448 | {0x14, 0x01f00000}, | ||
449 | }; | ||
450 | |||
443 | static const struct regmap_config rockchip_i2s_regmap_config = { | 451 | static const struct regmap_config rockchip_i2s_regmap_config = { |
444 | .reg_bits = 32, | 452 | .reg_bits = 32, |
445 | .reg_stride = 4, | 453 | .reg_stride = 4, |
446 | .val_bits = 32, | 454 | .val_bits = 32, |
447 | .max_register = I2S_RXDR, | 455 | .max_register = I2S_RXDR, |
456 | .reg_defaults = rockchip_i2s_reg_defaults, | ||
457 | .num_reg_defaults = ARRAY_SIZE(rockchip_i2s_reg_defaults), | ||
448 | .writeable_reg = rockchip_i2s_wr_reg, | 458 | .writeable_reg = rockchip_i2s_wr_reg, |
449 | .readable_reg = rockchip_i2s_rd_reg, | 459 | .readable_reg = rockchip_i2s_rd_reg, |
450 | .volatile_reg = rockchip_i2s_volatile_reg, | 460 | .volatile_reg = rockchip_i2s_volatile_reg, |
@@ -575,6 +585,9 @@ static int rockchip_i2s_remove(struct platform_device *pdev) | |||
575 | 585 | ||
576 | static const struct of_device_id rockchip_i2s_match[] = { | 586 | static const struct of_device_id rockchip_i2s_match[] = { |
577 | { .compatible = "rockchip,rk3066-i2s", }, | 587 | { .compatible = "rockchip,rk3066-i2s", }, |
588 | { .compatible = "rockchip,rk3188-i2s", }, | ||
589 | { .compatible = "rockchip,rk3288-i2s", }, | ||
590 | { .compatible = "rockchip,rk3399-i2s", }, | ||
578 | {}, | 591 | {}, |
579 | }; | 592 | }; |
580 | 593 | ||
diff --git a/sound/soc/rockchip/rockchip_spdif.c b/sound/soc/rockchip/rockchip_spdif.c index 5a806da89f42..100781e37848 100644 --- a/sound/soc/rockchip/rockchip_spdif.c +++ b/sound/soc/rockchip/rockchip_spdif.c | |||
@@ -28,6 +28,7 @@ enum rk_spdif_type { | |||
28 | RK_SPDIF_RK3066, | 28 | RK_SPDIF_RK3066, |
29 | RK_SPDIF_RK3188, | 29 | RK_SPDIF_RK3188, |
30 | RK_SPDIF_RK3288, | 30 | RK_SPDIF_RK3288, |
31 | RK_SPDIF_RK3366, | ||
31 | }; | 32 | }; |
32 | 33 | ||
33 | #define RK3288_GRF_SOC_CON2 0x24c | 34 | #define RK3288_GRF_SOC_CON2 0x24c |
@@ -45,16 +46,22 @@ struct rk_spdif_dev { | |||
45 | 46 | ||
46 | static const struct of_device_id rk_spdif_match[] = { | 47 | static const struct of_device_id rk_spdif_match[] = { |
47 | { .compatible = "rockchip,rk3066-spdif", | 48 | { .compatible = "rockchip,rk3066-spdif", |
48 | .data = (void *) RK_SPDIF_RK3066 }, | 49 | .data = (void *)RK_SPDIF_RK3066 }, |
49 | { .compatible = "rockchip,rk3188-spdif", | 50 | { .compatible = "rockchip,rk3188-spdif", |
50 | .data = (void *) RK_SPDIF_RK3188 }, | 51 | .data = (void *)RK_SPDIF_RK3188 }, |
51 | { .compatible = "rockchip,rk3288-spdif", | 52 | { .compatible = "rockchip,rk3288-spdif", |
52 | .data = (void *) RK_SPDIF_RK3288 }, | 53 | .data = (void *)RK_SPDIF_RK3288 }, |
54 | { .compatible = "rockchip,rk3366-spdif", | ||
55 | .data = (void *)RK_SPDIF_RK3366 }, | ||
56 | { .compatible = "rockchip,rk3368-spdif", | ||
57 | .data = (void *)RK_SPDIF_RK3366 }, | ||
58 | { .compatible = "rockchip,rk3399-spdif", | ||
59 | .data = (void *)RK_SPDIF_RK3366 }, | ||
53 | {}, | 60 | {}, |
54 | }; | 61 | }; |
55 | MODULE_DEVICE_TABLE(of, rk_spdif_match); | 62 | MODULE_DEVICE_TABLE(of, rk_spdif_match); |
56 | 63 | ||
57 | static int rk_spdif_runtime_suspend(struct device *dev) | 64 | static int __maybe_unused rk_spdif_runtime_suspend(struct device *dev) |
58 | { | 65 | { |
59 | struct rk_spdif_dev *spdif = dev_get_drvdata(dev); | 66 | struct rk_spdif_dev *spdif = dev_get_drvdata(dev); |
60 | 67 | ||
@@ -64,7 +71,7 @@ static int rk_spdif_runtime_suspend(struct device *dev) | |||
64 | return 0; | 71 | return 0; |
65 | } | 72 | } |
66 | 73 | ||
67 | static int rk_spdif_runtime_resume(struct device *dev) | 74 | static int __maybe_unused rk_spdif_runtime_resume(struct device *dev) |
68 | { | 75 | { |
69 | struct rk_spdif_dev *spdif = dev_get_drvdata(dev); | 76 | struct rk_spdif_dev *spdif = dev_get_drvdata(dev); |
70 | int ret; | 77 | int ret; |
diff --git a/sound/soc/samsung/s3c-i2s-v2.c b/sound/soc/samsung/s3c-i2s-v2.c index df65c5b494b1..b6ab3fc5789e 100644 --- a/sound/soc/samsung/s3c-i2s-v2.c +++ b/sound/soc/samsung/s3c-i2s-v2.c | |||
@@ -709,7 +709,7 @@ static int s3c2412_i2s_resume(struct snd_soc_dai *dai) | |||
709 | #endif | 709 | #endif |
710 | 710 | ||
711 | int s3c_i2sv2_register_component(struct device *dev, int id, | 711 | int s3c_i2sv2_register_component(struct device *dev, int id, |
712 | struct snd_soc_component_driver *cmp_drv, | 712 | const struct snd_soc_component_driver *cmp_drv, |
713 | struct snd_soc_dai_driver *dai_drv) | 713 | struct snd_soc_dai_driver *dai_drv) |
714 | { | 714 | { |
715 | struct snd_soc_dai_ops *ops = (struct snd_soc_dai_ops *)dai_drv->ops; | 715 | struct snd_soc_dai_ops *ops = (struct snd_soc_dai_ops *)dai_drv->ops; |
diff --git a/sound/soc/samsung/s3c-i2s-v2.h b/sound/soc/samsung/s3c-i2s-v2.h index 90abab364b49..d0684145ed1f 100644 --- a/sound/soc/samsung/s3c-i2s-v2.h +++ b/sound/soc/samsung/s3c-i2s-v2.h | |||
@@ -101,7 +101,7 @@ extern int s3c_i2sv2_probe(struct snd_soc_dai *dai, | |||
101 | * soc core. | 101 | * soc core. |
102 | */ | 102 | */ |
103 | extern int s3c_i2sv2_register_component(struct device *dev, int id, | 103 | extern int s3c_i2sv2_register_component(struct device *dev, int id, |
104 | struct snd_soc_component_driver *cmp_drv, | 104 | const struct snd_soc_component_driver *cmp_drv, |
105 | struct snd_soc_dai_driver *dai_drv); | 105 | struct snd_soc_dai_driver *dai_drv); |
106 | 106 | ||
107 | #endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */ | 107 | #endif /* __SND_SOC_S3C24XX_S3C_I2SV2_I2S_H */ |
diff --git a/sound/soc/sh/rcar/adg.c b/sound/soc/sh/rcar/adg.c index 6d3ef366d536..606399de684d 100644 --- a/sound/soc/sh/rcar/adg.c +++ b/sound/soc/sh/rcar/adg.c | |||
@@ -90,6 +90,108 @@ static u32 rsnd_adg_ssi_ws_timing_gen2(struct rsnd_dai_stream *io) | |||
90 | return (0x6 + ws) << 8; | 90 | return (0x6 + ws) << 8; |
91 | } | 91 | } |
92 | 92 | ||
93 | static void __rsnd_adg_get_timesel_ratio(struct rsnd_priv *priv, | ||
94 | struct rsnd_dai_stream *io, | ||
95 | unsigned int target_rate, | ||
96 | unsigned int *target_val, | ||
97 | unsigned int *target_en) | ||
98 | { | ||
99 | struct rsnd_adg *adg = rsnd_priv_to_adg(priv); | ||
100 | struct device *dev = rsnd_priv_to_dev(priv); | ||
101 | int idx, sel, div, step; | ||
102 | unsigned int val, en; | ||
103 | unsigned int min, diff; | ||
104 | unsigned int sel_rate[] = { | ||
105 | clk_get_rate(adg->clk[CLKA]), /* 0000: CLKA */ | ||
106 | clk_get_rate(adg->clk[CLKB]), /* 0001: CLKB */ | ||
107 | clk_get_rate(adg->clk[CLKC]), /* 0010: CLKC */ | ||
108 | adg->rbga_rate_for_441khz, /* 0011: RBGA */ | ||
109 | adg->rbgb_rate_for_48khz, /* 0100: RBGB */ | ||
110 | }; | ||
111 | |||
112 | min = ~0; | ||
113 | val = 0; | ||
114 | en = 0; | ||
115 | for (sel = 0; sel < ARRAY_SIZE(sel_rate); sel++) { | ||
116 | idx = 0; | ||
117 | step = 2; | ||
118 | |||
119 | if (!sel_rate[sel]) | ||
120 | continue; | ||
121 | |||
122 | for (div = 2; div <= 98304; div += step) { | ||
123 | diff = abs(target_rate - sel_rate[sel] / div); | ||
124 | if (min > diff) { | ||
125 | val = (sel << 8) | idx; | ||
126 | min = diff; | ||
127 | en = 1 << (sel + 1); /* fixme */ | ||
128 | } | ||
129 | |||
130 | /* | ||
131 | * step of 0_0000 / 0_0001 / 0_1101 | ||
132 | * are out of order | ||
133 | */ | ||
134 | if ((idx > 2) && (idx % 2)) | ||
135 | step *= 2; | ||
136 | if (idx == 0x1c) { | ||
137 | div += step; | ||
138 | step *= 2; | ||
139 | } | ||
140 | idx++; | ||
141 | } | ||
142 | } | ||
143 | |||
144 | if (min == ~0) { | ||
145 | dev_err(dev, "no Input clock\n"); | ||
146 | return; | ||
147 | } | ||
148 | |||
149 | *target_val = val; | ||
150 | if (target_en) | ||
151 | *target_en = en; | ||
152 | } | ||
153 | |||
154 | static void rsnd_adg_get_timesel_ratio(struct rsnd_priv *priv, | ||
155 | struct rsnd_dai_stream *io, | ||
156 | unsigned int in_rate, | ||
157 | unsigned int out_rate, | ||
158 | u32 *in, u32 *out, u32 *en) | ||
159 | { | ||
160 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | ||
161 | unsigned int target_rate; | ||
162 | u32 *target_val; | ||
163 | u32 _in; | ||
164 | u32 _out; | ||
165 | u32 _en; | ||
166 | |||
167 | /* default = SSI WS */ | ||
168 | _in = | ||
169 | _out = rsnd_adg_ssi_ws_timing_gen2(io); | ||
170 | |||
171 | target_rate = 0; | ||
172 | target_val = NULL; | ||
173 | _en = 0; | ||
174 | if (runtime->rate != in_rate) { | ||
175 | target_rate = out_rate; | ||
176 | target_val = &_out; | ||
177 | } else if (runtime->rate != out_rate) { | ||
178 | target_rate = in_rate; | ||
179 | target_val = &_in; | ||
180 | } | ||
181 | |||
182 | if (target_rate) | ||
183 | __rsnd_adg_get_timesel_ratio(priv, io, | ||
184 | target_rate, | ||
185 | target_val, &_en); | ||
186 | |||
187 | if (in) | ||
188 | *in = _in; | ||
189 | if (out) | ||
190 | *out = _out; | ||
191 | if (en) | ||
192 | *en = _en; | ||
193 | } | ||
194 | |||
93 | int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *cmd_mod, | 195 | int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *cmd_mod, |
94 | struct rsnd_dai_stream *io) | 196 | struct rsnd_dai_stream *io) |
95 | { | 197 | { |
@@ -100,7 +202,10 @@ int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *cmd_mod, | |||
100 | int shift = (id % 2) ? 16 : 0; | 202 | int shift = (id % 2) ? 16 : 0; |
101 | u32 mask, val; | 203 | u32 mask, val; |
102 | 204 | ||
103 | val = rsnd_adg_ssi_ws_timing_gen2(io); | 205 | rsnd_adg_get_timesel_ratio(priv, io, |
206 | rsnd_src_get_in_rate(priv, io), | ||
207 | rsnd_src_get_out_rate(priv, io), | ||
208 | NULL, &val, NULL); | ||
104 | 209 | ||
105 | val = val << shift; | 210 | val = val << shift; |
106 | mask = 0xffff << shift; | 211 | mask = 0xffff << shift; |
@@ -110,25 +215,24 @@ int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *cmd_mod, | |||
110 | return 0; | 215 | return 0; |
111 | } | 216 | } |
112 | 217 | ||
113 | static int rsnd_adg_set_src_timsel_gen2(struct rsnd_mod *src_mod, | 218 | int rsnd_adg_set_src_timesel_gen2(struct rsnd_mod *src_mod, |
114 | struct rsnd_dai_stream *io, | 219 | struct rsnd_dai_stream *io, |
115 | u32 timsel) | 220 | unsigned int in_rate, |
221 | unsigned int out_rate) | ||
116 | { | 222 | { |
117 | struct rsnd_priv *priv = rsnd_mod_to_priv(src_mod); | 223 | struct rsnd_priv *priv = rsnd_mod_to_priv(src_mod); |
118 | struct rsnd_adg *adg = rsnd_priv_to_adg(priv); | 224 | struct rsnd_adg *adg = rsnd_priv_to_adg(priv); |
119 | struct rsnd_mod *adg_mod = rsnd_mod_get(adg); | 225 | struct rsnd_mod *adg_mod = rsnd_mod_get(adg); |
120 | int is_play = rsnd_io_is_play(io); | 226 | u32 in, out; |
227 | u32 mask, en; | ||
121 | int id = rsnd_mod_id(src_mod); | 228 | int id = rsnd_mod_id(src_mod); |
122 | int shift = (id % 2) ? 16 : 0; | 229 | int shift = (id % 2) ? 16 : 0; |
123 | u32 mask, ws; | ||
124 | u32 in, out; | ||
125 | 230 | ||
126 | rsnd_mod_confirm_src(src_mod); | 231 | rsnd_mod_confirm_src(src_mod); |
127 | 232 | ||
128 | ws = rsnd_adg_ssi_ws_timing_gen2(io); | 233 | rsnd_adg_get_timesel_ratio(priv, io, |
129 | 234 | in_rate, out_rate, | |
130 | in = (is_play) ? timsel : ws; | 235 | &in, &out, &en); |
131 | out = (is_play) ? ws : timsel; | ||
132 | 236 | ||
133 | in = in << shift; | 237 | in = in << shift; |
134 | out = out << shift; | 238 | out = out << shift; |
@@ -157,91 +261,12 @@ static int rsnd_adg_set_src_timsel_gen2(struct rsnd_mod *src_mod, | |||
157 | break; | 261 | break; |
158 | } | 262 | } |
159 | 263 | ||
160 | return 0; | 264 | if (en) |
161 | } | 265 | rsnd_mod_bset(adg_mod, DIV_EN, en, en); |
162 | |||
163 | int rsnd_adg_set_convert_clk_gen2(struct rsnd_mod *src_mod, | ||
164 | struct rsnd_dai_stream *io, | ||
165 | unsigned int src_rate, | ||
166 | unsigned int dst_rate) | ||
167 | { | ||
168 | struct rsnd_priv *priv = rsnd_mod_to_priv(src_mod); | ||
169 | struct rsnd_adg *adg = rsnd_priv_to_adg(priv); | ||
170 | struct rsnd_mod *adg_mod = rsnd_mod_get(adg); | ||
171 | struct device *dev = rsnd_priv_to_dev(priv); | ||
172 | int idx, sel, div, step, ret; | ||
173 | u32 val, en; | ||
174 | unsigned int min, diff; | ||
175 | unsigned int sel_rate [] = { | ||
176 | clk_get_rate(adg->clk[CLKA]), /* 0000: CLKA */ | ||
177 | clk_get_rate(adg->clk[CLKB]), /* 0001: CLKB */ | ||
178 | clk_get_rate(adg->clk[CLKC]), /* 0010: CLKC */ | ||
179 | adg->rbga_rate_for_441khz, /* 0011: RBGA */ | ||
180 | adg->rbgb_rate_for_48khz, /* 0100: RBGB */ | ||
181 | }; | ||
182 | |||
183 | rsnd_mod_confirm_src(src_mod); | ||
184 | |||
185 | min = ~0; | ||
186 | val = 0; | ||
187 | en = 0; | ||
188 | for (sel = 0; sel < ARRAY_SIZE(sel_rate); sel++) { | ||
189 | idx = 0; | ||
190 | step = 2; | ||
191 | |||
192 | if (!sel_rate[sel]) | ||
193 | continue; | ||
194 | |||
195 | for (div = 2; div <= 98304; div += step) { | ||
196 | diff = abs(src_rate - sel_rate[sel] / div); | ||
197 | if (min > diff) { | ||
198 | val = (sel << 8) | idx; | ||
199 | min = diff; | ||
200 | en = 1 << (sel + 1); /* fixme */ | ||
201 | } | ||
202 | |||
203 | /* | ||
204 | * step of 0_0000 / 0_0001 / 0_1101 | ||
205 | * are out of order | ||
206 | */ | ||
207 | if ((idx > 2) && (idx % 2)) | ||
208 | step *= 2; | ||
209 | if (idx == 0x1c) { | ||
210 | div += step; | ||
211 | step *= 2; | ||
212 | } | ||
213 | idx++; | ||
214 | } | ||
215 | } | ||
216 | |||
217 | if (min == ~0) { | ||
218 | dev_err(dev, "no Input clock\n"); | ||
219 | return -EIO; | ||
220 | } | ||
221 | |||
222 | ret = rsnd_adg_set_src_timsel_gen2(src_mod, io, val); | ||
223 | if (ret < 0) { | ||
224 | dev_err(dev, "timsel error\n"); | ||
225 | return ret; | ||
226 | } | ||
227 | |||
228 | rsnd_mod_bset(adg_mod, DIV_EN, en, en); | ||
229 | |||
230 | dev_dbg(dev, "convert rate %d <-> %d\n", src_rate, dst_rate); | ||
231 | 266 | ||
232 | return 0; | 267 | return 0; |
233 | } | 268 | } |
234 | 269 | ||
235 | int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *src_mod, | ||
236 | struct rsnd_dai_stream *io) | ||
237 | { | ||
238 | u32 val = rsnd_adg_ssi_ws_timing_gen2(io); | ||
239 | |||
240 | rsnd_mod_confirm_src(src_mod); | ||
241 | |||
242 | return rsnd_adg_set_src_timsel_gen2(src_mod, io, val); | ||
243 | } | ||
244 | |||
245 | static void rsnd_adg_set_ssi_clk(struct rsnd_mod *ssi_mod, u32 val) | 270 | static void rsnd_adg_set_ssi_clk(struct rsnd_mod *ssi_mod, u32 val) |
246 | { | 271 | { |
247 | struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); | 272 | struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); |
@@ -518,13 +543,8 @@ int rsnd_adg_probe(struct rsnd_priv *priv) | |||
518 | return -ENOMEM; | 543 | return -ENOMEM; |
519 | } | 544 | } |
520 | 545 | ||
521 | /* | 546 | rsnd_mod_init(priv, &adg->mod, &adg_ops, |
522 | * ADG is special module. | 547 | NULL, NULL, 0, 0); |
523 | * Use ADG mod without rsnd_mod_init() to make debug easy | ||
524 | * for rsnd_write/rsnd_read | ||
525 | */ | ||
526 | adg->mod.ops = &adg_ops; | ||
527 | adg->mod.priv = priv; | ||
528 | 548 | ||
529 | rsnd_adg_get_clkin(priv, adg); | 549 | rsnd_adg_get_clkin(priv, adg); |
530 | rsnd_adg_get_clkout(priv, adg); | 550 | rsnd_adg_get_clkout(priv, adg); |
diff --git a/sound/soc/sh/rcar/cmd.c b/sound/soc/sh/rcar/cmd.c index cd1f064e63c4..abb5eaac854a 100644 --- a/sound/soc/sh/rcar/cmd.c +++ b/sound/soc/sh/rcar/cmd.c | |||
@@ -29,7 +29,6 @@ static int rsnd_cmd_init(struct rsnd_mod *mod, | |||
29 | { | 29 | { |
30 | struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io); | 30 | struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io); |
31 | struct rsnd_mod *mix = rsnd_io_to_mod_mix(io); | 31 | struct rsnd_mod *mix = rsnd_io_to_mod_mix(io); |
32 | struct rsnd_mod *src = rsnd_io_to_mod_src(io); | ||
33 | struct device *dev = rsnd_priv_to_dev(priv); | 32 | struct device *dev = rsnd_priv_to_dev(priv); |
34 | u32 data; | 33 | u32 data; |
35 | 34 | ||
@@ -38,6 +37,8 @@ static int rsnd_cmd_init(struct rsnd_mod *mod, | |||
38 | 37 | ||
39 | if (mix) { | 38 | if (mix) { |
40 | struct rsnd_dai *rdai; | 39 | struct rsnd_dai *rdai; |
40 | struct rsnd_mod *src; | ||
41 | struct rsnd_dai_stream *tio; | ||
41 | int i; | 42 | int i; |
42 | u32 path[] = { | 43 | u32 path[] = { |
43 | [0] = 0, | 44 | [0] = 0, |
@@ -55,16 +56,20 @@ static int rsnd_cmd_init(struct rsnd_mod *mod, | |||
55 | */ | 56 | */ |
56 | data = 0; | 57 | data = 0; |
57 | for_each_rsnd_dai(rdai, priv, i) { | 58 | for_each_rsnd_dai(rdai, priv, i) { |
58 | io = &rdai->playback; | 59 | tio = &rdai->playback; |
59 | if (mix == rsnd_io_to_mod_mix(io)) | 60 | src = rsnd_io_to_mod_src(tio); |
61 | if (mix == rsnd_io_to_mod_mix(tio)) | ||
60 | data |= path[rsnd_mod_id(src)]; | 62 | data |= path[rsnd_mod_id(src)]; |
61 | 63 | ||
62 | io = &rdai->capture; | 64 | tio = &rdai->capture; |
63 | if (mix == rsnd_io_to_mod_mix(io)) | 65 | src = rsnd_io_to_mod_src(tio); |
66 | if (mix == rsnd_io_to_mod_mix(tio)) | ||
64 | data |= path[rsnd_mod_id(src)]; | 67 | data |= path[rsnd_mod_id(src)]; |
65 | } | 68 | } |
66 | 69 | ||
67 | } else { | 70 | } else { |
71 | struct rsnd_mod *src = rsnd_io_to_mod_src(io); | ||
72 | |||
68 | u32 path[] = { | 73 | u32 path[] = { |
69 | [0] = 0x30000, | 74 | [0] = 0x30000, |
70 | [1] = 0x30001, | 75 | [1] = 0x30001, |
@@ -152,7 +157,8 @@ int rsnd_cmd_probe(struct rsnd_priv *priv) | |||
152 | 157 | ||
153 | for_each_rsnd_cmd(cmd, priv, i) { | 158 | for_each_rsnd_cmd(cmd, priv, i) { |
154 | ret = rsnd_mod_init(priv, rsnd_mod_get(cmd), | 159 | ret = rsnd_mod_init(priv, rsnd_mod_get(cmd), |
155 | &rsnd_cmd_ops, NULL, RSND_MOD_CMD, i); | 160 | &rsnd_cmd_ops, NULL, |
161 | rsnd_mod_get_status, RSND_MOD_CMD, i); | ||
156 | if (ret) | 162 | if (ret) |
157 | return ret; | 163 | return ret; |
158 | } | 164 | } |
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c index 02b4b085b8d7..3351a701c60e 100644 --- a/sound/soc/sh/rcar/core.c +++ b/sound/soc/sh/rcar/core.c | |||
@@ -138,12 +138,22 @@ struct dma_chan *rsnd_mod_dma_req(struct rsnd_dai_stream *io, | |||
138 | return mod->ops->dma_req(io, mod); | 138 | return mod->ops->dma_req(io, mod); |
139 | } | 139 | } |
140 | 140 | ||
141 | u32 *rsnd_mod_get_status(struct rsnd_dai_stream *io, | ||
142 | struct rsnd_mod *mod, | ||
143 | enum rsnd_mod_type type) | ||
144 | { | ||
145 | return &mod->status; | ||
146 | } | ||
147 | |||
141 | int rsnd_mod_init(struct rsnd_priv *priv, | 148 | int rsnd_mod_init(struct rsnd_priv *priv, |
142 | struct rsnd_mod *mod, | 149 | struct rsnd_mod *mod, |
143 | struct rsnd_mod_ops *ops, | 150 | struct rsnd_mod_ops *ops, |
144 | struct clk *clk, | 151 | struct clk *clk, |
145 | enum rsnd_mod_type type, | 152 | u32* (*get_status)(struct rsnd_dai_stream *io, |
146 | int id) | 153 | struct rsnd_mod *mod, |
154 | enum rsnd_mod_type type), | ||
155 | enum rsnd_mod_type type, | ||
156 | int id) | ||
147 | { | 157 | { |
148 | int ret = clk_prepare(clk); | 158 | int ret = clk_prepare(clk); |
149 | 159 | ||
@@ -155,6 +165,7 @@ int rsnd_mod_init(struct rsnd_priv *priv, | |||
155 | mod->type = type; | 165 | mod->type = type; |
156 | mod->clk = clk; | 166 | mod->clk = clk; |
157 | mod->priv = priv; | 167 | mod->priv = priv; |
168 | mod->get_status = get_status; | ||
158 | 169 | ||
159 | return ret; | 170 | return ret; |
160 | } | 171 | } |
@@ -163,6 +174,7 @@ void rsnd_mod_quit(struct rsnd_mod *mod) | |||
163 | { | 174 | { |
164 | if (mod->clk) | 175 | if (mod->clk) |
165 | clk_unprepare(mod->clk); | 176 | clk_unprepare(mod->clk); |
177 | mod->clk = NULL; | ||
166 | } | 178 | } |
167 | 179 | ||
168 | void rsnd_mod_interrupt(struct rsnd_mod *mod, | 180 | void rsnd_mod_interrupt(struct rsnd_mod *mod, |
@@ -212,13 +224,36 @@ int rsnd_get_slot_num(struct rsnd_dai_stream *io) | |||
212 | return rdai->slots_num; | 224 | return rdai->slots_num; |
213 | } | 225 | } |
214 | 226 | ||
215 | int rsnd_get_slot_width(struct rsnd_dai_stream *io) | 227 | int rsnd_runtime_channel_original(struct rsnd_dai_stream *io) |
216 | { | 228 | { |
217 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | 229 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
218 | int chan = runtime->channels; | ||
219 | 230 | ||
220 | /* Multi channel Mode */ | 231 | return runtime->channels; |
221 | if (rsnd_ssi_multi_slaves(io)) | 232 | } |
233 | |||
234 | int rsnd_runtime_channel_after_ctu(struct rsnd_dai_stream *io) | ||
235 | { | ||
236 | int chan = rsnd_runtime_channel_original(io); | ||
237 | struct rsnd_mod *ctu_mod = rsnd_io_to_mod_ctu(io); | ||
238 | |||
239 | if (ctu_mod) { | ||
240 | u32 converted_chan = rsnd_ctu_converted_channel(ctu_mod); | ||
241 | |||
242 | if (converted_chan) | ||
243 | return converted_chan; | ||
244 | } | ||
245 | |||
246 | return chan; | ||
247 | } | ||
248 | |||
249 | int rsnd_runtime_channel_for_ssi(struct rsnd_dai_stream *io) | ||
250 | { | ||
251 | int chan = rsnd_io_is_play(io) ? | ||
252 | rsnd_runtime_channel_after_ctu(io) : | ||
253 | rsnd_runtime_channel_original(io); | ||
254 | |||
255 | /* Use Multi SSI */ | ||
256 | if (rsnd_runtime_is_ssi_multi(io)) | ||
222 | chan /= rsnd_get_slot_num(io); | 257 | chan /= rsnd_get_slot_num(io); |
223 | 258 | ||
224 | /* TDM Extend Mode needs 8ch */ | 259 | /* TDM Extend Mode needs 8ch */ |
@@ -228,6 +263,21 @@ int rsnd_get_slot_width(struct rsnd_dai_stream *io) | |||
228 | return chan; | 263 | return chan; |
229 | } | 264 | } |
230 | 265 | ||
266 | int rsnd_runtime_is_ssi_multi(struct rsnd_dai_stream *io) | ||
267 | { | ||
268 | int slots = rsnd_get_slot_num(io); | ||
269 | int chan = rsnd_io_is_play(io) ? | ||
270 | rsnd_runtime_channel_after_ctu(io) : | ||
271 | rsnd_runtime_channel_original(io); | ||
272 | |||
273 | return (chan >= 6) && (slots > 1); | ||
274 | } | ||
275 | |||
276 | int rsnd_runtime_is_ssi_tdm(struct rsnd_dai_stream *io) | ||
277 | { | ||
278 | return rsnd_runtime_channel_for_ssi(io) >= 6; | ||
279 | } | ||
280 | |||
231 | /* | 281 | /* |
232 | * ADINR function | 282 | * ADINR function |
233 | */ | 283 | */ |
@@ -249,29 +299,6 @@ u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io) | |||
249 | return 0; | 299 | return 0; |
250 | } | 300 | } |
251 | 301 | ||
252 | u32 rsnd_get_adinr_chan(struct rsnd_mod *mod, struct rsnd_dai_stream *io) | ||
253 | { | ||
254 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | ||
255 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | ||
256 | struct device *dev = rsnd_priv_to_dev(priv); | ||
257 | u32 chan = runtime->channels; | ||
258 | |||
259 | switch (chan) { | ||
260 | case 1: | ||
261 | case 2: | ||
262 | case 4: | ||
263 | case 6: | ||
264 | case 8: | ||
265 | break; | ||
266 | default: | ||
267 | dev_warn(dev, "not supported channel\n"); | ||
268 | chan = 0; | ||
269 | break; | ||
270 | } | ||
271 | |||
272 | return chan; | ||
273 | } | ||
274 | |||
275 | /* | 302 | /* |
276 | * DALIGN function | 303 | * DALIGN function |
277 | */ | 304 | */ |
@@ -324,31 +351,73 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io) | |||
324 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \ | 351 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \ |
325 | struct rsnd_mod *mod = (io)->mod[idx]; \ | 352 | struct rsnd_mod *mod = (io)->mod[idx]; \ |
326 | struct device *dev = rsnd_priv_to_dev(priv); \ | 353 | struct device *dev = rsnd_priv_to_dev(priv); \ |
327 | u32 *status = (io)->mod_status + idx; \ | 354 | u32 *status = mod->get_status(io, mod, idx); \ |
328 | u32 mask = 0xF << __rsnd_mod_shift_##func; \ | 355 | u32 mask = 0xF << __rsnd_mod_shift_##func; \ |
329 | u8 val = (*status >> __rsnd_mod_shift_##func) & 0xF; \ | 356 | u8 val = (*status >> __rsnd_mod_shift_##func) & 0xF; \ |
330 | u8 add = ((val + __rsnd_mod_add_##func) & 0xF); \ | 357 | u8 add = ((val + __rsnd_mod_add_##func) & 0xF); \ |
331 | int ret = 0; \ | 358 | int ret = 0; \ |
332 | int call = (val == __rsnd_mod_call_##func) && (mod)->ops->func; \ | 359 | int call = (val == __rsnd_mod_call_##func) && (mod)->ops->func; \ |
333 | *status = (*status & ~mask) + \ | 360 | if (add == 0xF) \ |
334 | (add << __rsnd_mod_shift_##func); \ | 361 | call = 0; \ |
362 | else \ | ||
363 | *status = (*status & ~mask) + \ | ||
364 | (add << __rsnd_mod_shift_##func); \ | ||
335 | dev_dbg(dev, "%s[%d]\t0x%08x %s\n", \ | 365 | dev_dbg(dev, "%s[%d]\t0x%08x %s\n", \ |
336 | rsnd_mod_name(mod), rsnd_mod_id(mod), \ | 366 | rsnd_mod_name(mod), rsnd_mod_id(mod), \ |
337 | *status, call ? #func : ""); \ | 367 | *status, call ? #func : ""); \ |
338 | if (call) \ | 368 | if (call) \ |
339 | ret = (mod)->ops->func(mod, io, param); \ | 369 | ret = (mod)->ops->func(mod, io, param); \ |
370 | if (ret) \ | ||
371 | dev_dbg(dev, "%s[%d] : rsnd_mod_call error %d\n", \ | ||
372 | rsnd_mod_name(mod), rsnd_mod_id(mod), ret); \ | ||
340 | ret; \ | 373 | ret; \ |
341 | }) | 374 | }) |
342 | 375 | ||
376 | static enum rsnd_mod_type rsnd_mod_sequence[][RSND_MOD_MAX] = { | ||
377 | { | ||
378 | /* CAPTURE */ | ||
379 | RSND_MOD_AUDMAPP, | ||
380 | RSND_MOD_AUDMA, | ||
381 | RSND_MOD_DVC, | ||
382 | RSND_MOD_MIX, | ||
383 | RSND_MOD_CTU, | ||
384 | RSND_MOD_CMD, | ||
385 | RSND_MOD_SRC, | ||
386 | RSND_MOD_SSIU, | ||
387 | RSND_MOD_SSIM3, | ||
388 | RSND_MOD_SSIM2, | ||
389 | RSND_MOD_SSIM1, | ||
390 | RSND_MOD_SSIP, | ||
391 | RSND_MOD_SSI, | ||
392 | }, { | ||
393 | /* PLAYBACK */ | ||
394 | RSND_MOD_AUDMAPP, | ||
395 | RSND_MOD_AUDMA, | ||
396 | RSND_MOD_SSIM3, | ||
397 | RSND_MOD_SSIM2, | ||
398 | RSND_MOD_SSIM1, | ||
399 | RSND_MOD_SSIP, | ||
400 | RSND_MOD_SSI, | ||
401 | RSND_MOD_SSIU, | ||
402 | RSND_MOD_DVC, | ||
403 | RSND_MOD_MIX, | ||
404 | RSND_MOD_CTU, | ||
405 | RSND_MOD_CMD, | ||
406 | RSND_MOD_SRC, | ||
407 | }, | ||
408 | }; | ||
409 | |||
343 | #define rsnd_dai_call(fn, io, param...) \ | 410 | #define rsnd_dai_call(fn, io, param...) \ |
344 | ({ \ | 411 | ({ \ |
345 | struct rsnd_mod *mod; \ | 412 | struct rsnd_mod *mod; \ |
413 | int type, is_play = rsnd_io_is_play(io); \ | ||
346 | int ret = 0, i; \ | 414 | int ret = 0, i; \ |
347 | for (i = 0; i < RSND_MOD_MAX; i++) { \ | 415 | for (i = 0; i < RSND_MOD_MAX; i++) { \ |
348 | mod = (io)->mod[i]; \ | 416 | type = rsnd_mod_sequence[is_play][i]; \ |
417 | mod = (io)->mod[type]; \ | ||
349 | if (!mod) \ | 418 | if (!mod) \ |
350 | continue; \ | 419 | continue; \ |
351 | ret |= rsnd_mod_call(i, io, fn, param); \ | 420 | ret |= rsnd_mod_call(type, io, fn, param); \ |
352 | } \ | 421 | } \ |
353 | ret; \ | 422 | ret; \ |
354 | }) | 423 | }) |
@@ -363,6 +432,9 @@ int rsnd_dai_connect(struct rsnd_mod *mod, | |||
363 | if (!mod) | 432 | if (!mod) |
364 | return -EIO; | 433 | return -EIO; |
365 | 434 | ||
435 | if (io->mod[type] == mod) | ||
436 | return 0; | ||
437 | |||
366 | if (io->mod[type]) | 438 | if (io->mod[type]) |
367 | return -EINVAL; | 439 | return -EINVAL; |
368 | 440 | ||
@@ -511,9 +583,16 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd, | |||
511 | ret = rsnd_dai_call(start, io, priv); | 583 | ret = rsnd_dai_call(start, io, priv); |
512 | if (ret < 0) | 584 | if (ret < 0) |
513 | goto dai_trigger_end; | 585 | goto dai_trigger_end; |
586 | |||
587 | ret = rsnd_dai_call(irq, io, priv, 1); | ||
588 | if (ret < 0) | ||
589 | goto dai_trigger_end; | ||
590 | |||
514 | break; | 591 | break; |
515 | case SNDRV_PCM_TRIGGER_STOP: | 592 | case SNDRV_PCM_TRIGGER_STOP: |
516 | ret = rsnd_dai_call(stop, io, priv); | 593 | ret = rsnd_dai_call(irq, io, priv, 0); |
594 | |||
595 | ret |= rsnd_dai_call(stop, io, priv); | ||
517 | 596 | ||
518 | ret |= rsnd_dai_call(quit, io, priv); | 597 | ret |= rsnd_dai_call(quit, io, priv); |
519 | 598 | ||
@@ -863,7 +942,7 @@ static int rsnd_kctrl_put(struct snd_kcontrol *kctrl, | |||
863 | } | 942 | } |
864 | } | 943 | } |
865 | 944 | ||
866 | if (change) | 945 | if (change && cfg->update) |
867 | cfg->update(cfg->io, mod); | 946 | cfg->update(cfg->io, mod); |
868 | 947 | ||
869 | return change; | 948 | return change; |
@@ -923,7 +1002,7 @@ int rsnd_kctrl_new_m(struct rsnd_mod *mod, | |||
923 | int ch_size, | 1002 | int ch_size, |
924 | u32 max) | 1003 | u32 max) |
925 | { | 1004 | { |
926 | if (ch_size > RSND_DVC_CHANNELS) | 1005 | if (ch_size > RSND_MAX_CHANNELS) |
927 | return -EINVAL; | 1006 | return -EINVAL; |
928 | 1007 | ||
929 | _cfg->cfg.max = max; | 1008 | _cfg->cfg.max = max; |
@@ -1055,7 +1134,6 @@ static int rsnd_probe(struct platform_device *pdev) | |||
1055 | struct rsnd_priv *priv; | 1134 | struct rsnd_priv *priv; |
1056 | struct device *dev = &pdev->dev; | 1135 | struct device *dev = &pdev->dev; |
1057 | struct rsnd_dai *rdai; | 1136 | struct rsnd_dai *rdai; |
1058 | const struct of_device_id *of_id = of_match_device(rsnd_of_match, dev); | ||
1059 | int (*probe_func[])(struct rsnd_priv *priv) = { | 1137 | int (*probe_func[])(struct rsnd_priv *priv) = { |
1060 | rsnd_gen_probe, | 1138 | rsnd_gen_probe, |
1061 | rsnd_dma_probe, | 1139 | rsnd_dma_probe, |
@@ -1081,7 +1159,7 @@ static int rsnd_probe(struct platform_device *pdev) | |||
1081 | } | 1159 | } |
1082 | 1160 | ||
1083 | priv->pdev = pdev; | 1161 | priv->pdev = pdev; |
1084 | priv->flags = (unsigned long)of_id->data; | 1162 | priv->flags = (unsigned long)of_device_get_match_data(dev); |
1085 | spin_lock_init(&priv->lock); | 1163 | spin_lock_init(&priv->lock); |
1086 | 1164 | ||
1087 | /* | 1165 | /* |
diff --git a/sound/soc/sh/rcar/ctu.c b/sound/soc/sh/rcar/ctu.c index d53a225d19e9..9dcc1f9db026 100644 --- a/sound/soc/sh/rcar/ctu.c +++ b/sound/soc/sh/rcar/ctu.c | |||
@@ -12,8 +12,75 @@ | |||
12 | #define CTU_NAME_SIZE 16 | 12 | #define CTU_NAME_SIZE 16 |
13 | #define CTU_NAME "ctu" | 13 | #define CTU_NAME "ctu" |
14 | 14 | ||
15 | /* | ||
16 | * User needs to setup CTU by amixer, and its settings are | ||
17 | * based on below registers | ||
18 | * | ||
19 | * CTUn_CPMDR : amixser set "CTU Pass" | ||
20 | * CTUn_SV0xR : amixser set "CTU SV0" | ||
21 | * CTUn_SV1xR : amixser set "CTU SV1" | ||
22 | * CTUn_SV2xR : amixser set "CTU SV2" | ||
23 | * CTUn_SV3xR : amixser set "CTU SV3" | ||
24 | * | ||
25 | * [CTU Pass] | ||
26 | * 0000: default | ||
27 | * 0001: Connect input data of channel 0 | ||
28 | * 0010: Connect input data of channel 1 | ||
29 | * 0011: Connect input data of channel 2 | ||
30 | * 0100: Connect input data of channel 3 | ||
31 | * 0101: Connect input data of channel 4 | ||
32 | * 0110: Connect input data of channel 5 | ||
33 | * 0111: Connect input data of channel 6 | ||
34 | * 1000: Connect input data of channel 7 | ||
35 | * 1001: Connect calculated data by scale values of matrix row 0 | ||
36 | * 1010: Connect calculated data by scale values of matrix row 1 | ||
37 | * 1011: Connect calculated data by scale values of matrix row 2 | ||
38 | * 1100: Connect calculated data by scale values of matrix row 3 | ||
39 | * | ||
40 | * [CTU SVx] | ||
41 | * [Output0] = [SV00, SV01, SV02, SV03, SV04, SV05, SV06, SV07] | ||
42 | * [Output1] = [SV10, SV11, SV12, SV13, SV14, SV15, SV16, SV17] | ||
43 | * [Output2] = [SV20, SV21, SV22, SV23, SV24, SV25, SV26, SV27] | ||
44 | * [Output3] = [SV30, SV31, SV32, SV33, SV34, SV35, SV36, SV37] | ||
45 | * [Output4] = [ 0, 0, 0, 0, 0, 0, 0, 0 ] | ||
46 | * [Output5] = [ 0, 0, 0, 0, 0, 0, 0, 0 ] | ||
47 | * [Output6] = [ 0, 0, 0, 0, 0, 0, 0, 0 ] | ||
48 | * [Output7] = [ 0, 0, 0, 0, 0, 0, 0, 0 ] | ||
49 | * | ||
50 | * [SVxx] | ||
51 | * Plus Minus | ||
52 | * value time dB value time dB | ||
53 | * ----------------------------------------------------------------------- | ||
54 | * H'7F_FFFF 2 6 H'80_0000 2 6 | ||
55 | * ... | ||
56 | * H'40_0000 1 0 H'C0_0000 1 0 | ||
57 | * ... | ||
58 | * H'00_0001 2.38 x 10^-7 -132 | ||
59 | * H'00_0000 0 Mute H'FF_FFFF 2.38 x 10^-7 -132 | ||
60 | * | ||
61 | * | ||
62 | * Ex) Input ch -> Output ch | ||
63 | * 1ch -> 0ch | ||
64 | * 0ch -> 1ch | ||
65 | * | ||
66 | * amixer set "CTU Reset" on | ||
67 | * amixer set "CTU Pass" 9,10 | ||
68 | * amixer set "CTU SV0" 0,4194304 | ||
69 | * amixer set "CTU SV1" 4194304,0 | ||
70 | * or | ||
71 | * amixer set "CTU Reset" on | ||
72 | * amixer set "CTU Pass" 2,1 | ||
73 | */ | ||
74 | |||
15 | struct rsnd_ctu { | 75 | struct rsnd_ctu { |
16 | struct rsnd_mod mod; | 76 | struct rsnd_mod mod; |
77 | struct rsnd_kctrl_cfg_m pass; | ||
78 | struct rsnd_kctrl_cfg_m sv0; | ||
79 | struct rsnd_kctrl_cfg_m sv1; | ||
80 | struct rsnd_kctrl_cfg_m sv2; | ||
81 | struct rsnd_kctrl_cfg_m sv3; | ||
82 | struct rsnd_kctrl_cfg_s reset; | ||
83 | int channels; | ||
17 | }; | 84 | }; |
18 | 85 | ||
19 | #define rsnd_ctu_nr(priv) ((priv)->ctu_nr) | 86 | #define rsnd_ctu_nr(priv) ((priv)->ctu_nr) |
@@ -23,12 +90,28 @@ struct rsnd_ctu { | |||
23 | ((pos) = (struct rsnd_ctu *)(priv)->ctu + i); \ | 90 | ((pos) = (struct rsnd_ctu *)(priv)->ctu + i); \ |
24 | i++) | 91 | i++) |
25 | 92 | ||
93 | #define rsnd_mod_to_ctu(_mod) \ | ||
94 | container_of((_mod), struct rsnd_ctu, mod) | ||
95 | |||
26 | #define rsnd_ctu_get(priv, id) ((struct rsnd_ctu *)(priv->ctu) + id) | 96 | #define rsnd_ctu_get(priv, id) ((struct rsnd_ctu *)(priv->ctu) + id) |
27 | #define rsnd_ctu_initialize_lock(mod) __rsnd_ctu_initialize_lock(mod, 1) | 97 | |
28 | #define rsnd_ctu_initialize_unlock(mod) __rsnd_ctu_initialize_lock(mod, 0) | 98 | static void rsnd_ctu_activation(struct rsnd_mod *mod) |
29 | static void __rsnd_ctu_initialize_lock(struct rsnd_mod *mod, u32 enable) | 99 | { |
100 | rsnd_mod_write(mod, CTU_SWRSR, 0); | ||
101 | rsnd_mod_write(mod, CTU_SWRSR, 1); | ||
102 | } | ||
103 | |||
104 | static void rsnd_ctu_halt(struct rsnd_mod *mod) | ||
105 | { | ||
106 | rsnd_mod_write(mod, CTU_CTUIR, 1); | ||
107 | rsnd_mod_write(mod, CTU_SWRSR, 0); | ||
108 | } | ||
109 | |||
110 | int rsnd_ctu_converted_channel(struct rsnd_mod *mod) | ||
30 | { | 111 | { |
31 | rsnd_mod_write(mod, CTU_CTUIR, enable); | 112 | struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod); |
113 | |||
114 | return ctu->channels; | ||
32 | } | 115 | } |
33 | 116 | ||
34 | static int rsnd_ctu_probe_(struct rsnd_mod *mod, | 117 | static int rsnd_ctu_probe_(struct rsnd_mod *mod, |
@@ -38,17 +121,103 @@ static int rsnd_ctu_probe_(struct rsnd_mod *mod, | |||
38 | return rsnd_cmd_attach(io, rsnd_mod_id(mod) / 4); | 121 | return rsnd_cmd_attach(io, rsnd_mod_id(mod) / 4); |
39 | } | 122 | } |
40 | 123 | ||
124 | static void rsnd_ctu_value_init(struct rsnd_dai_stream *io, | ||
125 | struct rsnd_mod *mod) | ||
126 | { | ||
127 | struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod); | ||
128 | u32 cpmdr = 0; | ||
129 | u32 scmdr = 0; | ||
130 | int i; | ||
131 | |||
132 | for (i = 0; i < RSND_MAX_CHANNELS; i++) { | ||
133 | u32 val = ctu->pass.val[i]; | ||
134 | |||
135 | cpmdr |= val << (28 - (i * 4)); | ||
136 | |||
137 | if ((val > 0x8) && (scmdr < (val - 0x8))) | ||
138 | scmdr = val - 0x8; | ||
139 | } | ||
140 | |||
141 | rsnd_mod_write(mod, CTU_CTUIR, 1); | ||
142 | |||
143 | rsnd_mod_write(mod, CTU_ADINR, rsnd_runtime_channel_original(io)); | ||
144 | |||
145 | rsnd_mod_write(mod, CTU_CPMDR, cpmdr); | ||
146 | |||
147 | rsnd_mod_write(mod, CTU_SCMDR, scmdr); | ||
148 | |||
149 | if (scmdr > 0) { | ||
150 | rsnd_mod_write(mod, CTU_SV00R, ctu->sv0.val[0]); | ||
151 | rsnd_mod_write(mod, CTU_SV01R, ctu->sv0.val[1]); | ||
152 | rsnd_mod_write(mod, CTU_SV02R, ctu->sv0.val[2]); | ||
153 | rsnd_mod_write(mod, CTU_SV03R, ctu->sv0.val[3]); | ||
154 | rsnd_mod_write(mod, CTU_SV04R, ctu->sv0.val[4]); | ||
155 | rsnd_mod_write(mod, CTU_SV05R, ctu->sv0.val[5]); | ||
156 | rsnd_mod_write(mod, CTU_SV06R, ctu->sv0.val[6]); | ||
157 | rsnd_mod_write(mod, CTU_SV07R, ctu->sv0.val[7]); | ||
158 | } | ||
159 | if (scmdr > 1) { | ||
160 | rsnd_mod_write(mod, CTU_SV10R, ctu->sv1.val[0]); | ||
161 | rsnd_mod_write(mod, CTU_SV11R, ctu->sv1.val[1]); | ||
162 | rsnd_mod_write(mod, CTU_SV12R, ctu->sv1.val[2]); | ||
163 | rsnd_mod_write(mod, CTU_SV13R, ctu->sv1.val[3]); | ||
164 | rsnd_mod_write(mod, CTU_SV14R, ctu->sv1.val[4]); | ||
165 | rsnd_mod_write(mod, CTU_SV15R, ctu->sv1.val[5]); | ||
166 | rsnd_mod_write(mod, CTU_SV16R, ctu->sv1.val[6]); | ||
167 | rsnd_mod_write(mod, CTU_SV17R, ctu->sv1.val[7]); | ||
168 | } | ||
169 | if (scmdr > 2) { | ||
170 | rsnd_mod_write(mod, CTU_SV20R, ctu->sv2.val[0]); | ||
171 | rsnd_mod_write(mod, CTU_SV21R, ctu->sv2.val[1]); | ||
172 | rsnd_mod_write(mod, CTU_SV22R, ctu->sv2.val[2]); | ||
173 | rsnd_mod_write(mod, CTU_SV23R, ctu->sv2.val[3]); | ||
174 | rsnd_mod_write(mod, CTU_SV24R, ctu->sv2.val[4]); | ||
175 | rsnd_mod_write(mod, CTU_SV25R, ctu->sv2.val[5]); | ||
176 | rsnd_mod_write(mod, CTU_SV26R, ctu->sv2.val[6]); | ||
177 | rsnd_mod_write(mod, CTU_SV27R, ctu->sv2.val[7]); | ||
178 | } | ||
179 | if (scmdr > 3) { | ||
180 | rsnd_mod_write(mod, CTU_SV30R, ctu->sv3.val[0]); | ||
181 | rsnd_mod_write(mod, CTU_SV31R, ctu->sv3.val[1]); | ||
182 | rsnd_mod_write(mod, CTU_SV32R, ctu->sv3.val[2]); | ||
183 | rsnd_mod_write(mod, CTU_SV33R, ctu->sv3.val[3]); | ||
184 | rsnd_mod_write(mod, CTU_SV34R, ctu->sv3.val[4]); | ||
185 | rsnd_mod_write(mod, CTU_SV35R, ctu->sv3.val[5]); | ||
186 | rsnd_mod_write(mod, CTU_SV36R, ctu->sv3.val[6]); | ||
187 | rsnd_mod_write(mod, CTU_SV37R, ctu->sv3.val[7]); | ||
188 | } | ||
189 | |||
190 | rsnd_mod_write(mod, CTU_CTUIR, 0); | ||
191 | } | ||
192 | |||
193 | static void rsnd_ctu_value_reset(struct rsnd_dai_stream *io, | ||
194 | struct rsnd_mod *mod) | ||
195 | { | ||
196 | struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod); | ||
197 | int i; | ||
198 | |||
199 | if (!ctu->reset.val) | ||
200 | return; | ||
201 | |||
202 | for (i = 0; i < RSND_MAX_CHANNELS; i++) { | ||
203 | ctu->pass.val[i] = 0; | ||
204 | ctu->sv0.val[i] = 0; | ||
205 | ctu->sv1.val[i] = 0; | ||
206 | ctu->sv2.val[i] = 0; | ||
207 | ctu->sv3.val[i] = 0; | ||
208 | } | ||
209 | ctu->reset.val = 0; | ||
210 | } | ||
211 | |||
41 | static int rsnd_ctu_init(struct rsnd_mod *mod, | 212 | static int rsnd_ctu_init(struct rsnd_mod *mod, |
42 | struct rsnd_dai_stream *io, | 213 | struct rsnd_dai_stream *io, |
43 | struct rsnd_priv *priv) | 214 | struct rsnd_priv *priv) |
44 | { | 215 | { |
45 | rsnd_mod_power_on(mod); | 216 | rsnd_mod_power_on(mod); |
46 | 217 | ||
47 | rsnd_ctu_initialize_lock(mod); | 218 | rsnd_ctu_activation(mod); |
48 | |||
49 | rsnd_mod_write(mod, CTU_ADINR, rsnd_get_adinr_chan(mod, io)); | ||
50 | 219 | ||
51 | rsnd_ctu_initialize_unlock(mod); | 220 | rsnd_ctu_value_init(io, mod); |
52 | 221 | ||
53 | return 0; | 222 | return 0; |
54 | } | 223 | } |
@@ -57,16 +226,110 @@ static int rsnd_ctu_quit(struct rsnd_mod *mod, | |||
57 | struct rsnd_dai_stream *io, | 226 | struct rsnd_dai_stream *io, |
58 | struct rsnd_priv *priv) | 227 | struct rsnd_priv *priv) |
59 | { | 228 | { |
229 | rsnd_ctu_halt(mod); | ||
230 | |||
60 | rsnd_mod_power_off(mod); | 231 | rsnd_mod_power_off(mod); |
61 | 232 | ||
62 | return 0; | 233 | return 0; |
63 | } | 234 | } |
64 | 235 | ||
236 | static int rsnd_ctu_hw_params(struct rsnd_mod *mod, | ||
237 | struct rsnd_dai_stream *io, | ||
238 | struct snd_pcm_substream *substream, | ||
239 | struct snd_pcm_hw_params *fe_params) | ||
240 | { | ||
241 | struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod); | ||
242 | struct snd_soc_pcm_runtime *fe = substream->private_data; | ||
243 | |||
244 | /* | ||
245 | * CTU assumes that it is used under DPCM if user want to use | ||
246 | * channel transfer. Then, CTU should be FE. | ||
247 | * And then, this function will be called *after* BE settings. | ||
248 | * this means, each BE already has fixuped hw_params. | ||
249 | * see | ||
250 | * dpcm_fe_dai_hw_params() | ||
251 | * dpcm_be_dai_hw_params() | ||
252 | */ | ||
253 | ctu->channels = 0; | ||
254 | if (fe->dai_link->dynamic) { | ||
255 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | ||
256 | struct device *dev = rsnd_priv_to_dev(priv); | ||
257 | struct snd_soc_dpcm *dpcm; | ||
258 | struct snd_pcm_hw_params *be_params; | ||
259 | int stream = substream->stream; | ||
260 | |||
261 | list_for_each_entry(dpcm, &fe->dpcm[stream].be_clients, list_be) { | ||
262 | be_params = &dpcm->hw_params; | ||
263 | if (params_channels(fe_params) != params_channels(be_params)) | ||
264 | ctu->channels = params_channels(be_params); | ||
265 | } | ||
266 | |||
267 | dev_dbg(dev, "CTU convert channels %d\n", ctu->channels); | ||
268 | } | ||
269 | |||
270 | return 0; | ||
271 | } | ||
272 | |||
273 | static int rsnd_ctu_pcm_new(struct rsnd_mod *mod, | ||
274 | struct rsnd_dai_stream *io, | ||
275 | struct snd_soc_pcm_runtime *rtd) | ||
276 | { | ||
277 | struct rsnd_ctu *ctu = rsnd_mod_to_ctu(mod); | ||
278 | int ret; | ||
279 | |||
280 | /* CTU Pass */ | ||
281 | ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU Pass", | ||
282 | NULL, | ||
283 | &ctu->pass, RSND_MAX_CHANNELS, | ||
284 | 0xC); | ||
285 | |||
286 | /* ROW0 */ | ||
287 | ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV0", | ||
288 | NULL, | ||
289 | &ctu->sv0, RSND_MAX_CHANNELS, | ||
290 | 0x00FFFFFF); | ||
291 | if (ret < 0) | ||
292 | return ret; | ||
293 | |||
294 | /* ROW1 */ | ||
295 | ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV1", | ||
296 | NULL, | ||
297 | &ctu->sv1, RSND_MAX_CHANNELS, | ||
298 | 0x00FFFFFF); | ||
299 | if (ret < 0) | ||
300 | return ret; | ||
301 | |||
302 | /* ROW2 */ | ||
303 | ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV2", | ||
304 | NULL, | ||
305 | &ctu->sv2, RSND_MAX_CHANNELS, | ||
306 | 0x00FFFFFF); | ||
307 | if (ret < 0) | ||
308 | return ret; | ||
309 | |||
310 | /* ROW3 */ | ||
311 | ret = rsnd_kctrl_new_m(mod, io, rtd, "CTU SV3", | ||
312 | NULL, | ||
313 | &ctu->sv3, RSND_MAX_CHANNELS, | ||
314 | 0x00FFFFFF); | ||
315 | if (ret < 0) | ||
316 | return ret; | ||
317 | |||
318 | /* Reset */ | ||
319 | ret = rsnd_kctrl_new_s(mod, io, rtd, "CTU Reset", | ||
320 | rsnd_ctu_value_reset, | ||
321 | &ctu->reset, 1); | ||
322 | |||
323 | return ret; | ||
324 | } | ||
325 | |||
65 | static struct rsnd_mod_ops rsnd_ctu_ops = { | 326 | static struct rsnd_mod_ops rsnd_ctu_ops = { |
66 | .name = CTU_NAME, | 327 | .name = CTU_NAME, |
67 | .probe = rsnd_ctu_probe_, | 328 | .probe = rsnd_ctu_probe_, |
68 | .init = rsnd_ctu_init, | 329 | .init = rsnd_ctu_init, |
69 | .quit = rsnd_ctu_quit, | 330 | .quit = rsnd_ctu_quit, |
331 | .hw_params = rsnd_ctu_hw_params, | ||
332 | .pcm_new = rsnd_ctu_pcm_new, | ||
70 | }; | 333 | }; |
71 | 334 | ||
72 | struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id) | 335 | struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id) |
@@ -129,7 +392,7 @@ int rsnd_ctu_probe(struct rsnd_priv *priv) | |||
129 | } | 392 | } |
130 | 393 | ||
131 | ret = rsnd_mod_init(priv, rsnd_mod_get(ctu), &rsnd_ctu_ops, | 394 | ret = rsnd_mod_init(priv, rsnd_mod_get(ctu), &rsnd_ctu_ops, |
132 | clk, RSND_MOD_CTU, i); | 395 | clk, rsnd_mod_get_status, RSND_MOD_CTU, i); |
133 | if (ret) | 396 | if (ret) |
134 | goto rsnd_ctu_probe_done; | 397 | goto rsnd_ctu_probe_done; |
135 | 398 | ||
diff --git a/sound/soc/sh/rcar/dma.c b/sound/soc/sh/rcar/dma.c index 418e6fdd06a3..7658e8fd7bdc 100644 --- a/sound/soc/sh/rcar/dma.c +++ b/sound/soc/sh/rcar/dma.c | |||
@@ -622,15 +622,13 @@ static void rsnd_dma_of_path(struct rsnd_mod *this, | |||
622 | } | 622 | } |
623 | } | 623 | } |
624 | 624 | ||
625 | struct rsnd_mod *rsnd_dma_attach(struct rsnd_dai_stream *io, | 625 | int rsnd_dma_attach(struct rsnd_dai_stream *io, struct rsnd_mod *mod, |
626 | struct rsnd_mod *mod, int id) | 626 | struct rsnd_mod **dma_mod, int id) |
627 | { | 627 | { |
628 | struct rsnd_mod *dma_mod; | ||
629 | struct rsnd_mod *mod_from = NULL; | 628 | struct rsnd_mod *mod_from = NULL; |
630 | struct rsnd_mod *mod_to = NULL; | 629 | struct rsnd_mod *mod_to = NULL; |
631 | struct rsnd_priv *priv = rsnd_io_to_priv(io); | 630 | struct rsnd_priv *priv = rsnd_io_to_priv(io); |
632 | struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); | 631 | struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); |
633 | struct rsnd_dma *dma; | ||
634 | struct device *dev = rsnd_priv_to_dev(priv); | 632 | struct device *dev = rsnd_priv_to_dev(priv); |
635 | struct rsnd_mod_ops *ops; | 633 | struct rsnd_mod_ops *ops; |
636 | enum rsnd_mod_type type; | 634 | enum rsnd_mod_type type; |
@@ -646,17 +644,10 @@ struct rsnd_mod *rsnd_dma_attach(struct rsnd_dai_stream *io, | |||
646 | * rsnd_rdai_continuance_probe() | 644 | * rsnd_rdai_continuance_probe() |
647 | */ | 645 | */ |
648 | if (!dmac) | 646 | if (!dmac) |
649 | return ERR_PTR(-EAGAIN); | 647 | return -EAGAIN; |
650 | |||
651 | dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); | ||
652 | if (!dma) | ||
653 | return ERR_PTR(-ENOMEM); | ||
654 | 648 | ||
655 | rsnd_dma_of_path(mod, io, is_play, &mod_from, &mod_to); | 649 | rsnd_dma_of_path(mod, io, is_play, &mod_from, &mod_to); |
656 | 650 | ||
657 | dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1); | ||
658 | dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0); | ||
659 | |||
660 | /* for Gen2 */ | 651 | /* for Gen2 */ |
661 | if (mod_from && mod_to) { | 652 | if (mod_from && mod_to) { |
662 | ops = &rsnd_dmapp_ops; | 653 | ops = &rsnd_dmapp_ops; |
@@ -678,27 +669,38 @@ struct rsnd_mod *rsnd_dma_attach(struct rsnd_dai_stream *io, | |||
678 | type = RSND_MOD_AUDMA; | 669 | type = RSND_MOD_AUDMA; |
679 | } | 670 | } |
680 | 671 | ||
681 | dma_mod = rsnd_mod_get(dma); | 672 | if (!(*dma_mod)) { |
673 | struct rsnd_dma *dma; | ||
682 | 674 | ||
683 | ret = rsnd_mod_init(priv, dma_mod, | 675 | dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL); |
684 | ops, NULL, type, dma_id); | 676 | if (!dma) |
685 | if (ret < 0) | 677 | return -ENOMEM; |
686 | return ERR_PTR(ret); | ||
687 | 678 | ||
688 | dev_dbg(dev, "%s[%d] %s[%d] -> %s[%d]\n", | 679 | *dma_mod = rsnd_mod_get(dma); |
689 | rsnd_mod_name(dma_mod), rsnd_mod_id(dma_mod), | ||
690 | rsnd_mod_name(mod_from), rsnd_mod_id(mod_from), | ||
691 | rsnd_mod_name(mod_to), rsnd_mod_id(mod_to)); | ||
692 | 680 | ||
693 | ret = attach(io, dma, id, mod_from, mod_to); | 681 | dma->src_addr = rsnd_dma_addr(io, mod_from, is_play, 1); |
694 | if (ret < 0) | 682 | dma->dst_addr = rsnd_dma_addr(io, mod_to, is_play, 0); |
695 | return ERR_PTR(ret); | 683 | |
684 | ret = rsnd_mod_init(priv, *dma_mod, ops, NULL, | ||
685 | rsnd_mod_get_status, type, dma_id); | ||
686 | if (ret < 0) | ||
687 | return ret; | ||
696 | 688 | ||
697 | ret = rsnd_dai_connect(dma_mod, io, type); | 689 | dev_dbg(dev, "%s[%d] %s[%d] -> %s[%d]\n", |
690 | rsnd_mod_name(*dma_mod), rsnd_mod_id(*dma_mod), | ||
691 | rsnd_mod_name(mod_from), rsnd_mod_id(mod_from), | ||
692 | rsnd_mod_name(mod_to), rsnd_mod_id(mod_to)); | ||
693 | |||
694 | ret = attach(io, dma, id, mod_from, mod_to); | ||
695 | if (ret < 0) | ||
696 | return ret; | ||
697 | } | ||
698 | |||
699 | ret = rsnd_dai_connect(*dma_mod, io, type); | ||
698 | if (ret < 0) | 700 | if (ret < 0) |
699 | return ERR_PTR(ret); | 701 | return ret; |
700 | 702 | ||
701 | return rsnd_mod_get(dma); | 703 | return 0; |
702 | } | 704 | } |
703 | 705 | ||
704 | int rsnd_dma_probe(struct rsnd_priv *priv) | 706 | int rsnd_dma_probe(struct rsnd_priv *priv) |
diff --git a/sound/soc/sh/rcar/dvc.c b/sound/soc/sh/rcar/dvc.c index d45ffe496397..02d971f69eff 100644 --- a/sound/soc/sh/rcar/dvc.c +++ b/sound/soc/sh/rcar/dvc.c | |||
@@ -8,6 +8,29 @@ | |||
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | |||
12 | /* | ||
13 | * Playback Volume | ||
14 | * amixer set "DVC Out" 100% | ||
15 | * | ||
16 | * Capture Volume | ||
17 | * amixer set "DVC In" 100% | ||
18 | * | ||
19 | * Playback Mute | ||
20 | * amixer set "DVC Out Mute" on | ||
21 | * | ||
22 | * Capture Mute | ||
23 | * amixer set "DVC In Mute" on | ||
24 | * | ||
25 | * Volume Ramp | ||
26 | * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" | ||
27 | * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" | ||
28 | * amixer set "DVC Out Ramp" on | ||
29 | * aplay xxx.wav & | ||
30 | * amixer set "DVC Out" 80% // Volume Down | ||
31 | * amixer set "DVC Out" 100% // Volume Up | ||
32 | */ | ||
33 | |||
11 | #include "rsnd.h" | 34 | #include "rsnd.h" |
12 | 35 | ||
13 | #define RSND_DVC_NAME_SIZE 16 | 36 | #define RSND_DVC_NAME_SIZE 16 |
@@ -83,15 +106,15 @@ static void rsnd_dvc_volume_parameter(struct rsnd_dai_stream *io, | |||
83 | struct rsnd_mod *mod) | 106 | struct rsnd_mod *mod) |
84 | { | 107 | { |
85 | struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod); | 108 | struct rsnd_dvc *dvc = rsnd_mod_to_dvc(mod); |
86 | u32 val[RSND_DVC_CHANNELS]; | 109 | u32 val[RSND_MAX_CHANNELS]; |
87 | int i; | 110 | int i; |
88 | 111 | ||
89 | /* Enable Ramp */ | 112 | /* Enable Ramp */ |
90 | if (dvc->ren.val) | 113 | if (dvc->ren.val) |
91 | for (i = 0; i < RSND_DVC_CHANNELS; i++) | 114 | for (i = 0; i < RSND_MAX_CHANNELS; i++) |
92 | val[i] = dvc->volume.cfg.max; | 115 | val[i] = dvc->volume.cfg.max; |
93 | else | 116 | else |
94 | for (i = 0; i < RSND_DVC_CHANNELS; i++) | 117 | for (i = 0; i < RSND_MAX_CHANNELS; i++) |
95 | val[i] = dvc->volume.val[i]; | 118 | val[i] = dvc->volume.val[i]; |
96 | 119 | ||
97 | /* Enable Digital Volume */ | 120 | /* Enable Digital Volume */ |
@@ -116,7 +139,7 @@ static void rsnd_dvc_volume_init(struct rsnd_dai_stream *io, | |||
116 | u32 vrdbr = 0; | 139 | u32 vrdbr = 0; |
117 | 140 | ||
118 | adinr = rsnd_get_adinr_bit(mod, io) | | 141 | adinr = rsnd_get_adinr_bit(mod, io) | |
119 | rsnd_get_adinr_chan(mod, io); | 142 | rsnd_runtime_channel_after_ctu(io); |
120 | 143 | ||
121 | /* Enable Digital Volume, Zero Cross Mute Mode */ | 144 | /* Enable Digital Volume, Zero Cross Mute Mode */ |
122 | dvucr |= 0x101; | 145 | dvucr |= 0x101; |
@@ -373,7 +396,7 @@ int rsnd_dvc_probe(struct rsnd_priv *priv) | |||
373 | } | 396 | } |
374 | 397 | ||
375 | ret = rsnd_mod_init(priv, rsnd_mod_get(dvc), &rsnd_dvc_ops, | 398 | ret = rsnd_mod_init(priv, rsnd_mod_get(dvc), &rsnd_dvc_ops, |
376 | clk, RSND_MOD_DVC, i); | 399 | clk, rsnd_mod_get_status, RSND_MOD_DVC, i); |
377 | if (ret) | 400 | if (ret) |
378 | goto rsnd_dvc_probe_done; | 401 | goto rsnd_dvc_probe_done; |
379 | 402 | ||
diff --git a/sound/soc/sh/rcar/gen.c b/sound/soc/sh/rcar/gen.c index ea24247eba73..46c0ba7b6414 100644 --- a/sound/soc/sh/rcar/gen.c +++ b/sound/soc/sh/rcar/gen.c | |||
@@ -104,23 +104,6 @@ void rsnd_write(struct rsnd_priv *priv, | |||
104 | if (!rsnd_is_accessible_reg(priv, gen, reg)) | 104 | if (!rsnd_is_accessible_reg(priv, gen, reg)) |
105 | return; | 105 | return; |
106 | 106 | ||
107 | regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data); | ||
108 | |||
109 | dev_dbg(dev, "w %s[%d] - %-18s (%4d) : %08x\n", | ||
110 | rsnd_mod_name(mod), rsnd_mod_id(mod), | ||
111 | rsnd_reg_name(gen, reg), reg, data); | ||
112 | } | ||
113 | |||
114 | void rsnd_force_write(struct rsnd_priv *priv, | ||
115 | struct rsnd_mod *mod, | ||
116 | enum rsnd_reg reg, u32 data) | ||
117 | { | ||
118 | struct device *dev = rsnd_priv_to_dev(priv); | ||
119 | struct rsnd_gen *gen = rsnd_priv_to_gen(priv); | ||
120 | |||
121 | if (!rsnd_is_accessible_reg(priv, gen, reg)) | ||
122 | return; | ||
123 | |||
124 | regmap_fields_force_write(gen->regs[reg], rsnd_mod_id(mod), data); | 107 | regmap_fields_force_write(gen->regs[reg], rsnd_mod_id(mod), data); |
125 | 108 | ||
126 | dev_dbg(dev, "w %s[%d] - %-18s (%4d) : %08x\n", | 109 | dev_dbg(dev, "w %s[%d] - %-18s (%4d) : %08x\n", |
@@ -137,8 +120,8 @@ void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, | |||
137 | if (!rsnd_is_accessible_reg(priv, gen, reg)) | 120 | if (!rsnd_is_accessible_reg(priv, gen, reg)) |
138 | return; | 121 | return; |
139 | 122 | ||
140 | regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod), | 123 | regmap_fields_force_update_bits(gen->regs[reg], |
141 | mask, data); | 124 | rsnd_mod_id(mod), mask, data); |
142 | 125 | ||
143 | dev_dbg(dev, "b %s[%d] - %-18s (%4d) : %08x/%08x\n", | 126 | dev_dbg(dev, "b %s[%d] - %-18s (%4d) : %08x/%08x\n", |
144 | rsnd_mod_name(mod), rsnd_mod_id(mod), | 127 | rsnd_mod_name(mod), rsnd_mod_id(mod), |
@@ -260,8 +243,43 @@ static int rsnd_gen2_probe(struct rsnd_priv *priv) | |||
260 | RSND_GEN_M_REG(SRC_SRCCR, 0x224, 0x40), | 243 | RSND_GEN_M_REG(SRC_SRCCR, 0x224, 0x40), |
261 | RSND_GEN_M_REG(SRC_BSDSR, 0x22c, 0x40), | 244 | RSND_GEN_M_REG(SRC_BSDSR, 0x22c, 0x40), |
262 | RSND_GEN_M_REG(SRC_BSISR, 0x238, 0x40), | 245 | RSND_GEN_M_REG(SRC_BSISR, 0x238, 0x40), |
246 | RSND_GEN_M_REG(CTU_SWRSR, 0x500, 0x100), | ||
263 | RSND_GEN_M_REG(CTU_CTUIR, 0x504, 0x100), | 247 | RSND_GEN_M_REG(CTU_CTUIR, 0x504, 0x100), |
264 | RSND_GEN_M_REG(CTU_ADINR, 0x508, 0x100), | 248 | RSND_GEN_M_REG(CTU_ADINR, 0x508, 0x100), |
249 | RSND_GEN_M_REG(CTU_CPMDR, 0x510, 0x100), | ||
250 | RSND_GEN_M_REG(CTU_SCMDR, 0x514, 0x100), | ||
251 | RSND_GEN_M_REG(CTU_SV00R, 0x518, 0x100), | ||
252 | RSND_GEN_M_REG(CTU_SV01R, 0x51c, 0x100), | ||
253 | RSND_GEN_M_REG(CTU_SV02R, 0x520, 0x100), | ||
254 | RSND_GEN_M_REG(CTU_SV03R, 0x524, 0x100), | ||
255 | RSND_GEN_M_REG(CTU_SV04R, 0x528, 0x100), | ||
256 | RSND_GEN_M_REG(CTU_SV05R, 0x52c, 0x100), | ||
257 | RSND_GEN_M_REG(CTU_SV06R, 0x530, 0x100), | ||
258 | RSND_GEN_M_REG(CTU_SV07R, 0x534, 0x100), | ||
259 | RSND_GEN_M_REG(CTU_SV10R, 0x538, 0x100), | ||
260 | RSND_GEN_M_REG(CTU_SV11R, 0x53c, 0x100), | ||
261 | RSND_GEN_M_REG(CTU_SV12R, 0x540, 0x100), | ||
262 | RSND_GEN_M_REG(CTU_SV13R, 0x544, 0x100), | ||
263 | RSND_GEN_M_REG(CTU_SV14R, 0x548, 0x100), | ||
264 | RSND_GEN_M_REG(CTU_SV15R, 0x54c, 0x100), | ||
265 | RSND_GEN_M_REG(CTU_SV16R, 0x550, 0x100), | ||
266 | RSND_GEN_M_REG(CTU_SV17R, 0x554, 0x100), | ||
267 | RSND_GEN_M_REG(CTU_SV20R, 0x558, 0x100), | ||
268 | RSND_GEN_M_REG(CTU_SV21R, 0x55c, 0x100), | ||
269 | RSND_GEN_M_REG(CTU_SV22R, 0x560, 0x100), | ||
270 | RSND_GEN_M_REG(CTU_SV23R, 0x564, 0x100), | ||
271 | RSND_GEN_M_REG(CTU_SV24R, 0x568, 0x100), | ||
272 | RSND_GEN_M_REG(CTU_SV25R, 0x56c, 0x100), | ||
273 | RSND_GEN_M_REG(CTU_SV26R, 0x570, 0x100), | ||
274 | RSND_GEN_M_REG(CTU_SV27R, 0x574, 0x100), | ||
275 | RSND_GEN_M_REG(CTU_SV30R, 0x578, 0x100), | ||
276 | RSND_GEN_M_REG(CTU_SV31R, 0x57c, 0x100), | ||
277 | RSND_GEN_M_REG(CTU_SV32R, 0x580, 0x100), | ||
278 | RSND_GEN_M_REG(CTU_SV33R, 0x584, 0x100), | ||
279 | RSND_GEN_M_REG(CTU_SV34R, 0x588, 0x100), | ||
280 | RSND_GEN_M_REG(CTU_SV35R, 0x58c, 0x100), | ||
281 | RSND_GEN_M_REG(CTU_SV36R, 0x590, 0x100), | ||
282 | RSND_GEN_M_REG(CTU_SV37R, 0x594, 0x100), | ||
265 | RSND_GEN_M_REG(MIX_SWRSR, 0xd00, 0x40), | 283 | RSND_GEN_M_REG(MIX_SWRSR, 0xd00, 0x40), |
266 | RSND_GEN_M_REG(MIX_MIXIR, 0xd04, 0x40), | 284 | RSND_GEN_M_REG(MIX_MIXIR, 0xd04, 0x40), |
267 | RSND_GEN_M_REG(MIX_ADINR, 0xd08, 0x40), | 285 | RSND_GEN_M_REG(MIX_ADINR, 0xd08, 0x40), |
diff --git a/sound/soc/sh/rcar/mix.c b/sound/soc/sh/rcar/mix.c index 65542b6a89e9..195fc7bb22af 100644 --- a/sound/soc/sh/rcar/mix.c +++ b/sound/soc/sh/rcar/mix.c | |||
@@ -51,7 +51,7 @@ static void rsnd_mix_volume_init(struct rsnd_dai_stream *io, | |||
51 | rsnd_mod_write(mod, MIX_MIXIR, 1); | 51 | rsnd_mod_write(mod, MIX_MIXIR, 1); |
52 | 52 | ||
53 | /* General Information */ | 53 | /* General Information */ |
54 | rsnd_mod_write(mod, MIX_ADINR, rsnd_get_adinr_chan(mod, io)); | 54 | rsnd_mod_write(mod, MIX_ADINR, rsnd_runtime_channel_after_ctu(io)); |
55 | 55 | ||
56 | /* volume step */ | 56 | /* volume step */ |
57 | rsnd_mod_write(mod, MIX_MIXMR, 0); | 57 | rsnd_mod_write(mod, MIX_MIXMR, 0); |
@@ -172,7 +172,7 @@ int rsnd_mix_probe(struct rsnd_priv *priv) | |||
172 | } | 172 | } |
173 | 173 | ||
174 | ret = rsnd_mod_init(priv, rsnd_mod_get(mix), &rsnd_mix_ops, | 174 | ret = rsnd_mod_init(priv, rsnd_mod_get(mix), &rsnd_mix_ops, |
175 | clk, RSND_MOD_MIX, i); | 175 | clk, rsnd_mod_get_status, RSND_MOD_MIX, i); |
176 | if (ret) | 176 | if (ret) |
177 | goto rsnd_mix_probe_done; | 177 | goto rsnd_mix_probe_done; |
178 | 178 | ||
diff --git a/sound/soc/sh/rcar/rsnd.h b/sound/soc/sh/rcar/rsnd.h index 317dd793149a..fc89a67258ca 100644 --- a/sound/soc/sh/rcar/rsnd.h +++ b/sound/soc/sh/rcar/rsnd.h | |||
@@ -86,8 +86,43 @@ enum rsnd_reg { | |||
86 | RSND_REG_CMD_BUSIF_DALIGN, /* Gen2 only */ | 86 | RSND_REG_CMD_BUSIF_DALIGN, /* Gen2 only */ |
87 | RSND_REG_CMD_ROUTE_SLCT, | 87 | RSND_REG_CMD_ROUTE_SLCT, |
88 | RSND_REG_CMDOUT_TIMSEL, /* Gen2 only */ | 88 | RSND_REG_CMDOUT_TIMSEL, /* Gen2 only */ |
89 | RSND_REG_CTU_SWRSR, | ||
89 | RSND_REG_CTU_CTUIR, | 90 | RSND_REG_CTU_CTUIR, |
90 | RSND_REG_CTU_ADINR, | 91 | RSND_REG_CTU_ADINR, |
92 | RSND_REG_CTU_CPMDR, | ||
93 | RSND_REG_CTU_SCMDR, | ||
94 | RSND_REG_CTU_SV00R, | ||
95 | RSND_REG_CTU_SV01R, | ||
96 | RSND_REG_CTU_SV02R, | ||
97 | RSND_REG_CTU_SV03R, | ||
98 | RSND_REG_CTU_SV04R, | ||
99 | RSND_REG_CTU_SV05R, | ||
100 | RSND_REG_CTU_SV06R, | ||
101 | RSND_REG_CTU_SV07R, | ||
102 | RSND_REG_CTU_SV10R, | ||
103 | RSND_REG_CTU_SV11R, | ||
104 | RSND_REG_CTU_SV12R, | ||
105 | RSND_REG_CTU_SV13R, | ||
106 | RSND_REG_CTU_SV14R, | ||
107 | RSND_REG_CTU_SV15R, | ||
108 | RSND_REG_CTU_SV16R, | ||
109 | RSND_REG_CTU_SV17R, | ||
110 | RSND_REG_CTU_SV20R, | ||
111 | RSND_REG_CTU_SV21R, | ||
112 | RSND_REG_CTU_SV22R, | ||
113 | RSND_REG_CTU_SV23R, | ||
114 | RSND_REG_CTU_SV24R, | ||
115 | RSND_REG_CTU_SV25R, | ||
116 | RSND_REG_CTU_SV26R, | ||
117 | RSND_REG_CTU_SV27R, | ||
118 | RSND_REG_CTU_SV30R, | ||
119 | RSND_REG_CTU_SV31R, | ||
120 | RSND_REG_CTU_SV32R, | ||
121 | RSND_REG_CTU_SV33R, | ||
122 | RSND_REG_CTU_SV34R, | ||
123 | RSND_REG_CTU_SV35R, | ||
124 | RSND_REG_CTU_SV36R, | ||
125 | RSND_REG_CTU_SV37R, | ||
91 | RSND_REG_MIX_SWRSR, | 126 | RSND_REG_MIX_SWRSR, |
92 | RSND_REG_MIX_MIXIR, | 127 | RSND_REG_MIX_MIXIR, |
93 | RSND_REG_MIX_ADINR, | 128 | RSND_REG_MIX_ADINR, |
@@ -147,8 +182,6 @@ struct rsnd_dai_stream; | |||
147 | rsnd_read(rsnd_mod_to_priv(m), m, RSND_REG_##r) | 182 | rsnd_read(rsnd_mod_to_priv(m), m, RSND_REG_##r) |
148 | #define rsnd_mod_write(m, r, d) \ | 183 | #define rsnd_mod_write(m, r, d) \ |
149 | rsnd_write(rsnd_mod_to_priv(m), m, RSND_REG_##r, d) | 184 | rsnd_write(rsnd_mod_to_priv(m), m, RSND_REG_##r, d) |
150 | #define rsnd_mod_force_write(m, r, d) \ | ||
151 | rsnd_force_write(rsnd_mod_to_priv(m), m, RSND_REG_##r, d) | ||
152 | #define rsnd_mod_bset(m, r, s, d) \ | 185 | #define rsnd_mod_bset(m, r, s, d) \ |
153 | rsnd_bset(rsnd_mod_to_priv(m), m, RSND_REG_##r, s, d) | 186 | rsnd_bset(rsnd_mod_to_priv(m), m, RSND_REG_##r, s, d) |
154 | 187 | ||
@@ -160,14 +193,13 @@ void rsnd_force_write(struct rsnd_priv *priv, struct rsnd_mod *mod, | |||
160 | void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg, | 193 | void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod, enum rsnd_reg reg, |
161 | u32 mask, u32 data); | 194 | u32 mask, u32 data); |
162 | u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io); | 195 | u32 rsnd_get_adinr_bit(struct rsnd_mod *mod, struct rsnd_dai_stream *io); |
163 | u32 rsnd_get_adinr_chan(struct rsnd_mod *mod, struct rsnd_dai_stream *io); | ||
164 | u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io); | 196 | u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io); |
165 | 197 | ||
166 | /* | 198 | /* |
167 | * R-Car DMA | 199 | * R-Car DMA |
168 | */ | 200 | */ |
169 | struct rsnd_mod *rsnd_dma_attach(struct rsnd_dai_stream *io, | 201 | int rsnd_dma_attach(struct rsnd_dai_stream *io, |
170 | struct rsnd_mod *mod, int id); | 202 | struct rsnd_mod *mod, struct rsnd_mod **dma_mod, int id); |
171 | int rsnd_dma_probe(struct rsnd_priv *priv); | 203 | int rsnd_dma_probe(struct rsnd_priv *priv); |
172 | struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node, | 204 | struct dma_chan *rsnd_dma_request_channel(struct device_node *of_node, |
173 | struct rsnd_mod *mod, char *name); | 205 | struct rsnd_mod *mod, char *name); |
@@ -214,6 +246,9 @@ struct rsnd_mod_ops { | |||
214 | int (*stop)(struct rsnd_mod *mod, | 246 | int (*stop)(struct rsnd_mod *mod, |
215 | struct rsnd_dai_stream *io, | 247 | struct rsnd_dai_stream *io, |
216 | struct rsnd_priv *priv); | 248 | struct rsnd_priv *priv); |
249 | int (*irq)(struct rsnd_mod *mod, | ||
250 | struct rsnd_dai_stream *io, | ||
251 | struct rsnd_priv *priv, int enable); | ||
217 | int (*pcm_new)(struct rsnd_mod *mod, | 252 | int (*pcm_new)(struct rsnd_mod *mod, |
218 | struct rsnd_dai_stream *io, | 253 | struct rsnd_dai_stream *io, |
219 | struct snd_soc_pcm_runtime *rtd); | 254 | struct snd_soc_pcm_runtime *rtd); |
@@ -233,47 +268,54 @@ struct rsnd_mod { | |||
233 | struct rsnd_mod_ops *ops; | 268 | struct rsnd_mod_ops *ops; |
234 | struct rsnd_priv *priv; | 269 | struct rsnd_priv *priv; |
235 | struct clk *clk; | 270 | struct clk *clk; |
271 | u32 *(*get_status)(struct rsnd_dai_stream *io, | ||
272 | struct rsnd_mod *mod, | ||
273 | enum rsnd_mod_type type); | ||
274 | u32 status; | ||
236 | }; | 275 | }; |
237 | /* | 276 | /* |
238 | * status | 277 | * status |
239 | * | 278 | * |
240 | * 0xH0000CBA | 279 | * 0xH0000CB0 |
241 | * | 280 | * |
242 | * A 0: probe 1: remove | ||
243 | * B 0: init 1: quit | 281 | * B 0: init 1: quit |
244 | * C 0: start 1: stop | 282 | * C 0: start 1: stop |
245 | * | 283 | * |
246 | * H is always called (see __rsnd_mod_call) | 284 | * H is always called (see __rsnd_mod_call) |
285 | * H 0: probe 1: remove | ||
247 | * H 0: pcm_new | 286 | * H 0: pcm_new |
248 | * H 0: fallback | 287 | * H 0: fallback |
249 | * H 0: hw_params | 288 | * H 0: hw_params |
250 | */ | 289 | */ |
251 | #define __rsnd_mod_shift_probe 0 | ||
252 | #define __rsnd_mod_shift_remove 0 | ||
253 | #define __rsnd_mod_shift_init 4 | 290 | #define __rsnd_mod_shift_init 4 |
254 | #define __rsnd_mod_shift_quit 4 | 291 | #define __rsnd_mod_shift_quit 4 |
255 | #define __rsnd_mod_shift_start 8 | 292 | #define __rsnd_mod_shift_start 8 |
256 | #define __rsnd_mod_shift_stop 8 | 293 | #define __rsnd_mod_shift_stop 8 |
294 | #define __rsnd_mod_shift_probe 28 /* always called */ | ||
295 | #define __rsnd_mod_shift_remove 28 /* always called */ | ||
296 | #define __rsnd_mod_shift_irq 28 /* always called */ | ||
257 | #define __rsnd_mod_shift_pcm_new 28 /* always called */ | 297 | #define __rsnd_mod_shift_pcm_new 28 /* always called */ |
258 | #define __rsnd_mod_shift_fallback 28 /* always called */ | 298 | #define __rsnd_mod_shift_fallback 28 /* always called */ |
259 | #define __rsnd_mod_shift_hw_params 28 /* always called */ | 299 | #define __rsnd_mod_shift_hw_params 28 /* always called */ |
260 | 300 | ||
261 | #define __rsnd_mod_add_probe 1 | 301 | #define __rsnd_mod_add_probe 0 |
262 | #define __rsnd_mod_add_remove -1 | 302 | #define __rsnd_mod_add_remove 0 |
263 | #define __rsnd_mod_add_init 1 | 303 | #define __rsnd_mod_add_init 1 |
264 | #define __rsnd_mod_add_quit -1 | 304 | #define __rsnd_mod_add_quit -1 |
265 | #define __rsnd_mod_add_start 1 | 305 | #define __rsnd_mod_add_start 1 |
266 | #define __rsnd_mod_add_stop -1 | 306 | #define __rsnd_mod_add_stop -1 |
307 | #define __rsnd_mod_add_irq 0 | ||
267 | #define __rsnd_mod_add_pcm_new 0 | 308 | #define __rsnd_mod_add_pcm_new 0 |
268 | #define __rsnd_mod_add_fallback 0 | 309 | #define __rsnd_mod_add_fallback 0 |
269 | #define __rsnd_mod_add_hw_params 0 | 310 | #define __rsnd_mod_add_hw_params 0 |
270 | 311 | ||
271 | #define __rsnd_mod_call_probe 0 | 312 | #define __rsnd_mod_call_probe 0 |
272 | #define __rsnd_mod_call_remove 1 | 313 | #define __rsnd_mod_call_remove 0 |
273 | #define __rsnd_mod_call_init 0 | 314 | #define __rsnd_mod_call_init 0 |
274 | #define __rsnd_mod_call_quit 1 | 315 | #define __rsnd_mod_call_quit 1 |
275 | #define __rsnd_mod_call_start 0 | 316 | #define __rsnd_mod_call_start 0 |
276 | #define __rsnd_mod_call_stop 1 | 317 | #define __rsnd_mod_call_stop 1 |
318 | #define __rsnd_mod_call_irq 0 | ||
277 | #define __rsnd_mod_call_pcm_new 0 | 319 | #define __rsnd_mod_call_pcm_new 0 |
278 | #define __rsnd_mod_call_fallback 0 | 320 | #define __rsnd_mod_call_fallback 0 |
279 | #define __rsnd_mod_call_hw_params 0 | 321 | #define __rsnd_mod_call_hw_params 0 |
@@ -286,10 +328,13 @@ struct rsnd_mod { | |||
286 | 328 | ||
287 | int rsnd_mod_init(struct rsnd_priv *priv, | 329 | int rsnd_mod_init(struct rsnd_priv *priv, |
288 | struct rsnd_mod *mod, | 330 | struct rsnd_mod *mod, |
289 | struct rsnd_mod_ops *ops, | 331 | struct rsnd_mod_ops *ops, |
290 | struct clk *clk, | 332 | struct clk *clk, |
291 | enum rsnd_mod_type type, | 333 | u32* (*get_status)(struct rsnd_dai_stream *io, |
292 | int id); | 334 | struct rsnd_mod *mod, |
335 | enum rsnd_mod_type type), | ||
336 | enum rsnd_mod_type type, | ||
337 | int id); | ||
293 | void rsnd_mod_quit(struct rsnd_mod *mod); | 338 | void rsnd_mod_quit(struct rsnd_mod *mod); |
294 | char *rsnd_mod_name(struct rsnd_mod *mod); | 339 | char *rsnd_mod_name(struct rsnd_mod *mod); |
295 | struct dma_chan *rsnd_mod_dma_req(struct rsnd_dai_stream *io, | 340 | struct dma_chan *rsnd_mod_dma_req(struct rsnd_dai_stream *io, |
@@ -297,6 +342,10 @@ struct dma_chan *rsnd_mod_dma_req(struct rsnd_dai_stream *io, | |||
297 | void rsnd_mod_interrupt(struct rsnd_mod *mod, | 342 | void rsnd_mod_interrupt(struct rsnd_mod *mod, |
298 | void (*callback)(struct rsnd_mod *mod, | 343 | void (*callback)(struct rsnd_mod *mod, |
299 | struct rsnd_dai_stream *io)); | 344 | struct rsnd_dai_stream *io)); |
345 | u32 *rsnd_mod_get_status(struct rsnd_dai_stream *io, | ||
346 | struct rsnd_mod *mod, | ||
347 | enum rsnd_mod_type type); | ||
348 | |||
300 | void rsnd_parse_connect_common(struct rsnd_dai *rdai, | 349 | void rsnd_parse_connect_common(struct rsnd_dai *rdai, |
301 | struct rsnd_mod* (*mod_get)(struct rsnd_priv *priv, int id), | 350 | struct rsnd_mod* (*mod_get)(struct rsnd_priv *priv, int id), |
302 | struct device_node *node, | 351 | struct device_node *node, |
@@ -306,9 +355,14 @@ void rsnd_parse_connect_common(struct rsnd_dai *rdai, | |||
306 | void rsnd_set_slot(struct rsnd_dai *rdai, | 355 | void rsnd_set_slot(struct rsnd_dai *rdai, |
307 | int slots, int slots_total); | 356 | int slots, int slots_total); |
308 | int rsnd_get_slot(struct rsnd_dai_stream *io); | 357 | int rsnd_get_slot(struct rsnd_dai_stream *io); |
309 | int rsnd_get_slot_width(struct rsnd_dai_stream *io); | ||
310 | int rsnd_get_slot_num(struct rsnd_dai_stream *io); | 358 | int rsnd_get_slot_num(struct rsnd_dai_stream *io); |
311 | 359 | ||
360 | int rsnd_runtime_channel_original(struct rsnd_dai_stream *io); | ||
361 | int rsnd_runtime_channel_after_ctu(struct rsnd_dai_stream *io); | ||
362 | int rsnd_runtime_channel_for_ssi(struct rsnd_dai_stream *io); | ||
363 | int rsnd_runtime_is_ssi_multi(struct rsnd_dai_stream *io); | ||
364 | int rsnd_runtime_is_ssi_tdm(struct rsnd_dai_stream *io); | ||
365 | |||
312 | /* | 366 | /* |
313 | * R-Car sound DAI | 367 | * R-Car sound DAI |
314 | */ | 368 | */ |
@@ -319,7 +373,7 @@ struct rsnd_dai_stream { | |||
319 | struct rsnd_mod *mod[RSND_MOD_MAX]; | 373 | struct rsnd_mod *mod[RSND_MOD_MAX]; |
320 | struct rsnd_dai_path_info *info; /* rcar_snd.h */ | 374 | struct rsnd_dai_path_info *info; /* rcar_snd.h */ |
321 | struct rsnd_dai *rdai; | 375 | struct rsnd_dai *rdai; |
322 | u32 mod_status[RSND_MOD_MAX]; | 376 | u32 parent_ssi_status; |
323 | int byte_pos; | 377 | int byte_pos; |
324 | int period_pos; | 378 | int period_pos; |
325 | int byte_per_period; | 379 | int byte_per_period; |
@@ -392,12 +446,10 @@ int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod); | |||
392 | int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate); | 446 | int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate); |
393 | int rsnd_adg_probe(struct rsnd_priv *priv); | 447 | int rsnd_adg_probe(struct rsnd_priv *priv); |
394 | void rsnd_adg_remove(struct rsnd_priv *priv); | 448 | void rsnd_adg_remove(struct rsnd_priv *priv); |
395 | int rsnd_adg_set_convert_clk_gen2(struct rsnd_mod *mod, | 449 | int rsnd_adg_set_src_timesel_gen2(struct rsnd_mod *src_mod, |
396 | struct rsnd_dai_stream *io, | 450 | struct rsnd_dai_stream *io, |
397 | unsigned int src_rate, | 451 | unsigned int in_rate, |
398 | unsigned int dst_rate); | 452 | unsigned int out_rate); |
399 | int rsnd_adg_set_convert_timing_gen2(struct rsnd_mod *mod, | ||
400 | struct rsnd_dai_stream *io); | ||
401 | int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *mod, | 453 | int rsnd_adg_set_cmd_timsel_gen2(struct rsnd_mod *mod, |
402 | struct rsnd_dai_stream *io); | 454 | struct rsnd_dai_stream *io); |
403 | 455 | ||
@@ -498,10 +550,10 @@ struct rsnd_kctrl_cfg { | |||
498 | struct snd_kcontrol *kctrl; | 550 | struct snd_kcontrol *kctrl; |
499 | }; | 551 | }; |
500 | 552 | ||
501 | #define RSND_DVC_CHANNELS 8 | 553 | #define RSND_MAX_CHANNELS 8 |
502 | struct rsnd_kctrl_cfg_m { | 554 | struct rsnd_kctrl_cfg_m { |
503 | struct rsnd_kctrl_cfg cfg; | 555 | struct rsnd_kctrl_cfg cfg; |
504 | u32 val[RSND_DVC_CHANNELS]; | 556 | u32 val[RSND_MAX_CHANNELS]; |
505 | }; | 557 | }; |
506 | 558 | ||
507 | struct rsnd_kctrl_cfg_s { | 559 | struct rsnd_kctrl_cfg_s { |
@@ -547,7 +599,7 @@ void rsnd_ssi_remove(struct rsnd_priv *priv); | |||
547 | struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id); | 599 | struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id); |
548 | int rsnd_ssi_is_dma_mode(struct rsnd_mod *mod); | 600 | int rsnd_ssi_is_dma_mode(struct rsnd_mod *mod); |
549 | int rsnd_ssi_use_busif(struct rsnd_dai_stream *io); | 601 | int rsnd_ssi_use_busif(struct rsnd_dai_stream *io); |
550 | u32 rsnd_ssi_multi_slaves(struct rsnd_dai_stream *io); | 602 | u32 rsnd_ssi_multi_slaves_runtime(struct rsnd_dai_stream *io); |
551 | 603 | ||
552 | #define rsnd_ssi_is_pin_sharing(io) \ | 604 | #define rsnd_ssi_is_pin_sharing(io) \ |
553 | __rsnd_ssi_is_pin_sharing(rsnd_io_to_mod_ssi(io)) | 605 | __rsnd_ssi_is_pin_sharing(rsnd_io_to_mod_ssi(io)) |
@@ -573,9 +625,13 @@ void rsnd_ssiu_remove(struct rsnd_priv *priv); | |||
573 | int rsnd_src_probe(struct rsnd_priv *priv); | 625 | int rsnd_src_probe(struct rsnd_priv *priv); |
574 | void rsnd_src_remove(struct rsnd_priv *priv); | 626 | void rsnd_src_remove(struct rsnd_priv *priv); |
575 | struct rsnd_mod *rsnd_src_mod_get(struct rsnd_priv *priv, int id); | 627 | struct rsnd_mod *rsnd_src_mod_get(struct rsnd_priv *priv, int id); |
576 | unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv, | 628 | |
577 | struct rsnd_dai_stream *io, | 629 | #define rsnd_src_get_in_rate(priv, io) rsnd_src_get_rate(priv, io, 1) |
578 | struct snd_pcm_runtime *runtime); | 630 | #define rsnd_src_get_out_rate(priv, io) rsnd_src_get_rate(priv, io, 0) |
631 | unsigned int rsnd_src_get_rate(struct rsnd_priv *priv, | ||
632 | struct rsnd_dai_stream *io, | ||
633 | int is_in); | ||
634 | |||
579 | #define rsnd_src_of_node(priv) \ | 635 | #define rsnd_src_of_node(priv) \ |
580 | of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,src") | 636 | of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,src") |
581 | #define rsnd_parse_connect_src(rdai, playback, capture) \ | 637 | #define rsnd_parse_connect_src(rdai, playback, capture) \ |
@@ -588,6 +644,7 @@ unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv, | |||
588 | */ | 644 | */ |
589 | int rsnd_ctu_probe(struct rsnd_priv *priv); | 645 | int rsnd_ctu_probe(struct rsnd_priv *priv); |
590 | void rsnd_ctu_remove(struct rsnd_priv *priv); | 646 | void rsnd_ctu_remove(struct rsnd_priv *priv); |
647 | int rsnd_ctu_converted_channel(struct rsnd_mod *mod); | ||
591 | struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id); | 648 | struct rsnd_mod *rsnd_ctu_mod_get(struct rsnd_priv *priv, int id); |
592 | #define rsnd_ctu_of_node(priv) \ | 649 | #define rsnd_ctu_of_node(priv) \ |
593 | of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ctu") | 650 | of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ctu") |
diff --git a/sound/soc/sh/rcar/rsrc-card.c b/sound/soc/sh/rcar/rsrc-card.c index 8a357fdf1077..1bc7ecfc42a9 100644 --- a/sound/soc/sh/rcar/rsrc-card.c +++ b/sound/soc/sh/rcar/rsrc-card.c | |||
@@ -66,12 +66,12 @@ struct rsrc_card_priv { | |||
66 | struct snd_soc_dai_link *dai_link; | 66 | struct snd_soc_dai_link *dai_link; |
67 | int dai_num; | 67 | int dai_num; |
68 | u32 convert_rate; | 68 | u32 convert_rate; |
69 | u32 convert_channels; | ||
69 | }; | 70 | }; |
70 | 71 | ||
71 | #define rsrc_priv_to_dev(priv) ((priv)->snd_card.dev) | 72 | #define rsrc_priv_to_dev(priv) ((priv)->snd_card.dev) |
72 | #define rsrc_priv_to_link(priv, i) ((priv)->snd_card.dai_link + (i)) | 73 | #define rsrc_priv_to_link(priv, i) ((priv)->snd_card.dai_link + (i)) |
73 | #define rsrc_priv_to_props(priv, i) ((priv)->dai_props + (i)) | 74 | #define rsrc_priv_to_props(priv, i) ((priv)->dai_props + (i)) |
74 | #define rsrc_dev_to_of_data(dev) (of_match_device(rsrc_card_of_match, (dev))->data) | ||
75 | 75 | ||
76 | static int rsrc_card_startup(struct snd_pcm_substream *substream) | 76 | static int rsrc_card_startup(struct snd_pcm_substream *substream) |
77 | { | 77 | { |
@@ -145,11 +145,16 @@ static int rsrc_card_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, | |||
145 | struct rsrc_card_priv *priv = snd_soc_card_get_drvdata(rtd->card); | 145 | struct rsrc_card_priv *priv = snd_soc_card_get_drvdata(rtd->card); |
146 | struct snd_interval *rate = hw_param_interval(params, | 146 | struct snd_interval *rate = hw_param_interval(params, |
147 | SNDRV_PCM_HW_PARAM_RATE); | 147 | SNDRV_PCM_HW_PARAM_RATE); |
148 | struct snd_interval *channels = hw_param_interval(params, | ||
149 | SNDRV_PCM_HW_PARAM_CHANNELS); | ||
148 | 150 | ||
149 | if (!priv->convert_rate) | 151 | if (priv->convert_rate) |
150 | return 0; | 152 | rate->min = |
153 | rate->max = priv->convert_rate; | ||
151 | 154 | ||
152 | rate->min = rate->max = priv->convert_rate; | 155 | if (priv->convert_channels) |
156 | channels->min = | ||
157 | channels->max = priv->convert_channels; | ||
153 | 158 | ||
154 | return 0; | 159 | return 0; |
155 | } | 160 | } |
@@ -246,7 +251,7 @@ static int rsrc_card_parse_links(struct device_node *np, | |||
246 | struct device *dev = rsrc_priv_to_dev(priv); | 251 | struct device *dev = rsrc_priv_to_dev(priv); |
247 | const struct rsrc_card_of_data *of_data; | 252 | const struct rsrc_card_of_data *of_data; |
248 | 253 | ||
249 | of_data = rsrc_dev_to_of_data(dev); | 254 | of_data = of_device_get_match_data(dev); |
250 | 255 | ||
251 | /* FE is dummy */ | 256 | /* FE is dummy */ |
252 | dai_link->cpu_of_node = NULL; | 257 | dai_link->cpu_of_node = NULL; |
@@ -396,7 +401,7 @@ static int rsrc_card_parse_of(struct device_node *node, | |||
396 | struct rsrc_card_priv *priv, | 401 | struct rsrc_card_priv *priv, |
397 | struct device *dev) | 402 | struct device *dev) |
398 | { | 403 | { |
399 | const struct rsrc_card_of_data *of_data = rsrc_dev_to_of_data(dev); | 404 | const struct rsrc_card_of_data *of_data = of_device_get_match_data(dev); |
400 | struct rsrc_card_dai *props; | 405 | struct rsrc_card_dai *props; |
401 | struct snd_soc_dai_link *links; | 406 | struct snd_soc_dai_link *links; |
402 | int ret; | 407 | int ret; |
@@ -437,9 +442,13 @@ static int rsrc_card_parse_of(struct device_node *node, | |||
437 | /* sampling rate convert */ | 442 | /* sampling rate convert */ |
438 | of_property_read_u32(node, "convert-rate", &priv->convert_rate); | 443 | of_property_read_u32(node, "convert-rate", &priv->convert_rate); |
439 | 444 | ||
440 | dev_dbg(dev, "New rsrc-audio-card: %s (%d)\n", | 445 | /* channels transfer */ |
441 | priv->snd_card.name ? priv->snd_card.name : "", | 446 | of_property_read_u32(node, "convert-channels", &priv->convert_channels); |
442 | priv->convert_rate); | 447 | |
448 | dev_dbg(dev, "New rsrc-audio-card: %s\n", | ||
449 | priv->snd_card.name ? priv->snd_card.name : ""); | ||
450 | dev_dbg(dev, "SRC : convert_rate %d\n", priv->convert_rate); | ||
451 | dev_dbg(dev, "CTU : convert_channels %d\n", priv->convert_channels); | ||
443 | 452 | ||
444 | ret = rsrc_card_dai_link_of(node, priv); | 453 | ret = rsrc_card_dai_link_of(node, priv); |
445 | if (ret < 0) | 454 | if (ret < 0) |
diff --git a/sound/soc/sh/rcar/src.c b/sound/soc/sh/rcar/src.c index 5eda056d9f20..15d6ffe8be74 100644 --- a/sound/soc/sh/rcar/src.c +++ b/sound/soc/sh/rcar/src.c | |||
@@ -25,7 +25,6 @@ struct rsnd_src { | |||
25 | struct rsnd_kctrl_cfg_s sen; /* sync convert enable */ | 25 | struct rsnd_kctrl_cfg_s sen; /* sync convert enable */ |
26 | struct rsnd_kctrl_cfg_s sync; /* sync convert */ | 26 | struct rsnd_kctrl_cfg_s sync; /* sync convert */ |
27 | u32 convert_rate; /* sampling rate convert */ | 27 | u32 convert_rate; /* sampling rate convert */ |
28 | int err; | ||
29 | int irq; | 28 | int irq; |
30 | }; | 29 | }; |
31 | 30 | ||
@@ -34,7 +33,7 @@ struct rsnd_src { | |||
34 | #define rsnd_src_get(priv, id) ((struct rsnd_src *)(priv->src) + id) | 33 | #define rsnd_src_get(priv, id) ((struct rsnd_src *)(priv->src) + id) |
35 | #define rsnd_src_to_dma(src) ((src)->dma) | 34 | #define rsnd_src_to_dma(src) ((src)->dma) |
36 | #define rsnd_src_nr(priv) ((priv)->src_nr) | 35 | #define rsnd_src_nr(priv) ((priv)->src_nr) |
37 | #define rsnd_enable_sync_convert(src) ((src)->sen.val) | 36 | #define rsnd_src_sync_is_enabled(mod) (rsnd_mod_to_src(mod)->sen.val) |
38 | 37 | ||
39 | #define rsnd_mod_to_src(_mod) \ | 38 | #define rsnd_mod_to_src(_mod) \ |
40 | container_of((_mod), struct rsnd_src, mod) | 39 | container_of((_mod), struct rsnd_src, mod) |
@@ -94,15 +93,16 @@ static struct dma_chan *rsnd_src_dma_req(struct rsnd_dai_stream *io, | |||
94 | } | 93 | } |
95 | 94 | ||
96 | static u32 rsnd_src_convert_rate(struct rsnd_dai_stream *io, | 95 | static u32 rsnd_src_convert_rate(struct rsnd_dai_stream *io, |
97 | struct rsnd_src *src) | 96 | struct rsnd_mod *mod) |
98 | { | 97 | { |
99 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | 98 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
99 | struct rsnd_src *src = rsnd_mod_to_src(mod); | ||
100 | u32 convert_rate; | 100 | u32 convert_rate; |
101 | 101 | ||
102 | if (!runtime) | 102 | if (!runtime) |
103 | return 0; | 103 | return 0; |
104 | 104 | ||
105 | if (!rsnd_enable_sync_convert(src)) | 105 | if (!rsnd_src_sync_is_enabled(mod)) |
106 | return src->convert_rate; | 106 | return src->convert_rate; |
107 | 107 | ||
108 | convert_rate = src->sync.val; | 108 | convert_rate = src->sync.val; |
@@ -116,23 +116,33 @@ static u32 rsnd_src_convert_rate(struct rsnd_dai_stream *io, | |||
116 | return convert_rate; | 116 | return convert_rate; |
117 | } | 117 | } |
118 | 118 | ||
119 | unsigned int rsnd_src_get_ssi_rate(struct rsnd_priv *priv, | 119 | unsigned int rsnd_src_get_rate(struct rsnd_priv *priv, |
120 | struct rsnd_dai_stream *io, | 120 | struct rsnd_dai_stream *io, |
121 | struct snd_pcm_runtime *runtime) | 121 | int is_in) |
122 | { | 122 | { |
123 | struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io); | 123 | struct rsnd_mod *src_mod = rsnd_io_to_mod_src(io); |
124 | struct rsnd_src *src; | 124 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
125 | unsigned int rate = 0; | 125 | unsigned int rate = 0; |
126 | int is_play = rsnd_io_is_play(io); | ||
126 | 127 | ||
127 | if (src_mod) { | 128 | /* |
128 | src = rsnd_mod_to_src(src_mod); | 129 | * |
130 | * Playback | ||
131 | * runtime_rate -> [SRC] -> convert_rate | ||
132 | * | ||
133 | * Capture | ||
134 | * convert_rate -> [SRC] -> runtime_rate | ||
135 | */ | ||
129 | 136 | ||
130 | /* | 137 | if (is_play == is_in) |
131 | * return convert rate if SRC is used, | 138 | return runtime->rate; |
132 | * otherwise, return runtime->rate as usual | 139 | |
133 | */ | 140 | /* |
134 | rate = rsnd_src_convert_rate(io, src); | 141 | * return convert rate if SRC is used, |
135 | } | 142 | * otherwise, return runtime->rate as usual |
143 | */ | ||
144 | if (src_mod) | ||
145 | rate = rsnd_src_convert_rate(io, src_mod); | ||
136 | 146 | ||
137 | if (!rate) | 147 | if (!rate) |
138 | rate = runtime->rate; | 148 | rate = runtime->rate; |
@@ -179,8 +189,7 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io, | |||
179 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | 189 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); |
180 | struct device *dev = rsnd_priv_to_dev(priv); | 190 | struct device *dev = rsnd_priv_to_dev(priv); |
181 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | 191 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
182 | struct rsnd_src *src = rsnd_mod_to_src(mod); | 192 | u32 fin, fout; |
183 | u32 convert_rate = rsnd_src_convert_rate(io, src); | ||
184 | u32 ifscr, fsrate, adinr; | 193 | u32 ifscr, fsrate, adinr; |
185 | u32 cr, route; | 194 | u32 cr, route; |
186 | u32 bsdsr, bsisr; | 195 | u32 bsdsr, bsisr; |
@@ -189,13 +198,16 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io, | |||
189 | if (!runtime) | 198 | if (!runtime) |
190 | return; | 199 | return; |
191 | 200 | ||
201 | fin = rsnd_src_get_in_rate(priv, io); | ||
202 | fout = rsnd_src_get_out_rate(priv, io); | ||
203 | |||
192 | /* 6 - 1/6 are very enough ratio for SRC_BSDSR */ | 204 | /* 6 - 1/6 are very enough ratio for SRC_BSDSR */ |
193 | if (!convert_rate) | 205 | if (fin == fout) |
194 | ratio = 0; | 206 | ratio = 0; |
195 | else if (convert_rate > runtime->rate) | 207 | else if (fin > fout) |
196 | ratio = 100 * convert_rate / runtime->rate; | 208 | ratio = 100 * fin / fout; |
197 | else | 209 | else |
198 | ratio = 100 * runtime->rate / convert_rate; | 210 | ratio = 100 * fout / fin; |
199 | 211 | ||
200 | if (ratio > 600) { | 212 | if (ratio > 600) { |
201 | dev_err(dev, "FSO/FSI ratio error\n"); | 213 | dev_err(dev, "FSO/FSI ratio error\n"); |
@@ -206,16 +218,16 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io, | |||
206 | * SRC_ADINR | 218 | * SRC_ADINR |
207 | */ | 219 | */ |
208 | adinr = rsnd_get_adinr_bit(mod, io) | | 220 | adinr = rsnd_get_adinr_bit(mod, io) | |
209 | rsnd_get_adinr_chan(mod, io); | 221 | rsnd_runtime_channel_original(io); |
210 | 222 | ||
211 | /* | 223 | /* |
212 | * SRC_IFSCR / SRC_IFSVR | 224 | * SRC_IFSCR / SRC_IFSVR |
213 | */ | 225 | */ |
214 | ifscr = 0; | 226 | ifscr = 0; |
215 | fsrate = 0; | 227 | fsrate = 0; |
216 | if (convert_rate) { | 228 | if (fin != fout) { |
217 | ifscr = 1; | 229 | ifscr = 1; |
218 | fsrate = 0x0400000 / convert_rate * runtime->rate; | 230 | fsrate = 0x0400000 / fout * fin; |
219 | } | 231 | } |
220 | 232 | ||
221 | /* | 233 | /* |
@@ -223,10 +235,10 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io, | |||
223 | */ | 235 | */ |
224 | cr = 0x00011110; | 236 | cr = 0x00011110; |
225 | route = 0x0; | 237 | route = 0x0; |
226 | if (convert_rate) { | 238 | if (fin != fout) { |
227 | route = 0x1; | 239 | route = 0x1; |
228 | 240 | ||
229 | if (rsnd_enable_sync_convert(src)) { | 241 | if (rsnd_src_sync_is_enabled(mod)) { |
230 | cr |= 0x1; | 242 | cr |= 0x1; |
231 | route |= rsnd_io_is_play(io) ? | 243 | route |= rsnd_io_is_play(io) ? |
232 | (0x1 << 24) : (0x1 << 25); | 244 | (0x1 << 24) : (0x1 << 25); |
@@ -250,6 +262,8 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io, | |||
250 | break; | 262 | break; |
251 | } | 263 | } |
252 | 264 | ||
265 | rsnd_mod_write(mod, SRC_ROUTE_MODE0, route); | ||
266 | |||
253 | rsnd_mod_write(mod, SRC_SRCIR, 1); /* initialize */ | 267 | rsnd_mod_write(mod, SRC_SRCIR, 1); /* initialize */ |
254 | rsnd_mod_write(mod, SRC_ADINR, adinr); | 268 | rsnd_mod_write(mod, SRC_ADINR, adinr); |
255 | rsnd_mod_write(mod, SRC_IFSCR, ifscr); | 269 | rsnd_mod_write(mod, SRC_IFSCR, ifscr); |
@@ -259,22 +273,17 @@ static void rsnd_src_set_convert_rate(struct rsnd_dai_stream *io, | |||
259 | rsnd_mod_write(mod, SRC_BSISR, bsisr); | 273 | rsnd_mod_write(mod, SRC_BSISR, bsisr); |
260 | rsnd_mod_write(mod, SRC_SRCIR, 0); /* cancel initialize */ | 274 | rsnd_mod_write(mod, SRC_SRCIR, 0); /* cancel initialize */ |
261 | 275 | ||
262 | rsnd_mod_write(mod, SRC_ROUTE_MODE0, route); | ||
263 | rsnd_mod_write(mod, SRC_I_BUSIF_MODE, 1); | 276 | rsnd_mod_write(mod, SRC_I_BUSIF_MODE, 1); |
264 | rsnd_mod_write(mod, SRC_O_BUSIF_MODE, 1); | 277 | rsnd_mod_write(mod, SRC_O_BUSIF_MODE, 1); |
265 | rsnd_mod_write(mod, SRC_BUSIF_DALIGN, rsnd_get_dalign(mod, io)); | 278 | rsnd_mod_write(mod, SRC_BUSIF_DALIGN, rsnd_get_dalign(mod, io)); |
266 | 279 | ||
267 | if (convert_rate) | 280 | rsnd_adg_set_src_timesel_gen2(mod, io, fin, fout); |
268 | rsnd_adg_set_convert_clk_gen2(mod, io, | ||
269 | runtime->rate, | ||
270 | convert_rate); | ||
271 | else | ||
272 | rsnd_adg_set_convert_timing_gen2(mod, io); | ||
273 | } | 281 | } |
274 | 282 | ||
275 | #define rsnd_src_irq_enable(mod) rsnd_src_irq_ctrol(mod, 1) | 283 | static int rsnd_src_irq(struct rsnd_mod *mod, |
276 | #define rsnd_src_irq_disable(mod) rsnd_src_irq_ctrol(mod, 0) | 284 | struct rsnd_dai_stream *io, |
277 | static void rsnd_src_irq_ctrol(struct rsnd_mod *mod, int enable) | 285 | struct rsnd_priv *priv, |
286 | int enable) | ||
278 | { | 287 | { |
279 | struct rsnd_src *src = rsnd_mod_to_src(mod); | 288 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
280 | u32 sys_int_val, int_val, sys_int_mask; | 289 | u32 sys_int_val, int_val, sys_int_mask; |
@@ -298,14 +307,16 @@ static void rsnd_src_irq_ctrol(struct rsnd_mod *mod, int enable) | |||
298 | /* | 307 | /* |
299 | * WORKAROUND | 308 | * WORKAROUND |
300 | * | 309 | * |
301 | * ignore over flow error when rsnd_enable_sync_convert() | 310 | * ignore over flow error when rsnd_src_sync_is_enabled() |
302 | */ | 311 | */ |
303 | if (rsnd_enable_sync_convert(src)) | 312 | if (rsnd_src_sync_is_enabled(mod)) |
304 | sys_int_val = sys_int_val & 0xffff; | 313 | sys_int_val = sys_int_val & 0xffff; |
305 | 314 | ||
306 | rsnd_mod_write(mod, SRC_INT_ENABLE0, int_val); | 315 | rsnd_mod_write(mod, SRC_INT_ENABLE0, int_val); |
307 | rsnd_mod_bset(mod, SCU_SYS_INT_EN0, sys_int_mask, sys_int_val); | 316 | rsnd_mod_bset(mod, SCU_SYS_INT_EN0, sys_int_mask, sys_int_val); |
308 | rsnd_mod_bset(mod, SCU_SYS_INT_EN1, sys_int_mask, sys_int_val); | 317 | rsnd_mod_bset(mod, SCU_SYS_INT_EN1, sys_int_mask, sys_int_val); |
318 | |||
319 | return 0; | ||
309 | } | 320 | } |
310 | 321 | ||
311 | static void rsnd_src_status_clear(struct rsnd_mod *mod) | 322 | static void rsnd_src_status_clear(struct rsnd_mod *mod) |
@@ -316,9 +327,8 @@ static void rsnd_src_status_clear(struct rsnd_mod *mod) | |||
316 | rsnd_mod_bset(mod, SCU_SYS_STATUS1, val, val); | 327 | rsnd_mod_bset(mod, SCU_SYS_STATUS1, val, val); |
317 | } | 328 | } |
318 | 329 | ||
319 | static bool rsnd_src_record_error(struct rsnd_mod *mod) | 330 | static bool rsnd_src_error_occurred(struct rsnd_mod *mod) |
320 | { | 331 | { |
321 | struct rsnd_src *src = rsnd_mod_to_src(mod); | ||
322 | u32 val0, val1; | 332 | u32 val0, val1; |
323 | bool ret = false; | 333 | bool ret = false; |
324 | 334 | ||
@@ -327,18 +337,14 @@ static bool rsnd_src_record_error(struct rsnd_mod *mod) | |||
327 | /* | 337 | /* |
328 | * WORKAROUND | 338 | * WORKAROUND |
329 | * | 339 | * |
330 | * ignore over flow error when rsnd_enable_sync_convert() | 340 | * ignore over flow error when rsnd_src_sync_is_enabled() |
331 | */ | 341 | */ |
332 | if (rsnd_enable_sync_convert(src)) | 342 | if (rsnd_src_sync_is_enabled(mod)) |
333 | val0 = val0 & 0xffff; | 343 | val0 = val0 & 0xffff; |
334 | 344 | ||
335 | if ((rsnd_mod_read(mod, SCU_SYS_STATUS0) & val0) || | 345 | if ((rsnd_mod_read(mod, SCU_SYS_STATUS0) & val0) || |
336 | (rsnd_mod_read(mod, SCU_SYS_STATUS1) & val1)) { | 346 | (rsnd_mod_read(mod, SCU_SYS_STATUS1) & val1)) |
337 | struct rsnd_src *src = rsnd_mod_to_src(mod); | ||
338 | |||
339 | src->err++; | ||
340 | ret = true; | 347 | ret = true; |
341 | } | ||
342 | 348 | ||
343 | return ret; | 349 | return ret; |
344 | } | 350 | } |
@@ -347,7 +353,6 @@ static int rsnd_src_start(struct rsnd_mod *mod, | |||
347 | struct rsnd_dai_stream *io, | 353 | struct rsnd_dai_stream *io, |
348 | struct rsnd_priv *priv) | 354 | struct rsnd_priv *priv) |
349 | { | 355 | { |
350 | struct rsnd_src *src = rsnd_mod_to_src(mod); | ||
351 | u32 val; | 356 | u32 val; |
352 | 357 | ||
353 | /* | 358 | /* |
@@ -355,7 +360,7 @@ static int rsnd_src_start(struct rsnd_mod *mod, | |||
355 | * | 360 | * |
356 | * Enable SRC output if you want to use sync convert together with DVC | 361 | * Enable SRC output if you want to use sync convert together with DVC |
357 | */ | 362 | */ |
358 | val = (rsnd_io_to_mod_dvc(io) && !rsnd_enable_sync_convert(src)) ? | 363 | val = (rsnd_io_to_mod_dvc(io) && !rsnd_src_sync_is_enabled(mod)) ? |
359 | 0x01 : 0x11; | 364 | 0x01 : 0x11; |
360 | 365 | ||
361 | rsnd_mod_write(mod, SRC_CTRL, val); | 366 | rsnd_mod_write(mod, SRC_CTRL, val); |
@@ -367,11 +372,7 @@ static int rsnd_src_stop(struct rsnd_mod *mod, | |||
367 | struct rsnd_dai_stream *io, | 372 | struct rsnd_dai_stream *io, |
368 | struct rsnd_priv *priv) | 373 | struct rsnd_priv *priv) |
369 | { | 374 | { |
370 | /* | 375 | rsnd_mod_write(mod, SRC_CTRL, 0); |
371 | * stop SRC output only | ||
372 | * see rsnd_src_quit | ||
373 | */ | ||
374 | rsnd_mod_write(mod, SRC_CTRL, 0x01); | ||
375 | 376 | ||
376 | return 0; | 377 | return 0; |
377 | } | 378 | } |
@@ -390,10 +391,6 @@ static int rsnd_src_init(struct rsnd_mod *mod, | |||
390 | 391 | ||
391 | rsnd_src_status_clear(mod); | 392 | rsnd_src_status_clear(mod); |
392 | 393 | ||
393 | rsnd_src_irq_enable(mod); | ||
394 | |||
395 | src->err = 0; | ||
396 | |||
397 | /* reset sync convert_rate */ | 394 | /* reset sync convert_rate */ |
398 | src->sync.val = 0; | 395 | src->sync.val = 0; |
399 | 396 | ||
@@ -405,21 +402,11 @@ static int rsnd_src_quit(struct rsnd_mod *mod, | |||
405 | struct rsnd_priv *priv) | 402 | struct rsnd_priv *priv) |
406 | { | 403 | { |
407 | struct rsnd_src *src = rsnd_mod_to_src(mod); | 404 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
408 | struct device *dev = rsnd_priv_to_dev(priv); | ||
409 | |||
410 | rsnd_src_irq_disable(mod); | ||
411 | |||
412 | /* stop both out/in */ | ||
413 | rsnd_mod_write(mod, SRC_CTRL, 0); | ||
414 | 405 | ||
415 | rsnd_src_halt(mod); | 406 | rsnd_src_halt(mod); |
416 | 407 | ||
417 | rsnd_mod_power_off(mod); | 408 | rsnd_mod_power_off(mod); |
418 | 409 | ||
419 | if (src->err) | ||
420 | dev_warn(dev, "%s[%d] under/over flow err = %d\n", | ||
421 | rsnd_mod_name(mod), rsnd_mod_id(mod), src->err); | ||
422 | |||
423 | src->convert_rate = 0; | 410 | src->convert_rate = 0; |
424 | 411 | ||
425 | /* reset sync convert_rate */ | 412 | /* reset sync convert_rate */ |
@@ -432,8 +419,7 @@ static void __rsnd_src_interrupt(struct rsnd_mod *mod, | |||
432 | struct rsnd_dai_stream *io) | 419 | struct rsnd_dai_stream *io) |
433 | { | 420 | { |
434 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | 421 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); |
435 | struct rsnd_src *src = rsnd_mod_to_src(mod); | 422 | bool stop = false; |
436 | struct device *dev = rsnd_priv_to_dev(priv); | ||
437 | 423 | ||
438 | spin_lock(&priv->lock); | 424 | spin_lock(&priv->lock); |
439 | 425 | ||
@@ -441,26 +427,16 @@ static void __rsnd_src_interrupt(struct rsnd_mod *mod, | |||
441 | if (!rsnd_io_is_working(io)) | 427 | if (!rsnd_io_is_working(io)) |
442 | goto rsnd_src_interrupt_out; | 428 | goto rsnd_src_interrupt_out; |
443 | 429 | ||
444 | if (rsnd_src_record_error(mod)) { | 430 | if (rsnd_src_error_occurred(mod)) |
445 | 431 | stop = true; | |
446 | dev_dbg(dev, "%s[%d] restart\n", | ||
447 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | ||
448 | |||
449 | rsnd_src_stop(mod, io, priv); | ||
450 | rsnd_src_start(mod, io, priv); | ||
451 | } | ||
452 | |||
453 | if (src->err > 1024) { | ||
454 | rsnd_src_irq_disable(mod); | ||
455 | |||
456 | dev_warn(dev, "no more %s[%d] restart\n", | ||
457 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | ||
458 | } | ||
459 | 432 | ||
460 | rsnd_src_status_clear(mod); | 433 | rsnd_src_status_clear(mod); |
461 | rsnd_src_interrupt_out: | 434 | rsnd_src_interrupt_out: |
462 | 435 | ||
463 | spin_unlock(&priv->lock); | 436 | spin_unlock(&priv->lock); |
437 | |||
438 | if (stop) | ||
439 | snd_pcm_stop_xrun(io->substream); | ||
464 | } | 440 | } |
465 | 441 | ||
466 | static irqreturn_t rsnd_src_interrupt(int irq, void *data) | 442 | static irqreturn_t rsnd_src_interrupt(int irq, void *data) |
@@ -485,7 +461,7 @@ static int rsnd_src_probe_(struct rsnd_mod *mod, | |||
485 | /* | 461 | /* |
486 | * IRQ is not supported on non-DT | 462 | * IRQ is not supported on non-DT |
487 | * see | 463 | * see |
488 | * rsnd_src_irq_enable() | 464 | * rsnd_src_irq() |
489 | */ | 465 | */ |
490 | ret = devm_request_irq(dev, irq, | 466 | ret = devm_request_irq(dev, irq, |
491 | rsnd_src_interrupt, | 467 | rsnd_src_interrupt, |
@@ -495,9 +471,7 @@ static int rsnd_src_probe_(struct rsnd_mod *mod, | |||
495 | return ret; | 471 | return ret; |
496 | } | 472 | } |
497 | 473 | ||
498 | src->dma = rsnd_dma_attach(io, mod, 0); | 474 | ret = rsnd_dma_attach(io, mod, &src->dma, 0); |
499 | if (IS_ERR(src->dma)) | ||
500 | return PTR_ERR(src->dma); | ||
501 | 475 | ||
502 | return ret; | 476 | return ret; |
503 | } | 477 | } |
@@ -506,8 +480,6 @@ static int rsnd_src_pcm_new(struct rsnd_mod *mod, | |||
506 | struct rsnd_dai_stream *io, | 480 | struct rsnd_dai_stream *io, |
507 | struct snd_soc_pcm_runtime *rtd) | 481 | struct snd_soc_pcm_runtime *rtd) |
508 | { | 482 | { |
509 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); | ||
510 | struct rsnd_mod *dvc = rsnd_io_to_mod_dvc(io); | ||
511 | struct rsnd_src *src = rsnd_mod_to_src(mod); | 483 | struct rsnd_src *src = rsnd_mod_to_src(mod); |
512 | int ret; | 484 | int ret; |
513 | 485 | ||
@@ -516,15 +488,10 @@ static int rsnd_src_pcm_new(struct rsnd_mod *mod, | |||
516 | */ | 488 | */ |
517 | 489 | ||
518 | /* | 490 | /* |
519 | * SRC sync convert needs clock master | 491 | * It can't use SRC Synchronous convert |
520 | */ | 492 | * when Capture if it uses CMD |
521 | if (!rsnd_rdai_is_clk_master(rdai)) | ||
522 | return 0; | ||
523 | |||
524 | /* | ||
525 | * SRC In doesn't work if DVC was enabled | ||
526 | */ | 493 | */ |
527 | if (dvc && !rsnd_io_is_play(io)) | 494 | if (rsnd_io_to_mod_cmd(io) && !rsnd_io_is_play(io)) |
528 | return 0; | 495 | return 0; |
529 | 496 | ||
530 | /* | 497 | /* |
@@ -557,6 +524,7 @@ static struct rsnd_mod_ops rsnd_src_ops = { | |||
557 | .quit = rsnd_src_quit, | 524 | .quit = rsnd_src_quit, |
558 | .start = rsnd_src_start, | 525 | .start = rsnd_src_start, |
559 | .stop = rsnd_src_stop, | 526 | .stop = rsnd_src_stop, |
527 | .irq = rsnd_src_irq, | ||
560 | .hw_params = rsnd_src_hw_params, | 528 | .hw_params = rsnd_src_hw_params, |
561 | .pcm_new = rsnd_src_pcm_new, | 529 | .pcm_new = rsnd_src_pcm_new, |
562 | }; | 530 | }; |
@@ -622,7 +590,8 @@ int rsnd_src_probe(struct rsnd_priv *priv) | |||
622 | } | 590 | } |
623 | 591 | ||
624 | ret = rsnd_mod_init(priv, rsnd_mod_get(src), | 592 | ret = rsnd_mod_init(priv, rsnd_mod_get(src), |
625 | &rsnd_src_ops, clk, RSND_MOD_SRC, i); | 593 | &rsnd_src_ops, clk, rsnd_mod_get_status, |
594 | RSND_MOD_SRC, i); | ||
626 | if (ret) | 595 | if (ret) |
627 | goto rsnd_src_probe_done; | 596 | goto rsnd_src_probe_done; |
628 | 597 | ||
diff --git a/sound/soc/sh/rcar/ssi.c b/sound/soc/sh/rcar/ssi.c index 7ee89da4dd5f..5f848f054745 100644 --- a/sound/soc/sh/rcar/ssi.c +++ b/sound/soc/sh/rcar/ssi.c | |||
@@ -64,7 +64,6 @@ | |||
64 | #define SSI_NAME "ssi" | 64 | #define SSI_NAME "ssi" |
65 | 65 | ||
66 | struct rsnd_ssi { | 66 | struct rsnd_ssi { |
67 | struct rsnd_ssi *parent; | ||
68 | struct rsnd_mod mod; | 67 | struct rsnd_mod mod; |
69 | struct rsnd_mod *dma; | 68 | struct rsnd_mod *dma; |
70 | 69 | ||
@@ -75,7 +74,6 @@ struct rsnd_ssi { | |||
75 | u32 wsr; | 74 | u32 wsr; |
76 | int chan; | 75 | int chan; |
77 | int rate; | 76 | int rate; |
78 | int err; | ||
79 | int irq; | 77 | int irq; |
80 | unsigned int usrcnt; | 78 | unsigned int usrcnt; |
81 | }; | 79 | }; |
@@ -96,7 +94,10 @@ struct rsnd_ssi { | |||
96 | #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod) | 94 | #define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod) |
97 | #define rsnd_ssi_mode_flags(p) ((p)->flags) | 95 | #define rsnd_ssi_mode_flags(p) ((p)->flags) |
98 | #define rsnd_ssi_is_parent(ssi, io) ((ssi) == rsnd_io_to_mod_ssip(io)) | 96 | #define rsnd_ssi_is_parent(ssi, io) ((ssi) == rsnd_io_to_mod_ssip(io)) |
99 | #define rsnd_ssi_is_multi_slave(ssi, io) ((mod) != rsnd_io_to_mod_ssi(io)) | 97 | #define rsnd_ssi_is_multi_slave(mod, io) \ |
98 | (rsnd_ssi_multi_slaves(io) & (1 << rsnd_mod_id(mod))) | ||
99 | #define rsnd_ssi_is_run_mods(mod, io) \ | ||
100 | (rsnd_ssi_run_mods(io) & (1 << rsnd_mod_id(mod))) | ||
100 | 101 | ||
101 | int rsnd_ssi_use_busif(struct rsnd_dai_stream *io) | 102 | int rsnd_ssi_use_busif(struct rsnd_dai_stream *io) |
102 | { | 103 | { |
@@ -141,43 +142,13 @@ static void rsnd_ssi_status_check(struct rsnd_mod *mod, | |||
141 | udelay(50); | 142 | udelay(50); |
142 | } | 143 | } |
143 | 144 | ||
144 | dev_warn(dev, "status check failed\n"); | 145 | dev_warn(dev, "%s[%d] status check failed\n", |
145 | } | 146 | rsnd_mod_name(mod), rsnd_mod_id(mod)); |
146 | |||
147 | static int rsnd_ssi_irq_enable(struct rsnd_mod *ssi_mod) | ||
148 | { | ||
149 | struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); | ||
150 | |||
151 | if (rsnd_is_gen1(priv)) | ||
152 | return 0; | ||
153 | |||
154 | /* enable SSI interrupt if Gen2 */ | ||
155 | rsnd_mod_write(ssi_mod, SSI_INT_ENABLE, | ||
156 | rsnd_ssi_is_dma_mode(ssi_mod) ? | ||
157 | 0x0e000000 : 0x0f000000); | ||
158 | |||
159 | return 0; | ||
160 | } | ||
161 | |||
162 | static int rsnd_ssi_irq_disable(struct rsnd_mod *ssi_mod) | ||
163 | { | ||
164 | struct rsnd_priv *priv = rsnd_mod_to_priv(ssi_mod); | ||
165 | |||
166 | if (rsnd_is_gen1(priv)) | ||
167 | return 0; | ||
168 | |||
169 | /* disable SSI interrupt if Gen2 */ | ||
170 | rsnd_mod_write(ssi_mod, SSI_INT_ENABLE, 0x00000000); | ||
171 | |||
172 | return 0; | ||
173 | } | 147 | } |
174 | 148 | ||
175 | u32 rsnd_ssi_multi_slaves(struct rsnd_dai_stream *io) | 149 | static u32 rsnd_ssi_multi_slaves(struct rsnd_dai_stream *io) |
176 | { | 150 | { |
177 | struct rsnd_mod *mod; | 151 | struct rsnd_mod *mod; |
178 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | ||
179 | struct rsnd_priv *priv = rsnd_io_to_priv(io); | ||
180 | struct device *dev = rsnd_priv_to_dev(priv); | ||
181 | enum rsnd_mod_type types[] = { | 152 | enum rsnd_mod_type types[] = { |
182 | RSND_MOD_SSIM1, | 153 | RSND_MOD_SSIM1, |
183 | RSND_MOD_SSIM2, | 154 | RSND_MOD_SSIM2, |
@@ -185,16 +156,6 @@ u32 rsnd_ssi_multi_slaves(struct rsnd_dai_stream *io) | |||
185 | }; | 156 | }; |
186 | int i, mask; | 157 | int i, mask; |
187 | 158 | ||
188 | switch (runtime->channels) { | ||
189 | case 2: /* Multi channel is not needed for Stereo */ | ||
190 | return 0; | ||
191 | case 6: | ||
192 | break; | ||
193 | default: | ||
194 | dev_err(dev, "unsupported channel\n"); | ||
195 | return 0; | ||
196 | } | ||
197 | |||
198 | mask = 0; | 159 | mask = 0; |
199 | for (i = 0; i < ARRAY_SIZE(types); i++) { | 160 | for (i = 0; i < ARRAY_SIZE(types); i++) { |
200 | mod = rsnd_io_to_mod(io, types[i]); | 161 | mod = rsnd_io_to_mod(io, types[i]); |
@@ -207,22 +168,41 @@ u32 rsnd_ssi_multi_slaves(struct rsnd_dai_stream *io) | |||
207 | return mask; | 168 | return mask; |
208 | } | 169 | } |
209 | 170 | ||
210 | static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, | 171 | static u32 rsnd_ssi_run_mods(struct rsnd_dai_stream *io) |
172 | { | ||
173 | struct rsnd_mod *ssi_mod = rsnd_io_to_mod_ssi(io); | ||
174 | struct rsnd_mod *ssi_parent_mod = rsnd_io_to_mod_ssip(io); | ||
175 | |||
176 | return rsnd_ssi_multi_slaves_runtime(io) | | ||
177 | 1 << rsnd_mod_id(ssi_mod) | | ||
178 | 1 << rsnd_mod_id(ssi_parent_mod); | ||
179 | } | ||
180 | |||
181 | u32 rsnd_ssi_multi_slaves_runtime(struct rsnd_dai_stream *io) | ||
182 | { | ||
183 | if (rsnd_runtime_is_ssi_multi(io)) | ||
184 | return rsnd_ssi_multi_slaves(io); | ||
185 | |||
186 | return 0; | ||
187 | } | ||
188 | |||
189 | static int rsnd_ssi_master_clk_start(struct rsnd_mod *mod, | ||
211 | struct rsnd_dai_stream *io) | 190 | struct rsnd_dai_stream *io) |
212 | { | 191 | { |
213 | struct rsnd_priv *priv = rsnd_io_to_priv(io); | 192 | struct rsnd_priv *priv = rsnd_io_to_priv(io); |
214 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | ||
215 | struct device *dev = rsnd_priv_to_dev(priv); | 193 | struct device *dev = rsnd_priv_to_dev(priv); |
216 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); | 194 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); |
217 | struct rsnd_mod *mod = rsnd_mod_get(ssi); | 195 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); |
218 | struct rsnd_mod *ssi_parent_mod = rsnd_io_to_mod_ssip(io); | 196 | struct rsnd_mod *ssi_parent_mod = rsnd_io_to_mod_ssip(io); |
219 | int slots = rsnd_get_slot_width(io); | 197 | int chan = rsnd_runtime_channel_for_ssi(io); |
220 | int j, ret; | 198 | int j, ret; |
221 | int ssi_clk_mul_table[] = { | 199 | int ssi_clk_mul_table[] = { |
222 | 1, 2, 4, 8, 16, 6, 12, | 200 | 1, 2, 4, 8, 16, 6, 12, |
223 | }; | 201 | }; |
224 | unsigned int main_rate; | 202 | unsigned int main_rate; |
225 | unsigned int rate = rsnd_src_get_ssi_rate(priv, io, runtime); | 203 | unsigned int rate = rsnd_io_is_play(io) ? |
204 | rsnd_src_get_out_rate(priv, io) : | ||
205 | rsnd_src_get_in_rate(priv, io); | ||
226 | 206 | ||
227 | if (!rsnd_rdai_is_clk_master(rdai)) | 207 | if (!rsnd_rdai_is_clk_master(rdai)) |
228 | return 0; | 208 | return 0; |
@@ -249,10 +229,10 @@ static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, | |||
249 | 229 | ||
250 | /* | 230 | /* |
251 | * this driver is assuming that | 231 | * this driver is assuming that |
252 | * system word is 32bit x slots | 232 | * system word is 32bit x chan |
253 | * see rsnd_ssi_init() | 233 | * see rsnd_ssi_init() |
254 | */ | 234 | */ |
255 | main_rate = rate * 32 * slots * ssi_clk_mul_table[j]; | 235 | main_rate = rate * 32 * chan * ssi_clk_mul_table[j]; |
256 | 236 | ||
257 | ret = rsnd_adg_ssi_clk_try_start(mod, main_rate); | 237 | ret = rsnd_adg_ssi_clk_try_start(mod, main_rate); |
258 | if (0 == ret) { | 238 | if (0 == ret) { |
@@ -274,11 +254,11 @@ static int rsnd_ssi_master_clk_start(struct rsnd_ssi *ssi, | |||
274 | return -EIO; | 254 | return -EIO; |
275 | } | 255 | } |
276 | 256 | ||
277 | static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi, | 257 | static void rsnd_ssi_master_clk_stop(struct rsnd_mod *mod, |
278 | struct rsnd_dai_stream *io) | 258 | struct rsnd_dai_stream *io) |
279 | { | 259 | { |
280 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); | 260 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); |
281 | struct rsnd_mod *mod = rsnd_mod_get(ssi); | 261 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); |
282 | struct rsnd_mod *ssi_parent_mod = rsnd_io_to_mod_ssip(io); | 262 | struct rsnd_mod *ssi_parent_mod = rsnd_io_to_mod_ssip(io); |
283 | 263 | ||
284 | if (!rsnd_rdai_is_clk_master(rdai)) | 264 | if (!rsnd_rdai_is_clk_master(rdai)) |
@@ -296,17 +276,18 @@ static void rsnd_ssi_master_clk_stop(struct rsnd_ssi *ssi, | |||
296 | rsnd_adg_ssi_clk_stop(mod); | 276 | rsnd_adg_ssi_clk_stop(mod); |
297 | } | 277 | } |
298 | 278 | ||
299 | static int rsnd_ssi_config_init(struct rsnd_ssi *ssi, | 279 | static void rsnd_ssi_config_init(struct rsnd_mod *mod, |
300 | struct rsnd_dai_stream *io) | 280 | struct rsnd_dai_stream *io) |
301 | { | 281 | { |
302 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); | 282 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); |
303 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); | 283 | struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io); |
284 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | ||
304 | u32 cr_own; | 285 | u32 cr_own; |
305 | u32 cr_mode; | 286 | u32 cr_mode; |
306 | u32 wsr; | 287 | u32 wsr; |
307 | int is_tdm; | 288 | int is_tdm; |
308 | 289 | ||
309 | is_tdm = (rsnd_get_slot_width(io) >= 6) ? 1 : 0; | 290 | is_tdm = rsnd_runtime_is_ssi_tdm(io); |
310 | 291 | ||
311 | /* | 292 | /* |
312 | * always use 32bit system word. | 293 | * always use 32bit system word. |
@@ -332,11 +313,9 @@ static int rsnd_ssi_config_init(struct rsnd_ssi *ssi, | |||
332 | case 32: | 313 | case 32: |
333 | cr_own |= DWL_24; | 314 | cr_own |= DWL_24; |
334 | break; | 315 | break; |
335 | default: | ||
336 | return -EINVAL; | ||
337 | } | 316 | } |
338 | 317 | ||
339 | if (rsnd_ssi_is_dma_mode(rsnd_mod_get(ssi))) { | 318 | if (rsnd_ssi_is_dma_mode(mod)) { |
340 | cr_mode = UIEN | OIEN | /* over/under run */ | 319 | cr_mode = UIEN | OIEN | /* over/under run */ |
341 | DMEN; /* DMA : enable DMA */ | 320 | DMEN; /* DMA : enable DMA */ |
342 | } else { | 321 | } else { |
@@ -357,8 +336,16 @@ static int rsnd_ssi_config_init(struct rsnd_ssi *ssi, | |||
357 | ssi->cr_own = cr_own; | 336 | ssi->cr_own = cr_own; |
358 | ssi->cr_mode = cr_mode; | 337 | ssi->cr_mode = cr_mode; |
359 | ssi->wsr = wsr; | 338 | ssi->wsr = wsr; |
339 | } | ||
360 | 340 | ||
361 | return 0; | 341 | static void rsnd_ssi_register_setup(struct rsnd_mod *mod) |
342 | { | ||
343 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | ||
344 | |||
345 | rsnd_mod_write(mod, SSIWSR, ssi->wsr); | ||
346 | rsnd_mod_write(mod, SSICR, ssi->cr_own | | ||
347 | ssi->cr_clk | | ||
348 | ssi->cr_mode); /* without EN */ | ||
362 | } | 349 | } |
363 | 350 | ||
364 | /* | 351 | /* |
@@ -371,28 +358,25 @@ static int rsnd_ssi_init(struct rsnd_mod *mod, | |||
371 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | 358 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); |
372 | int ret; | 359 | int ret; |
373 | 360 | ||
361 | if (!rsnd_ssi_is_run_mods(mod, io)) | ||
362 | return 0; | ||
363 | |||
374 | ssi->usrcnt++; | 364 | ssi->usrcnt++; |
375 | 365 | ||
376 | rsnd_mod_power_on(mod); | 366 | rsnd_mod_power_on(mod); |
377 | 367 | ||
378 | ret = rsnd_ssi_master_clk_start(ssi, io); | 368 | ret = rsnd_ssi_master_clk_start(mod, io); |
379 | if (ret < 0) | 369 | if (ret < 0) |
380 | return ret; | 370 | return ret; |
381 | 371 | ||
382 | if (rsnd_ssi_is_parent(mod, io)) | 372 | if (!rsnd_ssi_is_parent(mod, io)) |
383 | return 0; | 373 | rsnd_ssi_config_init(mod, io); |
384 | |||
385 | ret = rsnd_ssi_config_init(ssi, io); | ||
386 | if (ret < 0) | ||
387 | return ret; | ||
388 | 374 | ||
389 | ssi->err = -1; /* ignore 1st error */ | 375 | rsnd_ssi_register_setup(mod); |
390 | 376 | ||
391 | /* clear error status */ | 377 | /* clear error status */ |
392 | rsnd_ssi_status_clear(mod); | 378 | rsnd_ssi_status_clear(mod); |
393 | 379 | ||
394 | rsnd_ssi_irq_enable(mod); | ||
395 | |||
396 | return 0; | 380 | return 0; |
397 | } | 381 | } |
398 | 382 | ||
@@ -403,25 +387,19 @@ static int rsnd_ssi_quit(struct rsnd_mod *mod, | |||
403 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | 387 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); |
404 | struct device *dev = rsnd_priv_to_dev(priv); | 388 | struct device *dev = rsnd_priv_to_dev(priv); |
405 | 389 | ||
390 | if (!rsnd_ssi_is_run_mods(mod, io)) | ||
391 | return 0; | ||
392 | |||
406 | if (!ssi->usrcnt) { | 393 | if (!ssi->usrcnt) { |
407 | dev_err(dev, "%s[%d] usrcnt error\n", | 394 | dev_err(dev, "%s[%d] usrcnt error\n", |
408 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | 395 | rsnd_mod_name(mod), rsnd_mod_id(mod)); |
409 | return -EIO; | 396 | return -EIO; |
410 | } | 397 | } |
411 | 398 | ||
412 | if (!rsnd_ssi_is_parent(mod, io)) { | 399 | if (!rsnd_ssi_is_parent(mod, io)) |
413 | if (ssi->err > 0) | ||
414 | dev_warn(dev, "%s[%d] under/over flow err = %d\n", | ||
415 | rsnd_mod_name(mod), rsnd_mod_id(mod), | ||
416 | ssi->err); | ||
417 | |||
418 | ssi->cr_own = 0; | 400 | ssi->cr_own = 0; |
419 | ssi->err = 0; | ||
420 | 401 | ||
421 | rsnd_ssi_irq_disable(mod); | 402 | rsnd_ssi_master_clk_stop(mod, io); |
422 | } | ||
423 | |||
424 | rsnd_ssi_master_clk_stop(ssi, io); | ||
425 | 403 | ||
426 | rsnd_mod_power_off(mod); | 404 | rsnd_mod_power_off(mod); |
427 | 405 | ||
@@ -456,61 +434,43 @@ static int rsnd_ssi_hw_params(struct rsnd_mod *mod, | |||
456 | return 0; | 434 | return 0; |
457 | } | 435 | } |
458 | 436 | ||
459 | static u32 rsnd_ssi_record_error(struct rsnd_ssi *ssi) | 437 | static int rsnd_ssi_start(struct rsnd_mod *mod, |
460 | { | 438 | struct rsnd_dai_stream *io, |
461 | struct rsnd_mod *mod = rsnd_mod_get(ssi); | 439 | struct rsnd_priv *priv) |
462 | u32 status = rsnd_ssi_status_get(mod); | ||
463 | |||
464 | /* under/over flow error */ | ||
465 | if (status & (UIRQ | OIRQ)) | ||
466 | ssi->err++; | ||
467 | |||
468 | return status; | ||
469 | } | ||
470 | |||
471 | static int __rsnd_ssi_start(struct rsnd_mod *mod, | ||
472 | struct rsnd_dai_stream *io, | ||
473 | struct rsnd_priv *priv) | ||
474 | { | 440 | { |
475 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | 441 | if (!rsnd_ssi_is_run_mods(mod, io)) |
476 | u32 cr; | 442 | return 0; |
477 | |||
478 | cr = ssi->cr_own | | ||
479 | ssi->cr_clk | | ||
480 | ssi->cr_mode; | ||
481 | 443 | ||
482 | /* | 444 | /* |
483 | * EN will be set via SSIU :: SSI_CONTROL | 445 | * EN will be set via SSIU :: SSI_CONTROL |
484 | * if Multi channel mode | 446 | * if Multi channel mode |
485 | */ | 447 | */ |
486 | if (!rsnd_ssi_multi_slaves(io)) | 448 | if (rsnd_ssi_multi_slaves_runtime(io)) |
487 | cr |= EN; | 449 | return 0; |
488 | 450 | ||
489 | rsnd_mod_write(mod, SSICR, cr); | 451 | rsnd_mod_bset(mod, SSICR, EN, EN); |
490 | rsnd_mod_write(mod, SSIWSR, ssi->wsr); | ||
491 | 452 | ||
492 | return 0; | 453 | return 0; |
493 | } | 454 | } |
494 | 455 | ||
495 | static int rsnd_ssi_start(struct rsnd_mod *mod, | 456 | static int rsnd_ssi_stop(struct rsnd_mod *mod, |
496 | struct rsnd_dai_stream *io, | 457 | struct rsnd_dai_stream *io, |
497 | struct rsnd_priv *priv) | 458 | struct rsnd_priv *priv) |
498 | { | 459 | { |
460 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | ||
461 | u32 cr; | ||
462 | |||
463 | if (!rsnd_ssi_is_run_mods(mod, io)) | ||
464 | return 0; | ||
465 | |||
499 | /* | 466 | /* |
500 | * no limit to start | 467 | * don't stop if not last user |
501 | * see also | 468 | * see also |
502 | * rsnd_ssi_stop | 469 | * rsnd_ssi_start |
503 | * rsnd_ssi_interrupt | 470 | * rsnd_ssi_interrupt |
504 | */ | 471 | */ |
505 | return __rsnd_ssi_start(mod, io, priv); | 472 | if (ssi->usrcnt > 1) |
506 | } | 473 | return 0; |
507 | |||
508 | static int __rsnd_ssi_stop(struct rsnd_mod *mod, | ||
509 | struct rsnd_dai_stream *io, | ||
510 | struct rsnd_priv *priv) | ||
511 | { | ||
512 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | ||
513 | u32 cr; | ||
514 | 474 | ||
515 | /* | 475 | /* |
516 | * disable all IRQ, | 476 | * disable all IRQ, |
@@ -532,33 +492,38 @@ static int __rsnd_ssi_stop(struct rsnd_mod *mod, | |||
532 | return 0; | 492 | return 0; |
533 | } | 493 | } |
534 | 494 | ||
535 | static int rsnd_ssi_stop(struct rsnd_mod *mod, | 495 | static int rsnd_ssi_irq(struct rsnd_mod *mod, |
536 | struct rsnd_dai_stream *io, | 496 | struct rsnd_dai_stream *io, |
537 | struct rsnd_priv *priv) | 497 | struct rsnd_priv *priv, |
498 | int enable) | ||
538 | { | 499 | { |
539 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | 500 | u32 val = 0; |
540 | 501 | ||
541 | /* | 502 | if (rsnd_is_gen1(priv)) |
542 | * don't stop if not last user | ||
543 | * see also | ||
544 | * rsnd_ssi_start | ||
545 | * rsnd_ssi_interrupt | ||
546 | */ | ||
547 | if (ssi->usrcnt > 1) | ||
548 | return 0; | 503 | return 0; |
549 | 504 | ||
550 | return __rsnd_ssi_stop(mod, io, priv); | 505 | if (rsnd_ssi_is_parent(mod, io)) |
506 | return 0; | ||
507 | |||
508 | if (!rsnd_ssi_is_run_mods(mod, io)) | ||
509 | return 0; | ||
510 | |||
511 | if (enable) | ||
512 | val = rsnd_ssi_is_dma_mode(mod) ? 0x0e000000 : 0x0f000000; | ||
513 | |||
514 | rsnd_mod_write(mod, SSI_INT_ENABLE, val); | ||
515 | |||
516 | return 0; | ||
551 | } | 517 | } |
552 | 518 | ||
553 | static void __rsnd_ssi_interrupt(struct rsnd_mod *mod, | 519 | static void __rsnd_ssi_interrupt(struct rsnd_mod *mod, |
554 | struct rsnd_dai_stream *io) | 520 | struct rsnd_dai_stream *io) |
555 | { | 521 | { |
556 | struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod); | ||
557 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | 522 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); |
558 | struct device *dev = rsnd_priv_to_dev(priv); | ||
559 | int is_dma = rsnd_ssi_is_dma_mode(mod); | 523 | int is_dma = rsnd_ssi_is_dma_mode(mod); |
560 | u32 status; | 524 | u32 status; |
561 | bool elapsed = false; | 525 | bool elapsed = false; |
526 | bool stop = false; | ||
562 | 527 | ||
563 | spin_lock(&priv->lock); | 528 | spin_lock(&priv->lock); |
564 | 529 | ||
@@ -566,7 +531,7 @@ static void __rsnd_ssi_interrupt(struct rsnd_mod *mod, | |||
566 | if (!rsnd_io_is_working(io)) | 531 | if (!rsnd_io_is_working(io)) |
567 | goto rsnd_ssi_interrupt_out; | 532 | goto rsnd_ssi_interrupt_out; |
568 | 533 | ||
569 | status = rsnd_ssi_record_error(ssi); | 534 | status = rsnd_ssi_status_get(mod); |
570 | 535 | ||
571 | /* PIO only */ | 536 | /* PIO only */ |
572 | if (!is_dma && (status & DIRQ)) { | 537 | if (!is_dma && (status & DIRQ)) { |
@@ -588,23 +553,8 @@ static void __rsnd_ssi_interrupt(struct rsnd_mod *mod, | |||
588 | } | 553 | } |
589 | 554 | ||
590 | /* DMA only */ | 555 | /* DMA only */ |
591 | if (is_dma && (status & (UIRQ | OIRQ))) { | 556 | if (is_dma && (status & (UIRQ | OIRQ))) |
592 | /* | 557 | stop = true; |
593 | * restart SSI | ||
594 | */ | ||
595 | dev_dbg(dev, "%s[%d] restart\n", | ||
596 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | ||
597 | |||
598 | __rsnd_ssi_stop(mod, io, priv); | ||
599 | __rsnd_ssi_start(mod, io, priv); | ||
600 | } | ||
601 | |||
602 | if (ssi->err > 1024) { | ||
603 | rsnd_ssi_irq_disable(mod); | ||
604 | |||
605 | dev_warn(dev, "no more %s[%d] restart\n", | ||
606 | rsnd_mod_name(mod), rsnd_mod_id(mod)); | ||
607 | } | ||
608 | 558 | ||
609 | rsnd_ssi_status_clear(mod); | 559 | rsnd_ssi_status_clear(mod); |
610 | rsnd_ssi_interrupt_out: | 560 | rsnd_ssi_interrupt_out: |
@@ -612,6 +562,10 @@ rsnd_ssi_interrupt_out: | |||
612 | 562 | ||
613 | if (elapsed) | 563 | if (elapsed) |
614 | rsnd_dai_period_elapsed(io); | 564 | rsnd_dai_period_elapsed(io); |
565 | |||
566 | if (stop) | ||
567 | snd_pcm_stop_xrun(io->substream); | ||
568 | |||
615 | } | 569 | } |
616 | 570 | ||
617 | static irqreturn_t rsnd_ssi_interrupt(int irq, void *data) | 571 | static irqreturn_t rsnd_ssi_interrupt(int irq, void *data) |
@@ -627,12 +581,17 @@ static irqreturn_t rsnd_ssi_interrupt(int irq, void *data) | |||
627 | * SSI PIO | 581 | * SSI PIO |
628 | */ | 582 | */ |
629 | static void rsnd_ssi_parent_attach(struct rsnd_mod *mod, | 583 | static void rsnd_ssi_parent_attach(struct rsnd_mod *mod, |
630 | struct rsnd_dai_stream *io, | 584 | struct rsnd_dai_stream *io) |
631 | struct rsnd_priv *priv) | ||
632 | { | 585 | { |
586 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); | ||
587 | struct rsnd_priv *priv = rsnd_mod_to_priv(mod); | ||
588 | |||
633 | if (!__rsnd_ssi_is_pin_sharing(mod)) | 589 | if (!__rsnd_ssi_is_pin_sharing(mod)) |
634 | return; | 590 | return; |
635 | 591 | ||
592 | if (!rsnd_rdai_is_clk_master(rdai)) | ||
593 | return; | ||
594 | |||
636 | switch (rsnd_mod_id(mod)) { | 595 | switch (rsnd_mod_id(mod)) { |
637 | case 1: | 596 | case 1: |
638 | case 2: | 597 | case 2: |
@@ -647,6 +606,20 @@ static void rsnd_ssi_parent_attach(struct rsnd_mod *mod, | |||
647 | } | 606 | } |
648 | } | 607 | } |
649 | 608 | ||
609 | static int rsnd_ssi_pcm_new(struct rsnd_mod *mod, | ||
610 | struct rsnd_dai_stream *io, | ||
611 | struct snd_soc_pcm_runtime *rtd) | ||
612 | { | ||
613 | /* | ||
614 | * rsnd_rdai_is_clk_master() will be enabled after set_fmt, | ||
615 | * and, pcm_new will be called after it. | ||
616 | * This function reuse pcm_new at this point. | ||
617 | */ | ||
618 | rsnd_ssi_parent_attach(mod, io); | ||
619 | |||
620 | return 0; | ||
621 | } | ||
622 | |||
650 | static int rsnd_ssi_common_probe(struct rsnd_mod *mod, | 623 | static int rsnd_ssi_common_probe(struct rsnd_mod *mod, |
651 | struct rsnd_dai_stream *io, | 624 | struct rsnd_dai_stream *io, |
652 | struct rsnd_priv *priv) | 625 | struct rsnd_priv *priv) |
@@ -662,7 +635,10 @@ static int rsnd_ssi_common_probe(struct rsnd_mod *mod, | |||
662 | if (rsnd_ssi_is_multi_slave(mod, io)) | 635 | if (rsnd_ssi_is_multi_slave(mod, io)) |
663 | return 0; | 636 | return 0; |
664 | 637 | ||
665 | rsnd_ssi_parent_attach(mod, io, priv); | 638 | /* |
639 | * It can't judge ssi parent at this point | ||
640 | * see rsnd_ssi_pcm_new() | ||
641 | */ | ||
666 | 642 | ||
667 | ret = rsnd_ssiu_attach(io, mod); | 643 | ret = rsnd_ssiu_attach(io, mod); |
668 | if (ret < 0) | 644 | if (ret < 0) |
@@ -683,6 +659,8 @@ static struct rsnd_mod_ops rsnd_ssi_pio_ops = { | |||
683 | .quit = rsnd_ssi_quit, | 659 | .quit = rsnd_ssi_quit, |
684 | .start = rsnd_ssi_start, | 660 | .start = rsnd_ssi_start, |
685 | .stop = rsnd_ssi_stop, | 661 | .stop = rsnd_ssi_stop, |
662 | .irq = rsnd_ssi_irq, | ||
663 | .pcm_new = rsnd_ssi_pcm_new, | ||
686 | .hw_params = rsnd_ssi_hw_params, | 664 | .hw_params = rsnd_ssi_hw_params, |
687 | }; | 665 | }; |
688 | 666 | ||
@@ -705,9 +683,8 @@ static int rsnd_ssi_dma_probe(struct rsnd_mod *mod, | |||
705 | if (ret) | 683 | if (ret) |
706 | return ret; | 684 | return ret; |
707 | 685 | ||
708 | ssi->dma = rsnd_dma_attach(io, mod, dma_id); | 686 | /* SSI probe might be called many times in MUX multi path */ |
709 | if (IS_ERR(ssi->dma)) | 687 | ret = rsnd_dma_attach(io, mod, &ssi->dma, dma_id); |
710 | return PTR_ERR(ssi->dma); | ||
711 | 688 | ||
712 | return ret; | 689 | return ret; |
713 | } | 690 | } |
@@ -772,6 +749,8 @@ static struct rsnd_mod_ops rsnd_ssi_dma_ops = { | |||
772 | .quit = rsnd_ssi_quit, | 749 | .quit = rsnd_ssi_quit, |
773 | .start = rsnd_ssi_start, | 750 | .start = rsnd_ssi_start, |
774 | .stop = rsnd_ssi_stop, | 751 | .stop = rsnd_ssi_stop, |
752 | .irq = rsnd_ssi_irq, | ||
753 | .pcm_new = rsnd_ssi_pcm_new, | ||
775 | .fallback = rsnd_ssi_fallback, | 754 | .fallback = rsnd_ssi_fallback, |
776 | .hw_params = rsnd_ssi_hw_params, | 755 | .hw_params = rsnd_ssi_hw_params, |
777 | }; | 756 | }; |
@@ -858,6 +837,41 @@ int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod) | |||
858 | return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_CLK_PIN_SHARE); | 837 | return !!(rsnd_ssi_mode_flags(ssi) & RSND_SSI_CLK_PIN_SHARE); |
859 | } | 838 | } |
860 | 839 | ||
840 | static u32 *rsnd_ssi_get_status(struct rsnd_dai_stream *io, | ||
841 | struct rsnd_mod *mod, | ||
842 | enum rsnd_mod_type type) | ||
843 | { | ||
844 | /* | ||
845 | * SSIP (= SSI parent) needs to be special, otherwise, | ||
846 | * 2nd SSI might doesn't start. see also rsnd_mod_call() | ||
847 | * | ||
848 | * We can't include parent SSI status on SSI, because we don't know | ||
849 | * how many SSI requests parent SSI. Thus, it is localed on "io" now. | ||
850 | * ex) trouble case | ||
851 | * Playback: SSI0 | ||
852 | * Capture : SSI1 (needs SSI0) | ||
853 | * | ||
854 | * 1) start Capture -> SSI0/SSI1 are started. | ||
855 | * 2) start Playback -> SSI0 doesn't work, because it is already | ||
856 | * marked as "started" on 1) | ||
857 | * | ||
858 | * OTOH, using each mod's status is good for MUX case. | ||
859 | * It doesn't need to start in 2nd start | ||
860 | * ex) | ||
861 | * IO-0: SRC0 -> CTU1 -+-> MUX -> DVC -> SSIU -> SSI0 | ||
862 | * | | ||
863 | * IO-1: SRC1 -> CTU2 -+ | ||
864 | * | ||
865 | * 1) start IO-0 -> start SSI0 | ||
866 | * 2) start IO-1 -> SSI0 doesn't need to start, because it is | ||
867 | * already started on 1) | ||
868 | */ | ||
869 | if (type == RSND_MOD_SSIP) | ||
870 | return &io->parent_ssi_status; | ||
871 | |||
872 | return rsnd_mod_get_status(io, mod, type); | ||
873 | } | ||
874 | |||
861 | int rsnd_ssi_probe(struct rsnd_priv *priv) | 875 | int rsnd_ssi_probe(struct rsnd_priv *priv) |
862 | { | 876 | { |
863 | struct device_node *node; | 877 | struct device_node *node; |
@@ -920,7 +934,7 @@ int rsnd_ssi_probe(struct rsnd_priv *priv) | |||
920 | ops = &rsnd_ssi_dma_ops; | 934 | ops = &rsnd_ssi_dma_ops; |
921 | 935 | ||
922 | ret = rsnd_mod_init(priv, rsnd_mod_get(ssi), ops, clk, | 936 | ret = rsnd_mod_init(priv, rsnd_mod_get(ssi), ops, clk, |
923 | RSND_MOD_SSI, i); | 937 | rsnd_ssi_get_status, RSND_MOD_SSI, i); |
924 | if (ret) | 938 | if (ret) |
925 | goto rsnd_ssi_probe_done; | 939 | goto rsnd_ssi_probe_done; |
926 | 940 | ||
diff --git a/sound/soc/sh/rcar/ssiu.c b/sound/soc/sh/rcar/ssiu.c index 06d72828e5bc..6f9b388ec5a8 100644 --- a/sound/soc/sh/rcar/ssiu.c +++ b/sound/soc/sh/rcar/ssiu.c | |||
@@ -27,7 +27,7 @@ static int rsnd_ssiu_init(struct rsnd_mod *mod, | |||
27 | struct rsnd_priv *priv) | 27 | struct rsnd_priv *priv) |
28 | { | 28 | { |
29 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); | 29 | struct rsnd_dai *rdai = rsnd_io_to_rdai(io); |
30 | u32 multi_ssi_slaves = rsnd_ssi_multi_slaves(io); | 30 | u32 multi_ssi_slaves = rsnd_ssi_multi_slaves_runtime(io); |
31 | int use_busif = rsnd_ssi_use_busif(io); | 31 | int use_busif = rsnd_ssi_use_busif(io); |
32 | int id = rsnd_mod_id(mod); | 32 | int id = rsnd_mod_id(mod); |
33 | u32 mask1, val1; | 33 | u32 mask1, val1; |
@@ -105,7 +105,7 @@ static int rsnd_ssiu_init_gen2(struct rsnd_mod *mod, | |||
105 | if (ret < 0) | 105 | if (ret < 0) |
106 | return ret; | 106 | return ret; |
107 | 107 | ||
108 | if (rsnd_get_slot_width(io) >= 6) { | 108 | if (rsnd_runtime_is_ssi_tdm(io)) { |
109 | /* | 109 | /* |
110 | * TDM Extend Mode | 110 | * TDM Extend Mode |
111 | * see | 111 | * see |
@@ -115,13 +115,14 @@ static int rsnd_ssiu_init_gen2(struct rsnd_mod *mod, | |||
115 | } | 115 | } |
116 | 116 | ||
117 | if (rsnd_ssi_use_busif(io)) { | 117 | if (rsnd_ssi_use_busif(io)) { |
118 | u32 val = rsnd_get_dalign(mod, io); | ||
119 | |||
120 | rsnd_mod_write(mod, SSI_BUSIF_ADINR, | 118 | rsnd_mod_write(mod, SSI_BUSIF_ADINR, |
121 | rsnd_get_adinr_bit(mod, io) | | 119 | rsnd_get_adinr_bit(mod, io) | |
122 | rsnd_get_adinr_chan(mod, io)); | 120 | (rsnd_io_is_play(io) ? |
121 | rsnd_runtime_channel_after_ctu(io) : | ||
122 | rsnd_runtime_channel_original(io))); | ||
123 | rsnd_mod_write(mod, SSI_BUSIF_MODE, 1); | 123 | rsnd_mod_write(mod, SSI_BUSIF_MODE, 1); |
124 | rsnd_mod_write(mod, SSI_BUSIF_DALIGN, val); | 124 | rsnd_mod_write(mod, SSI_BUSIF_DALIGN, |
125 | rsnd_get_dalign(mod, io)); | ||
125 | } | 126 | } |
126 | 127 | ||
127 | return 0; | 128 | return 0; |
@@ -136,7 +137,7 @@ static int rsnd_ssiu_start_gen2(struct rsnd_mod *mod, | |||
136 | 137 | ||
137 | rsnd_mod_write(mod, SSI_CTRL, 0x1); | 138 | rsnd_mod_write(mod, SSI_CTRL, 0x1); |
138 | 139 | ||
139 | if (rsnd_ssi_multi_slaves(io)) | 140 | if (rsnd_ssi_multi_slaves_runtime(io)) |
140 | rsnd_mod_write(mod, SSI_CONTROL, 0x1); | 141 | rsnd_mod_write(mod, SSI_CONTROL, 0x1); |
141 | 142 | ||
142 | return 0; | 143 | return 0; |
@@ -151,7 +152,7 @@ static int rsnd_ssiu_stop_gen2(struct rsnd_mod *mod, | |||
151 | 152 | ||
152 | rsnd_mod_write(mod, SSI_CTRL, 0); | 153 | rsnd_mod_write(mod, SSI_CTRL, 0); |
153 | 154 | ||
154 | if (rsnd_ssi_multi_slaves(io)) | 155 | if (rsnd_ssi_multi_slaves_runtime(io)) |
155 | rsnd_mod_write(mod, SSI_CONTROL, 0); | 156 | rsnd_mod_write(mod, SSI_CONTROL, 0); |
156 | 157 | ||
157 | return 0; | 158 | return 0; |
@@ -206,7 +207,8 @@ int rsnd_ssiu_probe(struct rsnd_priv *priv) | |||
206 | 207 | ||
207 | for_each_rsnd_ssiu(ssiu, priv, i) { | 208 | for_each_rsnd_ssiu(ssiu, priv, i) { |
208 | ret = rsnd_mod_init(priv, rsnd_mod_get(ssiu), | 209 | ret = rsnd_mod_init(priv, rsnd_mod_get(ssiu), |
209 | ops, NULL, RSND_MOD_SSIU, i); | 210 | ops, NULL, rsnd_mod_get_status, |
211 | RSND_MOD_SSIU, i); | ||
210 | if (ret) | 212 | if (ret) |
211 | return ret; | 213 | return ret; |
212 | } | 214 | } |
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c index 790ee2bf1a47..d2e62b159610 100644 --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c | |||
@@ -986,16 +986,16 @@ static int soc_bind_dai_link(struct snd_soc_card *card, | |||
986 | 986 | ||
987 | dev_dbg(card->dev, "ASoC: binding %s\n", dai_link->name); | 987 | dev_dbg(card->dev, "ASoC: binding %s\n", dai_link->name); |
988 | 988 | ||
989 | rtd = soc_new_pcm_runtime(card, dai_link); | ||
990 | if (!rtd) | ||
991 | return -ENOMEM; | ||
992 | |||
993 | if (soc_is_dai_link_bound(card, dai_link)) { | 989 | if (soc_is_dai_link_bound(card, dai_link)) { |
994 | dev_dbg(card->dev, "ASoC: dai link %s already bound\n", | 990 | dev_dbg(card->dev, "ASoC: dai link %s already bound\n", |
995 | dai_link->name); | 991 | dai_link->name); |
996 | return 0; | 992 | return 0; |
997 | } | 993 | } |
998 | 994 | ||
995 | rtd = soc_new_pcm_runtime(card, dai_link); | ||
996 | if (!rtd) | ||
997 | return -ENOMEM; | ||
998 | |||
999 | cpu_dai_component.name = dai_link->cpu_name; | 999 | cpu_dai_component.name = dai_link->cpu_name; |
1000 | cpu_dai_component.of_node = dai_link->cpu_of_node; | 1000 | cpu_dai_component.of_node = dai_link->cpu_of_node; |
1001 | cpu_dai_component.dai_name = dai_link->cpu_dai_name; | 1001 | cpu_dai_component.dai_name = dai_link->cpu_dai_name; |
diff --git a/sound/soc/soc-dapm.c b/sound/soc/soc-dapm.c index 581175a51ecf..801ae1a81dfd 100644 --- a/sound/soc/soc-dapm.c +++ b/sound/soc/soc-dapm.c | |||
@@ -2805,7 +2805,7 @@ EXPORT_SYMBOL_GPL(snd_soc_dapm_add_routes); | |||
2805 | int snd_soc_dapm_del_routes(struct snd_soc_dapm_context *dapm, | 2805 | int snd_soc_dapm_del_routes(struct snd_soc_dapm_context *dapm, |
2806 | const struct snd_soc_dapm_route *route, int num) | 2806 | const struct snd_soc_dapm_route *route, int num) |
2807 | { | 2807 | { |
2808 | int i, ret = 0; | 2808 | int i; |
2809 | 2809 | ||
2810 | mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT); | 2810 | mutex_lock_nested(&dapm->card->dapm_mutex, SND_SOC_DAPM_CLASS_INIT); |
2811 | for (i = 0; i < num; i++) { | 2811 | for (i = 0; i < num; i++) { |
@@ -2814,7 +2814,7 @@ int snd_soc_dapm_del_routes(struct snd_soc_dapm_context *dapm, | |||
2814 | } | 2814 | } |
2815 | mutex_unlock(&dapm->card->dapm_mutex); | 2815 | mutex_unlock(&dapm->card->dapm_mutex); |
2816 | 2816 | ||
2817 | return ret; | 2817 | return 0; |
2818 | } | 2818 | } |
2819 | EXPORT_SYMBOL_GPL(snd_soc_dapm_del_routes); | 2819 | EXPORT_SYMBOL_GPL(snd_soc_dapm_del_routes); |
2820 | 2820 | ||
diff --git a/sound/soc/soc-pcm.c b/sound/soc/soc-pcm.c index 1af4f23697a7..aa99dac31b3b 100644 --- a/sound/soc/soc-pcm.c +++ b/sound/soc/soc-pcm.c | |||
@@ -1867,18 +1867,6 @@ int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) | |||
1867 | if (!snd_soc_dpcm_be_can_update(fe, be, stream)) | 1867 | if (!snd_soc_dpcm_be_can_update(fe, be, stream)) |
1868 | continue; | 1868 | continue; |
1869 | 1869 | ||
1870 | /* only allow hw_params() if no connected FEs are running */ | ||
1871 | if (!snd_soc_dpcm_can_be_params(fe, be, stream)) | ||
1872 | continue; | ||
1873 | |||
1874 | if ((be->dpcm[stream].state != SND_SOC_DPCM_STATE_OPEN) && | ||
1875 | (be->dpcm[stream].state != SND_SOC_DPCM_STATE_HW_PARAMS) && | ||
1876 | (be->dpcm[stream].state != SND_SOC_DPCM_STATE_HW_FREE)) | ||
1877 | continue; | ||
1878 | |||
1879 | dev_dbg(be->dev, "ASoC: hw_params BE %s\n", | ||
1880 | dpcm->fe->dai_link->name); | ||
1881 | |||
1882 | /* copy params for each dpcm */ | 1870 | /* copy params for each dpcm */ |
1883 | memcpy(&dpcm->hw_params, &fe->dpcm[stream].hw_params, | 1871 | memcpy(&dpcm->hw_params, &fe->dpcm[stream].hw_params, |
1884 | sizeof(struct snd_pcm_hw_params)); | 1872 | sizeof(struct snd_pcm_hw_params)); |
@@ -1895,6 +1883,18 @@ int dpcm_be_dai_hw_params(struct snd_soc_pcm_runtime *fe, int stream) | |||
1895 | } | 1883 | } |
1896 | } | 1884 | } |
1897 | 1885 | ||
1886 | /* only allow hw_params() if no connected FEs are running */ | ||
1887 | if (!snd_soc_dpcm_can_be_params(fe, be, stream)) | ||
1888 | continue; | ||
1889 | |||
1890 | if ((be->dpcm[stream].state != SND_SOC_DPCM_STATE_OPEN) && | ||
1891 | (be->dpcm[stream].state != SND_SOC_DPCM_STATE_HW_PARAMS) && | ||
1892 | (be->dpcm[stream].state != SND_SOC_DPCM_STATE_HW_FREE)) | ||
1893 | continue; | ||
1894 | |||
1895 | dev_dbg(be->dev, "ASoC: hw_params BE %s\n", | ||
1896 | dpcm->fe->dai_link->name); | ||
1897 | |||
1898 | ret = soc_pcm_hw_params(be_substream, &dpcm->hw_params); | 1898 | ret = soc_pcm_hw_params(be_substream, &dpcm->hw_params); |
1899 | if (ret < 0) { | 1899 | if (ret < 0) { |
1900 | dev_err(dpcm->be->dev, | 1900 | dev_err(dpcm->be->dev, |
diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index 6963ba20991c..1cf94d7fb9f4 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c | |||
@@ -223,51 +223,6 @@ static int get_widget_id(int tplg_type) | |||
223 | return -EINVAL; | 223 | return -EINVAL; |
224 | } | 224 | } |
225 | 225 | ||
226 | static enum snd_soc_dobj_type get_dobj_mixer_type( | ||
227 | struct snd_soc_tplg_ctl_hdr *control_hdr) | ||
228 | { | ||
229 | if (control_hdr == NULL) | ||
230 | return SND_SOC_DOBJ_NONE; | ||
231 | |||
232 | switch (control_hdr->ops.info) { | ||
233 | case SND_SOC_TPLG_CTL_VOLSW: | ||
234 | case SND_SOC_TPLG_CTL_VOLSW_SX: | ||
235 | case SND_SOC_TPLG_CTL_VOLSW_XR_SX: | ||
236 | case SND_SOC_TPLG_CTL_RANGE: | ||
237 | case SND_SOC_TPLG_CTL_STROBE: | ||
238 | return SND_SOC_DOBJ_MIXER; | ||
239 | case SND_SOC_TPLG_CTL_ENUM: | ||
240 | case SND_SOC_TPLG_CTL_ENUM_VALUE: | ||
241 | return SND_SOC_DOBJ_ENUM; | ||
242 | case SND_SOC_TPLG_CTL_BYTES: | ||
243 | return SND_SOC_DOBJ_BYTES; | ||
244 | default: | ||
245 | return SND_SOC_DOBJ_NONE; | ||
246 | } | ||
247 | } | ||
248 | |||
249 | static enum snd_soc_dobj_type get_dobj_type(struct snd_soc_tplg_hdr *hdr, | ||
250 | struct snd_soc_tplg_ctl_hdr *control_hdr) | ||
251 | { | ||
252 | switch (hdr->type) { | ||
253 | case SND_SOC_TPLG_TYPE_MIXER: | ||
254 | return get_dobj_mixer_type(control_hdr); | ||
255 | case SND_SOC_TPLG_TYPE_DAPM_GRAPH: | ||
256 | case SND_SOC_TPLG_TYPE_MANIFEST: | ||
257 | return SND_SOC_DOBJ_NONE; | ||
258 | case SND_SOC_TPLG_TYPE_DAPM_WIDGET: | ||
259 | return SND_SOC_DOBJ_WIDGET; | ||
260 | case SND_SOC_TPLG_TYPE_DAI_LINK: | ||
261 | return SND_SOC_DOBJ_DAI_LINK; | ||
262 | case SND_SOC_TPLG_TYPE_PCM: | ||
263 | return SND_SOC_DOBJ_PCM; | ||
264 | case SND_SOC_TPLG_TYPE_CODEC_LINK: | ||
265 | return SND_SOC_DOBJ_CODEC_LINK; | ||
266 | default: | ||
267 | return SND_SOC_DOBJ_NONE; | ||
268 | } | ||
269 | } | ||
270 | |||
271 | static inline void soc_bind_err(struct soc_tplg *tplg, | 226 | static inline void soc_bind_err(struct soc_tplg *tplg, |
272 | struct snd_soc_tplg_ctl_hdr *hdr, int index) | 227 | struct snd_soc_tplg_ctl_hdr *hdr, int index) |
273 | { | 228 | { |
@@ -330,12 +285,22 @@ static int soc_tplg_widget_load(struct soc_tplg *tplg, | |||
330 | return 0; | 285 | return 0; |
331 | } | 286 | } |
332 | 287 | ||
333 | /* pass dynamic FEs configurations to component driver */ | 288 | /* pass DAI configurations to component driver for extra intialization */ |
334 | static int soc_tplg_pcm_dai_load(struct soc_tplg *tplg, | 289 | static int soc_tplg_dai_load(struct soc_tplg *tplg, |
335 | struct snd_soc_tplg_pcm_dai *pcm_dai, int num_pcm_dai) | 290 | struct snd_soc_dai_driver *dai_drv) |
291 | { | ||
292 | if (tplg->comp && tplg->ops && tplg->ops->dai_load) | ||
293 | return tplg->ops->dai_load(tplg->comp, dai_drv); | ||
294 | |||
295 | return 0; | ||
296 | } | ||
297 | |||
298 | /* pass link configurations to component driver for extra intialization */ | ||
299 | static int soc_tplg_dai_link_load(struct soc_tplg *tplg, | ||
300 | struct snd_soc_dai_link *link) | ||
336 | { | 301 | { |
337 | if (tplg->comp && tplg->ops && tplg->ops->pcm_dai_load) | 302 | if (tplg->comp && tplg->ops && tplg->ops->link_load) |
338 | return tplg->ops->pcm_dai_load(tplg->comp, pcm_dai, num_pcm_dai); | 303 | return tplg->ops->link_load(tplg->comp, link); |
339 | 304 | ||
340 | return 0; | 305 | return 0; |
341 | } | 306 | } |
@@ -495,18 +460,39 @@ static void remove_widget(struct snd_soc_component *comp, | |||
495 | /* widget w is freed by soc-dapm.c */ | 460 | /* widget w is freed by soc-dapm.c */ |
496 | } | 461 | } |
497 | 462 | ||
498 | /* remove PCM DAI configurations */ | 463 | /* remove DAI configurations */ |
499 | static void remove_pcm_dai(struct snd_soc_component *comp, | 464 | static void remove_dai(struct snd_soc_component *comp, |
465 | struct snd_soc_dobj *dobj, int pass) | ||
466 | { | ||
467 | struct snd_soc_dai_driver *dai_drv = | ||
468 | container_of(dobj, struct snd_soc_dai_driver, dobj); | ||
469 | |||
470 | if (pass != SOC_TPLG_PASS_PCM_DAI) | ||
471 | return; | ||
472 | |||
473 | if (dobj->ops && dobj->ops->dai_unload) | ||
474 | dobj->ops->dai_unload(comp, dobj); | ||
475 | |||
476 | list_del(&dobj->list); | ||
477 | kfree(dai_drv); | ||
478 | } | ||
479 | |||
480 | /* remove link configurations */ | ||
481 | static void remove_link(struct snd_soc_component *comp, | ||
500 | struct snd_soc_dobj *dobj, int pass) | 482 | struct snd_soc_dobj *dobj, int pass) |
501 | { | 483 | { |
484 | struct snd_soc_dai_link *link = | ||
485 | container_of(dobj, struct snd_soc_dai_link, dobj); | ||
486 | |||
502 | if (pass != SOC_TPLG_PASS_PCM_DAI) | 487 | if (pass != SOC_TPLG_PASS_PCM_DAI) |
503 | return; | 488 | return; |
504 | 489 | ||
505 | if (dobj->ops && dobj->ops->pcm_dai_unload) | 490 | if (dobj->ops && dobj->ops->link_unload) |
506 | dobj->ops->pcm_dai_unload(comp, dobj); | 491 | dobj->ops->link_unload(comp, dobj); |
507 | 492 | ||
508 | list_del(&dobj->list); | 493 | list_del(&dobj->list); |
509 | kfree(dobj); | 494 | snd_soc_remove_dai_link(comp->card, link); |
495 | kfree(link); | ||
510 | } | 496 | } |
511 | 497 | ||
512 | /* bind a kcontrol to it's IO handlers */ | 498 | /* bind a kcontrol to it's IO handlers */ |
@@ -1544,18 +1530,116 @@ static int soc_tplg_dapm_complete(struct soc_tplg *tplg) | |||
1544 | return 0; | 1530 | return 0; |
1545 | } | 1531 | } |
1546 | 1532 | ||
1547 | static int soc_tplg_pcm_dai_elems_load(struct soc_tplg *tplg, | 1533 | static void set_stream_info(struct snd_soc_pcm_stream *stream, |
1534 | struct snd_soc_tplg_stream_caps *caps) | ||
1535 | { | ||
1536 | stream->stream_name = kstrdup(caps->name, GFP_KERNEL); | ||
1537 | stream->channels_min = caps->channels_min; | ||
1538 | stream->channels_max = caps->channels_max; | ||
1539 | stream->rates = caps->rates; | ||
1540 | stream->rate_min = caps->rate_min; | ||
1541 | stream->rate_max = caps->rate_max; | ||
1542 | stream->formats = caps->formats; | ||
1543 | } | ||
1544 | |||
1545 | static int soc_tplg_dai_create(struct soc_tplg *tplg, | ||
1546 | struct snd_soc_tplg_pcm *pcm) | ||
1547 | { | ||
1548 | struct snd_soc_dai_driver *dai_drv; | ||
1549 | struct snd_soc_pcm_stream *stream; | ||
1550 | struct snd_soc_tplg_stream_caps *caps; | ||
1551 | int ret; | ||
1552 | |||
1553 | dai_drv = kzalloc(sizeof(struct snd_soc_dai_driver), GFP_KERNEL); | ||
1554 | if (dai_drv == NULL) | ||
1555 | return -ENOMEM; | ||
1556 | |||
1557 | dai_drv->name = pcm->dai_name; | ||
1558 | dai_drv->id = pcm->dai_id; | ||
1559 | |||
1560 | if (pcm->playback) { | ||
1561 | stream = &dai_drv->playback; | ||
1562 | caps = &pcm->caps[SND_SOC_TPLG_STREAM_PLAYBACK]; | ||
1563 | set_stream_info(stream, caps); | ||
1564 | } | ||
1565 | |||
1566 | if (pcm->capture) { | ||
1567 | stream = &dai_drv->capture; | ||
1568 | caps = &pcm->caps[SND_SOC_TPLG_STREAM_CAPTURE]; | ||
1569 | set_stream_info(stream, caps); | ||
1570 | } | ||
1571 | |||
1572 | /* pass control to component driver for optional further init */ | ||
1573 | ret = soc_tplg_dai_load(tplg, dai_drv); | ||
1574 | if (ret < 0) { | ||
1575 | dev_err(tplg->comp->dev, "ASoC: DAI loading failed\n"); | ||
1576 | kfree(dai_drv); | ||
1577 | return ret; | ||
1578 | } | ||
1579 | |||
1580 | dai_drv->dobj.index = tplg->index; | ||
1581 | dai_drv->dobj.ops = tplg->ops; | ||
1582 | dai_drv->dobj.type = SND_SOC_DOBJ_PCM; | ||
1583 | list_add(&dai_drv->dobj.list, &tplg->comp->dobj_list); | ||
1584 | |||
1585 | /* register the DAI to the component */ | ||
1586 | return snd_soc_register_dai(tplg->comp, dai_drv); | ||
1587 | } | ||
1588 | |||
1589 | static int soc_tplg_link_create(struct soc_tplg *tplg, | ||
1590 | struct snd_soc_tplg_pcm *pcm) | ||
1591 | { | ||
1592 | struct snd_soc_dai_link *link; | ||
1593 | int ret; | ||
1594 | |||
1595 | link = kzalloc(sizeof(struct snd_soc_dai_link), GFP_KERNEL); | ||
1596 | if (link == NULL) | ||
1597 | return -ENOMEM; | ||
1598 | |||
1599 | link->name = pcm->pcm_name; | ||
1600 | link->stream_name = pcm->pcm_name; | ||
1601 | |||
1602 | /* pass control to component driver for optional further init */ | ||
1603 | ret = soc_tplg_dai_link_load(tplg, link); | ||
1604 | if (ret < 0) { | ||
1605 | dev_err(tplg->comp->dev, "ASoC: FE link loading failed\n"); | ||
1606 | kfree(link); | ||
1607 | return ret; | ||
1608 | } | ||
1609 | |||
1610 | link->dobj.index = tplg->index; | ||
1611 | link->dobj.ops = tplg->ops; | ||
1612 | link->dobj.type = SND_SOC_DOBJ_DAI_LINK; | ||
1613 | list_add(&link->dobj.list, &tplg->comp->dobj_list); | ||
1614 | |||
1615 | snd_soc_add_dai_link(tplg->comp->card, link); | ||
1616 | return 0; | ||
1617 | } | ||
1618 | |||
1619 | /* create a FE DAI and DAI link from the PCM object */ | ||
1620 | static int soc_tplg_pcm_create(struct soc_tplg *tplg, | ||
1621 | struct snd_soc_tplg_pcm *pcm) | ||
1622 | { | ||
1623 | int ret; | ||
1624 | |||
1625 | ret = soc_tplg_dai_create(tplg, pcm); | ||
1626 | if (ret < 0) | ||
1627 | return ret; | ||
1628 | |||
1629 | return soc_tplg_link_create(tplg, pcm); | ||
1630 | } | ||
1631 | |||
1632 | static int soc_tplg_pcm_elems_load(struct soc_tplg *tplg, | ||
1548 | struct snd_soc_tplg_hdr *hdr) | 1633 | struct snd_soc_tplg_hdr *hdr) |
1549 | { | 1634 | { |
1550 | struct snd_soc_tplg_pcm_dai *pcm_dai; | 1635 | struct snd_soc_tplg_pcm *pcm; |
1551 | struct snd_soc_dobj *dobj; | ||
1552 | int count = hdr->count; | 1636 | int count = hdr->count; |
1553 | int ret; | 1637 | int i; |
1554 | 1638 | ||
1555 | if (tplg->pass != SOC_TPLG_PASS_PCM_DAI) | 1639 | if (tplg->pass != SOC_TPLG_PASS_PCM_DAI) |
1556 | return 0; | 1640 | return 0; |
1557 | 1641 | ||
1558 | pcm_dai = (struct snd_soc_tplg_pcm_dai *)tplg->pos; | 1642 | pcm = (struct snd_soc_tplg_pcm *)tplg->pos; |
1559 | 1643 | ||
1560 | if (soc_tplg_check_elem_count(tplg, | 1644 | if (soc_tplg_check_elem_count(tplg, |
1561 | sizeof(struct snd_soc_tplg_pcm), count, | 1645 | sizeof(struct snd_soc_tplg_pcm), count, |
@@ -1565,31 +1649,16 @@ static int soc_tplg_pcm_dai_elems_load(struct soc_tplg *tplg, | |||
1565 | return -EINVAL; | 1649 | return -EINVAL; |
1566 | } | 1650 | } |
1567 | 1651 | ||
1652 | /* create the FE DAIs and DAI links */ | ||
1653 | for (i = 0; i < count; i++) { | ||
1654 | soc_tplg_pcm_create(tplg, pcm); | ||
1655 | pcm++; | ||
1656 | } | ||
1657 | |||
1568 | dev_dbg(tplg->dev, "ASoC: adding %d PCM DAIs\n", count); | 1658 | dev_dbg(tplg->dev, "ASoC: adding %d PCM DAIs\n", count); |
1569 | tplg->pos += sizeof(struct snd_soc_tplg_pcm) * count; | 1659 | tplg->pos += sizeof(struct snd_soc_tplg_pcm) * count; |
1570 | 1660 | ||
1571 | dobj = kzalloc(sizeof(struct snd_soc_dobj), GFP_KERNEL); | ||
1572 | if (dobj == NULL) | ||
1573 | return -ENOMEM; | ||
1574 | |||
1575 | /* Call the platform driver call back to register the dais */ | ||
1576 | ret = soc_tplg_pcm_dai_load(tplg, pcm_dai, count); | ||
1577 | if (ret < 0) { | ||
1578 | dev_err(tplg->comp->dev, "ASoC: PCM DAI loading failed\n"); | ||
1579 | goto err; | ||
1580 | } | ||
1581 | |||
1582 | dobj->type = get_dobj_type(hdr, NULL); | ||
1583 | dobj->pcm_dai.count = count; | ||
1584 | dobj->pcm_dai.pd = pcm_dai; | ||
1585 | dobj->ops = tplg->ops; | ||
1586 | dobj->index = tplg->index; | ||
1587 | list_add(&dobj->list, &tplg->comp->dobj_list); | ||
1588 | return 0; | 1661 | return 0; |
1589 | |||
1590 | err: | ||
1591 | kfree(dobj); | ||
1592 | return ret; | ||
1593 | } | 1662 | } |
1594 | 1663 | ||
1595 | static int soc_tplg_manifest_load(struct soc_tplg *tplg, | 1664 | static int soc_tplg_manifest_load(struct soc_tplg *tplg, |
@@ -1681,9 +1750,7 @@ static int soc_tplg_load_header(struct soc_tplg *tplg, | |||
1681 | case SND_SOC_TPLG_TYPE_DAPM_WIDGET: | 1750 | case SND_SOC_TPLG_TYPE_DAPM_WIDGET: |
1682 | return soc_tplg_dapm_widget_elems_load(tplg, hdr); | 1751 | return soc_tplg_dapm_widget_elems_load(tplg, hdr); |
1683 | case SND_SOC_TPLG_TYPE_PCM: | 1752 | case SND_SOC_TPLG_TYPE_PCM: |
1684 | case SND_SOC_TPLG_TYPE_DAI_LINK: | 1753 | return soc_tplg_pcm_elems_load(tplg, hdr); |
1685 | case SND_SOC_TPLG_TYPE_CODEC_LINK: | ||
1686 | return soc_tplg_pcm_dai_elems_load(tplg, hdr); | ||
1687 | case SND_SOC_TPLG_TYPE_MANIFEST: | 1754 | case SND_SOC_TPLG_TYPE_MANIFEST: |
1688 | return soc_tplg_manifest_load(tplg, hdr); | 1755 | return soc_tplg_manifest_load(tplg, hdr); |
1689 | default: | 1756 | default: |
@@ -1841,9 +1908,10 @@ int snd_soc_tplg_component_remove(struct snd_soc_component *comp, u32 index) | |||
1841 | remove_widget(comp, dobj, pass); | 1908 | remove_widget(comp, dobj, pass); |
1842 | break; | 1909 | break; |
1843 | case SND_SOC_DOBJ_PCM: | 1910 | case SND_SOC_DOBJ_PCM: |
1911 | remove_dai(comp, dobj, pass); | ||
1912 | break; | ||
1844 | case SND_SOC_DOBJ_DAI_LINK: | 1913 | case SND_SOC_DOBJ_DAI_LINK: |
1845 | case SND_SOC_DOBJ_CODEC_LINK: | 1914 | remove_link(comp, dobj, pass); |
1846 | remove_pcm_dai(comp, dobj, pass); | ||
1847 | break; | 1915 | break; |
1848 | default: | 1916 | default: |
1849 | dev_err(comp->dev, "ASoC: invalid component type %d for removal\n", | 1917 | dev_err(comp->dev, "ASoC: invalid component type %d for removal\n", |
diff --git a/sound/soc/sunxi/Kconfig b/sound/soc/sunxi/Kconfig index 84c72ec6ad73..ae42294ef688 100644 --- a/sound/soc/sunxi/Kconfig +++ b/sound/soc/sunxi/Kconfig | |||
@@ -8,4 +8,12 @@ config SND_SUN4I_CODEC | |||
8 | Select Y or M to add support for the Codec embedded in the Allwinner | 8 | Select Y or M to add support for the Codec embedded in the Allwinner |
9 | A10 and affiliated SoCs. | 9 | A10 and affiliated SoCs. |
10 | 10 | ||
11 | config SND_SUN4I_SPDIF | ||
12 | tristate "Allwinner A10 SPDIF Support" | ||
13 | depends on OF | ||
14 | select SND_SOC_GENERIC_DMAENGINE_PCM | ||
15 | select REGMAP_MMIO | ||
16 | help | ||
17 | Say Y or M to add support for the S/PDIF audio block in the Allwinner | ||
18 | A10 and affiliated SoCs. | ||
11 | endmenu | 19 | endmenu |
diff --git a/sound/soc/sunxi/Makefile b/sound/soc/sunxi/Makefile index ea8a08c881d6..8f5e889667f1 100644 --- a/sound/soc/sunxi/Makefile +++ b/sound/soc/sunxi/Makefile | |||
@@ -1,2 +1,3 @@ | |||
1 | obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o | 1 | obj-$(CONFIG_SND_SUN4I_CODEC) += sun4i-codec.o |
2 | 2 | ||
3 | obj-$(CONFIG_SND_SUN4I_SPDIF) += sun4i-spdif.o | ||
diff --git a/sound/soc/sunxi/sun4i-spdif.c b/sound/soc/sunxi/sun4i-spdif.c new file mode 100644 index 000000000000..0b04fb02125c --- /dev/null +++ b/sound/soc/sunxi/sun4i-spdif.c | |||
@@ -0,0 +1,550 @@ | |||
1 | /* | ||
2 | * ALSA SoC SPDIF Audio Layer | ||
3 | * | ||
4 | * Copyright 2015 Andrea Venturi <be17068@iperbole.bo.it> | ||
5 | * Copyright 2015 Marcus Cooper <codekipper@gmail.com> | ||
6 | * | ||
7 | * Based on the Allwinner SDK driver, released under the GPL. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | */ | ||
19 | |||
20 | #include <linux/clk.h> | ||
21 | #include <linux/delay.h> | ||
22 | #include <linux/device.h> | ||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/regmap.h> | ||
26 | #include <linux/of_address.h> | ||
27 | #include <linux/of_device.h> | ||
28 | #include <linux/ioport.h> | ||
29 | #include <linux/module.h> | ||
30 | #include <linux/platform_device.h> | ||
31 | #include <linux/pm_runtime.h> | ||
32 | #include <sound/dmaengine_pcm.h> | ||
33 | #include <sound/pcm_params.h> | ||
34 | #include <sound/soc.h> | ||
35 | |||
36 | #define SUN4I_SPDIF_CTL (0x00) | ||
37 | #define SUN4I_SPDIF_CTL_MCLKDIV(v) ((v) << 4) /* v even */ | ||
38 | #define SUN4I_SPDIF_CTL_MCLKOUTEN BIT(2) | ||
39 | #define SUN4I_SPDIF_CTL_GEN BIT(1) | ||
40 | #define SUN4I_SPDIF_CTL_RESET BIT(0) | ||
41 | |||
42 | #define SUN4I_SPDIF_TXCFG (0x04) | ||
43 | #define SUN4I_SPDIF_TXCFG_SINGLEMOD BIT(31) | ||
44 | #define SUN4I_SPDIF_TXCFG_ASS BIT(17) | ||
45 | #define SUN4I_SPDIF_TXCFG_NONAUDIO BIT(16) | ||
46 | #define SUN4I_SPDIF_TXCFG_TXRATIO(v) ((v) << 4) | ||
47 | #define SUN4I_SPDIF_TXCFG_TXRATIO_MASK GENMASK(8, 4) | ||
48 | #define SUN4I_SPDIF_TXCFG_FMTRVD GENMASK(3, 2) | ||
49 | #define SUN4I_SPDIF_TXCFG_FMT16BIT (0 << 2) | ||
50 | #define SUN4I_SPDIF_TXCFG_FMT20BIT (1 << 2) | ||
51 | #define SUN4I_SPDIF_TXCFG_FMT24BIT (2 << 2) | ||
52 | #define SUN4I_SPDIF_TXCFG_CHSTMODE BIT(1) | ||
53 | #define SUN4I_SPDIF_TXCFG_TXEN BIT(0) | ||
54 | |||
55 | #define SUN4I_SPDIF_RXCFG (0x08) | ||
56 | #define SUN4I_SPDIF_RXCFG_LOCKFLAG BIT(4) | ||
57 | #define SUN4I_SPDIF_RXCFG_CHSTSRC BIT(3) | ||
58 | #define SUN4I_SPDIF_RXCFG_CHSTCP BIT(1) | ||
59 | #define SUN4I_SPDIF_RXCFG_RXEN BIT(0) | ||
60 | |||
61 | #define SUN4I_SPDIF_TXFIFO (0x0C) | ||
62 | |||
63 | #define SUN4I_SPDIF_RXFIFO (0x10) | ||
64 | |||
65 | #define SUN4I_SPDIF_FCTL (0x14) | ||
66 | #define SUN4I_SPDIF_FCTL_FIFOSRC BIT(31) | ||
67 | #define SUN4I_SPDIF_FCTL_FTX BIT(17) | ||
68 | #define SUN4I_SPDIF_FCTL_FRX BIT(16) | ||
69 | #define SUN4I_SPDIF_FCTL_TXTL(v) ((v) << 8) | ||
70 | #define SUN4I_SPDIF_FCTL_TXTL_MASK GENMASK(12, 8) | ||
71 | #define SUN4I_SPDIF_FCTL_RXTL(v) ((v) << 3) | ||
72 | #define SUN4I_SPDIF_FCTL_RXTL_MASK GENMASK(7, 3) | ||
73 | #define SUN4I_SPDIF_FCTL_TXIM BIT(2) | ||
74 | #define SUN4I_SPDIF_FCTL_RXOM(v) ((v) << 0) | ||
75 | #define SUN4I_SPDIF_FCTL_RXOM_MASK GENMASK(1, 0) | ||
76 | |||
77 | #define SUN4I_SPDIF_FSTA (0x18) | ||
78 | #define SUN4I_SPDIF_FSTA_TXE BIT(14) | ||
79 | #define SUN4I_SPDIF_FSTA_TXECNTSHT (8) | ||
80 | #define SUN4I_SPDIF_FSTA_RXA BIT(6) | ||
81 | #define SUN4I_SPDIF_FSTA_RXACNTSHT (0) | ||
82 | |||
83 | #define SUN4I_SPDIF_INT (0x1C) | ||
84 | #define SUN4I_SPDIF_INT_RXLOCKEN BIT(18) | ||
85 | #define SUN4I_SPDIF_INT_RXUNLOCKEN BIT(17) | ||
86 | #define SUN4I_SPDIF_INT_RXPARERREN BIT(16) | ||
87 | #define SUN4I_SPDIF_INT_TXDRQEN BIT(7) | ||
88 | #define SUN4I_SPDIF_INT_TXUIEN BIT(6) | ||
89 | #define SUN4I_SPDIF_INT_TXOIEN BIT(5) | ||
90 | #define SUN4I_SPDIF_INT_TXEIEN BIT(4) | ||
91 | #define SUN4I_SPDIF_INT_RXDRQEN BIT(2) | ||
92 | #define SUN4I_SPDIF_INT_RXOIEN BIT(1) | ||
93 | #define SUN4I_SPDIF_INT_RXAIEN BIT(0) | ||
94 | |||
95 | #define SUN4I_SPDIF_ISTA (0x20) | ||
96 | #define SUN4I_SPDIF_ISTA_RXLOCKSTA BIT(18) | ||
97 | #define SUN4I_SPDIF_ISTA_RXUNLOCKSTA BIT(17) | ||
98 | #define SUN4I_SPDIF_ISTA_RXPARERRSTA BIT(16) | ||
99 | #define SUN4I_SPDIF_ISTA_TXUSTA BIT(6) | ||
100 | #define SUN4I_SPDIF_ISTA_TXOSTA BIT(5) | ||
101 | #define SUN4I_SPDIF_ISTA_TXESTA BIT(4) | ||
102 | #define SUN4I_SPDIF_ISTA_RXOSTA BIT(1) | ||
103 | #define SUN4I_SPDIF_ISTA_RXASTA BIT(0) | ||
104 | |||
105 | #define SUN4I_SPDIF_TXCNT (0x24) | ||
106 | |||
107 | #define SUN4I_SPDIF_RXCNT (0x28) | ||
108 | |||
109 | #define SUN4I_SPDIF_TXCHSTA0 (0x2C) | ||
110 | #define SUN4I_SPDIF_TXCHSTA0_CLK(v) ((v) << 28) | ||
111 | #define SUN4I_SPDIF_TXCHSTA0_SAMFREQ(v) ((v) << 24) | ||
112 | #define SUN4I_SPDIF_TXCHSTA0_SAMFREQ_MASK GENMASK(27, 24) | ||
113 | #define SUN4I_SPDIF_TXCHSTA0_CHNUM(v) ((v) << 20) | ||
114 | #define SUN4I_SPDIF_TXCHSTA0_CHNUM_MASK GENMASK(23, 20) | ||
115 | #define SUN4I_SPDIF_TXCHSTA0_SRCNUM(v) ((v) << 16) | ||
116 | #define SUN4I_SPDIF_TXCHSTA0_CATACOD(v) ((v) << 8) | ||
117 | #define SUN4I_SPDIF_TXCHSTA0_MODE(v) ((v) << 6) | ||
118 | #define SUN4I_SPDIF_TXCHSTA0_EMPHASIS(v) ((v) << 3) | ||
119 | #define SUN4I_SPDIF_TXCHSTA0_CP BIT(2) | ||
120 | #define SUN4I_SPDIF_TXCHSTA0_AUDIO BIT(1) | ||
121 | #define SUN4I_SPDIF_TXCHSTA0_PRO BIT(0) | ||
122 | |||
123 | #define SUN4I_SPDIF_TXCHSTA1 (0x30) | ||
124 | #define SUN4I_SPDIF_TXCHSTA1_CGMSA(v) ((v) << 8) | ||
125 | #define SUN4I_SPDIF_TXCHSTA1_ORISAMFREQ(v) ((v) << 4) | ||
126 | #define SUN4I_SPDIF_TXCHSTA1_ORISAMFREQ_MASK GENMASK(7, 4) | ||
127 | #define SUN4I_SPDIF_TXCHSTA1_SAMWORDLEN(v) ((v) << 1) | ||
128 | #define SUN4I_SPDIF_TXCHSTA1_MAXWORDLEN BIT(0) | ||
129 | |||
130 | #define SUN4I_SPDIF_RXCHSTA0 (0x34) | ||
131 | #define SUN4I_SPDIF_RXCHSTA0_CLK(v) ((v) << 28) | ||
132 | #define SUN4I_SPDIF_RXCHSTA0_SAMFREQ(v) ((v) << 24) | ||
133 | #define SUN4I_SPDIF_RXCHSTA0_CHNUM(v) ((v) << 20) | ||
134 | #define SUN4I_SPDIF_RXCHSTA0_SRCNUM(v) ((v) << 16) | ||
135 | #define SUN4I_SPDIF_RXCHSTA0_CATACOD(v) ((v) << 8) | ||
136 | #define SUN4I_SPDIF_RXCHSTA0_MODE(v) ((v) << 6) | ||
137 | #define SUN4I_SPDIF_RXCHSTA0_EMPHASIS(v) ((v) << 3) | ||
138 | #define SUN4I_SPDIF_RXCHSTA0_CP BIT(2) | ||
139 | #define SUN4I_SPDIF_RXCHSTA0_AUDIO BIT(1) | ||
140 | #define SUN4I_SPDIF_RXCHSTA0_PRO BIT(0) | ||
141 | |||
142 | #define SUN4I_SPDIF_RXCHSTA1 (0x38) | ||
143 | #define SUN4I_SPDIF_RXCHSTA1_CGMSA(v) ((v) << 8) | ||
144 | #define SUN4I_SPDIF_RXCHSTA1_ORISAMFREQ(v) ((v) << 4) | ||
145 | #define SUN4I_SPDIF_RXCHSTA1_SAMWORDLEN(v) ((v) << 1) | ||
146 | #define SUN4I_SPDIF_RXCHSTA1_MAXWORDLEN BIT(0) | ||
147 | |||
148 | /* Defines for Sampling Frequency */ | ||
149 | #define SUN4I_SPDIF_SAMFREQ_44_1KHZ 0x0 | ||
150 | #define SUN4I_SPDIF_SAMFREQ_NOT_INDICATED 0x1 | ||
151 | #define SUN4I_SPDIF_SAMFREQ_48KHZ 0x2 | ||
152 | #define SUN4I_SPDIF_SAMFREQ_32KHZ 0x3 | ||
153 | #define SUN4I_SPDIF_SAMFREQ_22_05KHZ 0x4 | ||
154 | #define SUN4I_SPDIF_SAMFREQ_24KHZ 0x6 | ||
155 | #define SUN4I_SPDIF_SAMFREQ_88_2KHZ 0x8 | ||
156 | #define SUN4I_SPDIF_SAMFREQ_76_8KHZ 0x9 | ||
157 | #define SUN4I_SPDIF_SAMFREQ_96KHZ 0xa | ||
158 | #define SUN4I_SPDIF_SAMFREQ_176_4KHZ 0xc | ||
159 | #define SUN4I_SPDIF_SAMFREQ_192KHZ 0xe | ||
160 | |||
161 | struct sun4i_spdif_dev { | ||
162 | struct platform_device *pdev; | ||
163 | struct clk *spdif_clk; | ||
164 | struct clk *apb_clk; | ||
165 | struct snd_soc_dai_driver cpu_dai_drv; | ||
166 | struct regmap *regmap; | ||
167 | struct snd_dmaengine_dai_dma_data dma_params_tx; | ||
168 | }; | ||
169 | |||
170 | static void sun4i_spdif_configure(struct sun4i_spdif_dev *host) | ||
171 | { | ||
172 | /* soft reset SPDIF */ | ||
173 | regmap_write(host->regmap, SUN4I_SPDIF_CTL, SUN4I_SPDIF_CTL_RESET); | ||
174 | |||
175 | /* flush TX FIFO */ | ||
176 | regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL, | ||
177 | SUN4I_SPDIF_FCTL_FTX, SUN4I_SPDIF_FCTL_FTX); | ||
178 | |||
179 | /* clear TX counter */ | ||
180 | regmap_write(host->regmap, SUN4I_SPDIF_TXCNT, 0); | ||
181 | } | ||
182 | |||
183 | static void sun4i_snd_txctrl_on(struct snd_pcm_substream *substream, | ||
184 | struct sun4i_spdif_dev *host) | ||
185 | { | ||
186 | if (substream->runtime->channels == 1) | ||
187 | regmap_update_bits(host->regmap, SUN4I_SPDIF_TXCFG, | ||
188 | SUN4I_SPDIF_TXCFG_SINGLEMOD, | ||
189 | SUN4I_SPDIF_TXCFG_SINGLEMOD); | ||
190 | |||
191 | /* SPDIF TX ENABLE */ | ||
192 | regmap_update_bits(host->regmap, SUN4I_SPDIF_TXCFG, | ||
193 | SUN4I_SPDIF_TXCFG_TXEN, SUN4I_SPDIF_TXCFG_TXEN); | ||
194 | |||
195 | /* DRQ ENABLE */ | ||
196 | regmap_update_bits(host->regmap, SUN4I_SPDIF_INT, | ||
197 | SUN4I_SPDIF_INT_TXDRQEN, SUN4I_SPDIF_INT_TXDRQEN); | ||
198 | |||
199 | /* Global enable */ | ||
200 | regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL, | ||
201 | SUN4I_SPDIF_CTL_GEN, SUN4I_SPDIF_CTL_GEN); | ||
202 | } | ||
203 | |||
204 | static void sun4i_snd_txctrl_off(struct snd_pcm_substream *substream, | ||
205 | struct sun4i_spdif_dev *host) | ||
206 | { | ||
207 | /* SPDIF TX DISABLE */ | ||
208 | regmap_update_bits(host->regmap, SUN4I_SPDIF_TXCFG, | ||
209 | SUN4I_SPDIF_TXCFG_TXEN, 0); | ||
210 | |||
211 | /* DRQ DISABLE */ | ||
212 | regmap_update_bits(host->regmap, SUN4I_SPDIF_INT, | ||
213 | SUN4I_SPDIF_INT_TXDRQEN, 0); | ||
214 | |||
215 | /* Global disable */ | ||
216 | regmap_update_bits(host->regmap, SUN4I_SPDIF_CTL, | ||
217 | SUN4I_SPDIF_CTL_GEN, 0); | ||
218 | } | ||
219 | |||
220 | static int sun4i_spdif_startup(struct snd_pcm_substream *substream, | ||
221 | struct snd_soc_dai *cpu_dai) | ||
222 | { | ||
223 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
224 | struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(rtd->cpu_dai); | ||
225 | |||
226 | if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) | ||
227 | return -EINVAL; | ||
228 | |||
229 | sun4i_spdif_configure(host); | ||
230 | |||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream, | ||
235 | struct snd_pcm_hw_params *params, | ||
236 | struct snd_soc_dai *cpu_dai) | ||
237 | { | ||
238 | int ret = 0; | ||
239 | int fmt; | ||
240 | unsigned long rate = params_rate(params); | ||
241 | u32 mclk_div = 0; | ||
242 | unsigned int mclk = 0; | ||
243 | u32 reg_val; | ||
244 | struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(cpu_dai); | ||
245 | struct platform_device *pdev = host->pdev; | ||
246 | |||
247 | /* Add the PCM and raw data select interface */ | ||
248 | switch (params_channels(params)) { | ||
249 | case 1: /* PCM mode */ | ||
250 | case 2: | ||
251 | fmt = 0; | ||
252 | break; | ||
253 | case 4: /* raw data mode */ | ||
254 | fmt = SUN4I_SPDIF_TXCFG_NONAUDIO; | ||
255 | break; | ||
256 | default: | ||
257 | return -EINVAL; | ||
258 | } | ||
259 | |||
260 | switch (params_format(params)) { | ||
261 | case SNDRV_PCM_FORMAT_S16_LE: | ||
262 | fmt |= SUN4I_SPDIF_TXCFG_FMT16BIT; | ||
263 | break; | ||
264 | case SNDRV_PCM_FORMAT_S20_3LE: | ||
265 | fmt |= SUN4I_SPDIF_TXCFG_FMT20BIT; | ||
266 | break; | ||
267 | case SNDRV_PCM_FORMAT_S24_LE: | ||
268 | fmt |= SUN4I_SPDIF_TXCFG_FMT24BIT; | ||
269 | break; | ||
270 | default: | ||
271 | return -EINVAL; | ||
272 | } | ||
273 | |||
274 | switch (rate) { | ||
275 | case 22050: | ||
276 | case 44100: | ||
277 | case 88200: | ||
278 | case 176400: | ||
279 | mclk = 22579200; | ||
280 | break; | ||
281 | case 24000: | ||
282 | case 32000: | ||
283 | case 48000: | ||
284 | case 96000: | ||
285 | case 192000: | ||
286 | mclk = 24576000; | ||
287 | break; | ||
288 | default: | ||
289 | return -EINVAL; | ||
290 | } | ||
291 | |||
292 | ret = clk_set_rate(host->spdif_clk, mclk); | ||
293 | if (ret < 0) { | ||
294 | dev_err(&pdev->dev, | ||
295 | "Setting SPDIF clock rate for %d Hz failed!\n", mclk); | ||
296 | return ret; | ||
297 | } | ||
298 | |||
299 | regmap_update_bits(host->regmap, SUN4I_SPDIF_FCTL, | ||
300 | SUN4I_SPDIF_FCTL_TXIM, SUN4I_SPDIF_FCTL_TXIM); | ||
301 | |||
302 | switch (rate) { | ||
303 | case 22050: | ||
304 | case 24000: | ||
305 | mclk_div = 8; | ||
306 | break; | ||
307 | case 32000: | ||
308 | mclk_div = 6; | ||
309 | break; | ||
310 | case 44100: | ||
311 | case 48000: | ||
312 | mclk_div = 4; | ||
313 | break; | ||
314 | case 88200: | ||
315 | case 96000: | ||
316 | mclk_div = 2; | ||
317 | break; | ||
318 | case 176400: | ||
319 | case 192000: | ||
320 | mclk_div = 1; | ||
321 | break; | ||
322 | default: | ||
323 | return -EINVAL; | ||
324 | } | ||
325 | |||
326 | reg_val = 0; | ||
327 | reg_val |= SUN4I_SPDIF_TXCFG_ASS; | ||
328 | reg_val |= fmt; /* set non audio and bit depth */ | ||
329 | reg_val |= SUN4I_SPDIF_TXCFG_CHSTMODE; | ||
330 | reg_val |= SUN4I_SPDIF_TXCFG_TXRATIO(mclk_div - 1); | ||
331 | regmap_write(host->regmap, SUN4I_SPDIF_TXCFG, reg_val); | ||
332 | |||
333 | return 0; | ||
334 | } | ||
335 | |||
336 | static int sun4i_spdif_trigger(struct snd_pcm_substream *substream, int cmd, | ||
337 | struct snd_soc_dai *dai) | ||
338 | { | ||
339 | int ret = 0; | ||
340 | struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(dai); | ||
341 | |||
342 | if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) | ||
343 | return -EINVAL; | ||
344 | |||
345 | switch (cmd) { | ||
346 | case SNDRV_PCM_TRIGGER_START: | ||
347 | case SNDRV_PCM_TRIGGER_RESUME: | ||
348 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | ||
349 | sun4i_snd_txctrl_on(substream, host); | ||
350 | break; | ||
351 | |||
352 | case SNDRV_PCM_TRIGGER_STOP: | ||
353 | case SNDRV_PCM_TRIGGER_SUSPEND: | ||
354 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | ||
355 | sun4i_snd_txctrl_off(substream, host); | ||
356 | break; | ||
357 | |||
358 | default: | ||
359 | ret = -EINVAL; | ||
360 | break; | ||
361 | } | ||
362 | return ret; | ||
363 | } | ||
364 | |||
365 | static int sun4i_spdif_soc_dai_probe(struct snd_soc_dai *dai) | ||
366 | { | ||
367 | struct sun4i_spdif_dev *host = snd_soc_dai_get_drvdata(dai); | ||
368 | |||
369 | snd_soc_dai_init_dma_data(dai, &host->dma_params_tx, NULL); | ||
370 | return 0; | ||
371 | } | ||
372 | |||
373 | static const struct snd_soc_dai_ops sun4i_spdif_dai_ops = { | ||
374 | .startup = sun4i_spdif_startup, | ||
375 | .trigger = sun4i_spdif_trigger, | ||
376 | .hw_params = sun4i_spdif_hw_params, | ||
377 | }; | ||
378 | |||
379 | static const struct regmap_config sun4i_spdif_regmap_config = { | ||
380 | .reg_bits = 32, | ||
381 | .reg_stride = 4, | ||
382 | .val_bits = 32, | ||
383 | .max_register = SUN4I_SPDIF_RXCHSTA1, | ||
384 | }; | ||
385 | |||
386 | #define SUN4I_RATES SNDRV_PCM_RATE_8000_192000 | ||
387 | |||
388 | #define SUN4I_FORMATS (SNDRV_PCM_FORMAT_S16_LE | \ | ||
389 | SNDRV_PCM_FORMAT_S20_3LE | \ | ||
390 | SNDRV_PCM_FORMAT_S24_LE) | ||
391 | |||
392 | static struct snd_soc_dai_driver sun4i_spdif_dai = { | ||
393 | .playback = { | ||
394 | .channels_min = 1, | ||
395 | .channels_max = 2, | ||
396 | .rates = SUN4I_RATES, | ||
397 | .formats = SUN4I_FORMATS, | ||
398 | }, | ||
399 | .probe = sun4i_spdif_soc_dai_probe, | ||
400 | .ops = &sun4i_spdif_dai_ops, | ||
401 | .name = "spdif", | ||
402 | }; | ||
403 | |||
404 | static const struct snd_soc_dapm_widget dit_widgets[] = { | ||
405 | SND_SOC_DAPM_OUTPUT("spdif-out"), | ||
406 | }; | ||
407 | |||
408 | static const struct snd_soc_dapm_route dit_routes[] = { | ||
409 | { "spdif-out", NULL, "Playback" }, | ||
410 | }; | ||
411 | |||
412 | static const struct of_device_id sun4i_spdif_of_match[] = { | ||
413 | { .compatible = "allwinner,sun4i-a10-spdif", }, | ||
414 | { /* sentinel */ } | ||
415 | }; | ||
416 | MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match); | ||
417 | |||
418 | static const struct snd_soc_component_driver sun4i_spdif_component = { | ||
419 | .name = "sun4i-spdif", | ||
420 | }; | ||
421 | |||
422 | static int sun4i_spdif_runtime_suspend(struct device *dev) | ||
423 | { | ||
424 | struct sun4i_spdif_dev *host = dev_get_drvdata(dev); | ||
425 | |||
426 | clk_disable_unprepare(host->spdif_clk); | ||
427 | clk_disable_unprepare(host->apb_clk); | ||
428 | |||
429 | return 0; | ||
430 | } | ||
431 | |||
432 | static int sun4i_spdif_runtime_resume(struct device *dev) | ||
433 | { | ||
434 | struct sun4i_spdif_dev *host = dev_get_drvdata(dev); | ||
435 | |||
436 | clk_prepare_enable(host->spdif_clk); | ||
437 | clk_prepare_enable(host->apb_clk); | ||
438 | |||
439 | return 0; | ||
440 | } | ||
441 | |||
442 | static int sun4i_spdif_probe(struct platform_device *pdev) | ||
443 | { | ||
444 | struct sun4i_spdif_dev *host; | ||
445 | struct resource *res; | ||
446 | int ret; | ||
447 | void __iomem *base; | ||
448 | |||
449 | dev_dbg(&pdev->dev, "Entered %s\n", __func__); | ||
450 | |||
451 | host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); | ||
452 | if (!host) | ||
453 | return -ENOMEM; | ||
454 | |||
455 | host->pdev = pdev; | ||
456 | |||
457 | /* Initialize this copy of the CPU DAI driver structure */ | ||
458 | memcpy(&host->cpu_dai_drv, &sun4i_spdif_dai, sizeof(sun4i_spdif_dai)); | ||
459 | host->cpu_dai_drv.name = dev_name(&pdev->dev); | ||
460 | |||
461 | /* Get the addresses */ | ||
462 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
463 | base = devm_ioremap_resource(&pdev->dev, res); | ||
464 | if (IS_ERR(base)) | ||
465 | return PTR_ERR(base); | ||
466 | |||
467 | host->regmap = devm_regmap_init_mmio(&pdev->dev, base, | ||
468 | &sun4i_spdif_regmap_config); | ||
469 | |||
470 | /* Clocks */ | ||
471 | host->apb_clk = devm_clk_get(&pdev->dev, "apb"); | ||
472 | if (IS_ERR(host->apb_clk)) { | ||
473 | dev_err(&pdev->dev, "failed to get a apb clock.\n"); | ||
474 | return PTR_ERR(host->apb_clk); | ||
475 | } | ||
476 | |||
477 | host->spdif_clk = devm_clk_get(&pdev->dev, "spdif"); | ||
478 | if (IS_ERR(host->spdif_clk)) { | ||
479 | dev_err(&pdev->dev, "failed to get a spdif clock.\n"); | ||
480 | ret = PTR_ERR(host->spdif_clk); | ||
481 | goto err_disable_apb_clk; | ||
482 | } | ||
483 | |||
484 | host->dma_params_tx.addr = res->start + SUN4I_SPDIF_TXFIFO; | ||
485 | host->dma_params_tx.maxburst = 4; | ||
486 | host->dma_params_tx.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; | ||
487 | |||
488 | platform_set_drvdata(pdev, host); | ||
489 | |||
490 | ret = devm_snd_soc_register_component(&pdev->dev, | ||
491 | &sun4i_spdif_component, &sun4i_spdif_dai, 1); | ||
492 | if (ret) | ||
493 | goto err_disable_apb_clk; | ||
494 | |||
495 | pm_runtime_enable(&pdev->dev); | ||
496 | if (!pm_runtime_enabled(&pdev->dev)) { | ||
497 | ret = sun4i_spdif_runtime_resume(&pdev->dev); | ||
498 | if (ret) | ||
499 | goto err_unregister; | ||
500 | } | ||
501 | |||
502 | ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); | ||
503 | if (ret) | ||
504 | goto err_suspend; | ||
505 | return 0; | ||
506 | err_suspend: | ||
507 | if (!pm_runtime_status_suspended(&pdev->dev)) | ||
508 | sun4i_spdif_runtime_suspend(&pdev->dev); | ||
509 | err_unregister: | ||
510 | pm_runtime_disable(&pdev->dev); | ||
511 | snd_soc_unregister_component(&pdev->dev); | ||
512 | err_disable_apb_clk: | ||
513 | clk_disable_unprepare(host->apb_clk); | ||
514 | return ret; | ||
515 | } | ||
516 | |||
517 | static int sun4i_spdif_remove(struct platform_device *pdev) | ||
518 | { | ||
519 | pm_runtime_disable(&pdev->dev); | ||
520 | if (!pm_runtime_status_suspended(&pdev->dev)) | ||
521 | sun4i_spdif_runtime_suspend(&pdev->dev); | ||
522 | |||
523 | snd_soc_unregister_platform(&pdev->dev); | ||
524 | snd_soc_unregister_component(&pdev->dev); | ||
525 | |||
526 | return 0; | ||
527 | } | ||
528 | |||
529 | static const struct dev_pm_ops sun4i_spdif_pm = { | ||
530 | SET_RUNTIME_PM_OPS(sun4i_spdif_runtime_suspend, | ||
531 | sun4i_spdif_runtime_resume, NULL) | ||
532 | }; | ||
533 | |||
534 | static struct platform_driver sun4i_spdif_driver = { | ||
535 | .driver = { | ||
536 | .name = "sun4i-spdif", | ||
537 | .of_match_table = of_match_ptr(sun4i_spdif_of_match), | ||
538 | .pm = &sun4i_spdif_pm, | ||
539 | }, | ||
540 | .probe = sun4i_spdif_probe, | ||
541 | .remove = sun4i_spdif_remove, | ||
542 | }; | ||
543 | |||
544 | module_platform_driver(sun4i_spdif_driver); | ||
545 | |||
546 | MODULE_AUTHOR("Marcus Cooper <codekipper@gmail.com>"); | ||
547 | MODULE_AUTHOR("Andrea Venturi <be17068@iperbole.bo.it>"); | ||
548 | MODULE_DESCRIPTION("Allwinner sun4i SPDIF SoC Interface"); | ||
549 | MODULE_LICENSE("GPL"); | ||
550 | MODULE_ALIAS("platform:sun4i-spdif"); | ||