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authorOder Chiou <oder_chiou@realtek.com>2015-02-11 06:18:51 -0500
committerMark Brown <broonie@kernel.org>2015-03-02 12:22:59 -0500
commitab1f70952f61504f60805f13660c8740adcbe14f (patch)
tree3610b3855f34bce45020747b3d7d43ac12df0a6f /sound
parentc517d838eb7d07bbe9507871fab3931deccff539 (diff)
ASoC: rt5677: Add the chip type to distinguish the setting of the clock source
There is only one clock source in the rt5676, so the chip type is added to distinguish the setting of the clock source in the VAD function. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/rt5677.c28
-rw-r--r--sound/soc/codecs/rt5677.h6
2 files changed, 28 insertions, 6 deletions
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 5d0bb8748dd1..ab62777dbd33 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -718,11 +718,24 @@ static int rt5677_set_dsp_vad(struct snd_soc_codec *codec, bool on)
718 RT5677_LDO1_SEL_MASK, 0x0); 718 RT5677_LDO1_SEL_MASK, 0x0);
719 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, 719 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2,
720 RT5677_PWR_LDO1, RT5677_PWR_LDO1); 720 RT5677_PWR_LDO1, RT5677_PWR_LDO1);
721 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, 721 switch (rt5677->type) {
722 RT5677_MCLK_SRC_MASK, RT5677_MCLK2_SRC); 722 case RT5677:
723 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2, 723 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1,
724 RT5677_PLL2_PR_SRC_MASK | RT5677_DSP_CLK_SRC_MASK, 724 RT5677_MCLK_SRC_MASK, RT5677_MCLK2_SRC);
725 RT5677_PLL2_PR_SRC_MCLK2 | RT5677_DSP_CLK_SRC_BYPASS); 725 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2,
726 RT5677_PLL2_PR_SRC_MASK |
727 RT5677_DSP_CLK_SRC_MASK,
728 RT5677_PLL2_PR_SRC_MCLK2 |
729 RT5677_DSP_CLK_SRC_BYPASS);
730 break;
731 case RT5676:
732 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK2,
733 RT5677_DSP_CLK_SRC_MASK,
734 RT5677_DSP_CLK_SRC_BYPASS);
735 break;
736 default:
737 break;
738 }
726 regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x07ff); 739 regmap_write(rt5677->regmap, RT5677_PWR_DSP2, 0x07ff);
727 regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x07fd); 740 regmap_write(rt5677->regmap, RT5677_PWR_DSP1, 0x07fd);
728 rt5677_set_dsp_mode(codec, true); 741 rt5677_set_dsp_mode(codec, true);
@@ -4733,7 +4746,8 @@ static const struct regmap_config rt5677_regmap = {
4733}; 4746};
4734 4747
4735static const struct i2c_device_id rt5677_i2c_id[] = { 4748static const struct i2c_device_id rt5677_i2c_id[] = {
4736 { "rt5677", 0 }, 4749 { "rt5677", RT5677 },
4750 { "rt5676", RT5676 },
4737 { } 4751 { }
4738}; 4752};
4739MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id); 4753MODULE_DEVICE_TABLE(i2c, rt5677_i2c_id);
@@ -4850,6 +4864,8 @@ static int rt5677_i2c_probe(struct i2c_client *i2c,
4850 4864
4851 i2c_set_clientdata(i2c, rt5677); 4865 i2c_set_clientdata(i2c, rt5677);
4852 4866
4867 rt5677->type = id->driver_data;
4868
4853 if (pdata) 4869 if (pdata)
4854 rt5677->pdata = *pdata; 4870 rt5677->pdata = *pdata;
4855 4871
diff --git a/sound/soc/codecs/rt5677.h b/sound/soc/codecs/rt5677.h
index c0a625f290cc..07df96b43f59 100644
--- a/sound/soc/codecs/rt5677.h
+++ b/sound/soc/codecs/rt5677.h
@@ -1665,6 +1665,11 @@ enum {
1665 RT5677_IRQ_JD3, 1665 RT5677_IRQ_JD3,
1666}; 1666};
1667 1667
1668enum rt5677_type {
1669 RT5677,
1670 RT5676,
1671};
1672
1668struct rt5677_priv { 1673struct rt5677_priv {
1669 struct snd_soc_codec *codec; 1674 struct snd_soc_codec *codec;
1670 struct rt5677_platform_data pdata; 1675 struct rt5677_platform_data pdata;
@@ -1681,6 +1686,7 @@ struct rt5677_priv {
1681 int pll_in; 1686 int pll_in;
1682 int pll_out; 1687 int pll_out;
1683 int pow_ldo2; /* POW_LDO2 pin */ 1688 int pow_ldo2; /* POW_LDO2 pin */
1689 enum rt5677_type type;
1684#ifdef CONFIG_GPIOLIB 1690#ifdef CONFIG_GPIOLIB
1685 struct gpio_chip gpio_chip; 1691 struct gpio_chip gpio_chip;
1686#endif 1692#endif