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authorTakashi Iwai <tiwai@suse.de>2015-12-23 02:33:52 -0500
committerTakashi Iwai <tiwai@suse.de>2015-12-23 02:33:52 -0500
commitf80e39e0225c01ee68764ef7594c3a29ab5ebabb (patch)
treef5a85085741a173c93fc8f21938528b65ed95e42 /sound/soc/codecs/rt5659.c
parent59c8231089be96165735585694a801ae58ec6c95 (diff)
parent822ad70a2f5c420da5baa9f4354e6b7813ca6da9 (diff)
Merge tag 'asoc-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v4.5 This is quite a busy release on the driver front with a lot of new drivers being added but comparatively quiet on the core side with only one big change going in and that a fairly straightforward refactoring. - Conversion of the array of DAI links to a list by Mengdong Lin, supporting dynamically adding and removing DAI links. - Some more fixes for the topology code, though it is still not final and ready for enabling in production. We really need to get to the point where that can be done. - A pile of changes for Intel SkyLake drivers which hopefully deliver some useful initial functionality for systems with this chipset, though there is more work still to come. - New drivers for a number of Imagination Technologies IPs. - Lots of new features and cleanups for the Renesas drivers. - ANC support for WM5110. - New driver for Atmel class D speaker drivers. - New drivers for Cirrus CS47L24 and WM1831. - New driver for Dialog DA7128. - New drivers for Realtek RT5659 and RT56156. - New driver for Rockchip RK3036. - New driver for TI PC3168A
Diffstat (limited to 'sound/soc/codecs/rt5659.c')
-rw-r--r--sound/soc/codecs/rt5659.c4223
1 files changed, 4223 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5659.c b/sound/soc/codecs/rt5659.c
new file mode 100644
index 000000000000..820d8fa62b5e
--- /dev/null
+++ b/sound/soc/codecs/rt5659.c
@@ -0,0 +1,4223 @@
1/*
2 * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
3 *
4 * Copyright 2015 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/spi/spi.h>
20#include <linux/acpi.h>
21#include <linux/gpio.h>
22#include <linux/gpio/consumer.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/jack.h>
27#include <sound/soc.h>
28#include <sound/soc-dapm.h>
29#include <sound/initval.h>
30#include <sound/tlv.h>
31#include <sound/rt5659.h>
32
33#include "rl6231.h"
34#include "rt5659.h"
35
36static const struct reg_default rt5659_reg[] = {
37 { 0x0000, 0x0000 },
38 { 0x0001, 0x4848 },
39 { 0x0002, 0x8080 },
40 { 0x0003, 0xc8c8 },
41 { 0x0004, 0xc80a },
42 { 0x0005, 0x0000 },
43 { 0x0006, 0x0000 },
44 { 0x0007, 0x0103 },
45 { 0x0008, 0x0080 },
46 { 0x0009, 0x0000 },
47 { 0x000a, 0x0000 },
48 { 0x000c, 0x0000 },
49 { 0x000d, 0x0000 },
50 { 0x000f, 0x0808 },
51 { 0x0010, 0x3080 },
52 { 0x0011, 0x4a00 },
53 { 0x0012, 0x4e00 },
54 { 0x0015, 0x42c1 },
55 { 0x0016, 0x0000 },
56 { 0x0018, 0x000b },
57 { 0x0019, 0xafaf },
58 { 0x001a, 0xafaf },
59 { 0x001b, 0x0011 },
60 { 0x001c, 0x2f2f },
61 { 0x001d, 0x2f2f },
62 { 0x001e, 0x2f2f },
63 { 0x001f, 0x0000 },
64 { 0x0020, 0x0000 },
65 { 0x0021, 0x0000 },
66 { 0x0022, 0x5757 },
67 { 0x0023, 0x0039 },
68 { 0x0026, 0xc060 },
69 { 0x0027, 0xd8d8 },
70 { 0x0029, 0x8080 },
71 { 0x002a, 0xaaaa },
72 { 0x002b, 0xaaaa },
73 { 0x002c, 0x00af },
74 { 0x002d, 0x0000 },
75 { 0x002f, 0x1002 },
76 { 0x0031, 0x5000 },
77 { 0x0032, 0x0000 },
78 { 0x0033, 0x0000 },
79 { 0x0034, 0x0000 },
80 { 0x0035, 0x0000 },
81 { 0x0036, 0x0000 },
82 { 0x003a, 0x0000 },
83 { 0x003b, 0x0000 },
84 { 0x003c, 0x007f },
85 { 0x003d, 0x0000 },
86 { 0x003e, 0x007f },
87 { 0x0040, 0x0808 },
88 { 0x0046, 0x001f },
89 { 0x0047, 0x001f },
90 { 0x0048, 0x0003 },
91 { 0x0049, 0xe061 },
92 { 0x004a, 0x0000 },
93 { 0x004b, 0x031f },
94 { 0x004d, 0x0000 },
95 { 0x004e, 0x001f },
96 { 0x004f, 0x0000 },
97 { 0x0050, 0x001f },
98 { 0x0052, 0xf000 },
99 { 0x0053, 0x0111 },
100 { 0x0054, 0x0064 },
101 { 0x0055, 0x0080 },
102 { 0x0056, 0xef0e },
103 { 0x0057, 0xf0f0 },
104 { 0x0058, 0xef0e },
105 { 0x0059, 0xf0f0 },
106 { 0x005a, 0xef0e },
107 { 0x005b, 0xf0f0 },
108 { 0x005c, 0xf000 },
109 { 0x005d, 0x0000 },
110 { 0x005e, 0x1f2c },
111 { 0x005f, 0x1f2c },
112 { 0x0060, 0x2717 },
113 { 0x0061, 0x0000 },
114 { 0x0062, 0x0000 },
115 { 0x0063, 0x003e },
116 { 0x0064, 0x0000 },
117 { 0x0065, 0x0000 },
118 { 0x0066, 0x0000 },
119 { 0x0067, 0x0000 },
120 { 0x006a, 0x0000 },
121 { 0x006b, 0x0000 },
122 { 0x006c, 0x0000 },
123 { 0x006e, 0x0000 },
124 { 0x006f, 0x0000 },
125 { 0x0070, 0x8000 },
126 { 0x0071, 0x8000 },
127 { 0x0072, 0x8000 },
128 { 0x0073, 0x1110 },
129 { 0x0074, 0xfe00 },
130 { 0x0075, 0x2409 },
131 { 0x0076, 0x000a },
132 { 0x0077, 0x00f0 },
133 { 0x0078, 0x0000 },
134 { 0x0079, 0x0000 },
135 { 0x007a, 0x0123 },
136 { 0x007b, 0x8003 },
137 { 0x0080, 0x0000 },
138 { 0x0081, 0x0000 },
139 { 0x0082, 0x0000 },
140 { 0x0083, 0x0000 },
141 { 0x0084, 0x0000 },
142 { 0x0085, 0x0000 },
143 { 0x0086, 0x0008 },
144 { 0x0087, 0x0000 },
145 { 0x0088, 0x0000 },
146 { 0x0089, 0x0000 },
147 { 0x008a, 0x0000 },
148 { 0x008b, 0x0000 },
149 { 0x008c, 0x0003 },
150 { 0x008e, 0x0000 },
151 { 0x008f, 0x1000 },
152 { 0x0090, 0x0646 },
153 { 0x0091, 0x0c16 },
154 { 0x0092, 0x0073 },
155 { 0x0093, 0x0000 },
156 { 0x0094, 0x0080 },
157 { 0x0097, 0x0000 },
158 { 0x0098, 0x0000 },
159 { 0x0099, 0x0000 },
160 { 0x009a, 0x0000 },
161 { 0x009b, 0x0000 },
162 { 0x009c, 0x007f },
163 { 0x009d, 0x0000 },
164 { 0x009e, 0x007f },
165 { 0x009f, 0x0000 },
166 { 0x00a0, 0x0060 },
167 { 0x00a1, 0x90a1 },
168 { 0x00ae, 0x2000 },
169 { 0x00af, 0x0000 },
170 { 0x00b0, 0x2000 },
171 { 0x00b1, 0x0000 },
172 { 0x00b2, 0x0000 },
173 { 0x00b6, 0x0000 },
174 { 0x00b7, 0x0000 },
175 { 0x00b8, 0x0000 },
176 { 0x00b9, 0x0000 },
177 { 0x00ba, 0x0000 },
178 { 0x00bb, 0x0000 },
179 { 0x00be, 0x0000 },
180 { 0x00bf, 0x0000 },
181 { 0x00c0, 0x0000 },
182 { 0x00c1, 0x0000 },
183 { 0x00c2, 0x0000 },
184 { 0x00c3, 0x0000 },
185 { 0x00c4, 0x0003 },
186 { 0x00c5, 0x0000 },
187 { 0x00cb, 0xa02f },
188 { 0x00cc, 0x0000 },
189 { 0x00cd, 0x0e02 },
190 { 0x00d6, 0x0000 },
191 { 0x00d7, 0x2244 },
192 { 0x00d9, 0x0809 },
193 { 0x00da, 0x0000 },
194 { 0x00db, 0x0008 },
195 { 0x00dc, 0x00c0 },
196 { 0x00dd, 0x6724 },
197 { 0x00de, 0x3131 },
198 { 0x00df, 0x0008 },
199 { 0x00e0, 0x4000 },
200 { 0x00e1, 0x3131 },
201 { 0x00e4, 0x400c },
202 { 0x00e5, 0x8031 },
203 { 0x00ea, 0xb320 },
204 { 0x00eb, 0x0000 },
205 { 0x00ec, 0xb300 },
206 { 0x00ed, 0x0000 },
207 { 0x00f0, 0x0000 },
208 { 0x00f1, 0x0202 },
209 { 0x00f2, 0x0ddd },
210 { 0x00f3, 0x0ddd },
211 { 0x00f4, 0x0ddd },
212 { 0x00f6, 0x0000 },
213 { 0x00f7, 0x0000 },
214 { 0x00f8, 0x0000 },
215 { 0x00f9, 0x0000 },
216 { 0x00fa, 0x8000 },
217 { 0x00fb, 0x0000 },
218 { 0x00fc, 0x0000 },
219 { 0x00fd, 0x0001 },
220 { 0x00fe, 0x10ec },
221 { 0x00ff, 0x6311 },
222 { 0x0100, 0xaaaa },
223 { 0x010a, 0xaaaa },
224 { 0x010b, 0x00a0 },
225 { 0x010c, 0xaeae },
226 { 0x010d, 0xaaaa },
227 { 0x010e, 0xaaa8 },
228 { 0x010f, 0xa0aa },
229 { 0x0110, 0xe02a },
230 { 0x0111, 0xa702 },
231 { 0x0112, 0xaaaa },
232 { 0x0113, 0x2800 },
233 { 0x0116, 0x0000 },
234 { 0x0117, 0x0f00 },
235 { 0x011a, 0x0020 },
236 { 0x011b, 0x0011 },
237 { 0x011c, 0x0150 },
238 { 0x011d, 0x0000 },
239 { 0x011e, 0x0000 },
240 { 0x011f, 0x0000 },
241 { 0x0120, 0x0000 },
242 { 0x0121, 0x009b },
243 { 0x0122, 0x5014 },
244 { 0x0123, 0x0421 },
245 { 0x0124, 0x7cea },
246 { 0x0125, 0x0420 },
247 { 0x0126, 0x5550 },
248 { 0x0132, 0x0000 },
249 { 0x0133, 0x0000 },
250 { 0x0137, 0x5055 },
251 { 0x0138, 0x3700 },
252 { 0x0139, 0x79a1 },
253 { 0x013a, 0x2020 },
254 { 0x013b, 0x2020 },
255 { 0x013c, 0x2005 },
256 { 0x013e, 0x1f00 },
257 { 0x013f, 0x0000 },
258 { 0x0145, 0x0002 },
259 { 0x0146, 0x0000 },
260 { 0x0147, 0x0000 },
261 { 0x0148, 0x0000 },
262 { 0x0150, 0x1813 },
263 { 0x0151, 0x0690 },
264 { 0x0152, 0x1c17 },
265 { 0x0153, 0x6883 },
266 { 0x0154, 0xd3ce },
267 { 0x0155, 0x352d },
268 { 0x0156, 0x00eb },
269 { 0x0157, 0x3717 },
270 { 0x0158, 0x4c6a },
271 { 0x0159, 0xe41b },
272 { 0x015a, 0x2a13 },
273 { 0x015b, 0xb600 },
274 { 0x015c, 0xc730 },
275 { 0x015d, 0x35d4 },
276 { 0x015e, 0x00bf },
277 { 0x0160, 0x0ec0 },
278 { 0x0161, 0x0020 },
279 { 0x0162, 0x0080 },
280 { 0x0163, 0x0800 },
281 { 0x0164, 0x0000 },
282 { 0x0165, 0x0000 },
283 { 0x0166, 0x0000 },
284 { 0x0167, 0x001f },
285 { 0x0170, 0x4e80 },
286 { 0x0171, 0x0020 },
287 { 0x0172, 0x0080 },
288 { 0x0173, 0x0800 },
289 { 0x0174, 0x000c },
290 { 0x0175, 0x0000 },
291 { 0x0190, 0x3300 },
292 { 0x0191, 0x2200 },
293 { 0x0192, 0x0000 },
294 { 0x01b0, 0x4b38 },
295 { 0x01b1, 0x0000 },
296 { 0x01b2, 0x0000 },
297 { 0x01b3, 0x0000 },
298 { 0x01c0, 0x0045 },
299 { 0x01c1, 0x0540 },
300 { 0x01c2, 0x0000 },
301 { 0x01c3, 0x0030 },
302 { 0x01c7, 0x0000 },
303 { 0x01c8, 0x5757 },
304 { 0x01c9, 0x5757 },
305 { 0x01ca, 0x5757 },
306 { 0x01cb, 0x5757 },
307 { 0x01cc, 0x5757 },
308 { 0x01cd, 0x5757 },
309 { 0x01ce, 0x006f },
310 { 0x01da, 0x0000 },
311 { 0x01db, 0x0000 },
312 { 0x01de, 0x7d00 },
313 { 0x01df, 0x10c0 },
314 { 0x01e0, 0x06a1 },
315 { 0x01e1, 0x0000 },
316 { 0x01e2, 0x0000 },
317 { 0x01e3, 0x0000 },
318 { 0x01e4, 0x0001 },
319 { 0x01e6, 0x0000 },
320 { 0x01e7, 0x0000 },
321 { 0x01e8, 0x0000 },
322 { 0x01ea, 0x0000 },
323 { 0x01eb, 0x0000 },
324 { 0x01ec, 0x0000 },
325 { 0x01ed, 0x0000 },
326 { 0x01ee, 0x0000 },
327 { 0x01ef, 0x0000 },
328 { 0x01f0, 0x0000 },
329 { 0x01f1, 0x0000 },
330 { 0x01f2, 0x0000 },
331 { 0x01f6, 0x1e04 },
332 { 0x01f7, 0x01a1 },
333 { 0x01f8, 0x0000 },
334 { 0x01f9, 0x0000 },
335 { 0x01fa, 0x0002 },
336 { 0x01fb, 0x0000 },
337 { 0x01fc, 0x0000 },
338 { 0x01fd, 0x0000 },
339 { 0x01fe, 0x0000 },
340 { 0x0200, 0x066c },
341 { 0x0201, 0x7fff },
342 { 0x0202, 0x7fff },
343 { 0x0203, 0x0000 },
344 { 0x0204, 0x0000 },
345 { 0x0205, 0x0000 },
346 { 0x0206, 0x0000 },
347 { 0x0207, 0x0000 },
348 { 0x0208, 0x0000 },
349 { 0x0256, 0x0000 },
350 { 0x0257, 0x0000 },
351 { 0x0258, 0x0000 },
352 { 0x0259, 0x0000 },
353 { 0x025a, 0x0000 },
354 { 0x025b, 0x3333 },
355 { 0x025c, 0x3333 },
356 { 0x025d, 0x3333 },
357 { 0x025e, 0x0000 },
358 { 0x025f, 0x0000 },
359 { 0x0260, 0x0000 },
360 { 0x0261, 0x0022 },
361 { 0x0262, 0x0300 },
362 { 0x0265, 0x1e80 },
363 { 0x0266, 0x0131 },
364 { 0x0267, 0x0003 },
365 { 0x0268, 0x0000 },
366 { 0x0269, 0x0000 },
367 { 0x026a, 0x0000 },
368 { 0x026b, 0x0000 },
369 { 0x026c, 0x0000 },
370 { 0x026d, 0x0000 },
371 { 0x026e, 0x0000 },
372 { 0x026f, 0x0000 },
373 { 0x0270, 0x0000 },
374 { 0x0271, 0x0000 },
375 { 0x0272, 0x0000 },
376 { 0x0273, 0x0000 },
377 { 0x0280, 0x0000 },
378 { 0x0281, 0x0000 },
379 { 0x0282, 0x0418 },
380 { 0x0283, 0x7fff },
381 { 0x0284, 0x7000 },
382 { 0x0290, 0x01d0 },
383 { 0x0291, 0x0100 },
384 { 0x02fa, 0x0000 },
385 { 0x02fb, 0x0000 },
386 { 0x02fc, 0x0000 },
387 { 0x0300, 0x001f },
388 { 0x0301, 0x032c },
389 { 0x0302, 0x5f21 },
390 { 0x0303, 0x4000 },
391 { 0x0304, 0x4000 },
392 { 0x0305, 0x0600 },
393 { 0x0306, 0x8000 },
394 { 0x0307, 0x0700 },
395 { 0x0308, 0x001f },
396 { 0x0309, 0x032c },
397 { 0x030a, 0x5f21 },
398 { 0x030b, 0x4000 },
399 { 0x030c, 0x4000 },
400 { 0x030d, 0x0600 },
401 { 0x030e, 0x8000 },
402 { 0x030f, 0x0700 },
403 { 0x0310, 0x4560 },
404 { 0x0311, 0xa4a8 },
405 { 0x0312, 0x7418 },
406 { 0x0313, 0x0000 },
407 { 0x0314, 0x0006 },
408 { 0x0315, 0x00ff },
409 { 0x0316, 0xc400 },
410 { 0x0317, 0x4560 },
411 { 0x0318, 0xa4a8 },
412 { 0x0319, 0x7418 },
413 { 0x031a, 0x0000 },
414 { 0x031b, 0x0006 },
415 { 0x031c, 0x00ff },
416 { 0x031d, 0xc400 },
417 { 0x0320, 0x0f20 },
418 { 0x0321, 0x8700 },
419 { 0x0322, 0x7dc2 },
420 { 0x0323, 0xa178 },
421 { 0x0324, 0x5383 },
422 { 0x0325, 0x7dc2 },
423 { 0x0326, 0xa178 },
424 { 0x0327, 0x5383 },
425 { 0x0328, 0x003e },
426 { 0x0329, 0x02c1 },
427 { 0x032a, 0xd37d },
428 { 0x0330, 0x00a6 },
429 { 0x0331, 0x04c3 },
430 { 0x0332, 0x27c8 },
431 { 0x0333, 0xbf50 },
432 { 0x0334, 0x0045 },
433 { 0x0335, 0x2007 },
434 { 0x0336, 0x7418 },
435 { 0x0337, 0x0501 },
436 { 0x0338, 0x0000 },
437 { 0x0339, 0x0010 },
438 { 0x033a, 0x1010 },
439 { 0x0340, 0x0800 },
440 { 0x0341, 0x0800 },
441 { 0x0342, 0x0800 },
442 { 0x0343, 0x0800 },
443 { 0x0344, 0x0000 },
444 { 0x0345, 0x0000 },
445 { 0x0346, 0x0000 },
446 { 0x0347, 0x0000 },
447 { 0x0348, 0x0000 },
448 { 0x0349, 0x0000 },
449 { 0x034a, 0x0000 },
450 { 0x034b, 0x0000 },
451 { 0x034c, 0x0000 },
452 { 0x034d, 0x0000 },
453 { 0x034e, 0x0000 },
454 { 0x034f, 0x0000 },
455 { 0x0350, 0x0000 },
456 { 0x0351, 0x0000 },
457 { 0x0352, 0x0000 },
458 { 0x0353, 0x0000 },
459 { 0x0354, 0x0000 },
460 { 0x0355, 0x0000 },
461 { 0x0356, 0x0000 },
462 { 0x0357, 0x0000 },
463 { 0x0358, 0x0000 },
464 { 0x0359, 0x0000 },
465 { 0x035a, 0x0000 },
466 { 0x035b, 0x0000 },
467 { 0x035c, 0x0000 },
468 { 0x035d, 0x0000 },
469 { 0x035e, 0x2000 },
470 { 0x035f, 0x0000 },
471 { 0x0360, 0x2000 },
472 { 0x0361, 0x2000 },
473 { 0x0362, 0x0000 },
474 { 0x0363, 0x2000 },
475 { 0x0364, 0x0200 },
476 { 0x0365, 0x0000 },
477 { 0x0366, 0x0000 },
478 { 0x0367, 0x0000 },
479 { 0x0368, 0x0000 },
480 { 0x0369, 0x0000 },
481 { 0x036a, 0x0000 },
482 { 0x036b, 0x0000 },
483 { 0x036c, 0x0000 },
484 { 0x036d, 0x0000 },
485 { 0x036e, 0x0200 },
486 { 0x036f, 0x0000 },
487 { 0x0370, 0x0000 },
488 { 0x0371, 0x0000 },
489 { 0x0372, 0x0000 },
490 { 0x0373, 0x0000 },
491 { 0x0374, 0x0000 },
492 { 0x0375, 0x0000 },
493 { 0x0376, 0x0000 },
494 { 0x0377, 0x0000 },
495 { 0x03d0, 0x0000 },
496 { 0x03d1, 0x0000 },
497 { 0x03d2, 0x0000 },
498 { 0x03d3, 0x0000 },
499 { 0x03d4, 0x2000 },
500 { 0x03d5, 0x2000 },
501 { 0x03d6, 0x0000 },
502 { 0x03d7, 0x0000 },
503 { 0x03d8, 0x2000 },
504 { 0x03d9, 0x2000 },
505 { 0x03da, 0x2000 },
506 { 0x03db, 0x2000 },
507 { 0x03dc, 0x0000 },
508 { 0x03dd, 0x0000 },
509 { 0x03de, 0x0000 },
510 { 0x03df, 0x2000 },
511 { 0x03e0, 0x0000 },
512 { 0x03e1, 0x0000 },
513 { 0x03e2, 0x0000 },
514 { 0x03e3, 0x0000 },
515 { 0x03e4, 0x0000 },
516 { 0x03e5, 0x0000 },
517 { 0x03e6, 0x0000 },
518 { 0x03e7, 0x0000 },
519 { 0x03e8, 0x0000 },
520 { 0x03e9, 0x0000 },
521 { 0x03ea, 0x0000 },
522 { 0x03eb, 0x0000 },
523 { 0x03ec, 0x0000 },
524 { 0x03ed, 0x0000 },
525 { 0x03ee, 0x0000 },
526 { 0x03ef, 0x0000 },
527 { 0x03f0, 0x0800 },
528 { 0x03f1, 0x0800 },
529 { 0x03f2, 0x0800 },
530 { 0x03f3, 0x0800 },
531};
532
533static bool rt5659_volatile_register(struct device *dev, unsigned int reg)
534{
535 switch (reg) {
536 case RT5659_RESET:
537 case RT5659_EJD_CTRL_2:
538 case RT5659_SILENCE_CTRL:
539 case RT5659_DAC2_DIG_VOL:
540 case RT5659_HP_IMP_GAIN_2:
541 case RT5659_PDM_OUT_CTRL:
542 case RT5659_PDM_DATA_CTRL_1:
543 case RT5659_PDM_DATA_CTRL_4:
544 case RT5659_HAPTIC_GEN_CTRL_1:
545 case RT5659_HAPTIC_GEN_CTRL_3:
546 case RT5659_HAPTIC_LPF_CTRL_3:
547 case RT5659_CLK_DET:
548 case RT5659_MICBIAS_1:
549 case RT5659_ASRC_11:
550 case RT5659_ADC_EQ_CTRL_1:
551 case RT5659_DAC_EQ_CTRL_1:
552 case RT5659_INT_ST_1:
553 case RT5659_INT_ST_2:
554 case RT5659_GPIO_STA:
555 case RT5659_SINE_GEN_CTRL_1:
556 case RT5659_IL_CMD_1:
557 case RT5659_4BTN_IL_CMD_1:
558 case RT5659_PSV_IL_CMD_1:
559 case RT5659_AJD1_CTRL:
560 case RT5659_AJD2_AJD3_CTRL:
561 case RT5659_JD_CTRL_3:
562 case RT5659_VENDOR_ID:
563 case RT5659_VENDOR_ID_1:
564 case RT5659_DEVICE_ID:
565 case RT5659_MEMORY_TEST:
566 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
567 case RT5659_VOL_TEST:
568 case RT5659_STO_NG2_CTRL_1:
569 case RT5659_STO_NG2_CTRL_5:
570 case RT5659_STO_NG2_CTRL_6:
571 case RT5659_STO_NG2_CTRL_7:
572 case RT5659_MONO_NG2_CTRL_1:
573 case RT5659_MONO_NG2_CTRL_5:
574 case RT5659_MONO_NG2_CTRL_6:
575 case RT5659_HP_IMP_SENS_CTRL_1:
576 case RT5659_HP_IMP_SENS_CTRL_3:
577 case RT5659_HP_IMP_SENS_CTRL_4:
578 case RT5659_HP_CALIB_CTRL_1:
579 case RT5659_HP_CALIB_CTRL_9:
580 case RT5659_HP_CALIB_STA_1:
581 case RT5659_HP_CALIB_STA_2:
582 case RT5659_HP_CALIB_STA_3:
583 case RT5659_HP_CALIB_STA_4:
584 case RT5659_HP_CALIB_STA_5:
585 case RT5659_HP_CALIB_STA_6:
586 case RT5659_HP_CALIB_STA_7:
587 case RT5659_HP_CALIB_STA_8:
588 case RT5659_HP_CALIB_STA_9:
589 case RT5659_MONO_AMP_CALIB_CTRL_1:
590 case RT5659_MONO_AMP_CALIB_CTRL_3:
591 case RT5659_MONO_AMP_CALIB_STA_1:
592 case RT5659_MONO_AMP_CALIB_STA_2:
593 case RT5659_MONO_AMP_CALIB_STA_3:
594 case RT5659_MONO_AMP_CALIB_STA_4:
595 case RT5659_SPK_PWR_LMT_STA_1:
596 case RT5659_SPK_PWR_LMT_STA_2:
597 case RT5659_SPK_PWR_LMT_STA_3:
598 case RT5659_SPK_PWR_LMT_STA_4:
599 case RT5659_SPK_PWR_LMT_STA_5:
600 case RT5659_SPK_PWR_LMT_STA_6:
601 case RT5659_SPK_DC_CAILB_CTRL_1:
602 case RT5659_SPK_DC_CAILB_STA_1:
603 case RT5659_SPK_DC_CAILB_STA_2:
604 case RT5659_SPK_DC_CAILB_STA_3:
605 case RT5659_SPK_DC_CAILB_STA_4:
606 case RT5659_SPK_DC_CAILB_STA_5:
607 case RT5659_SPK_DC_CAILB_STA_6:
608 case RT5659_SPK_DC_CAILB_STA_7:
609 case RT5659_SPK_DC_CAILB_STA_8:
610 case RT5659_SPK_DC_CAILB_STA_9:
611 case RT5659_SPK_DC_CAILB_STA_10:
612 case RT5659_SPK_VDD_STA_1:
613 case RT5659_SPK_VDD_STA_2:
614 case RT5659_SPK_DC_DET_CTRL_1:
615 case RT5659_PURE_DC_DET_CTRL_1:
616 case RT5659_PURE_DC_DET_CTRL_2:
617 case RT5659_DRC1_PRIV_1:
618 case RT5659_DRC1_PRIV_4:
619 case RT5659_DRC1_PRIV_5:
620 case RT5659_DRC1_PRIV_6:
621 case RT5659_DRC1_PRIV_7:
622 case RT5659_DRC2_PRIV_1:
623 case RT5659_DRC2_PRIV_4:
624 case RT5659_DRC2_PRIV_5:
625 case RT5659_DRC2_PRIV_6:
626 case RT5659_DRC2_PRIV_7:
627 case RT5659_ALC_PGA_STA_1:
628 case RT5659_ALC_PGA_STA_2:
629 case RT5659_ALC_PGA_STA_3:
630 return true;
631 default:
632 return false;
633 }
634}
635
636static bool rt5659_readable_register(struct device *dev, unsigned int reg)
637{
638 switch (reg) {
639 case RT5659_RESET:
640 case RT5659_SPO_VOL:
641 case RT5659_HP_VOL:
642 case RT5659_LOUT:
643 case RT5659_MONO_OUT:
644 case RT5659_HPL_GAIN:
645 case RT5659_HPR_GAIN:
646 case RT5659_MONO_GAIN:
647 case RT5659_SPDIF_CTRL_1:
648 case RT5659_SPDIF_CTRL_2:
649 case RT5659_CAL_BST_CTRL:
650 case RT5659_IN1_IN2:
651 case RT5659_IN3_IN4:
652 case RT5659_INL1_INR1_VOL:
653 case RT5659_EJD_CTRL_1:
654 case RT5659_EJD_CTRL_2:
655 case RT5659_EJD_CTRL_3:
656 case RT5659_SILENCE_CTRL:
657 case RT5659_PSV_CTRL:
658 case RT5659_SIDETONE_CTRL:
659 case RT5659_DAC1_DIG_VOL:
660 case RT5659_DAC2_DIG_VOL:
661 case RT5659_DAC_CTRL:
662 case RT5659_STO1_ADC_DIG_VOL:
663 case RT5659_MONO_ADC_DIG_VOL:
664 case RT5659_STO2_ADC_DIG_VOL:
665 case RT5659_STO1_BOOST:
666 case RT5659_MONO_BOOST:
667 case RT5659_STO2_BOOST:
668 case RT5659_HP_IMP_GAIN_1:
669 case RT5659_HP_IMP_GAIN_2:
670 case RT5659_STO1_ADC_MIXER:
671 case RT5659_MONO_ADC_MIXER:
672 case RT5659_AD_DA_MIXER:
673 case RT5659_STO_DAC_MIXER:
674 case RT5659_MONO_DAC_MIXER:
675 case RT5659_DIG_MIXER:
676 case RT5659_A_DAC_MUX:
677 case RT5659_DIG_INF23_DATA:
678 case RT5659_PDM_OUT_CTRL:
679 case RT5659_PDM_DATA_CTRL_1:
680 case RT5659_PDM_DATA_CTRL_2:
681 case RT5659_PDM_DATA_CTRL_3:
682 case RT5659_PDM_DATA_CTRL_4:
683 case RT5659_SPDIF_CTRL:
684 case RT5659_REC1_GAIN:
685 case RT5659_REC1_L1_MIXER:
686 case RT5659_REC1_L2_MIXER:
687 case RT5659_REC1_R1_MIXER:
688 case RT5659_REC1_R2_MIXER:
689 case RT5659_CAL_REC:
690 case RT5659_REC2_L1_MIXER:
691 case RT5659_REC2_L2_MIXER:
692 case RT5659_REC2_R1_MIXER:
693 case RT5659_REC2_R2_MIXER:
694 case RT5659_SPK_L_MIXER:
695 case RT5659_SPK_R_MIXER:
696 case RT5659_SPO_AMP_GAIN:
697 case RT5659_ALC_BACK_GAIN:
698 case RT5659_MONOMIX_GAIN:
699 case RT5659_MONOMIX_IN_GAIN:
700 case RT5659_OUT_L_GAIN:
701 case RT5659_OUT_L_MIXER:
702 case RT5659_OUT_R_GAIN:
703 case RT5659_OUT_R_MIXER:
704 case RT5659_LOUT_MIXER:
705 case RT5659_HAPTIC_GEN_CTRL_1:
706 case RT5659_HAPTIC_GEN_CTRL_2:
707 case RT5659_HAPTIC_GEN_CTRL_3:
708 case RT5659_HAPTIC_GEN_CTRL_4:
709 case RT5659_HAPTIC_GEN_CTRL_5:
710 case RT5659_HAPTIC_GEN_CTRL_6:
711 case RT5659_HAPTIC_GEN_CTRL_7:
712 case RT5659_HAPTIC_GEN_CTRL_8:
713 case RT5659_HAPTIC_GEN_CTRL_9:
714 case RT5659_HAPTIC_GEN_CTRL_10:
715 case RT5659_HAPTIC_GEN_CTRL_11:
716 case RT5659_HAPTIC_LPF_CTRL_1:
717 case RT5659_HAPTIC_LPF_CTRL_2:
718 case RT5659_HAPTIC_LPF_CTRL_3:
719 case RT5659_PWR_DIG_1:
720 case RT5659_PWR_DIG_2:
721 case RT5659_PWR_ANLG_1:
722 case RT5659_PWR_ANLG_2:
723 case RT5659_PWR_ANLG_3:
724 case RT5659_PWR_MIXER:
725 case RT5659_PWR_VOL:
726 case RT5659_PRIV_INDEX:
727 case RT5659_CLK_DET:
728 case RT5659_PRIV_DATA:
729 case RT5659_PRE_DIV_1:
730 case RT5659_PRE_DIV_2:
731 case RT5659_I2S1_SDP:
732 case RT5659_I2S2_SDP:
733 case RT5659_I2S3_SDP:
734 case RT5659_ADDA_CLK_1:
735 case RT5659_ADDA_CLK_2:
736 case RT5659_DMIC_CTRL_1:
737 case RT5659_DMIC_CTRL_2:
738 case RT5659_TDM_CTRL_1:
739 case RT5659_TDM_CTRL_2:
740 case RT5659_TDM_CTRL_3:
741 case RT5659_TDM_CTRL_4:
742 case RT5659_TDM_CTRL_5:
743 case RT5659_GLB_CLK:
744 case RT5659_PLL_CTRL_1:
745 case RT5659_PLL_CTRL_2:
746 case RT5659_ASRC_1:
747 case RT5659_ASRC_2:
748 case RT5659_ASRC_3:
749 case RT5659_ASRC_4:
750 case RT5659_ASRC_5:
751 case RT5659_ASRC_6:
752 case RT5659_ASRC_7:
753 case RT5659_ASRC_8:
754 case RT5659_ASRC_9:
755 case RT5659_ASRC_10:
756 case RT5659_DEPOP_1:
757 case RT5659_DEPOP_2:
758 case RT5659_DEPOP_3:
759 case RT5659_HP_CHARGE_PUMP_1:
760 case RT5659_HP_CHARGE_PUMP_2:
761 case RT5659_MICBIAS_1:
762 case RT5659_MICBIAS_2:
763 case RT5659_ASRC_11:
764 case RT5659_ASRC_12:
765 case RT5659_ASRC_13:
766 case RT5659_REC_M1_M2_GAIN_CTRL:
767 case RT5659_RC_CLK_CTRL:
768 case RT5659_CLASSD_CTRL_1:
769 case RT5659_CLASSD_CTRL_2:
770 case RT5659_ADC_EQ_CTRL_1:
771 case RT5659_ADC_EQ_CTRL_2:
772 case RT5659_DAC_EQ_CTRL_1:
773 case RT5659_DAC_EQ_CTRL_2:
774 case RT5659_DAC_EQ_CTRL_3:
775 case RT5659_IRQ_CTRL_1:
776 case RT5659_IRQ_CTRL_2:
777 case RT5659_IRQ_CTRL_3:
778 case RT5659_IRQ_CTRL_4:
779 case RT5659_IRQ_CTRL_5:
780 case RT5659_IRQ_CTRL_6:
781 case RT5659_INT_ST_1:
782 case RT5659_INT_ST_2:
783 case RT5659_GPIO_CTRL_1:
784 case RT5659_GPIO_CTRL_2:
785 case RT5659_GPIO_CTRL_3:
786 case RT5659_GPIO_CTRL_4:
787 case RT5659_GPIO_CTRL_5:
788 case RT5659_GPIO_STA:
789 case RT5659_SINE_GEN_CTRL_1:
790 case RT5659_SINE_GEN_CTRL_2:
791 case RT5659_SINE_GEN_CTRL_3:
792 case RT5659_HP_AMP_DET_CTRL_1:
793 case RT5659_HP_AMP_DET_CTRL_2:
794 case RT5659_SV_ZCD_1:
795 case RT5659_SV_ZCD_2:
796 case RT5659_IL_CMD_1:
797 case RT5659_IL_CMD_2:
798 case RT5659_IL_CMD_3:
799 case RT5659_IL_CMD_4:
800 case RT5659_4BTN_IL_CMD_1:
801 case RT5659_4BTN_IL_CMD_2:
802 case RT5659_4BTN_IL_CMD_3:
803 case RT5659_PSV_IL_CMD_1:
804 case RT5659_PSV_IL_CMD_2:
805 case RT5659_ADC_STO1_HP_CTRL_1:
806 case RT5659_ADC_STO1_HP_CTRL_2:
807 case RT5659_ADC_MONO_HP_CTRL_1:
808 case RT5659_ADC_MONO_HP_CTRL_2:
809 case RT5659_AJD1_CTRL:
810 case RT5659_AJD2_AJD3_CTRL:
811 case RT5659_JD1_THD:
812 case RT5659_JD2_THD:
813 case RT5659_JD3_THD:
814 case RT5659_JD_CTRL_1:
815 case RT5659_JD_CTRL_2:
816 case RT5659_JD_CTRL_3:
817 case RT5659_JD_CTRL_4:
818 case RT5659_DIG_MISC:
819 case RT5659_DUMMY_2:
820 case RT5659_DUMMY_3:
821 case RT5659_VENDOR_ID:
822 case RT5659_VENDOR_ID_1:
823 case RT5659_DEVICE_ID:
824 case RT5659_DAC_ADC_DIG_VOL:
825 case RT5659_BIAS_CUR_CTRL_1:
826 case RT5659_BIAS_CUR_CTRL_2:
827 case RT5659_BIAS_CUR_CTRL_3:
828 case RT5659_BIAS_CUR_CTRL_4:
829 case RT5659_BIAS_CUR_CTRL_5:
830 case RT5659_BIAS_CUR_CTRL_6:
831 case RT5659_BIAS_CUR_CTRL_7:
832 case RT5659_BIAS_CUR_CTRL_8:
833 case RT5659_BIAS_CUR_CTRL_9:
834 case RT5659_BIAS_CUR_CTRL_10:
835 case RT5659_MEMORY_TEST:
836 case RT5659_VREF_REC_OP_FB_CAP_CTRL:
837 case RT5659_CLASSD_0:
838 case RT5659_CLASSD_1:
839 case RT5659_CLASSD_2:
840 case RT5659_CLASSD_3:
841 case RT5659_CLASSD_4:
842 case RT5659_CLASSD_5:
843 case RT5659_CLASSD_6:
844 case RT5659_CLASSD_7:
845 case RT5659_CLASSD_8:
846 case RT5659_CLASSD_9:
847 case RT5659_CLASSD_10:
848 case RT5659_CHARGE_PUMP_1:
849 case RT5659_CHARGE_PUMP_2:
850 case RT5659_DIG_IN_CTRL_1:
851 case RT5659_DIG_IN_CTRL_2:
852 case RT5659_PAD_DRIVING_CTRL:
853 case RT5659_SOFT_RAMP_DEPOP:
854 case RT5659_PLL:
855 case RT5659_CHOP_DAC:
856 case RT5659_CHOP_ADC:
857 case RT5659_CALIB_ADC_CTRL:
858 case RT5659_SOFT_RAMP_DEPOP_DAC_CLK_CTRL:
859 case RT5659_VOL_TEST:
860 case RT5659_TEST_MODE_CTRL_1:
861 case RT5659_TEST_MODE_CTRL_2:
862 case RT5659_TEST_MODE_CTRL_3:
863 case RT5659_TEST_MODE_CTRL_4:
864 case RT5659_BASSBACK_CTRL:
865 case RT5659_MP3_PLUS_CTRL_1:
866 case RT5659_MP3_PLUS_CTRL_2:
867 case RT5659_MP3_HPF_A1:
868 case RT5659_MP3_HPF_A2:
869 case RT5659_MP3_HPF_H0:
870 case RT5659_MP3_LPF_H0:
871 case RT5659_3D_SPK_CTRL:
872 case RT5659_3D_SPK_COEF_1:
873 case RT5659_3D_SPK_COEF_2:
874 case RT5659_3D_SPK_COEF_3:
875 case RT5659_3D_SPK_COEF_4:
876 case RT5659_3D_SPK_COEF_5:
877 case RT5659_3D_SPK_COEF_6:
878 case RT5659_3D_SPK_COEF_7:
879 case RT5659_STO_NG2_CTRL_1:
880 case RT5659_STO_NG2_CTRL_2:
881 case RT5659_STO_NG2_CTRL_3:
882 case RT5659_STO_NG2_CTRL_4:
883 case RT5659_STO_NG2_CTRL_5:
884 case RT5659_STO_NG2_CTRL_6:
885 case RT5659_STO_NG2_CTRL_7:
886 case RT5659_STO_NG2_CTRL_8:
887 case RT5659_MONO_NG2_CTRL_1:
888 case RT5659_MONO_NG2_CTRL_2:
889 case RT5659_MONO_NG2_CTRL_3:
890 case RT5659_MONO_NG2_CTRL_4:
891 case RT5659_MONO_NG2_CTRL_5:
892 case RT5659_MONO_NG2_CTRL_6:
893 case RT5659_MID_HP_AMP_DET:
894 case RT5659_LOW_HP_AMP_DET:
895 case RT5659_LDO_CTRL:
896 case RT5659_HP_DECROSS_CTRL_1:
897 case RT5659_HP_DECROSS_CTRL_2:
898 case RT5659_HP_DECROSS_CTRL_3:
899 case RT5659_HP_DECROSS_CTRL_4:
900 case RT5659_HP_IMP_SENS_CTRL_1:
901 case RT5659_HP_IMP_SENS_CTRL_2:
902 case RT5659_HP_IMP_SENS_CTRL_3:
903 case RT5659_HP_IMP_SENS_CTRL_4:
904 case RT5659_HP_IMP_SENS_MAP_1:
905 case RT5659_HP_IMP_SENS_MAP_2:
906 case RT5659_HP_IMP_SENS_MAP_3:
907 case RT5659_HP_IMP_SENS_MAP_4:
908 case RT5659_HP_IMP_SENS_MAP_5:
909 case RT5659_HP_IMP_SENS_MAP_6:
910 case RT5659_HP_IMP_SENS_MAP_7:
911 case RT5659_HP_IMP_SENS_MAP_8:
912 case RT5659_HP_LOGIC_CTRL_1:
913 case RT5659_HP_LOGIC_CTRL_2:
914 case RT5659_HP_CALIB_CTRL_1:
915 case RT5659_HP_CALIB_CTRL_2:
916 case RT5659_HP_CALIB_CTRL_3:
917 case RT5659_HP_CALIB_CTRL_4:
918 case RT5659_HP_CALIB_CTRL_5:
919 case RT5659_HP_CALIB_CTRL_6:
920 case RT5659_HP_CALIB_CTRL_7:
921 case RT5659_HP_CALIB_CTRL_9:
922 case RT5659_HP_CALIB_CTRL_10:
923 case RT5659_HP_CALIB_CTRL_11:
924 case RT5659_HP_CALIB_STA_1:
925 case RT5659_HP_CALIB_STA_2:
926 case RT5659_HP_CALIB_STA_3:
927 case RT5659_HP_CALIB_STA_4:
928 case RT5659_HP_CALIB_STA_5:
929 case RT5659_HP_CALIB_STA_6:
930 case RT5659_HP_CALIB_STA_7:
931 case RT5659_HP_CALIB_STA_8:
932 case RT5659_HP_CALIB_STA_9:
933 case RT5659_MONO_AMP_CALIB_CTRL_1:
934 case RT5659_MONO_AMP_CALIB_CTRL_2:
935 case RT5659_MONO_AMP_CALIB_CTRL_3:
936 case RT5659_MONO_AMP_CALIB_CTRL_4:
937 case RT5659_MONO_AMP_CALIB_CTRL_5:
938 case RT5659_MONO_AMP_CALIB_STA_1:
939 case RT5659_MONO_AMP_CALIB_STA_2:
940 case RT5659_MONO_AMP_CALIB_STA_3:
941 case RT5659_MONO_AMP_CALIB_STA_4:
942 case RT5659_SPK_PWR_LMT_CTRL_1:
943 case RT5659_SPK_PWR_LMT_CTRL_2:
944 case RT5659_SPK_PWR_LMT_CTRL_3:
945 case RT5659_SPK_PWR_LMT_STA_1:
946 case RT5659_SPK_PWR_LMT_STA_2:
947 case RT5659_SPK_PWR_LMT_STA_3:
948 case RT5659_SPK_PWR_LMT_STA_4:
949 case RT5659_SPK_PWR_LMT_STA_5:
950 case RT5659_SPK_PWR_LMT_STA_6:
951 case RT5659_FLEX_SPK_BST_CTRL_1:
952 case RT5659_FLEX_SPK_BST_CTRL_2:
953 case RT5659_FLEX_SPK_BST_CTRL_3:
954 case RT5659_FLEX_SPK_BST_CTRL_4:
955 case RT5659_SPK_EX_LMT_CTRL_1:
956 case RT5659_SPK_EX_LMT_CTRL_2:
957 case RT5659_SPK_EX_LMT_CTRL_3:
958 case RT5659_SPK_EX_LMT_CTRL_4:
959 case RT5659_SPK_EX_LMT_CTRL_5:
960 case RT5659_SPK_EX_LMT_CTRL_6:
961 case RT5659_SPK_EX_LMT_CTRL_7:
962 case RT5659_ADJ_HPF_CTRL_1:
963 case RT5659_ADJ_HPF_CTRL_2:
964 case RT5659_SPK_DC_CAILB_CTRL_1:
965 case RT5659_SPK_DC_CAILB_CTRL_2:
966 case RT5659_SPK_DC_CAILB_CTRL_3:
967 case RT5659_SPK_DC_CAILB_CTRL_4:
968 case RT5659_SPK_DC_CAILB_CTRL_5:
969 case RT5659_SPK_DC_CAILB_STA_1:
970 case RT5659_SPK_DC_CAILB_STA_2:
971 case RT5659_SPK_DC_CAILB_STA_3:
972 case RT5659_SPK_DC_CAILB_STA_4:
973 case RT5659_SPK_DC_CAILB_STA_5:
974 case RT5659_SPK_DC_CAILB_STA_6:
975 case RT5659_SPK_DC_CAILB_STA_7:
976 case RT5659_SPK_DC_CAILB_STA_8:
977 case RT5659_SPK_DC_CAILB_STA_9:
978 case RT5659_SPK_DC_CAILB_STA_10:
979 case RT5659_SPK_VDD_STA_1:
980 case RT5659_SPK_VDD_STA_2:
981 case RT5659_SPK_DC_DET_CTRL_1:
982 case RT5659_SPK_DC_DET_CTRL_2:
983 case RT5659_SPK_DC_DET_CTRL_3:
984 case RT5659_PURE_DC_DET_CTRL_1:
985 case RT5659_PURE_DC_DET_CTRL_2:
986 case RT5659_DUMMY_4:
987 case RT5659_DUMMY_5:
988 case RT5659_DUMMY_6:
989 case RT5659_DRC1_CTRL_1:
990 case RT5659_DRC1_CTRL_2:
991 case RT5659_DRC1_CTRL_3:
992 case RT5659_DRC1_CTRL_4:
993 case RT5659_DRC1_CTRL_5:
994 case RT5659_DRC1_CTRL_6:
995 case RT5659_DRC1_HARD_LMT_CTRL_1:
996 case RT5659_DRC1_HARD_LMT_CTRL_2:
997 case RT5659_DRC2_CTRL_1:
998 case RT5659_DRC2_CTRL_2:
999 case RT5659_DRC2_CTRL_3:
1000 case RT5659_DRC2_CTRL_4:
1001 case RT5659_DRC2_CTRL_5:
1002 case RT5659_DRC2_CTRL_6:
1003 case RT5659_DRC2_HARD_LMT_CTRL_1:
1004 case RT5659_DRC2_HARD_LMT_CTRL_2:
1005 case RT5659_DRC1_PRIV_1:
1006 case RT5659_DRC1_PRIV_2:
1007 case RT5659_DRC1_PRIV_3:
1008 case RT5659_DRC1_PRIV_4:
1009 case RT5659_DRC1_PRIV_5:
1010 case RT5659_DRC1_PRIV_6:
1011 case RT5659_DRC1_PRIV_7:
1012 case RT5659_DRC2_PRIV_1:
1013 case RT5659_DRC2_PRIV_2:
1014 case RT5659_DRC2_PRIV_3:
1015 case RT5659_DRC2_PRIV_4:
1016 case RT5659_DRC2_PRIV_5:
1017 case RT5659_DRC2_PRIV_6:
1018 case RT5659_DRC2_PRIV_7:
1019 case RT5659_MULTI_DRC_CTRL:
1020 case RT5659_CROSS_OVER_1:
1021 case RT5659_CROSS_OVER_2:
1022 case RT5659_CROSS_OVER_3:
1023 case RT5659_CROSS_OVER_4:
1024 case RT5659_CROSS_OVER_5:
1025 case RT5659_CROSS_OVER_6:
1026 case RT5659_CROSS_OVER_7:
1027 case RT5659_CROSS_OVER_8:
1028 case RT5659_CROSS_OVER_9:
1029 case RT5659_CROSS_OVER_10:
1030 case RT5659_ALC_PGA_CTRL_1:
1031 case RT5659_ALC_PGA_CTRL_2:
1032 case RT5659_ALC_PGA_CTRL_3:
1033 case RT5659_ALC_PGA_CTRL_4:
1034 case RT5659_ALC_PGA_CTRL_5:
1035 case RT5659_ALC_PGA_CTRL_6:
1036 case RT5659_ALC_PGA_CTRL_7:
1037 case RT5659_ALC_PGA_CTRL_8:
1038 case RT5659_ALC_PGA_STA_1:
1039 case RT5659_ALC_PGA_STA_2:
1040 case RT5659_ALC_PGA_STA_3:
1041 case RT5659_DAC_L_EQ_PRE_VOL:
1042 case RT5659_DAC_R_EQ_PRE_VOL:
1043 case RT5659_DAC_L_EQ_POST_VOL:
1044 case RT5659_DAC_R_EQ_POST_VOL:
1045 case RT5659_DAC_L_EQ_LPF1_A1:
1046 case RT5659_DAC_L_EQ_LPF1_H0:
1047 case RT5659_DAC_R_EQ_LPF1_A1:
1048 case RT5659_DAC_R_EQ_LPF1_H0:
1049 case RT5659_DAC_L_EQ_BPF2_A1:
1050 case RT5659_DAC_L_EQ_BPF2_A2:
1051 case RT5659_DAC_L_EQ_BPF2_H0:
1052 case RT5659_DAC_R_EQ_BPF2_A1:
1053 case RT5659_DAC_R_EQ_BPF2_A2:
1054 case RT5659_DAC_R_EQ_BPF2_H0:
1055 case RT5659_DAC_L_EQ_BPF3_A1:
1056 case RT5659_DAC_L_EQ_BPF3_A2:
1057 case RT5659_DAC_L_EQ_BPF3_H0:
1058 case RT5659_DAC_R_EQ_BPF3_A1:
1059 case RT5659_DAC_R_EQ_BPF3_A2:
1060 case RT5659_DAC_R_EQ_BPF3_H0:
1061 case RT5659_DAC_L_EQ_BPF4_A1:
1062 case RT5659_DAC_L_EQ_BPF4_A2:
1063 case RT5659_DAC_L_EQ_BPF4_H0:
1064 case RT5659_DAC_R_EQ_BPF4_A1:
1065 case RT5659_DAC_R_EQ_BPF4_A2:
1066 case RT5659_DAC_R_EQ_BPF4_H0:
1067 case RT5659_DAC_L_EQ_HPF1_A1:
1068 case RT5659_DAC_L_EQ_HPF1_H0:
1069 case RT5659_DAC_R_EQ_HPF1_A1:
1070 case RT5659_DAC_R_EQ_HPF1_H0:
1071 case RT5659_DAC_L_EQ_HPF2_A1:
1072 case RT5659_DAC_L_EQ_HPF2_A2:
1073 case RT5659_DAC_L_EQ_HPF2_H0:
1074 case RT5659_DAC_R_EQ_HPF2_A1:
1075 case RT5659_DAC_R_EQ_HPF2_A2:
1076 case RT5659_DAC_R_EQ_HPF2_H0:
1077 case RT5659_DAC_L_BI_EQ_BPF1_H0_1:
1078 case RT5659_DAC_L_BI_EQ_BPF1_H0_2:
1079 case RT5659_DAC_L_BI_EQ_BPF1_B1_1:
1080 case RT5659_DAC_L_BI_EQ_BPF1_B1_2:
1081 case RT5659_DAC_L_BI_EQ_BPF1_B2_1:
1082 case RT5659_DAC_L_BI_EQ_BPF1_B2_2:
1083 case RT5659_DAC_L_BI_EQ_BPF1_A1_1:
1084 case RT5659_DAC_L_BI_EQ_BPF1_A1_2:
1085 case RT5659_DAC_L_BI_EQ_BPF1_A2_1:
1086 case RT5659_DAC_L_BI_EQ_BPF1_A2_2:
1087 case RT5659_DAC_R_BI_EQ_BPF1_H0_1:
1088 case RT5659_DAC_R_BI_EQ_BPF1_H0_2:
1089 case RT5659_DAC_R_BI_EQ_BPF1_B1_1:
1090 case RT5659_DAC_R_BI_EQ_BPF1_B1_2:
1091 case RT5659_DAC_R_BI_EQ_BPF1_B2_1:
1092 case RT5659_DAC_R_BI_EQ_BPF1_B2_2:
1093 case RT5659_DAC_R_BI_EQ_BPF1_A1_1:
1094 case RT5659_DAC_R_BI_EQ_BPF1_A1_2:
1095 case RT5659_DAC_R_BI_EQ_BPF1_A2_1:
1096 case RT5659_DAC_R_BI_EQ_BPF1_A2_2:
1097 case RT5659_ADC_L_EQ_LPF1_A1:
1098 case RT5659_ADC_R_EQ_LPF1_A1:
1099 case RT5659_ADC_L_EQ_LPF1_H0:
1100 case RT5659_ADC_R_EQ_LPF1_H0:
1101 case RT5659_ADC_L_EQ_BPF1_A1:
1102 case RT5659_ADC_R_EQ_BPF1_A1:
1103 case RT5659_ADC_L_EQ_BPF1_A2:
1104 case RT5659_ADC_R_EQ_BPF1_A2:
1105 case RT5659_ADC_L_EQ_BPF1_H0:
1106 case RT5659_ADC_R_EQ_BPF1_H0:
1107 case RT5659_ADC_L_EQ_BPF2_A1:
1108 case RT5659_ADC_R_EQ_BPF2_A1:
1109 case RT5659_ADC_L_EQ_BPF2_A2:
1110 case RT5659_ADC_R_EQ_BPF2_A2:
1111 case RT5659_ADC_L_EQ_BPF2_H0:
1112 case RT5659_ADC_R_EQ_BPF2_H0:
1113 case RT5659_ADC_L_EQ_BPF3_A1:
1114 case RT5659_ADC_R_EQ_BPF3_A1:
1115 case RT5659_ADC_L_EQ_BPF3_A2:
1116 case RT5659_ADC_R_EQ_BPF3_A2:
1117 case RT5659_ADC_L_EQ_BPF3_H0:
1118 case RT5659_ADC_R_EQ_BPF3_H0:
1119 case RT5659_ADC_L_EQ_BPF4_A1:
1120 case RT5659_ADC_R_EQ_BPF4_A1:
1121 case RT5659_ADC_L_EQ_BPF4_A2:
1122 case RT5659_ADC_R_EQ_BPF4_A2:
1123 case RT5659_ADC_L_EQ_BPF4_H0:
1124 case RT5659_ADC_R_EQ_BPF4_H0:
1125 case RT5659_ADC_L_EQ_HPF1_A1:
1126 case RT5659_ADC_R_EQ_HPF1_A1:
1127 case RT5659_ADC_L_EQ_HPF1_H0:
1128 case RT5659_ADC_R_EQ_HPF1_H0:
1129 case RT5659_ADC_L_EQ_PRE_VOL:
1130 case RT5659_ADC_R_EQ_PRE_VOL:
1131 case RT5659_ADC_L_EQ_POST_VOL:
1132 case RT5659_ADC_R_EQ_POST_VOL:
1133 return true;
1134 default:
1135 return false;
1136 }
1137}
1138
1139static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1140static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1141static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1142static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1143static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1144static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
1145static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1146
1147/* Interface data select */
1148static const char * const rt5659_data_select[] = {
1149 "L/R", "R/L", "L/L", "R/R"
1150};
1151
1152static const SOC_ENUM_SINGLE_DECL(rt5659_if1_01_adc_enum,
1153 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT01_SFT, rt5659_data_select);
1154
1155static const SOC_ENUM_SINGLE_DECL(rt5659_if1_23_adc_enum,
1156 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT23_SFT, rt5659_data_select);
1157
1158static const SOC_ENUM_SINGLE_DECL(rt5659_if1_45_adc_enum,
1159 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT45_SFT, rt5659_data_select);
1160
1161static const SOC_ENUM_SINGLE_DECL(rt5659_if1_67_adc_enum,
1162 RT5659_TDM_CTRL_2, RT5659_DS_ADC_SLOT67_SFT, rt5659_data_select);
1163
1164static const SOC_ENUM_SINGLE_DECL(rt5659_if2_dac_enum,
1165 RT5659_DIG_INF23_DATA, RT5659_IF2_DAC_SEL_SFT, rt5659_data_select);
1166
1167static const SOC_ENUM_SINGLE_DECL(rt5659_if2_adc_enum,
1168 RT5659_DIG_INF23_DATA, RT5659_IF2_ADC_SEL_SFT, rt5659_data_select);
1169
1170static const SOC_ENUM_SINGLE_DECL(rt5659_if3_dac_enum,
1171 RT5659_DIG_INF23_DATA, RT5659_IF3_DAC_SEL_SFT, rt5659_data_select);
1172
1173static const SOC_ENUM_SINGLE_DECL(rt5659_if3_adc_enum,
1174 RT5659_DIG_INF23_DATA, RT5659_IF3_ADC_SEL_SFT, rt5659_data_select);
1175
1176static const struct snd_kcontrol_new rt5659_if1_01_adc_swap_mux =
1177 SOC_DAPM_ENUM("IF1 01 ADC Swap Source", rt5659_if1_01_adc_enum);
1178
1179static const struct snd_kcontrol_new rt5659_if1_23_adc_swap_mux =
1180 SOC_DAPM_ENUM("IF1 23 ADC1 Swap Source", rt5659_if1_23_adc_enum);
1181
1182static const struct snd_kcontrol_new rt5659_if1_45_adc_swap_mux =
1183 SOC_DAPM_ENUM("IF1 45 ADC1 Swap Source", rt5659_if1_45_adc_enum);
1184
1185static const struct snd_kcontrol_new rt5659_if1_67_adc_swap_mux =
1186 SOC_DAPM_ENUM("IF1 67 ADC1 Swap Source", rt5659_if1_67_adc_enum);
1187
1188static const struct snd_kcontrol_new rt5659_if2_dac_swap_mux =
1189 SOC_DAPM_ENUM("IF2 DAC Swap Source", rt5659_if2_dac_enum);
1190
1191static const struct snd_kcontrol_new rt5659_if2_adc_swap_mux =
1192 SOC_DAPM_ENUM("IF2 ADC Swap Source", rt5659_if2_adc_enum);
1193
1194static const struct snd_kcontrol_new rt5659_if3_dac_swap_mux =
1195 SOC_DAPM_ENUM("IF3 DAC Swap Source", rt5659_if3_dac_enum);
1196
1197static const struct snd_kcontrol_new rt5659_if3_adc_swap_mux =
1198 SOC_DAPM_ENUM("IF3 ADC Swap Source", rt5659_if3_adc_enum);
1199
1200static const char * const rt5659_asrc_clk_src[] = {
1201 "clk_sysy_div_out", "clk_i2s1_track", "clk_i2s2_track",
1202 "clk_i2s3_track", "clk_sys2", "clk_sys3"
1203};
1204
1205static unsigned int rt5659_asrc_clk_map_values[] = {
1206 0, 1, 2, 3, 5, 6,
1207};
1208
1209static const SOC_VALUE_ENUM_SINGLE_DECL(
1210 rt5659_da_sto_asrc_enum, RT5659_ASRC_2, RT5659_DA_STO_T_SFT, 0x7,
1211 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1212
1213static const SOC_VALUE_ENUM_SINGLE_DECL(
1214 rt5659_da_monol_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_L_T_SFT, 0x7,
1215 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1216
1217static const SOC_VALUE_ENUM_SINGLE_DECL(
1218 rt5659_da_monor_asrc_enum, RT5659_ASRC_2, RT5659_DA_MONO_R_T_SFT, 0x7,
1219 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1220
1221static const SOC_VALUE_ENUM_SINGLE_DECL(
1222 rt5659_ad_sto1_asrc_enum, RT5659_ASRC_2, RT5659_AD_STO1_T_SFT, 0x7,
1223 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1224
1225static const SOC_VALUE_ENUM_SINGLE_DECL(
1226 rt5659_ad_sto2_asrc_enum, RT5659_ASRC_3, RT5659_AD_STO2_T_SFT, 0x7,
1227 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1228
1229static const SOC_VALUE_ENUM_SINGLE_DECL(
1230 rt5659_ad_monol_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_L_T_SFT, 0x7,
1231 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1232
1233static const SOC_VALUE_ENUM_SINGLE_DECL(
1234 rt5659_ad_monor_asrc_enum, RT5659_ASRC_3, RT5659_AD_MONO_R_T_SFT, 0x7,
1235 rt5659_asrc_clk_src, rt5659_asrc_clk_map_values);
1236
1237static int rt5659_hp_vol_put(struct snd_kcontrol *kcontrol,
1238 struct snd_ctl_elem_value *ucontrol)
1239{
1240 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
1241 int ret = snd_soc_put_volsw(kcontrol, ucontrol);
1242
1243 if (snd_soc_read(codec, RT5659_STO_NG2_CTRL_1) & RT5659_NG2_EN) {
1244 snd_soc_update_bits(codec, RT5659_STO_NG2_CTRL_1,
1245 RT5659_NG2_EN_MASK, RT5659_NG2_DIS);
1246 snd_soc_update_bits(codec, RT5659_STO_NG2_CTRL_1,
1247 RT5659_NG2_EN_MASK, RT5659_NG2_EN);
1248 }
1249
1250 return ret;
1251}
1252
1253static void rt5659_enable_push_button_irq(struct snd_soc_codec *codec,
1254 bool enable)
1255{
1256 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
1257
1258 if (enable) {
1259 snd_soc_write(codec, RT5659_4BTN_IL_CMD_1, 0x000b);
1260
1261 /* MICBIAS1 and Mic Det Power for button detect*/
1262 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS1");
1263 snd_soc_dapm_force_enable_pin(dapm,
1264 "Mic Det Power");
1265 snd_soc_dapm_sync(dapm);
1266
1267 snd_soc_update_bits(codec, RT5659_PWR_ANLG_2,
1268 RT5659_PWR_MB1, RT5659_PWR_MB1);
1269 snd_soc_update_bits(codec, RT5659_PWR_VOL,
1270 RT5659_PWR_MIC_DET, RT5659_PWR_MIC_DET);
1271
1272 snd_soc_update_bits(codec, RT5659_IRQ_CTRL_2,
1273 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_EN);
1274 snd_soc_update_bits(codec, RT5659_4BTN_IL_CMD_2,
1275 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_EN);
1276 } else {
1277 snd_soc_update_bits(codec, RT5659_4BTN_IL_CMD_2,
1278 RT5659_4BTN_IL_MASK, RT5659_4BTN_IL_DIS);
1279 snd_soc_update_bits(codec, RT5659_IRQ_CTRL_2,
1280 RT5659_IL_IRQ_MASK, RT5659_IL_IRQ_DIS);
1281 /* MICBIAS1 and Mic Det Power for button detect*/
1282 snd_soc_dapm_disable_pin(dapm, "MICBIAS1");
1283 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1284 snd_soc_dapm_sync(dapm);
1285 }
1286}
1287
1288/**
1289 * rt5659_headset_detect - Detect headset.
1290 * @codec: SoC audio codec device.
1291 * @jack_insert: Jack insert or not.
1292 *
1293 * Detect whether is headset or not when jack inserted.
1294 *
1295 * Returns detect status.
1296 */
1297
1298static int rt5659_headset_detect(struct snd_soc_codec *codec, int jack_insert)
1299{
1300 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
1301 int val, i = 0, sleep_time[5] = {300, 150, 100, 50, 30};
1302 int reg_63;
1303
1304 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
1305
1306 if (jack_insert) {
1307 snd_soc_dapm_force_enable_pin(dapm,
1308 "Mic Det Power");
1309 snd_soc_dapm_sync(dapm);
1310 reg_63 = snd_soc_read(codec, RT5659_PWR_ANLG_1);
1311
1312 snd_soc_update_bits(codec, RT5659_PWR_ANLG_1,
1313 RT5659_PWR_VREF2 | RT5659_PWR_MB,
1314 RT5659_PWR_VREF2 | RT5659_PWR_MB);
1315 msleep(20);
1316 snd_soc_update_bits(codec, RT5659_PWR_ANLG_1,
1317 RT5659_PWR_FV2, RT5659_PWR_FV2);
1318
1319 snd_soc_write(codec, RT5659_EJD_CTRL_2, 0x4160);
1320 snd_soc_update_bits(codec, RT5659_EJD_CTRL_1,
1321 0x20, 0x0);
1322 msleep(20);
1323 snd_soc_update_bits(codec, RT5659_EJD_CTRL_1,
1324 0x20, 0x20);
1325
1326 while (i < 5) {
1327 msleep(sleep_time[i]);
1328 val = snd_soc_read(codec, RT5659_EJD_CTRL_2) & 0x0003;
1329 i++;
1330 if (val == 0x1 || val == 0x2 || val == 0x3)
1331 break;
1332 }
1333
1334 switch (val) {
1335 case 1:
1336 rt5659->jack_type = SND_JACK_HEADSET;
1337 rt5659_enable_push_button_irq(codec, true);
1338 break;
1339 default:
1340 snd_soc_write(codec, RT5659_PWR_ANLG_1, reg_63);
1341 rt5659->jack_type = SND_JACK_HEADPHONE;
1342 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1343 snd_soc_dapm_sync(dapm);
1344 break;
1345 }
1346 } else {
1347 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
1348 snd_soc_dapm_sync(dapm);
1349 if (rt5659->jack_type == SND_JACK_HEADSET)
1350 rt5659_enable_push_button_irq(codec, false);
1351 rt5659->jack_type = 0;
1352 }
1353
1354 dev_dbg(codec->dev, "jack_type = %d\n", rt5659->jack_type);
1355 return rt5659->jack_type;
1356}
1357
1358static int rt5659_button_detect(struct snd_soc_codec *codec)
1359{
1360 int btn_type, val;
1361
1362 val = snd_soc_read(codec, RT5659_4BTN_IL_CMD_1);
1363 btn_type = val & 0xfff0;
1364 snd_soc_write(codec, RT5659_4BTN_IL_CMD_1, val);
1365
1366 return btn_type;
1367}
1368
1369static irqreturn_t rt5659_irq(int irq, void *data)
1370{
1371 struct rt5659_priv *rt5659 = data;
1372
1373 queue_delayed_work(system_power_efficient_wq,
1374 &rt5659->jack_detect_work, msecs_to_jiffies(250));
1375
1376 return IRQ_HANDLED;
1377}
1378
1379int rt5659_set_jack_detect(struct snd_soc_codec *codec,
1380 struct snd_soc_jack *hs_jack)
1381{
1382 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
1383
1384 rt5659->hs_jack = hs_jack;
1385
1386 rt5659_irq(0, rt5659);
1387
1388 return 0;
1389}
1390EXPORT_SYMBOL_GPL(rt5659_set_jack_detect);
1391
1392static void rt5659_jack_detect_work(struct work_struct *work)
1393{
1394 struct rt5659_priv *rt5659 =
1395 container_of(work, struct rt5659_priv, jack_detect_work.work);
1396 int val, btn_type, report = 0;
1397
1398 if (!rt5659->codec)
1399 return;
1400
1401 val = snd_soc_read(rt5659->codec, RT5659_INT_ST_1) & 0x0080;
1402 if (!val) {
1403 /* jack in */
1404 if (rt5659->jack_type == 0) {
1405 /* jack was out, report jack type */
1406 report = rt5659_headset_detect(rt5659->codec, 1);
1407 } else {
1408 /* jack is already in, report button event */
1409 report = SND_JACK_HEADSET;
1410 btn_type = rt5659_button_detect(rt5659->codec);
1411 /**
1412 * rt5659 can report three kinds of button behavior,
1413 * one click, double click and hold. However,
1414 * currently we will report button pressed/released
1415 * event. So all the three button behaviors are
1416 * treated as button pressed.
1417 */
1418 switch (btn_type) {
1419 case 0x8000:
1420 case 0x4000:
1421 case 0x2000:
1422 report |= SND_JACK_BTN_0;
1423 break;
1424 case 0x1000:
1425 case 0x0800:
1426 case 0x0400:
1427 report |= SND_JACK_BTN_1;
1428 break;
1429 case 0x0200:
1430 case 0x0100:
1431 case 0x0080:
1432 report |= SND_JACK_BTN_2;
1433 break;
1434 case 0x0040:
1435 case 0x0020:
1436 case 0x0010:
1437 report |= SND_JACK_BTN_3;
1438 break;
1439 case 0x0000: /* unpressed */
1440 break;
1441 default:
1442 btn_type = 0;
1443 dev_err(rt5659->codec->dev,
1444 "Unexpected button code 0x%04x\n",
1445 btn_type);
1446 break;
1447 }
1448
1449 /* button release or spurious interrput*/
1450 if (btn_type == 0)
1451 report = rt5659->jack_type;
1452 }
1453 } else {
1454 /* jack out */
1455 report = rt5659_headset_detect(rt5659->codec, 0);
1456 }
1457
1458 snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1459 SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1460 SND_JACK_BTN_2 | SND_JACK_BTN_3);
1461}
1462
1463static const struct snd_kcontrol_new rt5659_snd_controls[] = {
1464 /* Speaker Output Volume */
1465 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5659_SPO_VOL,
1466 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1467
1468 /* Headphone Output Volume */
1469 SOC_DOUBLE_R_EXT_TLV("Headphone Playback Volume", RT5659_HPL_GAIN,
1470 RT5659_HPR_GAIN, RT5659_G_HP_SFT, 31, 1, snd_soc_get_volsw,
1471 rt5659_hp_vol_put, hp_vol_tlv),
1472
1473 /* Mono Output Volume */
1474 SOC_SINGLE_TLV("Mono Playback Volume", RT5659_MONO_OUT,
1475 RT5659_L_VOL_SFT, 39, 1, out_vol_tlv),
1476
1477 /* Output Volume */
1478 SOC_DOUBLE_TLV("OUT Playback Volume", RT5659_LOUT,
1479 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 39, 1, out_vol_tlv),
1480
1481 /* DAC Digital Volume */
1482 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5659_DAC1_DIG_VOL,
1483 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1484 SOC_DOUBLE("DAC1 Playback Switch", RT5659_AD_DA_MIXER,
1485 RT5659_M_DAC1_L_SFT, RT5659_M_DAC1_R_SFT, 1, 1),
1486
1487 SOC_DOUBLE_TLV("DAC2 Playback Volume", RT5659_DAC2_DIG_VOL,
1488 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 175, 0, dac_vol_tlv),
1489 SOC_DOUBLE("DAC2 Playback Switch", RT5659_DAC_CTRL,
1490 RT5659_M_DAC2_L_VOL_SFT, RT5659_M_DAC2_R_VOL_SFT, 1, 1),
1491
1492 /* IN1/IN2/IN3/IN4 Volume */
1493 SOC_SINGLE_TLV("IN1 Boost Volume", RT5659_IN1_IN2,
1494 RT5659_BST1_SFT, 69, 0, in_bst_tlv),
1495 SOC_SINGLE_TLV("IN2 Boost Volume", RT5659_IN1_IN2,
1496 RT5659_BST2_SFT, 69, 0, in_bst_tlv),
1497 SOC_SINGLE_TLV("IN3 Boost Volume", RT5659_IN3_IN4,
1498 RT5659_BST3_SFT, 69, 0, in_bst_tlv),
1499 SOC_SINGLE_TLV("IN4 Boost Volume", RT5659_IN3_IN4,
1500 RT5659_BST4_SFT, 69, 0, in_bst_tlv),
1501
1502 /* INL/INR Volume Control */
1503 SOC_DOUBLE_TLV("IN Capture Volume", RT5659_INL1_INR1_VOL,
1504 RT5659_INL_VOL_SFT, RT5659_INR_VOL_SFT, 31, 1, in_vol_tlv),
1505
1506 /* ADC Digital Volume Control */
1507 SOC_DOUBLE("STO1 ADC Capture Switch", RT5659_STO1_ADC_DIG_VOL,
1508 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1509 SOC_DOUBLE_TLV("STO1 ADC Capture Volume", RT5659_STO1_ADC_DIG_VOL,
1510 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1511 SOC_DOUBLE("Mono ADC Capture Switch", RT5659_MONO_ADC_DIG_VOL,
1512 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1513 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5659_MONO_ADC_DIG_VOL,
1514 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1515 SOC_DOUBLE("STO2 ADC Capture Switch", RT5659_STO2_ADC_DIG_VOL,
1516 RT5659_L_MUTE_SFT, RT5659_R_MUTE_SFT, 1, 1),
1517 SOC_DOUBLE_TLV("STO2 ADC Capture Volume", RT5659_STO2_ADC_DIG_VOL,
1518 RT5659_L_VOL_SFT, RT5659_R_VOL_SFT, 127, 0, adc_vol_tlv),
1519
1520 /* ADC Boost Volume Control */
1521 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5659_STO1_BOOST,
1522 RT5659_STO1_ADC_L_BST_SFT, RT5659_STO1_ADC_R_BST_SFT,
1523 3, 0, adc_bst_tlv),
1524
1525 SOC_DOUBLE_TLV("Mono ADC Boost Gain Volume", RT5659_MONO_BOOST,
1526 RT5659_MONO_ADC_L_BST_SFT, RT5659_MONO_ADC_R_BST_SFT,
1527 3, 0, adc_bst_tlv),
1528
1529 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5659_STO2_BOOST,
1530 RT5659_STO2_ADC_L_BST_SFT, RT5659_STO2_ADC_R_BST_SFT,
1531 3, 0, adc_bst_tlv),
1532
1533 SOC_SINGLE("DAC IF1 DAC1 L Data Switch", RT5659_TDM_CTRL_4, 12, 7, 0),
1534 SOC_SINGLE("DAC IF1 DAC1 R Data Switch", RT5659_TDM_CTRL_4, 8, 7, 0),
1535 SOC_SINGLE("DAC IF1 DAC2 L Data Switch", RT5659_TDM_CTRL_4, 4, 7, 0),
1536 SOC_SINGLE("DAC IF1 DAC2 R Data Switch", RT5659_TDM_CTRL_4, 0, 7, 0),
1537};
1538
1539/**
1540 * set_dmic_clk - Set parameter of dmic.
1541 *
1542 * @w: DAPM widget.
1543 * @kcontrol: The kcontrol of this widget.
1544 * @event: Event id.
1545 *
1546 * Choose dmic clock between 1MHz and 3MHz.
1547 * It is better for clock to approximate 3MHz.
1548 */
1549static int set_dmic_clk(struct snd_soc_dapm_widget *w,
1550 struct snd_kcontrol *kcontrol, int event)
1551{
1552 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1553 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
1554 int pd, idx = -EINVAL;
1555
1556 pd = rl6231_get_pre_div(rt5659->regmap,
1557 RT5659_ADDA_CLK_1, RT5659_I2S_PD1_SFT);
1558 idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1559
1560 if (idx < 0)
1561 dev_err(codec->dev, "Failed to set DMIC clock\n");
1562 else {
1563 snd_soc_update_bits(codec, RT5659_DMIC_CTRL_1,
1564 RT5659_DMIC_CLK_MASK, idx << RT5659_DMIC_CLK_SFT);
1565 }
1566 return idx;
1567}
1568
1569static int set_adc_clk(struct snd_soc_dapm_widget *w,
1570 struct snd_kcontrol *kcontrol, int event)
1571{
1572 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1573
1574 switch (event) {
1575 case SND_SOC_DAPM_POST_PMU:
1576 snd_soc_update_bits(codec, RT5659_CHOP_ADC,
1577 RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK,
1578 RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK);
1579 break;
1580
1581 case SND_SOC_DAPM_PRE_PMD:
1582 snd_soc_update_bits(codec, RT5659_CHOP_ADC,
1583 RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK, 0);
1584 break;
1585
1586 default:
1587 return 0;
1588 }
1589
1590 return 0;
1591
1592}
1593
1594static int rt5659_charge_pump_event(struct snd_soc_dapm_widget *w,
1595 struct snd_kcontrol *kcontrol, int event)
1596{
1597 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1598
1599 switch (event) {
1600 case SND_SOC_DAPM_PRE_PMU:
1601 /* Depop */
1602 snd_soc_write(codec, RT5659_DEPOP_1, 0x0009);
1603 break;
1604 case SND_SOC_DAPM_POST_PMD:
1605 snd_soc_write(codec, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
1606 break;
1607 default:
1608 return 0;
1609 }
1610
1611 return 0;
1612}
1613
1614static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *w,
1615 struct snd_soc_dapm_widget *sink)
1616{
1617 unsigned int val;
1618 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1619
1620 val = snd_soc_read(codec, RT5659_GLB_CLK);
1621 val &= RT5659_SCLK_SRC_MASK;
1622 if (val == RT5659_SCLK_SRC_PLL1)
1623 return 1;
1624 else
1625 return 0;
1626}
1627
1628static int is_using_asrc(struct snd_soc_dapm_widget *w,
1629 struct snd_soc_dapm_widget *sink)
1630{
1631 unsigned int reg, shift, val;
1632 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1633
1634 switch (w->shift) {
1635 case RT5659_ADC_MONO_R_ASRC_SFT:
1636 reg = RT5659_ASRC_3;
1637 shift = RT5659_AD_MONO_R_T_SFT;
1638 break;
1639 case RT5659_ADC_MONO_L_ASRC_SFT:
1640 reg = RT5659_ASRC_3;
1641 shift = RT5659_AD_MONO_L_T_SFT;
1642 break;
1643 case RT5659_ADC_STO1_ASRC_SFT:
1644 reg = RT5659_ASRC_2;
1645 shift = RT5659_AD_STO1_T_SFT;
1646 break;
1647 case RT5659_DAC_MONO_R_ASRC_SFT:
1648 reg = RT5659_ASRC_2;
1649 shift = RT5659_DA_MONO_R_T_SFT;
1650 break;
1651 case RT5659_DAC_MONO_L_ASRC_SFT:
1652 reg = RT5659_ASRC_2;
1653 shift = RT5659_DA_MONO_L_T_SFT;
1654 break;
1655 case RT5659_DAC_STO_ASRC_SFT:
1656 reg = RT5659_ASRC_2;
1657 shift = RT5659_DA_STO_T_SFT;
1658 break;
1659 default:
1660 return 0;
1661 }
1662
1663 val = (snd_soc_read(codec, reg) >> shift) & 0xf;
1664 switch (val) {
1665 case 1:
1666 case 2:
1667 case 3:
1668 /* I2S_Pre_Div1 should be 1 in asrc mode */
1669 snd_soc_update_bits(codec, RT5659_ADDA_CLK_1,
1670 RT5659_I2S_PD1_MASK, RT5659_I2S_PD1_2);
1671 return 1;
1672 default:
1673 return 0;
1674 }
1675
1676}
1677
1678/* Digital Mixer */
1679static const struct snd_kcontrol_new rt5659_sto1_adc_l_mix[] = {
1680 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1681 RT5659_M_STO1_ADC_L1_SFT, 1, 1),
1682 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1683 RT5659_M_STO1_ADC_L2_SFT, 1, 1),
1684};
1685
1686static const struct snd_kcontrol_new rt5659_sto1_adc_r_mix[] = {
1687 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_STO1_ADC_MIXER,
1688 RT5659_M_STO1_ADC_R1_SFT, 1, 1),
1689 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1690 RT5659_M_STO1_ADC_R2_SFT, 1, 1),
1691};
1692
1693static const struct snd_kcontrol_new rt5659_mono_adc_l_mix[] = {
1694 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1695 RT5659_M_MONO_ADC_L1_SFT, 1, 1),
1696 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1697 RT5659_M_MONO_ADC_L2_SFT, 1, 1),
1698};
1699
1700static const struct snd_kcontrol_new rt5659_mono_adc_r_mix[] = {
1701 SOC_DAPM_SINGLE("ADC1 Switch", RT5659_MONO_ADC_MIXER,
1702 RT5659_M_MONO_ADC_R1_SFT, 1, 1),
1703 SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1704 RT5659_M_MONO_ADC_R2_SFT, 1, 1),
1705};
1706
1707static const struct snd_kcontrol_new rt5659_dac_l_mix[] = {
1708 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1709 RT5659_M_ADCMIX_L_SFT, 1, 1),
1710 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1711 RT5659_M_DAC1_L_SFT, 1, 1),
1712};
1713
1714static const struct snd_kcontrol_new rt5659_dac_r_mix[] = {
1715 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5659_AD_DA_MIXER,
1716 RT5659_M_ADCMIX_R_SFT, 1, 1),
1717 SOC_DAPM_SINGLE("DAC1 Switch", RT5659_AD_DA_MIXER,
1718 RT5659_M_DAC1_R_SFT, 1, 1),
1719};
1720
1721static const struct snd_kcontrol_new rt5659_sto_dac_l_mix[] = {
1722 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1723 RT5659_M_DAC_L1_STO_L_SFT, 1, 1),
1724 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1725 RT5659_M_DAC_R1_STO_L_SFT, 1, 1),
1726 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1727 RT5659_M_DAC_L2_STO_L_SFT, 1, 1),
1728 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1729 RT5659_M_DAC_R2_STO_L_SFT, 1, 1),
1730};
1731
1732static const struct snd_kcontrol_new rt5659_sto_dac_r_mix[] = {
1733 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_STO_DAC_MIXER,
1734 RT5659_M_DAC_L1_STO_R_SFT, 1, 1),
1735 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_STO_DAC_MIXER,
1736 RT5659_M_DAC_R1_STO_R_SFT, 1, 1),
1737 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_STO_DAC_MIXER,
1738 RT5659_M_DAC_L2_STO_R_SFT, 1, 1),
1739 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_STO_DAC_MIXER,
1740 RT5659_M_DAC_R2_STO_R_SFT, 1, 1),
1741};
1742
1743static const struct snd_kcontrol_new rt5659_mono_dac_l_mix[] = {
1744 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1745 RT5659_M_DAC_L1_MONO_L_SFT, 1, 1),
1746 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1747 RT5659_M_DAC_R1_MONO_L_SFT, 1, 1),
1748 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1749 RT5659_M_DAC_L2_MONO_L_SFT, 1, 1),
1750 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1751 RT5659_M_DAC_R2_MONO_L_SFT, 1, 1),
1752};
1753
1754static const struct snd_kcontrol_new rt5659_mono_dac_r_mix[] = {
1755 SOC_DAPM_SINGLE("DAC L1 Switch", RT5659_MONO_DAC_MIXER,
1756 RT5659_M_DAC_L1_MONO_R_SFT, 1, 1),
1757 SOC_DAPM_SINGLE("DAC R1 Switch", RT5659_MONO_DAC_MIXER,
1758 RT5659_M_DAC_R1_MONO_R_SFT, 1, 1),
1759 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONO_DAC_MIXER,
1760 RT5659_M_DAC_L2_MONO_R_SFT, 1, 1),
1761 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONO_DAC_MIXER,
1762 RT5659_M_DAC_R2_MONO_R_SFT, 1, 1),
1763};
1764
1765/* Analog Input Mixer */
1766static const struct snd_kcontrol_new rt5659_rec1_l_mix[] = {
1767 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC1_L2_MIXER,
1768 RT5659_M_SPKVOLL_RM1_L_SFT, 1, 1),
1769 SOC_DAPM_SINGLE("INL Switch", RT5659_REC1_L2_MIXER,
1770 RT5659_M_INL_RM1_L_SFT, 1, 1),
1771 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_L2_MIXER,
1772 RT5659_M_BST4_RM1_L_SFT, 1, 1),
1773 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_L2_MIXER,
1774 RT5659_M_BST3_RM1_L_SFT, 1, 1),
1775 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_L2_MIXER,
1776 RT5659_M_BST2_RM1_L_SFT, 1, 1),
1777 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_L2_MIXER,
1778 RT5659_M_BST1_RM1_L_SFT, 1, 1),
1779};
1780
1781static const struct snd_kcontrol_new rt5659_rec1_r_mix[] = {
1782 SOC_DAPM_SINGLE("HPOVOLR Switch", RT5659_REC1_L2_MIXER,
1783 RT5659_M_HPOVOLR_RM1_R_SFT, 1, 1),
1784 SOC_DAPM_SINGLE("INR Switch", RT5659_REC1_R2_MIXER,
1785 RT5659_M_INR_RM1_R_SFT, 1, 1),
1786 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC1_R2_MIXER,
1787 RT5659_M_BST4_RM1_R_SFT, 1, 1),
1788 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC1_R2_MIXER,
1789 RT5659_M_BST3_RM1_R_SFT, 1, 1),
1790 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC1_R2_MIXER,
1791 RT5659_M_BST2_RM1_R_SFT, 1, 1),
1792 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC1_R2_MIXER,
1793 RT5659_M_BST1_RM1_R_SFT, 1, 1),
1794};
1795
1796static const struct snd_kcontrol_new rt5659_rec2_l_mix[] = {
1797 SOC_DAPM_SINGLE("SPKVOLL Switch", RT5659_REC2_L2_MIXER,
1798 RT5659_M_SPKVOL_RM2_L_SFT, 1, 1),
1799 SOC_DAPM_SINGLE("OUTVOLL Switch", RT5659_REC2_L2_MIXER,
1800 RT5659_M_OUTVOLL_RM2_L_SFT, 1, 1),
1801 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_L2_MIXER,
1802 RT5659_M_BST4_RM2_L_SFT, 1, 1),
1803 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_L2_MIXER,
1804 RT5659_M_BST3_RM2_L_SFT, 1, 1),
1805 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_L2_MIXER,
1806 RT5659_M_BST2_RM2_L_SFT, 1, 1),
1807 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_L2_MIXER,
1808 RT5659_M_BST1_RM2_L_SFT, 1, 1),
1809};
1810
1811static const struct snd_kcontrol_new rt5659_rec2_r_mix[] = {
1812 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_REC2_R2_MIXER,
1813 RT5659_M_MONOVOL_RM2_R_SFT, 1, 1),
1814 SOC_DAPM_SINGLE("OUTVOLR Switch", RT5659_REC2_R2_MIXER,
1815 RT5659_M_OUTVOLR_RM2_R_SFT, 1, 1),
1816 SOC_DAPM_SINGLE("BST4 Switch", RT5659_REC2_R2_MIXER,
1817 RT5659_M_BST4_RM2_R_SFT, 1, 1),
1818 SOC_DAPM_SINGLE("BST3 Switch", RT5659_REC2_R2_MIXER,
1819 RT5659_M_BST3_RM2_R_SFT, 1, 1),
1820 SOC_DAPM_SINGLE("BST2 Switch", RT5659_REC2_R2_MIXER,
1821 RT5659_M_BST2_RM2_R_SFT, 1, 1),
1822 SOC_DAPM_SINGLE("BST1 Switch", RT5659_REC2_R2_MIXER,
1823 RT5659_M_BST1_RM2_R_SFT, 1, 1),
1824};
1825
1826static const struct snd_kcontrol_new rt5659_spk_l_mix[] = {
1827 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPK_L_MIXER,
1828 RT5659_M_DAC_L2_SM_L_SFT, 1, 1),
1829 SOC_DAPM_SINGLE("BST1 Switch", RT5659_SPK_L_MIXER,
1830 RT5659_M_BST1_SM_L_SFT, 1, 1),
1831 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_L_MIXER,
1832 RT5659_M_IN_L_SM_L_SFT, 1, 1),
1833 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_L_MIXER,
1834 RT5659_M_IN_R_SM_L_SFT, 1, 1),
1835 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_L_MIXER,
1836 RT5659_M_BST3_SM_L_SFT, 1, 1),
1837};
1838
1839static const struct snd_kcontrol_new rt5659_spk_r_mix[] = {
1840 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPK_R_MIXER,
1841 RT5659_M_DAC_R2_SM_R_SFT, 1, 1),
1842 SOC_DAPM_SINGLE("BST4 Switch", RT5659_SPK_R_MIXER,
1843 RT5659_M_BST4_SM_R_SFT, 1, 1),
1844 SOC_DAPM_SINGLE("INL Switch", RT5659_SPK_R_MIXER,
1845 RT5659_M_IN_L_SM_R_SFT, 1, 1),
1846 SOC_DAPM_SINGLE("INR Switch", RT5659_SPK_R_MIXER,
1847 RT5659_M_IN_R_SM_R_SFT, 1, 1),
1848 SOC_DAPM_SINGLE("BST3 Switch", RT5659_SPK_R_MIXER,
1849 RT5659_M_BST3_SM_R_SFT, 1, 1),
1850};
1851
1852static const struct snd_kcontrol_new rt5659_monovol_mix[] = {
1853 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1854 RT5659_M_DAC_L2_MM_SFT, 1, 1),
1855 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_MONOMIX_IN_GAIN,
1856 RT5659_M_DAC_R2_MM_SFT, 1, 1),
1857 SOC_DAPM_SINGLE("BST1 Switch", RT5659_MONOMIX_IN_GAIN,
1858 RT5659_M_BST1_MM_SFT, 1, 1),
1859 SOC_DAPM_SINGLE("BST2 Switch", RT5659_MONOMIX_IN_GAIN,
1860 RT5659_M_BST2_MM_SFT, 1, 1),
1861 SOC_DAPM_SINGLE("BST3 Switch", RT5659_MONOMIX_IN_GAIN,
1862 RT5659_M_BST3_MM_SFT, 1, 1),
1863};
1864
1865static const struct snd_kcontrol_new rt5659_out_l_mix[] = {
1866 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_OUT_L_MIXER,
1867 RT5659_M_DAC_L2_OM_L_SFT, 1, 1),
1868 SOC_DAPM_SINGLE("INL Switch", RT5659_OUT_L_MIXER,
1869 RT5659_M_IN_L_OM_L_SFT, 1, 1),
1870 SOC_DAPM_SINGLE("BST1 Switch", RT5659_OUT_L_MIXER,
1871 RT5659_M_BST1_OM_L_SFT, 1, 1),
1872 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_L_MIXER,
1873 RT5659_M_BST2_OM_L_SFT, 1, 1),
1874 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_L_MIXER,
1875 RT5659_M_BST3_OM_L_SFT, 1, 1),
1876};
1877
1878static const struct snd_kcontrol_new rt5659_out_r_mix[] = {
1879 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_OUT_R_MIXER,
1880 RT5659_M_DAC_R2_OM_R_SFT, 1, 1),
1881 SOC_DAPM_SINGLE("INR Switch", RT5659_OUT_R_MIXER,
1882 RT5659_M_IN_R_OM_R_SFT, 1, 1),
1883 SOC_DAPM_SINGLE("BST2 Switch", RT5659_OUT_R_MIXER,
1884 RT5659_M_BST2_OM_R_SFT, 1, 1),
1885 SOC_DAPM_SINGLE("BST3 Switch", RT5659_OUT_R_MIXER,
1886 RT5659_M_BST3_OM_R_SFT, 1, 1),
1887 SOC_DAPM_SINGLE("BST4 Switch", RT5659_OUT_R_MIXER,
1888 RT5659_M_BST4_OM_R_SFT, 1, 1),
1889};
1890
1891static const struct snd_kcontrol_new rt5659_spo_l_mix[] = {
1892 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_SPO_AMP_GAIN,
1893 RT5659_M_DAC_L2_SPKOMIX_SFT, 1, 0),
1894 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5659_SPO_AMP_GAIN,
1895 RT5659_M_SPKVOLL_SPKOMIX_SFT, 1, 0),
1896};
1897
1898static const struct snd_kcontrol_new rt5659_spo_r_mix[] = {
1899 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_SPO_AMP_GAIN,
1900 RT5659_M_DAC_R2_SPKOMIX_SFT, 1, 0),
1901 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5659_SPO_AMP_GAIN,
1902 RT5659_M_SPKVOLR_SPKOMIX_SFT, 1, 0),
1903};
1904
1905static const struct snd_kcontrol_new rt5659_mono_mix[] = {
1906 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_MONOMIX_IN_GAIN,
1907 RT5659_M_DAC_L2_MA_SFT, 1, 1),
1908 SOC_DAPM_SINGLE("MONOVOL Switch", RT5659_MONOMIX_IN_GAIN,
1909 RT5659_M_MONOVOL_MA_SFT, 1, 1),
1910};
1911
1912static const struct snd_kcontrol_new rt5659_lout_l_mix[] = {
1913 SOC_DAPM_SINGLE("DAC L2 Switch", RT5659_LOUT_MIXER,
1914 RT5659_M_DAC_L2_LM_SFT, 1, 1),
1915 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5659_LOUT_MIXER,
1916 RT5659_M_OV_L_LM_SFT, 1, 1),
1917};
1918
1919static const struct snd_kcontrol_new rt5659_lout_r_mix[] = {
1920 SOC_DAPM_SINGLE("DAC R2 Switch", RT5659_LOUT_MIXER,
1921 RT5659_M_DAC_R2_LM_SFT, 1, 1),
1922 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5659_LOUT_MIXER,
1923 RT5659_M_OV_R_LM_SFT, 1, 1),
1924};
1925
1926/*DAC L2, DAC R2*/
1927/*MX-1B [6:4], MX-1B [2:0]*/
1928static const char * const rt5659_dac2_src[] = {
1929 "IF1 DAC2", "IF2 DAC", "IF3 DAC", "Mono ADC MIX"
1930};
1931
1932static const SOC_ENUM_SINGLE_DECL(
1933 rt5659_dac_l2_enum, RT5659_DAC_CTRL,
1934 RT5659_DAC_L2_SEL_SFT, rt5659_dac2_src);
1935
1936static const struct snd_kcontrol_new rt5659_dac_l2_mux =
1937 SOC_DAPM_ENUM("DAC L2 Source", rt5659_dac_l2_enum);
1938
1939static const SOC_ENUM_SINGLE_DECL(
1940 rt5659_dac_r2_enum, RT5659_DAC_CTRL,
1941 RT5659_DAC_R2_SEL_SFT, rt5659_dac2_src);
1942
1943static const struct snd_kcontrol_new rt5659_dac_r2_mux =
1944 SOC_DAPM_ENUM("DAC R2 Source", rt5659_dac_r2_enum);
1945
1946
1947/* STO1 ADC1 Source */
1948/* MX-26 [13] */
1949static const char * const rt5659_sto1_adc1_src[] = {
1950 "DAC MIX", "ADC"
1951};
1952
1953static const SOC_ENUM_SINGLE_DECL(
1954 rt5659_sto1_adc1_enum, RT5659_STO1_ADC_MIXER,
1955 RT5659_STO1_ADC1_SRC_SFT, rt5659_sto1_adc1_src);
1956
1957static const struct snd_kcontrol_new rt5659_sto1_adc1_mux =
1958 SOC_DAPM_ENUM("Stereo1 ADC1 Source", rt5659_sto1_adc1_enum);
1959
1960/* STO1 ADC Source */
1961/* MX-26 [12] */
1962static const char * const rt5659_sto1_adc_src[] = {
1963 "ADC1", "ADC2"
1964};
1965
1966static const SOC_ENUM_SINGLE_DECL(
1967 rt5659_sto1_adc_enum, RT5659_STO1_ADC_MIXER,
1968 RT5659_STO1_ADC_SRC_SFT, rt5659_sto1_adc_src);
1969
1970static const struct snd_kcontrol_new rt5659_sto1_adc_mux =
1971 SOC_DAPM_ENUM("Stereo1 ADC Source", rt5659_sto1_adc_enum);
1972
1973/* STO1 ADC2 Source */
1974/* MX-26 [11] */
1975static const char * const rt5659_sto1_adc2_src[] = {
1976 "DAC MIX", "DMIC"
1977};
1978
1979static const SOC_ENUM_SINGLE_DECL(
1980 rt5659_sto1_adc2_enum, RT5659_STO1_ADC_MIXER,
1981 RT5659_STO1_ADC2_SRC_SFT, rt5659_sto1_adc2_src);
1982
1983static const struct snd_kcontrol_new rt5659_sto1_adc2_mux =
1984 SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
1985
1986/* STO1 DMIC Source */
1987/* MX-26 [8] */
1988static const char * const rt5659_sto1_dmic_src[] = {
1989 "DMIC1", "DMIC2"
1990};
1991
1992static const SOC_ENUM_SINGLE_DECL(
1993 rt5659_sto1_dmic_enum, RT5659_STO1_ADC_MIXER,
1994 RT5659_STO1_DMIC_SRC_SFT, rt5659_sto1_dmic_src);
1995
1996static const struct snd_kcontrol_new rt5659_sto1_dmic_mux =
1997 SOC_DAPM_ENUM("Stereo1 DMIC Source", rt5659_sto1_dmic_enum);
1998
1999
2000/* MONO ADC L2 Source */
2001/* MX-27 [12] */
2002static const char * const rt5659_mono_adc_l2_src[] = {
2003 "Mono DAC MIXL", "DMIC"
2004};
2005
2006static const SOC_ENUM_SINGLE_DECL(
2007 rt5659_mono_adc_l2_enum, RT5659_MONO_ADC_MIXER,
2008 RT5659_MONO_ADC_L2_SRC_SFT, rt5659_mono_adc_l2_src);
2009
2010static const struct snd_kcontrol_new rt5659_mono_adc_l2_mux =
2011 SOC_DAPM_ENUM("Mono ADC L2 Source", rt5659_mono_adc_l2_enum);
2012
2013
2014/* MONO ADC L1 Source */
2015/* MX-27 [11] */
2016static const char * const rt5659_mono_adc_l1_src[] = {
2017 "Mono DAC MIXL", "ADC"
2018};
2019
2020static const SOC_ENUM_SINGLE_DECL(
2021 rt5659_mono_adc_l1_enum, RT5659_MONO_ADC_MIXER,
2022 RT5659_MONO_ADC_L1_SRC_SFT, rt5659_mono_adc_l1_src);
2023
2024static const struct snd_kcontrol_new rt5659_mono_adc_l1_mux =
2025 SOC_DAPM_ENUM("Mono ADC L1 Source", rt5659_mono_adc_l1_enum);
2026
2027/* MONO ADC L Source, MONO ADC R Source*/
2028/* MX-27 [10:9], MX-27 [2:1] */
2029static const char * const rt5659_mono_adc_src[] = {
2030 "ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2031};
2032
2033static const SOC_ENUM_SINGLE_DECL(
2034 rt5659_mono_adc_l_enum, RT5659_MONO_ADC_MIXER,
2035 RT5659_MONO_ADC_L_SRC_SFT, rt5659_mono_adc_src);
2036
2037static const struct snd_kcontrol_new rt5659_mono_adc_l_mux =
2038 SOC_DAPM_ENUM("Mono ADC L Source", rt5659_mono_adc_l_enum);
2039
2040static const SOC_ENUM_SINGLE_DECL(
2041 rt5659_mono_adcr_enum, RT5659_MONO_ADC_MIXER,
2042 RT5659_MONO_ADC_R_SRC_SFT, rt5659_mono_adc_src);
2043
2044static const struct snd_kcontrol_new rt5659_mono_adc_r_mux =
2045 SOC_DAPM_ENUM("Mono ADC R Source", rt5659_mono_adcr_enum);
2046
2047/* MONO DMIC L Source */
2048/* MX-27 [8] */
2049static const char * const rt5659_mono_dmic_l_src[] = {
2050 "DMIC1 L", "DMIC2 L"
2051};
2052
2053static const SOC_ENUM_SINGLE_DECL(
2054 rt5659_mono_dmic_l_enum, RT5659_MONO_ADC_MIXER,
2055 RT5659_MONO_DMIC_L_SRC_SFT, rt5659_mono_dmic_l_src);
2056
2057static const struct snd_kcontrol_new rt5659_mono_dmic_l_mux =
2058 SOC_DAPM_ENUM("Mono DMIC L Source", rt5659_mono_dmic_l_enum);
2059
2060/* MONO ADC R2 Source */
2061/* MX-27 [4] */
2062static const char * const rt5659_mono_adc_r2_src[] = {
2063 "Mono DAC MIXR", "DMIC"
2064};
2065
2066static const SOC_ENUM_SINGLE_DECL(
2067 rt5659_mono_adc_r2_enum, RT5659_MONO_ADC_MIXER,
2068 RT5659_MONO_ADC_R2_SRC_SFT, rt5659_mono_adc_r2_src);
2069
2070static const struct snd_kcontrol_new rt5659_mono_adc_r2_mux =
2071 SOC_DAPM_ENUM("Mono ADC R2 Source", rt5659_mono_adc_r2_enum);
2072
2073/* MONO ADC R1 Source */
2074/* MX-27 [3] */
2075static const char * const rt5659_mono_adc_r1_src[] = {
2076 "Mono DAC MIXR", "ADC"
2077};
2078
2079static const SOC_ENUM_SINGLE_DECL(
2080 rt5659_mono_adc_r1_enum, RT5659_MONO_ADC_MIXER,
2081 RT5659_MONO_ADC_R1_SRC_SFT, rt5659_mono_adc_r1_src);
2082
2083static const struct snd_kcontrol_new rt5659_mono_adc_r1_mux =
2084 SOC_DAPM_ENUM("Mono ADC R1 Source", rt5659_mono_adc_r1_enum);
2085
2086/* MONO DMIC R Source */
2087/* MX-27 [0] */
2088static const char * const rt5659_mono_dmic_r_src[] = {
2089 "DMIC1 R", "DMIC2 R"
2090};
2091
2092static const SOC_ENUM_SINGLE_DECL(
2093 rt5659_mono_dmic_r_enum, RT5659_MONO_ADC_MIXER,
2094 RT5659_MONO_DMIC_R_SRC_SFT, rt5659_mono_dmic_r_src);
2095
2096static const struct snd_kcontrol_new rt5659_mono_dmic_r_mux =
2097 SOC_DAPM_ENUM("Mono DMIC R Source", rt5659_mono_dmic_r_enum);
2098
2099
2100/* DAC R1 Source, DAC L1 Source*/
2101/* MX-29 [11:10], MX-29 [9:8]*/
2102static const char * const rt5659_dac1_src[] = {
2103 "IF1 DAC1", "IF2 DAC", "IF3 DAC"
2104};
2105
2106static const SOC_ENUM_SINGLE_DECL(
2107 rt5659_dac_r1_enum, RT5659_AD_DA_MIXER,
2108 RT5659_DAC1_R_SEL_SFT, rt5659_dac1_src);
2109
2110static const struct snd_kcontrol_new rt5659_dac_r1_mux =
2111 SOC_DAPM_ENUM("DAC R1 Source", rt5659_dac_r1_enum);
2112
2113static const SOC_ENUM_SINGLE_DECL(
2114 rt5659_dac_l1_enum, RT5659_AD_DA_MIXER,
2115 RT5659_DAC1_L_SEL_SFT, rt5659_dac1_src);
2116
2117static const struct snd_kcontrol_new rt5659_dac_l1_mux =
2118 SOC_DAPM_ENUM("DAC L1 Source", rt5659_dac_l1_enum);
2119
2120/* DAC Digital Mixer L Source, DAC Digital Mixer R Source*/
2121/* MX-2C [6], MX-2C [4]*/
2122static const char * const rt5659_dig_dac_mix_src[] = {
2123 "Stereo DAC Mixer", "Mono DAC Mixer"
2124};
2125
2126static const SOC_ENUM_SINGLE_DECL(
2127 rt5659_dig_dac_mixl_enum, RT5659_DIG_MIXER,
2128 RT5659_DAC_MIX_L_SFT, rt5659_dig_dac_mix_src);
2129
2130static const struct snd_kcontrol_new rt5659_dig_dac_mixl_mux =
2131 SOC_DAPM_ENUM("DAC Digital Mixer L Source", rt5659_dig_dac_mixl_enum);
2132
2133static const SOC_ENUM_SINGLE_DECL(
2134 rt5659_dig_dac_mixr_enum, RT5659_DIG_MIXER,
2135 RT5659_DAC_MIX_R_SFT, rt5659_dig_dac_mix_src);
2136
2137static const struct snd_kcontrol_new rt5659_dig_dac_mixr_mux =
2138 SOC_DAPM_ENUM("DAC Digital Mixer R Source", rt5659_dig_dac_mixr_enum);
2139
2140/* Analog DAC L1 Source, Analog DAC R1 Source*/
2141/* MX-2D [3], MX-2D [2]*/
2142static const char * const rt5659_alg_dac1_src[] = {
2143 "DAC", "Stereo DAC Mixer"
2144};
2145
2146static const SOC_ENUM_SINGLE_DECL(
2147 rt5659_alg_dac_l1_enum, RT5659_A_DAC_MUX,
2148 RT5659_A_DACL1_SFT, rt5659_alg_dac1_src);
2149
2150static const struct snd_kcontrol_new rt5659_alg_dac_l1_mux =
2151 SOC_DAPM_ENUM("Analog DACL1 Source", rt5659_alg_dac_l1_enum);
2152
2153static const SOC_ENUM_SINGLE_DECL(
2154 rt5659_alg_dac_r1_enum, RT5659_A_DAC_MUX,
2155 RT5659_A_DACR1_SFT, rt5659_alg_dac1_src);
2156
2157static const struct snd_kcontrol_new rt5659_alg_dac_r1_mux =
2158 SOC_DAPM_ENUM("Analog DACR1 Source", rt5659_alg_dac_r1_enum);
2159
2160/* Analog DAC LR Source, Analog DAC R2 Source*/
2161/* MX-2D [1], MX-2D [0]*/
2162static const char * const rt5659_alg_dac2_src[] = {
2163 "Stereo DAC Mixer", "Mono DAC Mixer"
2164};
2165
2166static const SOC_ENUM_SINGLE_DECL(
2167 rt5659_alg_dac_l2_enum, RT5659_A_DAC_MUX,
2168 RT5659_A_DACL2_SFT, rt5659_alg_dac2_src);
2169
2170static const struct snd_kcontrol_new rt5659_alg_dac_l2_mux =
2171 SOC_DAPM_ENUM("Analog DAC L2 Source", rt5659_alg_dac_l2_enum);
2172
2173static const SOC_ENUM_SINGLE_DECL(
2174 rt5659_alg_dac_r2_enum, RT5659_A_DAC_MUX,
2175 RT5659_A_DACR2_SFT, rt5659_alg_dac2_src);
2176
2177static const struct snd_kcontrol_new rt5659_alg_dac_r2_mux =
2178 SOC_DAPM_ENUM("Analog DAC R2 Source", rt5659_alg_dac_r2_enum);
2179
2180/* Interface2 ADC Data Input*/
2181/* MX-2F [13:12] */
2182static const char * const rt5659_if2_adc_in_src[] = {
2183 "IF_ADC1", "IF_ADC2", "DAC_REF", "IF_ADC3"
2184};
2185
2186static const SOC_ENUM_SINGLE_DECL(
2187 rt5659_if2_adc_in_enum, RT5659_DIG_INF23_DATA,
2188 RT5659_IF2_ADC_IN_SFT, rt5659_if2_adc_in_src);
2189
2190static const struct snd_kcontrol_new rt5659_if2_adc_in_mux =
2191 SOC_DAPM_ENUM("IF2 ADC IN Source", rt5659_if2_adc_in_enum);
2192
2193/* Interface3 ADC Data Input*/
2194/* MX-2F [1:0] */
2195static const char * const rt5659_if3_adc_in_src[] = {
2196 "IF_ADC1", "IF_ADC2", "DAC_REF", "Stereo2_ADC_L/R"
2197};
2198
2199static const SOC_ENUM_SINGLE_DECL(
2200 rt5659_if3_adc_in_enum, RT5659_DIG_INF23_DATA,
2201 RT5659_IF3_ADC_IN_SFT, rt5659_if3_adc_in_src);
2202
2203static const struct snd_kcontrol_new rt5659_if3_adc_in_mux =
2204 SOC_DAPM_ENUM("IF3 ADC IN Source", rt5659_if3_adc_in_enum);
2205
2206/* PDM 1 L/R*/
2207/* MX-31 [15] [13] */
2208static const char * const rt5659_pdm_src[] = {
2209 "Mono DAC", "Stereo DAC"
2210};
2211
2212static const SOC_ENUM_SINGLE_DECL(
2213 rt5659_pdm_l_enum, RT5659_PDM_OUT_CTRL,
2214 RT5659_PDM1_L_SFT, rt5659_pdm_src);
2215
2216static const struct snd_kcontrol_new rt5659_pdm_l_mux =
2217 SOC_DAPM_ENUM("PDM L Source", rt5659_pdm_l_enum);
2218
2219static const SOC_ENUM_SINGLE_DECL(
2220 rt5659_pdm_r_enum, RT5659_PDM_OUT_CTRL,
2221 RT5659_PDM1_R_SFT, rt5659_pdm_src);
2222
2223static const struct snd_kcontrol_new rt5659_pdm_r_mux =
2224 SOC_DAPM_ENUM("PDM R Source", rt5659_pdm_r_enum);
2225
2226/* SPDIF Output source*/
2227/* MX-36 [1:0] */
2228static const char * const rt5659_spdif_src[] = {
2229 "IF1_DAC1", "IF1_DAC2", "IF2_DAC", "IF3_DAC"
2230};
2231
2232static const SOC_ENUM_SINGLE_DECL(
2233 rt5659_spdif_enum, RT5659_SPDIF_CTRL,
2234 RT5659_SPDIF_SEL_SFT, rt5659_spdif_src);
2235
2236static const struct snd_kcontrol_new rt5659_spdif_mux =
2237 SOC_DAPM_ENUM("SPDIF Source", rt5659_spdif_enum);
2238
2239/* I2S1 TDM ADCDAT Source */
2240/* MX-78[4:0] */
2241static const char * const rt5659_rx_adc_data_src[] = {
2242 "AD1:AD2:DAC:NUL", "AD1:AD2:NUL:DAC", "AD1:DAC:AD2:NUL",
2243 "AD1:DAC:NUL:AD2", "AD1:NUL:DAC:AD2", "AD1:NUL:AD2:DAC",
2244 "AD2:AD1:DAC:NUL", "AD2:AD1:NUL:DAC", "AD2:DAC:AD1:NUL",
2245 "AD2:DAC:NUL:AD1", "AD2:NUL:DAC:AD1", "AD1:NUL:AD1:DAC",
2246 "DAC:AD1:AD2:NUL", "DAC:AD1:NUL:AD2", "DAC:AD2:AD1:NUL",
2247 "DAC:AD2:NUL:AD1", "DAC:NUL:DAC:AD2", "DAC:NUL:AD2:DAC",
2248 "NUL:AD1:AD2:DAC", "NUL:AD1:DAC:AD2", "NUL:AD2:AD1:DAC",
2249 "NUL:AD2:DAC:AD1", "NUL:DAC:DAC:AD2", "NUL:DAC:AD2:DAC"
2250};
2251
2252static const SOC_ENUM_SINGLE_DECL(
2253 rt5659_rx_adc_data_enum, RT5659_TDM_CTRL_2,
2254 RT5659_ADCDAT_SRC_SFT, rt5659_rx_adc_data_src);
2255
2256static const struct snd_kcontrol_new rt5659_rx_adc_dac_mux =
2257 SOC_DAPM_ENUM("TDM ADCDAT Source", rt5659_rx_adc_data_enum);
2258
2259/* Out Volume Switch */
2260static const struct snd_kcontrol_new spkvol_l_switch =
2261 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_L_SFT, 1, 1);
2262
2263static const struct snd_kcontrol_new spkvol_r_switch =
2264 SOC_DAPM_SINGLE("Switch", RT5659_SPO_VOL, RT5659_VOL_R_SFT, 1, 1);
2265
2266static const struct snd_kcontrol_new monovol_switch =
2267 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_VOL_L_SFT, 1, 1);
2268
2269static const struct snd_kcontrol_new outvol_l_switch =
2270 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_L_SFT, 1, 1);
2271
2272static const struct snd_kcontrol_new outvol_r_switch =
2273 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_VOL_R_SFT, 1, 1);
2274
2275/* Out Switch */
2276static const struct snd_kcontrol_new spo_switch =
2277 SOC_DAPM_SINGLE("Switch", RT5659_CLASSD_2, RT5659_M_RF_DIG_SFT, 1, 1);
2278
2279static const struct snd_kcontrol_new mono_switch =
2280 SOC_DAPM_SINGLE("Switch", RT5659_MONO_OUT, RT5659_L_MUTE_SFT, 1, 1);
2281
2282static const struct snd_kcontrol_new hpo_l_switch =
2283 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_L_MUTE_SFT, 1, 1);
2284
2285static const struct snd_kcontrol_new hpo_r_switch =
2286 SOC_DAPM_SINGLE("Switch", RT5659_HP_VOL, RT5659_R_MUTE_SFT, 1, 1);
2287
2288static const struct snd_kcontrol_new lout_l_switch =
2289 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_L_MUTE_SFT, 1, 1);
2290
2291static const struct snd_kcontrol_new lout_r_switch =
2292 SOC_DAPM_SINGLE("Switch", RT5659_LOUT, RT5659_R_MUTE_SFT, 1, 1);
2293
2294static const struct snd_kcontrol_new pdm_l_switch =
2295 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_L_SFT, 1,
2296 1);
2297
2298static const struct snd_kcontrol_new pdm_r_switch =
2299 SOC_DAPM_SINGLE("Switch", RT5659_PDM_OUT_CTRL, RT5659_M_PDM1_R_SFT, 1,
2300 1);
2301
2302static int rt5659_spk_event(struct snd_soc_dapm_widget *w,
2303 struct snd_kcontrol *kcontrol, int event)
2304{
2305 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2306
2307 switch (event) {
2308 case SND_SOC_DAPM_PRE_PMU:
2309 snd_soc_update_bits(codec, RT5659_CLASSD_CTRL_1,
2310 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_EN);
2311 snd_soc_update_bits(codec, RT5659_CLASSD_2,
2312 RT5659_M_RI_DIG, RT5659_M_RI_DIG);
2313 snd_soc_write(codec, RT5659_CLASSD_1, 0x0803);
2314 snd_soc_write(codec, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
2315 break;
2316
2317 case SND_SOC_DAPM_POST_PMD:
2318 snd_soc_write(codec, RT5659_CLASSD_1, 0x0011);
2319 snd_soc_update_bits(codec, RT5659_CLASSD_2,
2320 RT5659_M_RI_DIG, 0x0);
2321 snd_soc_write(codec, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
2322 snd_soc_update_bits(codec, RT5659_CLASSD_CTRL_1,
2323 RT5659_POW_CLSD_DB_MASK, RT5659_POW_CLSD_DB_DIS);
2324 break;
2325
2326 default:
2327 return 0;
2328 }
2329
2330 return 0;
2331
2332}
2333
2334static int rt5659_mono_event(struct snd_soc_dapm_widget *w,
2335 struct snd_kcontrol *kcontrol, int event)
2336{
2337 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2338
2339 switch (event) {
2340 case SND_SOC_DAPM_PRE_PMU:
2341 snd_soc_write(codec, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
2342 break;
2343
2344 case SND_SOC_DAPM_POST_PMD:
2345 snd_soc_write(codec, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
2346 break;
2347
2348 default:
2349 return 0;
2350 }
2351
2352 return 0;
2353
2354}
2355
2356static int rt5659_hp_event(struct snd_soc_dapm_widget *w,
2357 struct snd_kcontrol *kcontrol, int event)
2358{
2359 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2360
2361 switch (event) {
2362 case SND_SOC_DAPM_POST_PMU:
2363 snd_soc_write(codec, RT5659_HP_CHARGE_PUMP_1, 0x0e1e);
2364 snd_soc_update_bits(codec, RT5659_DEPOP_1, 0x0010, 0x0010);
2365 break;
2366
2367 case SND_SOC_DAPM_PRE_PMD:
2368 snd_soc_write(codec, RT5659_DEPOP_1, 0x0000);
2369 break;
2370
2371 default:
2372 return 0;
2373 }
2374
2375 return 0;
2376}
2377
2378static int set_dmic_power(struct snd_soc_dapm_widget *w,
2379 struct snd_kcontrol *kcontrol, int event)
2380{
2381 switch (event) {
2382 case SND_SOC_DAPM_POST_PMU:
2383 /*Add delay to avoid pop noise*/
2384 msleep(450);
2385 break;
2386
2387 default:
2388 return 0;
2389 }
2390
2391 return 0;
2392}
2393
2394static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = {
2395 SND_SOC_DAPM_SUPPLY("LDO2", RT5659_PWR_ANLG_3, RT5659_PWR_LDO2_BIT, 0,
2396 NULL, 0),
2397 SND_SOC_DAPM_SUPPLY("PLL", RT5659_PWR_ANLG_3, RT5659_PWR_PLL_BIT, 0,
2398 NULL, 0),
2399 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5659_PWR_VOL,
2400 RT5659_PWR_MIC_DET_BIT, 0, NULL, 0),
2401 SND_SOC_DAPM_SUPPLY("Mono Vref", RT5659_PWR_ANLG_1,
2402 RT5659_PWR_VREF3_BIT, 0, NULL, 0),
2403
2404 /* ASRC */
2405 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2406 RT5659_I2S1_ASRC_SFT, 0, NULL, 0),
2407 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2408 RT5659_I2S2_ASRC_SFT, 0, NULL, 0),
2409 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2410 RT5659_I2S3_ASRC_SFT, 0, NULL, 0),
2411 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2412 RT5659_DAC_STO_ASRC_SFT, 0, NULL, 0),
2413 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2414 RT5659_DAC_MONO_L_ASRC_SFT, 0, NULL, 0),
2415 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2416 RT5659_DAC_MONO_R_ASRC_SFT, 0, NULL, 0),
2417 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2418 RT5659_ADC_STO1_ASRC_SFT, 0, NULL, 0),
2419 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2420 RT5659_ADC_MONO_L_ASRC_SFT, 0, NULL, 0),
2421 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2422 RT5659_ADC_MONO_R_ASRC_SFT, 0, NULL, 0),
2423
2424 /* Input Side */
2425 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5659_PWR_ANLG_2, RT5659_PWR_MB1_BIT,
2426 0, NULL, 0),
2427 SND_SOC_DAPM_SUPPLY("MICBIAS2", RT5659_PWR_ANLG_2, RT5659_PWR_MB2_BIT,
2428 0, NULL, 0),
2429 SND_SOC_DAPM_SUPPLY("MICBIAS3", RT5659_PWR_ANLG_2, RT5659_PWR_MB3_BIT,
2430 0, NULL, 0),
2431
2432 /* Input Lines */
2433 SND_SOC_DAPM_INPUT("DMIC L1"),
2434 SND_SOC_DAPM_INPUT("DMIC R1"),
2435 SND_SOC_DAPM_INPUT("DMIC L2"),
2436 SND_SOC_DAPM_INPUT("DMIC R2"),
2437
2438 SND_SOC_DAPM_INPUT("IN1P"),
2439 SND_SOC_DAPM_INPUT("IN1N"),
2440 SND_SOC_DAPM_INPUT("IN2P"),
2441 SND_SOC_DAPM_INPUT("IN2N"),
2442 SND_SOC_DAPM_INPUT("IN3P"),
2443 SND_SOC_DAPM_INPUT("IN3N"),
2444 SND_SOC_DAPM_INPUT("IN4P"),
2445 SND_SOC_DAPM_INPUT("IN4N"),
2446
2447 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2448 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2449
2450 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2451 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2452 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5659_DMIC_CTRL_1,
2453 RT5659_DMIC_1_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2454 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5659_DMIC_CTRL_1,
2455 RT5659_DMIC_2_EN_SFT, 0, set_dmic_power, SND_SOC_DAPM_POST_PMU),
2456
2457 /* Boost */
2458 SND_SOC_DAPM_PGA("BST1", RT5659_PWR_ANLG_2,
2459 RT5659_PWR_BST1_P_BIT, 0, NULL, 0),
2460 SND_SOC_DAPM_PGA("BST2", RT5659_PWR_ANLG_2,
2461 RT5659_PWR_BST2_P_BIT, 0, NULL, 0),
2462 SND_SOC_DAPM_PGA("BST3", RT5659_PWR_ANLG_2,
2463 RT5659_PWR_BST3_P_BIT, 0, NULL, 0),
2464 SND_SOC_DAPM_PGA("BST4", RT5659_PWR_ANLG_2,
2465 RT5659_PWR_BST4_P_BIT, 0, NULL, 0),
2466 SND_SOC_DAPM_SUPPLY("BST1 Power", RT5659_PWR_ANLG_2,
2467 RT5659_PWR_BST1_BIT, 0, NULL, 0),
2468 SND_SOC_DAPM_SUPPLY("BST2 Power", RT5659_PWR_ANLG_2,
2469 RT5659_PWR_BST2_BIT, 0, NULL, 0),
2470 SND_SOC_DAPM_SUPPLY("BST3 Power", RT5659_PWR_ANLG_2,
2471 RT5659_PWR_BST3_BIT, 0, NULL, 0),
2472 SND_SOC_DAPM_SUPPLY("BST4 Power", RT5659_PWR_ANLG_2,
2473 RT5659_PWR_BST4_BIT, 0, NULL, 0),
2474
2475
2476 /* Input Volume */
2477 SND_SOC_DAPM_PGA("INL VOL", RT5659_PWR_VOL, RT5659_PWR_IN_L_BIT,
2478 0, NULL, 0),
2479 SND_SOC_DAPM_PGA("INR VOL", RT5659_PWR_VOL, RT5659_PWR_IN_R_BIT,
2480 0, NULL, 0),
2481
2482 /* REC Mixer */
2483 SND_SOC_DAPM_MIXER("RECMIX1L", RT5659_PWR_MIXER, RT5659_PWR_RM1_L_BIT,
2484 0, rt5659_rec1_l_mix, ARRAY_SIZE(rt5659_rec1_l_mix)),
2485 SND_SOC_DAPM_MIXER("RECMIX1R", RT5659_PWR_MIXER, RT5659_PWR_RM1_R_BIT,
2486 0, rt5659_rec1_r_mix, ARRAY_SIZE(rt5659_rec1_r_mix)),
2487 SND_SOC_DAPM_MIXER("RECMIX2L", RT5659_PWR_MIXER, RT5659_PWR_RM2_L_BIT,
2488 0, rt5659_rec2_l_mix, ARRAY_SIZE(rt5659_rec2_l_mix)),
2489 SND_SOC_DAPM_MIXER("RECMIX2R", RT5659_PWR_MIXER, RT5659_PWR_RM2_R_BIT,
2490 0, rt5659_rec2_r_mix, ARRAY_SIZE(rt5659_rec2_r_mix)),
2491
2492 /* ADCs */
2493 SND_SOC_DAPM_ADC("ADC1 L", NULL, SND_SOC_NOPM, 0, 0),
2494 SND_SOC_DAPM_ADC("ADC1 R", NULL, SND_SOC_NOPM, 0, 0),
2495 SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2496 SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2497
2498 SND_SOC_DAPM_SUPPLY("ADC1 L Power", RT5659_PWR_DIG_1,
2499 RT5659_PWR_ADC_L1_BIT, 0, NULL, 0),
2500 SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1,
2501 RT5659_PWR_ADC_R1_BIT, 0, NULL, 0),
2502 SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_2,
2503 RT5659_PWR_ADC_L2_BIT, 0, NULL, 0),
2504 SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_2,
2505 RT5659_PWR_ADC_R2_BIT, 0, NULL, 0),
2506 SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk,
2507 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2508 SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc_clk,
2509 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
2510
2511 /* ADC Mux */
2512 SND_SOC_DAPM_MUX("Stereo1 DMIC L Mux", SND_SOC_NOPM, 0, 0,
2513 &rt5659_sto1_dmic_mux),
2514 SND_SOC_DAPM_MUX("Stereo1 DMIC R Mux", SND_SOC_NOPM, 0, 0,
2515 &rt5659_sto1_dmic_mux),
2516 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2517 &rt5659_sto1_adc1_mux),
2518 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2519 &rt5659_sto1_adc1_mux),
2520 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2521 &rt5659_sto1_adc2_mux),
2522 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2523 &rt5659_sto1_adc2_mux),
2524 SND_SOC_DAPM_MUX("Stereo1 ADC L Mux", SND_SOC_NOPM, 0, 0,
2525 &rt5659_sto1_adc_mux),
2526 SND_SOC_DAPM_MUX("Stereo1 ADC R Mux", SND_SOC_NOPM, 0, 0,
2527 &rt5659_sto1_adc_mux),
2528 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2529 &rt5659_mono_adc_l2_mux),
2530 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2531 &rt5659_mono_adc_r2_mux),
2532 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2533 &rt5659_mono_adc_l1_mux),
2534 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2535 &rt5659_mono_adc_r1_mux),
2536 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2537 &rt5659_mono_dmic_l_mux),
2538 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2539 &rt5659_mono_dmic_r_mux),
2540 SND_SOC_DAPM_MUX("Mono ADC L Mux", SND_SOC_NOPM, 0, 0,
2541 &rt5659_mono_adc_l_mux),
2542 SND_SOC_DAPM_MUX("Mono ADC R Mux", SND_SOC_NOPM, 0, 0,
2543 &rt5659_mono_adc_r_mux),
2544 /* ADC Mixer */
2545 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5659_PWR_DIG_2,
2546 RT5659_PWR_ADC_S1F_BIT, 0, NULL, 0),
2547 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5659_PWR_DIG_2,
2548 RT5659_PWR_ADC_S2F_BIT, 0, NULL, 0),
2549 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM,
2550 0, 0, rt5659_sto1_adc_l_mix,
2551 ARRAY_SIZE(rt5659_sto1_adc_l_mix)),
2552 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM,
2553 0, 0, rt5659_sto1_adc_r_mix,
2554 ARRAY_SIZE(rt5659_sto1_adc_r_mix)),
2555 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5659_PWR_DIG_2,
2556 RT5659_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2557 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5659_MONO_ADC_DIG_VOL,
2558 RT5659_L_MUTE_SFT, 1, rt5659_mono_adc_l_mix,
2559 ARRAY_SIZE(rt5659_mono_adc_l_mix)),
2560 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5659_PWR_DIG_2,
2561 RT5659_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2562 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5659_MONO_ADC_DIG_VOL,
2563 RT5659_R_MUTE_SFT, 1, rt5659_mono_adc_r_mix,
2564 ARRAY_SIZE(rt5659_mono_adc_r_mix)),
2565
2566 /* ADC PGA */
2567 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2568 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2569 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2570 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2571 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2572 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2573 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2574 SND_SOC_DAPM_PGA("Stereo2 ADC LR", SND_SOC_NOPM, 0, 0, NULL, 0),
2575
2576 SND_SOC_DAPM_PGA("Stereo1 ADC Volume L", RT5659_STO1_ADC_DIG_VOL,
2577 RT5659_L_MUTE_SFT, 1, NULL, 0),
2578 SND_SOC_DAPM_PGA("Stereo1 ADC Volume R", RT5659_STO1_ADC_DIG_VOL,
2579 RT5659_R_MUTE_SFT, 1, NULL, 0),
2580
2581 /* Digital Interface */
2582 SND_SOC_DAPM_SUPPLY("I2S1", RT5659_PWR_DIG_1, RT5659_PWR_I2S1_BIT,
2583 0, NULL, 0),
2584 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2585 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2586 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2587 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2588 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
2589 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
2590 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2591 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2592 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2593 SND_SOC_DAPM_SUPPLY("I2S2", RT5659_PWR_DIG_1, RT5659_PWR_I2S2_BIT, 0,
2594 NULL, 0),
2595 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2596 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2597 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2598 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2599 SND_SOC_DAPM_PGA("IF2 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2600 SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2601 SND_SOC_DAPM_SUPPLY("I2S3", RT5659_PWR_DIG_1, RT5659_PWR_I2S3_BIT, 0,
2602 NULL, 0),
2603 SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2604 SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2605 SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2606 SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2607 SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2608 SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2609
2610 /* Digital Interface Select */
2611 SND_SOC_DAPM_PGA("TDM AD1:AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2612 SND_SOC_DAPM_PGA("TDM AD2:DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2613 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
2614 &rt5659_rx_adc_dac_mux),
2615 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
2616 &rt5659_if2_adc_in_mux),
2617 SND_SOC_DAPM_MUX("IF3 ADC Mux", SND_SOC_NOPM, 0, 0,
2618 &rt5659_if3_adc_in_mux),
2619 SND_SOC_DAPM_MUX("IF1 01 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2620 &rt5659_if1_01_adc_swap_mux),
2621 SND_SOC_DAPM_MUX("IF1 23 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2622 &rt5659_if1_23_adc_swap_mux),
2623 SND_SOC_DAPM_MUX("IF1 45 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2624 &rt5659_if1_45_adc_swap_mux),
2625 SND_SOC_DAPM_MUX("IF1 67 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2626 &rt5659_if1_67_adc_swap_mux),
2627 SND_SOC_DAPM_MUX("IF2 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2628 &rt5659_if2_dac_swap_mux),
2629 SND_SOC_DAPM_MUX("IF2 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2630 &rt5659_if2_adc_swap_mux),
2631 SND_SOC_DAPM_MUX("IF3 DAC Swap Mux", SND_SOC_NOPM, 0, 0,
2632 &rt5659_if3_dac_swap_mux),
2633 SND_SOC_DAPM_MUX("IF3 ADC Swap Mux", SND_SOC_NOPM, 0, 0,
2634 &rt5659_if3_adc_swap_mux),
2635
2636 /* Audio Interface */
2637 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2638 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2639 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2640 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2641 SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
2642 SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
2643
2644 /* Output Side */
2645 /* DAC mixer before sound effect */
2646 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2647 rt5659_dac_l_mix, ARRAY_SIZE(rt5659_dac_l_mix)),
2648 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2649 rt5659_dac_r_mix, ARRAY_SIZE(rt5659_dac_r_mix)),
2650
2651 /* DAC channel Mux */
2652 SND_SOC_DAPM_MUX("DAC L1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l1_mux),
2653 SND_SOC_DAPM_MUX("DAC R1 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r1_mux),
2654 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_l2_mux),
2655 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5659_dac_r2_mux),
2656
2657 SND_SOC_DAPM_MUX("DAC L1 Source", SND_SOC_NOPM, 0, 0,
2658 &rt5659_alg_dac_l1_mux),
2659 SND_SOC_DAPM_MUX("DAC R1 Source", SND_SOC_NOPM, 0, 0,
2660 &rt5659_alg_dac_r1_mux),
2661 SND_SOC_DAPM_MUX("DAC L2 Source", SND_SOC_NOPM, 0, 0,
2662 &rt5659_alg_dac_l2_mux),
2663 SND_SOC_DAPM_MUX("DAC R2 Source", SND_SOC_NOPM, 0, 0,
2664 &rt5659_alg_dac_r2_mux),
2665
2666 /* DAC Mixer */
2667 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5659_PWR_DIG_2,
2668 RT5659_PWR_DAC_S1F_BIT, 0, NULL, 0),
2669 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5659_PWR_DIG_2,
2670 RT5659_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2671 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5659_PWR_DIG_2,
2672 RT5659_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2673 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2674 rt5659_sto_dac_l_mix, ARRAY_SIZE(rt5659_sto_dac_l_mix)),
2675 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2676 rt5659_sto_dac_r_mix, ARRAY_SIZE(rt5659_sto_dac_r_mix)),
2677 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2678 rt5659_mono_dac_l_mix, ARRAY_SIZE(rt5659_mono_dac_l_mix)),
2679 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2680 rt5659_mono_dac_r_mix, ARRAY_SIZE(rt5659_mono_dac_r_mix)),
2681 SND_SOC_DAPM_MUX("DAC MIXL", SND_SOC_NOPM, 0, 0,
2682 &rt5659_dig_dac_mixl_mux),
2683 SND_SOC_DAPM_MUX("DAC MIXR", SND_SOC_NOPM, 0, 0,
2684 &rt5659_dig_dac_mixr_mux),
2685
2686 /* DACs */
2687 SND_SOC_DAPM_SUPPLY_S("DAC L1 Power", 1, RT5659_PWR_DIG_1,
2688 RT5659_PWR_DAC_L1_BIT, 0, NULL, 0),
2689 SND_SOC_DAPM_SUPPLY_S("DAC R1 Power", 1, RT5659_PWR_DIG_1,
2690 RT5659_PWR_DAC_R1_BIT, 0, NULL, 0),
2691 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
2692 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
2693
2694 SND_SOC_DAPM_SUPPLY("DAC L2 Power", RT5659_PWR_DIG_1,
2695 RT5659_PWR_DAC_L2_BIT, 0, NULL, 0),
2696 SND_SOC_DAPM_SUPPLY("DAC R2 Power", RT5659_PWR_DIG_1,
2697 RT5659_PWR_DAC_R2_BIT, 0, NULL, 0),
2698 SND_SOC_DAPM_DAC("DAC L2", NULL, SND_SOC_NOPM, 0, 0),
2699 SND_SOC_DAPM_DAC("DAC R2", NULL, SND_SOC_NOPM, 0, 0),
2700 SND_SOC_DAPM_PGA("DAC_REF", SND_SOC_NOPM, 0, 0, NULL, 0),
2701
2702 /* OUT Mixer */
2703 SND_SOC_DAPM_MIXER("SPK MIXL", RT5659_PWR_MIXER, RT5659_PWR_SM_L_BIT,
2704 0, rt5659_spk_l_mix, ARRAY_SIZE(rt5659_spk_l_mix)),
2705 SND_SOC_DAPM_MIXER("SPK MIXR", RT5659_PWR_MIXER, RT5659_PWR_SM_R_BIT,
2706 0, rt5659_spk_r_mix, ARRAY_SIZE(rt5659_spk_r_mix)),
2707 SND_SOC_DAPM_MIXER("MONOVOL MIX", RT5659_PWR_MIXER, RT5659_PWR_MM_BIT,
2708 0, rt5659_monovol_mix, ARRAY_SIZE(rt5659_monovol_mix)),
2709 SND_SOC_DAPM_MIXER("OUT MIXL", RT5659_PWR_MIXER, RT5659_PWR_OM_L_BIT,
2710 0, rt5659_out_l_mix, ARRAY_SIZE(rt5659_out_l_mix)),
2711 SND_SOC_DAPM_MIXER("OUT MIXR", RT5659_PWR_MIXER, RT5659_PWR_OM_R_BIT,
2712 0, rt5659_out_r_mix, ARRAY_SIZE(rt5659_out_r_mix)),
2713
2714 /* Output Volume */
2715 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5659_PWR_VOL, RT5659_PWR_SV_L_BIT, 0,
2716 &spkvol_l_switch),
2717 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5659_PWR_VOL, RT5659_PWR_SV_R_BIT, 0,
2718 &spkvol_r_switch),
2719 SND_SOC_DAPM_SWITCH("MONOVOL", RT5659_PWR_VOL, RT5659_PWR_MV_BIT, 0,
2720 &monovol_switch),
2721 SND_SOC_DAPM_SWITCH("OUTVOL L", RT5659_PWR_VOL, RT5659_PWR_OV_L_BIT, 0,
2722 &outvol_l_switch),
2723 SND_SOC_DAPM_SWITCH("OUTVOL R", RT5659_PWR_VOL, RT5659_PWR_OV_R_BIT, 0,
2724 &outvol_r_switch),
2725
2726 /* SPO/MONO/HPO/LOUT */
2727 SND_SOC_DAPM_MIXER("SPO L MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_l_mix,
2728 ARRAY_SIZE(rt5659_spo_l_mix)),
2729 SND_SOC_DAPM_MIXER("SPO R MIX", SND_SOC_NOPM, 0, 0, rt5659_spo_r_mix,
2730 ARRAY_SIZE(rt5659_spo_r_mix)),
2731 SND_SOC_DAPM_MIXER("Mono MIX", SND_SOC_NOPM, 0, 0, rt5659_mono_mix,
2732 ARRAY_SIZE(rt5659_mono_mix)),
2733 SND_SOC_DAPM_MIXER("LOUT L MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_l_mix,
2734 ARRAY_SIZE(rt5659_lout_l_mix)),
2735 SND_SOC_DAPM_MIXER("LOUT R MIX", SND_SOC_NOPM, 0, 0, rt5659_lout_r_mix,
2736 ARRAY_SIZE(rt5659_lout_r_mix)),
2737
2738 SND_SOC_DAPM_PGA_S("SPK Amp", 1, RT5659_PWR_DIG_1, RT5659_PWR_CLS_D_BIT,
2739 0, rt5659_spk_event, SND_SOC_DAPM_POST_PMD |
2740 SND_SOC_DAPM_PRE_PMU),
2741 SND_SOC_DAPM_PGA_S("Mono Amp", 1, RT5659_PWR_ANLG_1, RT5659_PWR_MA_BIT,
2742 0, rt5659_mono_event, SND_SOC_DAPM_POST_PMD |
2743 SND_SOC_DAPM_PRE_PMU),
2744 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0, rt5659_hp_event,
2745 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2746 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
2747
2748 SND_SOC_DAPM_SUPPLY("Charge Pump", SND_SOC_NOPM, 0, 0,
2749 rt5659_charge_pump_event, SND_SOC_DAPM_PRE_PMU |
2750 SND_SOC_DAPM_POST_PMD),
2751
2752 SND_SOC_DAPM_SWITCH("SPO Playback", SND_SOC_NOPM, 0, 0, &spo_switch),
2753 SND_SOC_DAPM_SWITCH("Mono Playback", SND_SOC_NOPM, 0, 0,
2754 &mono_switch),
2755 SND_SOC_DAPM_SWITCH("HPO L Playback", SND_SOC_NOPM, 0, 0,
2756 &hpo_l_switch),
2757 SND_SOC_DAPM_SWITCH("HPO R Playback", SND_SOC_NOPM, 0, 0,
2758 &hpo_r_switch),
2759 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
2760 &lout_l_switch),
2761 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
2762 &lout_r_switch),
2763 SND_SOC_DAPM_SWITCH("PDM L Playback", SND_SOC_NOPM, 0, 0,
2764 &pdm_l_switch),
2765 SND_SOC_DAPM_SWITCH("PDM R Playback", SND_SOC_NOPM, 0, 0,
2766 &pdm_r_switch),
2767
2768 /* PDM */
2769 SND_SOC_DAPM_SUPPLY("PDM Power", RT5659_PWR_DIG_2,
2770 RT5659_PWR_PDM1_BIT, 0, NULL, 0),
2771 SND_SOC_DAPM_MUX("PDM L Mux", RT5659_PDM_OUT_CTRL,
2772 RT5659_M_PDM1_L_SFT, 1, &rt5659_pdm_l_mux),
2773 SND_SOC_DAPM_MUX("PDM R Mux", RT5659_PDM_OUT_CTRL,
2774 RT5659_M_PDM1_R_SFT, 1, &rt5659_pdm_r_mux),
2775
2776 /* SPDIF */
2777 SND_SOC_DAPM_MUX("SPDIF Mux", SND_SOC_NOPM, 0, 0, &rt5659_spdif_mux),
2778
2779 SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2780 SND_SOC_DAPM_SUPPLY("CLKDET", RT5659_CLK_DET, 0, 0, NULL, 0),
2781
2782 /* Output Lines */
2783 SND_SOC_DAPM_OUTPUT("HPOL"),
2784 SND_SOC_DAPM_OUTPUT("HPOR"),
2785 SND_SOC_DAPM_OUTPUT("SPOL"),
2786 SND_SOC_DAPM_OUTPUT("SPOR"),
2787 SND_SOC_DAPM_OUTPUT("LOUTL"),
2788 SND_SOC_DAPM_OUTPUT("LOUTR"),
2789 SND_SOC_DAPM_OUTPUT("MONOOUT"),
2790 SND_SOC_DAPM_OUTPUT("PDML"),
2791 SND_SOC_DAPM_OUTPUT("PDMR"),
2792 SND_SOC_DAPM_OUTPUT("SPDIF"),
2793};
2794
2795static const struct snd_soc_dapm_route rt5659_dapm_routes[] = {
2796 /*PLL*/
2797 { "ADC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2798 { "ADC Stereo2 Filter", NULL, "PLL", is_sys_clk_from_pll },
2799 { "ADC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2800 { "ADC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2801 { "DAC Stereo1 Filter", NULL, "PLL", is_sys_clk_from_pll },
2802 { "DAC Mono Left Filter", NULL, "PLL", is_sys_clk_from_pll },
2803 { "DAC Mono Right Filter", NULL, "PLL", is_sys_clk_from_pll },
2804
2805 /*ASRC*/
2806 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2807 { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2808 { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2809 { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2810 { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2811 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2812
2813 { "SYS CLK DET", NULL, "CLKDET" },
2814
2815 { "I2S1", NULL, "I2S1 ASRC" },
2816 { "I2S2", NULL, "I2S2 ASRC" },
2817 { "I2S3", NULL, "I2S3 ASRC" },
2818
2819 { "IN1P", NULL, "LDO2" },
2820 { "IN2P", NULL, "LDO2" },
2821 { "IN3P", NULL, "LDO2" },
2822 { "IN4P", NULL, "LDO2" },
2823
2824 { "DMIC1", NULL, "DMIC L1" },
2825 { "DMIC1", NULL, "DMIC R1" },
2826 { "DMIC2", NULL, "DMIC L2" },
2827 { "DMIC2", NULL, "DMIC R2" },
2828
2829 { "BST1", NULL, "IN1P" },
2830 { "BST1", NULL, "IN1N" },
2831 { "BST1", NULL, "BST1 Power" },
2832 { "BST2", NULL, "IN2P" },
2833 { "BST2", NULL, "IN2N" },
2834 { "BST2", NULL, "BST2 Power" },
2835 { "BST3", NULL, "IN3P" },
2836 { "BST3", NULL, "IN3N" },
2837 { "BST3", NULL, "BST3 Power" },
2838 { "BST4", NULL, "IN4P" },
2839 { "BST4", NULL, "IN4N" },
2840 { "BST4", NULL, "BST4 Power" },
2841
2842 { "INL VOL", NULL, "IN2P" },
2843 { "INR VOL", NULL, "IN2N" },
2844
2845 { "RECMIX1L", "SPKVOLL Switch", "SPKVOL L" },
2846 { "RECMIX1L", "INL Switch", "INL VOL" },
2847 { "RECMIX1L", "BST4 Switch", "BST4" },
2848 { "RECMIX1L", "BST3 Switch", "BST3" },
2849 { "RECMIX1L", "BST2 Switch", "BST2" },
2850 { "RECMIX1L", "BST1 Switch", "BST1" },
2851
2852 { "RECMIX1R", "HPOVOLR Switch", "HPO R Playback" },
2853 { "RECMIX1R", "INR Switch", "INR VOL" },
2854 { "RECMIX1R", "BST4 Switch", "BST4" },
2855 { "RECMIX1R", "BST3 Switch", "BST3" },
2856 { "RECMIX1R", "BST2 Switch", "BST2" },
2857 { "RECMIX1R", "BST1 Switch", "BST1" },
2858
2859 { "RECMIX2L", "SPKVOLL Switch", "SPKVOL L" },
2860 { "RECMIX2L", "OUTVOLL Switch", "OUTVOL L" },
2861 { "RECMIX2L", "BST4 Switch", "BST4" },
2862 { "RECMIX2L", "BST3 Switch", "BST3" },
2863 { "RECMIX2L", "BST2 Switch", "BST2" },
2864 { "RECMIX2L", "BST1 Switch", "BST1" },
2865
2866 { "RECMIX2R", "MONOVOL Switch", "MONOVOL" },
2867 { "RECMIX2R", "OUTVOLR Switch", "OUTVOL R" },
2868 { "RECMIX2R", "BST4 Switch", "BST4" },
2869 { "RECMIX2R", "BST3 Switch", "BST3" },
2870 { "RECMIX2R", "BST2 Switch", "BST2" },
2871 { "RECMIX2R", "BST1 Switch", "BST1" },
2872
2873 { "ADC1 L", NULL, "RECMIX1L" },
2874 { "ADC1 L", NULL, "ADC1 L Power" },
2875 { "ADC1 L", NULL, "ADC1 clock" },
2876 { "ADC1 R", NULL, "RECMIX1R" },
2877 { "ADC1 R", NULL, "ADC1 R Power" },
2878 { "ADC1 R", NULL, "ADC1 clock" },
2879
2880 { "ADC2 L", NULL, "RECMIX2L" },
2881 { "ADC2 L", NULL, "ADC2 L Power" },
2882 { "ADC2 L", NULL, "ADC2 clock" },
2883 { "ADC2 R", NULL, "RECMIX2R" },
2884 { "ADC2 R", NULL, "ADC2 R Power" },
2885 { "ADC2 R", NULL, "ADC2 clock" },
2886
2887 { "DMIC L1", NULL, "DMIC CLK" },
2888 { "DMIC L1", NULL, "DMIC1 Power" },
2889 { "DMIC R1", NULL, "DMIC CLK" },
2890 { "DMIC R1", NULL, "DMIC1 Power" },
2891 { "DMIC L2", NULL, "DMIC CLK" },
2892 { "DMIC L2", NULL, "DMIC2 Power" },
2893 { "DMIC R2", NULL, "DMIC CLK" },
2894 { "DMIC R2", NULL, "DMIC2 Power" },
2895
2896 { "Stereo1 DMIC L Mux", "DMIC1", "DMIC L1" },
2897 { "Stereo1 DMIC L Mux", "DMIC2", "DMIC L2" },
2898
2899 { "Stereo1 DMIC R Mux", "DMIC1", "DMIC R1" },
2900 { "Stereo1 DMIC R Mux", "DMIC2", "DMIC R2" },
2901
2902 { "Mono DMIC L Mux", "DMIC1 L", "DMIC L1" },
2903 { "Mono DMIC L Mux", "DMIC2 L", "DMIC L2" },
2904
2905 { "Mono DMIC R Mux", "DMIC1 R", "DMIC R1" },
2906 { "Mono DMIC R Mux", "DMIC2 R", "DMIC R2" },
2907
2908 { "Stereo1 ADC L Mux", "ADC1", "ADC1 L" },
2909 { "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2910 { "Stereo1 ADC R Mux", "ADC1", "ADC1 R" },
2911 { "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2912
2913 { "Stereo1 ADC L1 Mux", "ADC", "Stereo1 ADC L Mux" },
2914 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2915 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC L Mux" },
2916 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2917
2918 { "Stereo1 ADC R1 Mux", "ADC", "Stereo1 ADC R Mux" },
2919 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2920 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC R Mux" },
2921 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2922
2923 { "Mono ADC L Mux", "ADC1 L", "ADC1 L" },
2924 { "Mono ADC L Mux", "ADC1 R", "ADC1 R" },
2925 { "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
2926 { "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
2927
2928 { "Mono ADC R Mux", "ADC1 L", "ADC1 L" },
2929 { "Mono ADC R Mux", "ADC1 R", "ADC1 R" },
2930 { "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
2931 { "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
2932
2933 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2934 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2935 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2936 { "Mono ADC L1 Mux", "ADC", "Mono ADC L Mux" },
2937
2938 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2939 { "Mono ADC R1 Mux", "ADC", "Mono ADC R Mux" },
2940 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2941 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2942
2943 { "Stereo1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2944 { "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2945 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2946
2947 { "Stereo1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2948 { "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2949 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2950
2951 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2952 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2953 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2954
2955 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2956 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2957 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2958
2959 { "Stereo1 ADC Volume L", NULL, "Stereo1 ADC MIXL" },
2960 { "Stereo1 ADC Volume R", NULL, "Stereo1 ADC MIXR" },
2961
2962 { "IF_ADC1", NULL, "Stereo1 ADC Volume L" },
2963 { "IF_ADC1", NULL, "Stereo1 ADC Volume R" },
2964 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2965 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2966
2967 { "TDM AD1:AD2:DAC", NULL, "IF_ADC1" },
2968 { "TDM AD1:AD2:DAC", NULL, "IF_ADC2" },
2969 { "TDM AD1:AD2:DAC", NULL, "DAC_REF" },
2970 { "TDM AD2:DAC", NULL, "IF_ADC2" },
2971 { "TDM AD2:DAC", NULL, "DAC_REF" },
2972 { "TDM Data Mux", "AD1:AD2:DAC:NUL", "TDM AD1:AD2:DAC" },
2973 { "TDM Data Mux", "AD1:AD2:NUL:DAC", "TDM AD1:AD2:DAC" },
2974 { "TDM Data Mux", "AD1:DAC:AD2:NUL", "TDM AD1:AD2:DAC" },
2975 { "TDM Data Mux", "AD1:DAC:NUL:AD2", "TDM AD1:AD2:DAC" },
2976 { "TDM Data Mux", "AD1:NUL:DAC:AD2", "TDM AD1:AD2:DAC" },
2977 { "TDM Data Mux", "AD1:NUL:AD2:DAC", "TDM AD1:AD2:DAC" },
2978 { "TDM Data Mux", "AD2:AD1:DAC:NUL", "TDM AD1:AD2:DAC" },
2979 { "TDM Data Mux", "AD2:AD1:NUL:DAC", "TDM AD1:AD2:DAC" },
2980 { "TDM Data Mux", "AD2:DAC:AD1:NUL", "TDM AD1:AD2:DAC" },
2981 { "TDM Data Mux", "AD2:DAC:NUL:AD1", "TDM AD1:AD2:DAC" },
2982 { "TDM Data Mux", "AD2:NUL:DAC:AD1", "TDM AD1:AD2:DAC" },
2983 { "TDM Data Mux", "AD1:NUL:AD1:DAC", "TDM AD1:AD2:DAC" },
2984 { "TDM Data Mux", "DAC:AD1:AD2:NUL", "TDM AD1:AD2:DAC" },
2985 { "TDM Data Mux", "DAC:AD1:NUL:AD2", "TDM AD1:AD2:DAC" },
2986 { "TDM Data Mux", "DAC:AD2:AD1:NUL", "TDM AD1:AD2:DAC" },
2987 { "TDM Data Mux", "DAC:AD2:NUL:AD1", "TDM AD1:AD2:DAC" },
2988 { "TDM Data Mux", "DAC:NUL:DAC:AD2", "TDM AD2:DAC" },
2989 { "TDM Data Mux", "DAC:NUL:AD2:DAC", "TDM AD2:DAC" },
2990 { "TDM Data Mux", "NUL:AD1:AD2:DAC", "TDM AD1:AD2:DAC" },
2991 { "TDM Data Mux", "NUL:AD1:DAC:AD2", "TDM AD1:AD2:DAC" },
2992 { "TDM Data Mux", "NUL:AD2:AD1:DAC", "TDM AD1:AD2:DAC" },
2993 { "TDM Data Mux", "NUL:AD2:DAC:AD1", "TDM AD1:AD2:DAC" },
2994 { "TDM Data Mux", "NUL:DAC:DAC:AD2", "TDM AD2:DAC" },
2995 { "TDM Data Mux", "NUL:DAC:AD2:DAC", "TDM AD2:DAC" },
2996 { "IF1 01 ADC Swap Mux", "L/R", "TDM Data Mux" },
2997 { "IF1 01 ADC Swap Mux", "R/L", "TDM Data Mux" },
2998 { "IF1 01 ADC Swap Mux", "L/L", "TDM Data Mux" },
2999 { "IF1 01 ADC Swap Mux", "R/R", "TDM Data Mux" },
3000 { "IF1 23 ADC Swap Mux", "L/R", "TDM Data Mux" },
3001 { "IF1 23 ADC Swap Mux", "R/L", "TDM Data Mux" },
3002 { "IF1 23 ADC Swap Mux", "L/L", "TDM Data Mux" },
3003 { "IF1 23 ADC Swap Mux", "R/R", "TDM Data Mux" },
3004 { "IF1 45 ADC Swap Mux", "L/R", "TDM Data Mux" },
3005 { "IF1 45 ADC Swap Mux", "R/L", "TDM Data Mux" },
3006 { "IF1 45 ADC Swap Mux", "L/L", "TDM Data Mux" },
3007 { "IF1 45 ADC Swap Mux", "R/R", "TDM Data Mux" },
3008 { "IF1 67 ADC Swap Mux", "L/R", "TDM Data Mux" },
3009 { "IF1 67 ADC Swap Mux", "R/L", "TDM Data Mux" },
3010 { "IF1 67 ADC Swap Mux", "L/L", "TDM Data Mux" },
3011 { "IF1 67 ADC Swap Mux", "R/R", "TDM Data Mux" },
3012 { "IF1 ADC", NULL, "IF1 01 ADC Swap Mux" },
3013 { "IF1 ADC", NULL, "IF1 23 ADC Swap Mux" },
3014 { "IF1 ADC", NULL, "IF1 45 ADC Swap Mux" },
3015 { "IF1 ADC", NULL, "IF1 67 ADC Swap Mux" },
3016 { "IF1 ADC", NULL, "I2S1" },
3017
3018 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
3019 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
3020 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
3021 { "IF2 ADC Mux", "DAC_REF", "DAC_REF" },
3022 { "IF2 ADC", NULL, "IF2 ADC Mux"},
3023 { "IF2 ADC", NULL, "I2S2" },
3024
3025 { "IF3 ADC Mux", "IF_ADC1", "IF_ADC1" },
3026 { "IF3 ADC Mux", "IF_ADC2", "IF_ADC2" },
3027 { "IF3 ADC Mux", "Stereo2_ADC_L/R", "Stereo2 ADC LR" },
3028 { "IF3 ADC Mux", "DAC_REF", "DAC_REF" },
3029 { "IF3 ADC", NULL, "IF3 ADC Mux"},
3030 { "IF3 ADC", NULL, "I2S3" },
3031
3032 { "AIF1TX", NULL, "IF1 ADC" },
3033 { "IF2 ADC Swap Mux", "L/R", "IF2 ADC" },
3034 { "IF2 ADC Swap Mux", "R/L", "IF2 ADC" },
3035 { "IF2 ADC Swap Mux", "L/L", "IF2 ADC" },
3036 { "IF2 ADC Swap Mux", "R/R", "IF2 ADC" },
3037 { "AIF2TX", NULL, "IF2 ADC Swap Mux" },
3038 { "IF3 ADC Swap Mux", "L/R", "IF3 ADC" },
3039 { "IF3 ADC Swap Mux", "R/L", "IF3 ADC" },
3040 { "IF3 ADC Swap Mux", "L/L", "IF3 ADC" },
3041 { "IF3 ADC Swap Mux", "R/R", "IF3 ADC" },
3042 { "AIF3TX", NULL, "IF3 ADC Swap Mux" },
3043
3044 { "IF1 DAC1", NULL, "AIF1RX" },
3045 { "IF1 DAC2", NULL, "AIF1RX" },
3046 { "IF2 DAC Swap Mux", "L/R", "AIF2RX" },
3047 { "IF2 DAC Swap Mux", "R/L", "AIF2RX" },
3048 { "IF2 DAC Swap Mux", "L/L", "AIF2RX" },
3049 { "IF2 DAC Swap Mux", "R/R", "AIF2RX" },
3050 { "IF2 DAC", NULL, "IF2 DAC Swap Mux" },
3051 { "IF3 DAC Swap Mux", "L/R", "AIF3RX" },
3052 { "IF3 DAC Swap Mux", "R/L", "AIF3RX" },
3053 { "IF3 DAC Swap Mux", "L/L", "AIF3RX" },
3054 { "IF3 DAC Swap Mux", "R/R", "AIF3RX" },
3055 { "IF3 DAC", NULL, "IF3 DAC Swap Mux" },
3056
3057 { "IF1 DAC1", NULL, "I2S1" },
3058 { "IF1 DAC2", NULL, "I2S1" },
3059 { "IF2 DAC", NULL, "I2S2" },
3060 { "IF3 DAC", NULL, "I2S3" },
3061
3062 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
3063 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
3064 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
3065 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
3066 { "IF2 DAC L", NULL, "IF2 DAC" },
3067 { "IF2 DAC R", NULL, "IF2 DAC" },
3068 { "IF3 DAC L", NULL, "IF3 DAC" },
3069 { "IF3 DAC R", NULL, "IF3 DAC" },
3070
3071 { "DAC L1 Mux", "IF1 DAC1", "IF1 DAC1 L" },
3072 { "DAC L1 Mux", "IF2 DAC", "IF2 DAC L" },
3073 { "DAC L1 Mux", "IF3 DAC", "IF3 DAC L" },
3074 { "DAC L1 Mux", NULL, "DAC Stereo1 Filter" },
3075
3076 { "DAC R1 Mux", "IF1 DAC1", "IF1 DAC1 R" },
3077 { "DAC R1 Mux", "IF2 DAC", "IF2 DAC R" },
3078 { "DAC R1 Mux", "IF3 DAC", "IF3 DAC R" },
3079 { "DAC R1 Mux", NULL, "DAC Stereo1 Filter" },
3080
3081 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC Volume L" },
3082 { "DAC1 MIXL", "DAC1 Switch", "DAC L1 Mux" },
3083 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC Volume R" },
3084 { "DAC1 MIXR", "DAC1 Switch", "DAC R1 Mux" },
3085
3086 { "DAC_REF", NULL, "DAC1 MIXL" },
3087 { "DAC_REF", NULL, "DAC1 MIXR" },
3088
3089 { "DAC L2 Mux", "IF1 DAC2", "IF1 DAC2 L" },
3090 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
3091 { "DAC L2 Mux", "IF3 DAC", "IF3 DAC L" },
3092 { "DAC L2 Mux", "Mono ADC MIX", "Mono ADC MIXL" },
3093 { "DAC L2 Mux", NULL, "DAC Mono Left Filter" },
3094
3095 { "DAC R2 Mux", "IF1 DAC2", "IF1 DAC2 R" },
3096 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
3097 { "DAC R2 Mux", "IF3 DAC", "IF3 DAC R" },
3098 { "DAC R2 Mux", "Mono ADC MIX", "Mono ADC MIXR" },
3099 { "DAC R2 Mux", NULL, "DAC Mono Right Filter" },
3100
3101 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3102 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3103 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3104 { "Stereo DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3105
3106 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3107 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3108 { "Stereo DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3109 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3110
3111 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
3112 { "Mono DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
3113 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux" },
3114 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux" },
3115 { "Mono DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
3116 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
3117 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux" },
3118 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux" },
3119
3120 { "DAC MIXL", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3121 { "DAC MIXL", "Mono DAC Mixer", "Mono DAC MIXL" },
3122 { "DAC MIXR", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3123 { "DAC MIXR", "Mono DAC Mixer", "Mono DAC MIXR" },
3124
3125 { "DAC L1 Source", NULL, "DAC L1 Power" },
3126 { "DAC L1 Source", "DAC", "DAC1 MIXL" },
3127 { "DAC L1 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3128 { "DAC R1 Source", NULL, "DAC R1 Power" },
3129 { "DAC R1 Source", "DAC", "DAC1 MIXR" },
3130 { "DAC R1 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3131 { "DAC L2 Source", "Stereo DAC Mixer", "Stereo DAC MIXL" },
3132 { "DAC L2 Source", "Mono DAC Mixer", "Mono DAC MIXL" },
3133 { "DAC L2 Source", NULL, "DAC L2 Power" },
3134 { "DAC R2 Source", "Stereo DAC Mixer", "Stereo DAC MIXR" },
3135 { "DAC R2 Source", "Mono DAC Mixer", "Mono DAC MIXR" },
3136 { "DAC R2 Source", NULL, "DAC R2 Power" },
3137
3138 { "DAC L1", NULL, "DAC L1 Source" },
3139 { "DAC R1", NULL, "DAC R1 Source" },
3140 { "DAC L2", NULL, "DAC L2 Source" },
3141 { "DAC R2", NULL, "DAC R2 Source" },
3142
3143 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
3144 { "SPK MIXL", "BST1 Switch", "BST1" },
3145 { "SPK MIXL", "INL Switch", "INL VOL" },
3146 { "SPK MIXL", "INR Switch", "INR VOL" },
3147 { "SPK MIXL", "BST3 Switch", "BST3" },
3148 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
3149 { "SPK MIXR", "BST4 Switch", "BST4" },
3150 { "SPK MIXR", "INL Switch", "INL VOL" },
3151 { "SPK MIXR", "INR Switch", "INR VOL" },
3152 { "SPK MIXR", "BST3 Switch", "BST3" },
3153
3154 { "MONOVOL MIX", "DAC L2 Switch", "DAC L2" },
3155 { "MONOVOL MIX", "DAC R2 Switch", "DAC R2" },
3156 { "MONOVOL MIX", "BST1 Switch", "BST1" },
3157 { "MONOVOL MIX", "BST2 Switch", "BST2" },
3158 { "MONOVOL MIX", "BST3 Switch", "BST3" },
3159
3160 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
3161 { "OUT MIXL", "INL Switch", "INL VOL" },
3162 { "OUT MIXL", "BST1 Switch", "BST1" },
3163 { "OUT MIXL", "BST2 Switch", "BST2" },
3164 { "OUT MIXL", "BST3 Switch", "BST3" },
3165 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
3166 { "OUT MIXR", "INR Switch", "INR VOL" },
3167 { "OUT MIXR", "BST2 Switch", "BST2" },
3168 { "OUT MIXR", "BST3 Switch", "BST3" },
3169 { "OUT MIXR", "BST4 Switch", "BST4" },
3170
3171 { "SPKVOL L", "Switch", "SPK MIXL" },
3172 { "SPKVOL R", "Switch", "SPK MIXR" },
3173 { "SPO L MIX", "DAC L2 Switch", "DAC L2" },
3174 { "SPO L MIX", "SPKVOL L Switch", "SPKVOL L" },
3175 { "SPO R MIX", "DAC R2 Switch", "DAC R2" },
3176 { "SPO R MIX", "SPKVOL R Switch", "SPKVOL R" },
3177 { "SPK Amp", NULL, "SPO L MIX" },
3178 { "SPK Amp", NULL, "SPO R MIX" },
3179 { "SPK Amp", NULL, "SYS CLK DET" },
3180 { "SPO Playback", "Switch", "SPK Amp" },
3181 { "SPOL", NULL, "SPO Playback" },
3182 { "SPOR", NULL, "SPO Playback" },
3183
3184 { "MONOVOL", "Switch", "MONOVOL MIX" },
3185 { "Mono MIX", "DAC L2 Switch", "DAC L2" },
3186 { "Mono MIX", "MONOVOL Switch", "MONOVOL" },
3187 { "Mono Amp", NULL, "Mono MIX" },
3188 { "Mono Amp", NULL, "Mono Vref" },
3189 { "Mono Amp", NULL, "SYS CLK DET" },
3190 { "Mono Playback", "Switch", "Mono Amp" },
3191 { "MONOOUT", NULL, "Mono Playback" },
3192
3193 { "HP Amp", NULL, "DAC L1" },
3194 { "HP Amp", NULL, "DAC R1" },
3195 { "HP Amp", NULL, "Charge Pump" },
3196 { "HP Amp", NULL, "SYS CLK DET" },
3197 { "HPO L Playback", "Switch", "HP Amp"},
3198 { "HPO R Playback", "Switch", "HP Amp"},
3199 { "HPOL", NULL, "HPO L Playback" },
3200 { "HPOR", NULL, "HPO R Playback" },
3201
3202 { "OUTVOL L", "Switch", "OUT MIXL" },
3203 { "OUTVOL R", "Switch", "OUT MIXR" },
3204 { "LOUT L MIX", "DAC L2 Switch", "DAC L2" },
3205 { "LOUT L MIX", "OUTVOL L Switch", "OUTVOL L" },
3206 { "LOUT R MIX", "DAC R2 Switch", "DAC R2" },
3207 { "LOUT R MIX", "OUTVOL R Switch", "OUTVOL R" },
3208 { "LOUT Amp", NULL, "LOUT L MIX" },
3209 { "LOUT Amp", NULL, "LOUT R MIX" },
3210 { "LOUT Amp", NULL, "SYS CLK DET" },
3211 { "LOUT L Playback", "Switch", "LOUT Amp" },
3212 { "LOUT R Playback", "Switch", "LOUT Amp" },
3213 { "LOUTL", NULL, "LOUT L Playback" },
3214 { "LOUTR", NULL, "LOUT R Playback" },
3215
3216 { "PDM L Mux", "Mono DAC", "Mono DAC MIXL" },
3217 { "PDM L Mux", "Stereo DAC", "Stereo DAC MIXL" },
3218 { "PDM L Mux", NULL, "PDM Power" },
3219 { "PDM R Mux", "Mono DAC", "Mono DAC MIXR" },
3220 { "PDM R Mux", "Stereo DAC", "Stereo DAC MIXR" },
3221 { "PDM R Mux", NULL, "PDM Power" },
3222 { "PDM L Playback", "Switch", "PDM L Mux" },
3223 { "PDM R Playback", "Switch", "PDM R Mux" },
3224 { "PDML", NULL, "PDM L Playback" },
3225 { "PDMR", NULL, "PDM R Playback" },
3226
3227 { "SPDIF Mux", "IF3_DAC", "IF3 DAC" },
3228 { "SPDIF Mux", "IF2_DAC", "IF2 DAC" },
3229 { "SPDIF Mux", "IF1_DAC2", "IF1 DAC2" },
3230 { "SPDIF Mux", "IF1_DAC1", "IF1 DAC1" },
3231 { "SPDIF", NULL, "SPDIF Mux" },
3232};
3233
3234static int rt5659_hw_params(struct snd_pcm_substream *substream,
3235 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
3236{
3237 struct snd_soc_codec *codec = dai->codec;
3238 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3239 unsigned int val_len = 0, val_clk, mask_clk;
3240 int pre_div, frame_size;
3241
3242 rt5659->lrck[dai->id] = params_rate(params);
3243 pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3244 if (pre_div < 0) {
3245 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
3246 rt5659->lrck[dai->id], dai->id);
3247 return -EINVAL;
3248 }
3249 frame_size = snd_soc_params_to_frame_size(params);
3250 if (frame_size < 0) {
3251 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
3252 return -EINVAL;
3253 }
3254
3255 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3256 rt5659->lrck[dai->id], pre_div, dai->id);
3257
3258 switch (params_width(params)) {
3259 case 16:
3260 break;
3261 case 20:
3262 val_len |= RT5659_I2S_DL_20;
3263 break;
3264 case 24:
3265 val_len |= RT5659_I2S_DL_24;
3266 break;
3267 case 8:
3268 val_len |= RT5659_I2S_DL_8;
3269 break;
3270 default:
3271 return -EINVAL;
3272 }
3273
3274 switch (dai->id) {
3275 case RT5659_AIF1:
3276 mask_clk = RT5659_I2S_PD1_MASK;
3277 val_clk = pre_div << RT5659_I2S_PD1_SFT;
3278 snd_soc_update_bits(codec, RT5659_I2S1_SDP,
3279 RT5659_I2S_DL_MASK, val_len);
3280 break;
3281 case RT5659_AIF2:
3282 mask_clk = RT5659_I2S_PD2_MASK;
3283 val_clk = pre_div << RT5659_I2S_PD2_SFT;
3284 snd_soc_update_bits(codec, RT5659_I2S2_SDP,
3285 RT5659_I2S_DL_MASK, val_len);
3286 break;
3287 case RT5659_AIF3:
3288 mask_clk = RT5659_I2S_PD3_MASK;
3289 val_clk = pre_div << RT5659_I2S_PD3_SFT;
3290 snd_soc_update_bits(codec, RT5659_I2S3_SDP,
3291 RT5659_I2S_DL_MASK, val_len);
3292 break;
3293 default:
3294 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
3295 return -EINVAL;
3296 }
3297
3298 snd_soc_update_bits(codec, RT5659_ADDA_CLK_1, mask_clk, val_clk);
3299
3300 switch (rt5659->lrck[dai->id]) {
3301 case 192000:
3302 snd_soc_update_bits(codec, RT5659_ADDA_CLK_1,
3303 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_32);
3304 break;
3305 case 96000:
3306 snd_soc_update_bits(codec, RT5659_ADDA_CLK_1,
3307 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_64);
3308 break;
3309 default:
3310 snd_soc_update_bits(codec, RT5659_ADDA_CLK_1,
3311 RT5659_DAC_OSR_MASK, RT5659_DAC_OSR_128);
3312 break;
3313 }
3314
3315 return 0;
3316}
3317
3318static int rt5659_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
3319{
3320 struct snd_soc_codec *codec = dai->codec;
3321 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3322 unsigned int reg_val = 0;
3323
3324 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
3325 case SND_SOC_DAIFMT_CBM_CFM:
3326 rt5659->master[dai->id] = 1;
3327 break;
3328 case SND_SOC_DAIFMT_CBS_CFS:
3329 reg_val |= RT5659_I2S_MS_S;
3330 rt5659->master[dai->id] = 0;
3331 break;
3332 default:
3333 return -EINVAL;
3334 }
3335
3336 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
3337 case SND_SOC_DAIFMT_NB_NF:
3338 break;
3339 case SND_SOC_DAIFMT_IB_NF:
3340 reg_val |= RT5659_I2S_BP_INV;
3341 break;
3342 default:
3343 return -EINVAL;
3344 }
3345
3346 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
3347 case SND_SOC_DAIFMT_I2S:
3348 break;
3349 case SND_SOC_DAIFMT_LEFT_J:
3350 reg_val |= RT5659_I2S_DF_LEFT;
3351 break;
3352 case SND_SOC_DAIFMT_DSP_A:
3353 reg_val |= RT5659_I2S_DF_PCM_A;
3354 break;
3355 case SND_SOC_DAIFMT_DSP_B:
3356 reg_val |= RT5659_I2S_DF_PCM_B;
3357 break;
3358 default:
3359 return -EINVAL;
3360 }
3361
3362 switch (dai->id) {
3363 case RT5659_AIF1:
3364 snd_soc_update_bits(codec, RT5659_I2S1_SDP,
3365 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3366 RT5659_I2S_DF_MASK, reg_val);
3367 break;
3368 case RT5659_AIF2:
3369 snd_soc_update_bits(codec, RT5659_I2S2_SDP,
3370 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3371 RT5659_I2S_DF_MASK, reg_val);
3372 break;
3373 case RT5659_AIF3:
3374 snd_soc_update_bits(codec, RT5659_I2S3_SDP,
3375 RT5659_I2S_MS_MASK | RT5659_I2S_BP_MASK |
3376 RT5659_I2S_DF_MASK, reg_val);
3377 break;
3378 default:
3379 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
3380 return -EINVAL;
3381 }
3382 return 0;
3383}
3384
3385static int rt5659_set_dai_sysclk(struct snd_soc_dai *dai,
3386 int clk_id, unsigned int freq, int dir)
3387{
3388 struct snd_soc_codec *codec = dai->codec;
3389 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3390 unsigned int reg_val = 0;
3391
3392 if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3393 return 0;
3394
3395 switch (clk_id) {
3396 case RT5659_SCLK_S_MCLK:
3397 reg_val |= RT5659_SCLK_SRC_MCLK;
3398 break;
3399 case RT5659_SCLK_S_PLL1:
3400 reg_val |= RT5659_SCLK_SRC_PLL1;
3401 break;
3402 case RT5659_SCLK_S_RCCLK:
3403 reg_val |= RT5659_SCLK_SRC_RCCLK;
3404 break;
3405 default:
3406 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
3407 return -EINVAL;
3408 }
3409 snd_soc_update_bits(codec, RT5659_GLB_CLK,
3410 RT5659_SCLK_SRC_MASK, reg_val);
3411 rt5659->sysclk = freq;
3412 rt5659->sysclk_src = clk_id;
3413
3414 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
3415
3416 return 0;
3417}
3418
3419static int rt5659_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int Source,
3420 unsigned int freq_in, unsigned int freq_out)
3421{
3422 struct snd_soc_codec *codec = dai->codec;
3423 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3424 struct rl6231_pll_code pll_code;
3425 int ret;
3426
3427 if (Source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3428 freq_out == rt5659->pll_out)
3429 return 0;
3430
3431 if (!freq_in || !freq_out) {
3432 dev_dbg(codec->dev, "PLL disabled\n");
3433
3434 rt5659->pll_in = 0;
3435 rt5659->pll_out = 0;
3436 snd_soc_update_bits(codec, RT5659_GLB_CLK,
3437 RT5659_SCLK_SRC_MASK, RT5659_SCLK_SRC_MCLK);
3438 return 0;
3439 }
3440
3441 switch (Source) {
3442 case RT5659_PLL1_S_MCLK:
3443 snd_soc_update_bits(codec, RT5659_GLB_CLK,
3444 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_MCLK);
3445 break;
3446 case RT5659_PLL1_S_BCLK1:
3447 snd_soc_update_bits(codec, RT5659_GLB_CLK,
3448 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK1);
3449 break;
3450 case RT5659_PLL1_S_BCLK2:
3451 snd_soc_update_bits(codec, RT5659_GLB_CLK,
3452 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK2);
3453 break;
3454 case RT5659_PLL1_S_BCLK3:
3455 snd_soc_update_bits(codec, RT5659_GLB_CLK,
3456 RT5659_PLL1_SRC_MASK, RT5659_PLL1_SRC_BCLK3);
3457 break;
3458 default:
3459 dev_err(codec->dev, "Unknown PLL Source %d\n", Source);
3460 return -EINVAL;
3461 }
3462
3463 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
3464 if (ret < 0) {
3465 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
3466 return ret;
3467 }
3468
3469 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
3470 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
3471 pll_code.n_code, pll_code.k_code);
3472
3473 snd_soc_write(codec, RT5659_PLL_CTRL_1,
3474 pll_code.n_code << RT5659_PLL_N_SFT | pll_code.k_code);
3475 snd_soc_write(codec, RT5659_PLL_CTRL_2,
3476 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5659_PLL_M_SFT |
3477 pll_code.m_bp << RT5659_PLL_M_BP_SFT);
3478
3479 rt5659->pll_in = freq_in;
3480 rt5659->pll_out = freq_out;
3481 rt5659->pll_src = Source;
3482
3483 return 0;
3484}
3485
3486static int rt5659_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
3487 unsigned int rx_mask, int slots, int slot_width)
3488{
3489 struct snd_soc_codec *codec = dai->codec;
3490 unsigned int val = 0;
3491
3492 if (rx_mask || tx_mask)
3493 val |= (1 << 15);
3494
3495 switch (slots) {
3496 case 4:
3497 val |= (1 << 10);
3498 val |= (1 << 8);
3499 break;
3500 case 6:
3501 val |= (2 << 10);
3502 val |= (2 << 8);
3503 break;
3504 case 8:
3505 val |= (3 << 10);
3506 val |= (3 << 8);
3507 break;
3508 case 2:
3509 break;
3510 default:
3511 return -EINVAL;
3512 }
3513
3514 switch (slot_width) {
3515 case 20:
3516 val |= (1 << 6);
3517 val |= (1 << 4);
3518 break;
3519 case 24:
3520 val |= (2 << 6);
3521 val |= (2 << 4);
3522 break;
3523 case 32:
3524 val |= (3 << 6);
3525 val |= (3 << 4);
3526 break;
3527 case 16:
3528 break;
3529 default:
3530 return -EINVAL;
3531 }
3532
3533 snd_soc_update_bits(codec, RT5659_TDM_CTRL_1, 0x8ff0, val);
3534
3535 return 0;
3536}
3537
3538static int rt5659_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
3539{
3540 struct snd_soc_codec *codec = dai->codec;
3541 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3542
3543 dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
3544
3545 rt5659->bclk[dai->id] = ratio;
3546
3547 if (ratio == 64) {
3548 switch (dai->id) {
3549 case RT5659_AIF2:
3550 snd_soc_update_bits(codec, RT5659_ADDA_CLK_1,
3551 RT5659_I2S_BCLK_MS2_MASK,
3552 RT5659_I2S_BCLK_MS2_64);
3553 break;
3554 case RT5659_AIF3:
3555 snd_soc_update_bits(codec, RT5659_ADDA_CLK_1,
3556 RT5659_I2S_BCLK_MS3_MASK,
3557 RT5659_I2S_BCLK_MS3_64);
3558 break;
3559 }
3560 }
3561
3562 return 0;
3563}
3564
3565static int rt5659_set_bias_level(struct snd_soc_codec *codec,
3566 enum snd_soc_bias_level level)
3567{
3568 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3569
3570 switch (level) {
3571 case SND_SOC_BIAS_PREPARE:
3572 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3573 RT5659_DIG_GATE_CTRL, RT5659_DIG_GATE_CTRL);
3574 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3575 RT5659_PWR_LDO, RT5659_PWR_LDO);
3576 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3577 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2,
3578 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2);
3579 msleep(20);
3580 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3581 RT5659_PWR_FV1 | RT5659_PWR_FV2,
3582 RT5659_PWR_FV1 | RT5659_PWR_FV2);
3583 break;
3584
3585 case SND_SOC_BIAS_OFF:
3586 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3587 RT5659_PWR_LDO, 0);
3588 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3589 RT5659_PWR_MB | RT5659_PWR_VREF1 | RT5659_PWR_VREF2
3590 | RT5659_PWR_FV1 | RT5659_PWR_FV2,
3591 RT5659_PWR_MB | RT5659_PWR_VREF2);
3592 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3593 RT5659_DIG_GATE_CTRL, 0);
3594 break;
3595
3596 default:
3597 break;
3598 }
3599
3600 return 0;
3601}
3602
3603static int rt5659_probe(struct snd_soc_codec *codec)
3604{
3605 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3606
3607 rt5659->codec = codec;
3608
3609 return 0;
3610}
3611
3612static int rt5659_remove(struct snd_soc_codec *codec)
3613{
3614 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3615
3616 regmap_write(rt5659->regmap, RT5659_RESET, 0);
3617
3618 return 0;
3619}
3620
3621#ifdef CONFIG_PM
3622static int rt5659_suspend(struct snd_soc_codec *codec)
3623{
3624 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3625
3626 regcache_cache_only(rt5659->regmap, true);
3627 regcache_mark_dirty(rt5659->regmap);
3628 return 0;
3629}
3630
3631static int rt5659_resume(struct snd_soc_codec *codec)
3632{
3633 struct rt5659_priv *rt5659 = snd_soc_codec_get_drvdata(codec);
3634
3635 regcache_cache_only(rt5659->regmap, false);
3636 regcache_sync(rt5659->regmap);
3637
3638 return 0;
3639}
3640#else
3641#define rt5659_suspend NULL
3642#define rt5659_resume NULL
3643#endif
3644
3645#define RT5659_STEREO_RATES SNDRV_PCM_RATE_8000_192000
3646#define RT5659_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3647 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3648
3649static const struct snd_soc_dai_ops rt5659_aif_dai_ops = {
3650 .hw_params = rt5659_hw_params,
3651 .set_fmt = rt5659_set_dai_fmt,
3652 .set_sysclk = rt5659_set_dai_sysclk,
3653 .set_tdm_slot = rt5659_set_tdm_slot,
3654 .set_pll = rt5659_set_dai_pll,
3655 .set_bclk_ratio = rt5659_set_bclk_ratio,
3656};
3657
3658static struct snd_soc_dai_driver rt5659_dai[] = {
3659 {
3660 .name = "rt5659-aif1",
3661 .id = RT5659_AIF1,
3662 .playback = {
3663 .stream_name = "AIF1 Playback",
3664 .channels_min = 1,
3665 .channels_max = 2,
3666 .rates = RT5659_STEREO_RATES,
3667 .formats = RT5659_FORMATS,
3668 },
3669 .capture = {
3670 .stream_name = "AIF1 Capture",
3671 .channels_min = 1,
3672 .channels_max = 2,
3673 .rates = RT5659_STEREO_RATES,
3674 .formats = RT5659_FORMATS,
3675 },
3676 .ops = &rt5659_aif_dai_ops,
3677 },
3678 {
3679 .name = "rt5659-aif2",
3680 .id = RT5659_AIF2,
3681 .playback = {
3682 .stream_name = "AIF2 Playback",
3683 .channels_min = 1,
3684 .channels_max = 2,
3685 .rates = RT5659_STEREO_RATES,
3686 .formats = RT5659_FORMATS,
3687 },
3688 .capture = {
3689 .stream_name = "AIF2 Capture",
3690 .channels_min = 1,
3691 .channels_max = 2,
3692 .rates = RT5659_STEREO_RATES,
3693 .formats = RT5659_FORMATS,
3694 },
3695 .ops = &rt5659_aif_dai_ops,
3696 },
3697 {
3698 .name = "rt5659-aif3",
3699 .id = RT5659_AIF3,
3700 .playback = {
3701 .stream_name = "AIF3 Playback",
3702 .channels_min = 1,
3703 .channels_max = 2,
3704 .rates = RT5659_STEREO_RATES,
3705 .formats = RT5659_FORMATS,
3706 },
3707 .capture = {
3708 .stream_name = "AIF3 Capture",
3709 .channels_min = 1,
3710 .channels_max = 2,
3711 .rates = RT5659_STEREO_RATES,
3712 .formats = RT5659_FORMATS,
3713 },
3714 .ops = &rt5659_aif_dai_ops,
3715 },
3716};
3717
3718static struct snd_soc_codec_driver soc_codec_dev_rt5659 = {
3719 .probe = rt5659_probe,
3720 .remove = rt5659_remove,
3721 .suspend = rt5659_suspend,
3722 .resume = rt5659_resume,
3723 .set_bias_level = rt5659_set_bias_level,
3724 .idle_bias_off = true,
3725 .controls = rt5659_snd_controls,
3726 .num_controls = ARRAY_SIZE(rt5659_snd_controls),
3727 .dapm_widgets = rt5659_dapm_widgets,
3728 .num_dapm_widgets = ARRAY_SIZE(rt5659_dapm_widgets),
3729 .dapm_routes = rt5659_dapm_routes,
3730 .num_dapm_routes = ARRAY_SIZE(rt5659_dapm_routes),
3731};
3732
3733
3734static const struct regmap_config rt5659_regmap = {
3735 .reg_bits = 16,
3736 .val_bits = 16,
3737 .max_register = 0x0400,
3738 .volatile_reg = rt5659_volatile_register,
3739 .readable_reg = rt5659_readable_register,
3740 .cache_type = REGCACHE_RBTREE,
3741 .reg_defaults = rt5659_reg,
3742 .num_reg_defaults = ARRAY_SIZE(rt5659_reg),
3743};
3744
3745static const struct i2c_device_id rt5659_i2c_id[] = {
3746 { "rt5658", 0 },
3747 { "rt5659", 0 },
3748 { }
3749};
3750MODULE_DEVICE_TABLE(i2c, rt5659_i2c_id);
3751
3752static int rt5659_parse_dt(struct rt5659_priv *rt5659, struct device *dev)
3753{
3754 rt5659->pdata.in1_diff = device_property_read_bool(dev,
3755 "realtek,in1-differential");
3756 rt5659->pdata.in3_diff = device_property_read_bool(dev,
3757 "realtek,in3-differential");
3758 rt5659->pdata.in4_diff = device_property_read_bool(dev,
3759 "realtek,in4-differential");
3760
3761
3762 device_property_read_u32(dev, "realtek,dmic1-data-pin",
3763 &rt5659->pdata.dmic1_data_pin);
3764 device_property_read_u32(dev, "realtek,dmic2-data-pin",
3765 &rt5659->pdata.dmic2_data_pin);
3766 device_property_read_u32(dev, "realtek,jd-src",
3767 &rt5659->pdata.jd_src);
3768
3769 return 0;
3770}
3771
3772static void rt5659_calibrate(struct rt5659_priv *rt5659)
3773{
3774 int value, count;
3775
3776 /* Calibrate HPO Start */
3777 /* Fine tune HP Performance */
3778 regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3779 regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3780
3781 regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3782 regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3783 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3784 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3785 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3786
3787 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3788 msleep(60);
3789 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3790 msleep(50);
3791 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3792 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3793 msleep(50);
3794 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3795 usleep_range(10000, 10005);
3796 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3797 msleep(50);
3798 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3799 msleep(50);
3800 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3801 msleep(50);
3802
3803 /* Enalbe K ADC Power And Clock */
3804 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3805 msleep(50);
3806 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3807 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3808 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3809
3810 /* K Headphone */
3811 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3812 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3813 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3814 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3815 msleep(60);
3816
3817 /* Manual K ADC Offset */
3818 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3819 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3820 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3821 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3822 0x8000, 0x8000);
3823
3824 count = 0;
3825 while (true) {
3826 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3827 if (value & 0x8000)
3828 usleep_range(10000, 10005);
3829 else
3830 break;
3831
3832 if (count > 30) {
3833 dev_err(rt5659->codec->dev,
3834 "HP Calibration 1 Failure\n");
3835 return;
3836 }
3837
3838 count++;
3839 }
3840
3841 /* Manual K Internal Path Offset */
3842 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3843 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3844 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3845 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3846 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3847 0x8000, 0x8000);
3848
3849 count = 0;
3850 while (true) {
3851 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3852 if (value & 0x8000)
3853 usleep_range(10000, 10005);
3854 else
3855 break;
3856
3857 if (count > 85) {
3858 dev_err(rt5659->codec->dev,
3859 "HP Calibration 2 Failure\n");
3860 return;
3861 }
3862
3863 count++;
3864 }
3865
3866 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3867 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3868 /* Calibrate HPO End */
3869
3870 /* Calibrate SPO Start */
3871 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3872 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3873 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3874 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3875 regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3876 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3877 regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3878 regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3879 regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3880 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3881 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3882 regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3883
3884 /* Enalbe K ADC Power And Clock */
3885 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
3886 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
3887 0x0001);
3888
3889 /* Start Calibration */
3890 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
3891 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
3892 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
3893 regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
3894 0x8000, 0x8000);
3895
3896 count = 0;
3897 while (true) {
3898 regmap_read(rt5659->regmap,
3899 RT5659_SPK_DC_CAILB_CTRL_1, &value);
3900 if (value & 0x8000)
3901 usleep_range(10000, 10005);
3902 else
3903 break;
3904
3905 if (count > 10) {
3906 dev_err(rt5659->codec->dev,
3907 "SPK Calibration Failure\n");
3908 return;
3909 }
3910
3911 count++;
3912 }
3913 /* Calibrate SPO End */
3914
3915 /* Calibrate MONO Start */
3916 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
3917 regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
3918 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
3919 /* MONO NG2 GAIN 5dB */
3920 regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
3921 regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
3922
3923 /* Start Calibration */
3924 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
3925 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
3926 regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
3927 0x8000, 0x8000);
3928
3929 count = 0;
3930 while (true) {
3931 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
3932 &value);
3933 if (value & 0x8000)
3934 usleep_range(10000, 10005);
3935 else
3936 break;
3937
3938 if (count > 35) {
3939 dev_err(rt5659->codec->dev,
3940 "Mono Calibration Failure\n");
3941 return;
3942 }
3943
3944 count++;
3945 }
3946
3947 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
3948 /* Calibrate MONO End */
3949
3950 /* Power Off */
3951 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
3952 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
3953 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
3954 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3955 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
3956 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
3957 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
3958 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
3959 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
3960 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
3961 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
3962 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
3963 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
3964 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
3965 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
3966 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
3967 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3968 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
3969 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
3970 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
3971 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
3972}
3973
3974static int rt5659_i2c_probe(struct i2c_client *i2c,
3975 const struct i2c_device_id *id)
3976{
3977 struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
3978 struct rt5659_priv *rt5659;
3979 int ret;
3980 unsigned int val;
3981
3982 rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
3983 GFP_KERNEL);
3984
3985 if (rt5659 == NULL)
3986 return -ENOMEM;
3987
3988 rt5659->i2c = i2c;
3989 i2c_set_clientdata(i2c, rt5659);
3990
3991 if (pdata)
3992 rt5659->pdata = *pdata;
3993 else
3994 rt5659_parse_dt(rt5659, &i2c->dev);
3995
3996 rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
3997 GPIOD_OUT_HIGH);
3998 if (IS_ERR(rt5659->gpiod_ldo1_en))
3999 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4000
4001 rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4002 GPIOD_OUT_HIGH);
4003
4004 /* Sleep for 300 ms miniumum */
4005 usleep_range(300000, 350000);
4006
4007 rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4008 if (IS_ERR(rt5659->regmap)) {
4009 ret = PTR_ERR(rt5659->regmap);
4010 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4011 ret);
4012 return ret;
4013 }
4014
4015 regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4016 if (val != DEVICE_ID) {
4017 dev_err(&i2c->dev,
4018 "Device with ID register %x is not rt5659\n", val);
4019 return -ENODEV;
4020 }
4021
4022 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4023
4024 rt5659_calibrate(rt5659);
4025
4026 /* line in diff mode*/
4027 if (rt5659->pdata.in1_diff)
4028 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4029 RT5659_IN1_DF_MASK, RT5659_IN1_DF_MASK);
4030 if (rt5659->pdata.in3_diff)
4031 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4032 RT5659_IN3_DF_MASK, RT5659_IN3_DF_MASK);
4033 if (rt5659->pdata.in4_diff)
4034 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4035 RT5659_IN4_DF_MASK, RT5659_IN4_DF_MASK);
4036
4037 /* DMIC pin*/
4038 if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4039 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4040 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4041 RT5659_GP2_PIN_MASK, RT5659_GP2_PIN_DMIC1_SCL);
4042
4043 switch (rt5659->pdata.dmic1_data_pin) {
4044 case RT5659_DMIC1_DATA_IN2N:
4045 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4046 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_IN2N);
4047 break;
4048
4049 case RT5659_DMIC1_DATA_GPIO5:
4050 regmap_update_bits(rt5659->regmap,
4051 RT5659_GPIO_CTRL_3,
4052 RT5659_I2S2_PIN_MASK,
4053 RT5659_I2S2_PIN_GPIO);
4054 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4055 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO5);
4056 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4057 RT5659_GP5_PIN_MASK, RT5659_GP5_PIN_DMIC1_SDA);
4058 break;
4059
4060 case RT5659_DMIC1_DATA_GPIO9:
4061 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4062 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO9);
4063 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4064 RT5659_GP9_PIN_MASK, RT5659_GP9_PIN_DMIC1_SDA);
4065 break;
4066
4067 case RT5659_DMIC1_DATA_GPIO11:
4068 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4069 RT5659_DMIC_1_DP_MASK, RT5659_DMIC_1_DP_GPIO11);
4070 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4071 RT5659_GP11_PIN_MASK,
4072 RT5659_GP11_PIN_DMIC1_SDA);
4073 break;
4074
4075 default:
4076 dev_dbg(&i2c->dev, "no DMIC1\n");
4077 break;
4078 }
4079
4080 switch (rt5659->pdata.dmic2_data_pin) {
4081 case RT5659_DMIC2_DATA_IN2P:
4082 regmap_update_bits(rt5659->regmap,
4083 RT5659_DMIC_CTRL_1,
4084 RT5659_DMIC_2_DP_MASK,
4085 RT5659_DMIC_2_DP_IN2P);
4086 break;
4087
4088 case RT5659_DMIC2_DATA_GPIO6:
4089 regmap_update_bits(rt5659->regmap,
4090 RT5659_DMIC_CTRL_1,
4091 RT5659_DMIC_2_DP_MASK,
4092 RT5659_DMIC_2_DP_GPIO6);
4093 regmap_update_bits(rt5659->regmap,
4094 RT5659_GPIO_CTRL_1,
4095 RT5659_GP6_PIN_MASK,
4096 RT5659_GP6_PIN_DMIC2_SDA);
4097 break;
4098
4099 case RT5659_DMIC2_DATA_GPIO10:
4100 regmap_update_bits(rt5659->regmap,
4101 RT5659_DMIC_CTRL_1,
4102 RT5659_DMIC_2_DP_MASK,
4103 RT5659_DMIC_2_DP_GPIO10);
4104 regmap_update_bits(rt5659->regmap,
4105 RT5659_GPIO_CTRL_1,
4106 RT5659_GP10_PIN_MASK,
4107 RT5659_GP10_PIN_DMIC2_SDA);
4108 break;
4109
4110 case RT5659_DMIC2_DATA_GPIO12:
4111 regmap_update_bits(rt5659->regmap,
4112 RT5659_DMIC_CTRL_1,
4113 RT5659_DMIC_2_DP_MASK,
4114 RT5659_DMIC_2_DP_GPIO12);
4115 regmap_update_bits(rt5659->regmap,
4116 RT5659_GPIO_CTRL_1,
4117 RT5659_GP12_PIN_MASK,
4118 RT5659_GP12_PIN_DMIC2_SDA);
4119 break;
4120
4121 default:
4122 dev_dbg(&i2c->dev, "no DMIC2\n");
4123 break;
4124
4125 }
4126 } else {
4127 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4128 RT5659_GP2_PIN_MASK | RT5659_GP5_PIN_MASK |
4129 RT5659_GP9_PIN_MASK | RT5659_GP11_PIN_MASK |
4130 RT5659_GP6_PIN_MASK | RT5659_GP10_PIN_MASK |
4131 RT5659_GP12_PIN_MASK,
4132 RT5659_GP2_PIN_GPIO2 | RT5659_GP5_PIN_GPIO5 |
4133 RT5659_GP9_PIN_GPIO9 | RT5659_GP11_PIN_GPIO11 |
4134 RT5659_GP6_PIN_GPIO6 | RT5659_GP10_PIN_GPIO10 |
4135 RT5659_GP12_PIN_GPIO12);
4136 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4137 RT5659_DMIC_1_DP_MASK | RT5659_DMIC_2_DP_MASK,
4138 RT5659_DMIC_1_DP_IN2N | RT5659_DMIC_2_DP_IN2P);
4139 }
4140
4141 switch (rt5659->pdata.jd_src) {
4142 case RT5659_JD3:
4143 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4144 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4145 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4146 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4147 RT5659_PWR_MB, RT5659_PWR_MB);
4148 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4149 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4150 break;
4151 case RT5659_JD_NULL:
4152 break;
4153 default:
4154 dev_warn(&i2c->dev, "Currently, support JD3 only\n");
4155 break;
4156 }
4157
4158 INIT_DELAYED_WORK(&rt5659->jack_detect_work, rt5659_jack_detect_work);
4159
4160 if (rt5659->i2c->irq) {
4161 ret = request_threaded_irq(rt5659->i2c->irq, NULL, rt5659_irq,
4162 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4163 | IRQF_ONESHOT, "rt5659", rt5659);
4164 if (ret)
4165 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4166
4167 }
4168
4169 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5659,
4170 rt5659_dai, ARRAY_SIZE(rt5659_dai));
4171
4172 if (ret) {
4173 if (rt5659->i2c->irq)
4174 free_irq(rt5659->i2c->irq, rt5659);
4175 }
4176
4177 return 0;
4178}
4179
4180static int rt5659_i2c_remove(struct i2c_client *i2c)
4181{
4182 snd_soc_unregister_codec(&i2c->dev);
4183
4184 return 0;
4185}
4186
4187void rt5659_i2c_shutdown(struct i2c_client *client)
4188{
4189 struct rt5659_priv *rt5659 = i2c_get_clientdata(client);
4190
4191 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4192}
4193
4194static const struct of_device_id rt5659_of_match[] = {
4195 { .compatible = "realtek,rt5658", },
4196 { .compatible = "realtek,rt5659", },
4197 {},
4198};
4199
4200static struct acpi_device_id rt5659_acpi_match[] = {
4201 { "10EC5658", 0},
4202 { "10EC5659", 0},
4203 { },
4204};
4205MODULE_DEVICE_TABLE(acpi, rt5659_acpi_match);
4206
4207struct i2c_driver rt5659_i2c_driver = {
4208 .driver = {
4209 .name = "rt5659",
4210 .owner = THIS_MODULE,
4211 .of_match_table = rt5659_of_match,
4212 .acpi_match_table = ACPI_PTR(rt5659_acpi_match),
4213 },
4214 .probe = rt5659_i2c_probe,
4215 .remove = rt5659_i2c_remove,
4216 .shutdown = rt5659_i2c_shutdown,
4217 .id_table = rt5659_i2c_id,
4218};
4219module_i2c_driver(rt5659_i2c_driver);
4220
4221MODULE_DESCRIPTION("ASoC RT5659 driver");
4222MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4223MODULE_LICENSE("GPL v2");
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-25 21:54:34 -0400