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| author | Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> | 2015-01-28 07:23:43 -0500 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-01-28 14:42:42 -0500 |
| commit | 5b74d7a3b888fd3db6dce77eb11b3d55b64f6833 (patch) | |
| tree | 5ecaf023a3b8acb1210224ac663c2275e29e866d /scripts/gdb/linux/utils.py | |
| parent | a87cbca0acef0b1f57e4b216f1965468ee521cd3 (diff) | |
spi/xilinx: Use cached value of register
The control register has not changed since the previous access.
Therefore we can use the cached value and safe one bus access.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions