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| author | Neil Armstrong <narmstrong@baylibre.com> | 2019-03-07 09:14:53 -0500 |
|---|---|---|
| committer | Neil Armstrong <narmstrong@baylibre.com> | 2019-04-01 04:45:11 -0400 |
| commit | 39b8500283b45252e2f9ad9d60992f2c0d3a1659 (patch) | |
| tree | 1e2a890f2df2c981e708fc23d9268bb820e85d81 /net/lapb/lapb_out.c | |
| parent | 370294e2667fa1648eb05aab6c4657419634ff83 (diff) | |
clk: meson-pll: add reduced specific clk_ops for G12A PCIe PLL
The Meson G12A PCIE PLL is fined tuned to deliver a very precise
100MHz reference clock for the PCIe Analog PHY, and thus requires
a strict register sequence to enable the PLL.
To simplify, use the _init() op to enable the PLL and keep
the other ops except set_rate since the rate is fixed.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lkml.kernel.org/r/20190307141455.23879-2-narmstrong@baylibre.com
Diffstat (limited to 'net/lapb/lapb_out.c')
0 files changed, 0 insertions, 0 deletions