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authorDaniel Borkmann <daniel@iogearbox.net>2015-12-17 17:51:57 -0500
committerDavid S. Miller <davem@davemloft.net>2015-12-18 16:04:51 -0500
commit9dd2af834dea132fa47b9a168d6da566d2e445d3 (patch)
tree65e6968c6abb453dbcde2c6f0d981912ea6a3f51 /lib
parent606c88a86c77fa27cb4eac899ddced9092825bea (diff)
bpf, test: add couple of test cases
Add couple of test cases for interpreter but also JITs, f.e. to test that when imm32 moves are being done, upper 32bits of the regs are being zero extended. Without JIT: [...] [ 1114.129301] test_bpf: #43 MOV REG64 jited:0 128 PASS [ 1114.130626] test_bpf: #44 MOV REG32 jited:0 139 PASS [ 1114.132055] test_bpf: #45 LD IMM64 jited:0 124 PASS [...] With JIT (generated code can as usual be nicely verified with the help of bpf_jit_disasm tool): [...] [ 1062.726782] test_bpf: #43 MOV REG64 jited:1 6 PASS [ 1062.726890] test_bpf: #44 MOV REG32 jited:1 6 PASS [ 1062.726993] test_bpf: #45 LD IMM64 jited:1 6 PASS [...] Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'lib')
-rw-r--r--lib/test_bpf.c120
1 files changed, 120 insertions, 0 deletions
diff --git a/lib/test_bpf.c b/lib/test_bpf.c
index 10cd1860e5b0..27a7a26b1ece 100644
--- a/lib/test_bpf.c
+++ b/lib/test_bpf.c
@@ -1685,6 +1685,126 @@ static struct bpf_test tests[] = {
1685 { }, 1685 { },
1686 { { 0, 0x35d97ef2 } } 1686 { { 0, 0x35d97ef2 } }
1687 }, 1687 },
1688 { /* Mainly checking JIT here. */
1689 "MOV REG64",
1690 .u.insns_int = {
1691 BPF_LD_IMM64(R0, 0xffffffffffffffffLL),
1692 BPF_MOV64_REG(R1, R0),
1693 BPF_MOV64_REG(R2, R1),
1694 BPF_MOV64_REG(R3, R2),
1695 BPF_MOV64_REG(R4, R3),
1696 BPF_MOV64_REG(R5, R4),
1697 BPF_MOV64_REG(R6, R5),
1698 BPF_MOV64_REG(R7, R6),
1699 BPF_MOV64_REG(R8, R7),
1700 BPF_MOV64_REG(R9, R8),
1701 BPF_ALU64_IMM(BPF_MOV, R0, 0),
1702 BPF_ALU64_IMM(BPF_MOV, R1, 0),
1703 BPF_ALU64_IMM(BPF_MOV, R2, 0),
1704 BPF_ALU64_IMM(BPF_MOV, R3, 0),
1705 BPF_ALU64_IMM(BPF_MOV, R4, 0),
1706 BPF_ALU64_IMM(BPF_MOV, R5, 0),
1707 BPF_ALU64_IMM(BPF_MOV, R6, 0),
1708 BPF_ALU64_IMM(BPF_MOV, R7, 0),
1709 BPF_ALU64_IMM(BPF_MOV, R8, 0),
1710 BPF_ALU64_IMM(BPF_MOV, R9, 0),
1711 BPF_ALU64_REG(BPF_ADD, R0, R0),
1712 BPF_ALU64_REG(BPF_ADD, R0, R1),
1713 BPF_ALU64_REG(BPF_ADD, R0, R2),
1714 BPF_ALU64_REG(BPF_ADD, R0, R3),
1715 BPF_ALU64_REG(BPF_ADD, R0, R4),
1716 BPF_ALU64_REG(BPF_ADD, R0, R5),
1717 BPF_ALU64_REG(BPF_ADD, R0, R6),
1718 BPF_ALU64_REG(BPF_ADD, R0, R7),
1719 BPF_ALU64_REG(BPF_ADD, R0, R8),
1720 BPF_ALU64_REG(BPF_ADD, R0, R9),
1721 BPF_ALU64_IMM(BPF_ADD, R0, 0xfefe),
1722 BPF_EXIT_INSN(),
1723 },
1724 INTERNAL,
1725 { },
1726 { { 0, 0xfefe } }
1727 },
1728 { /* Mainly checking JIT here. */
1729 "MOV REG32",
1730 .u.insns_int = {
1731 BPF_LD_IMM64(R0, 0xffffffffffffffffLL),
1732 BPF_MOV64_REG(R1, R0),
1733 BPF_MOV64_REG(R2, R1),
1734 BPF_MOV64_REG(R3, R2),
1735 BPF_MOV64_REG(R4, R3),
1736 BPF_MOV64_REG(R5, R4),
1737 BPF_MOV64_REG(R6, R5),
1738 BPF_MOV64_REG(R7, R6),
1739 BPF_MOV64_REG(R8, R7),
1740 BPF_MOV64_REG(R9, R8),
1741 BPF_ALU32_IMM(BPF_MOV, R0, 0),
1742 BPF_ALU32_IMM(BPF_MOV, R1, 0),
1743 BPF_ALU32_IMM(BPF_MOV, R2, 0),
1744 BPF_ALU32_IMM(BPF_MOV, R3, 0),
1745 BPF_ALU32_IMM(BPF_MOV, R4, 0),
1746 BPF_ALU32_IMM(BPF_MOV, R5, 0),
1747 BPF_ALU32_IMM(BPF_MOV, R6, 0),
1748 BPF_ALU32_IMM(BPF_MOV, R7, 0),
1749 BPF_ALU32_IMM(BPF_MOV, R8, 0),
1750 BPF_ALU32_IMM(BPF_MOV, R9, 0),
1751 BPF_ALU64_REG(BPF_ADD, R0, R0),
1752 BPF_ALU64_REG(BPF_ADD, R0, R1),
1753 BPF_ALU64_REG(BPF_ADD, R0, R2),
1754 BPF_ALU64_REG(BPF_ADD, R0, R3),
1755 BPF_ALU64_REG(BPF_ADD, R0, R4),
1756 BPF_ALU64_REG(BPF_ADD, R0, R5),
1757 BPF_ALU64_REG(BPF_ADD, R0, R6),
1758 BPF_ALU64_REG(BPF_ADD, R0, R7),
1759 BPF_ALU64_REG(BPF_ADD, R0, R8),
1760 BPF_ALU64_REG(BPF_ADD, R0, R9),
1761 BPF_ALU64_IMM(BPF_ADD, R0, 0xfefe),
1762 BPF_EXIT_INSN(),
1763 },
1764 INTERNAL,
1765 { },
1766 { { 0, 0xfefe } }
1767 },
1768 { /* Mainly checking JIT here. */
1769 "LD IMM64",
1770 .u.insns_int = {
1771 BPF_LD_IMM64(R0, 0xffffffffffffffffLL),
1772 BPF_MOV64_REG(R1, R0),
1773 BPF_MOV64_REG(R2, R1),
1774 BPF_MOV64_REG(R3, R2),
1775 BPF_MOV64_REG(R4, R3),
1776 BPF_MOV64_REG(R5, R4),
1777 BPF_MOV64_REG(R6, R5),
1778 BPF_MOV64_REG(R7, R6),
1779 BPF_MOV64_REG(R8, R7),
1780 BPF_MOV64_REG(R9, R8),
1781 BPF_LD_IMM64(R0, 0x0LL),
1782 BPF_LD_IMM64(R1, 0x0LL),
1783 BPF_LD_IMM64(R2, 0x0LL),
1784 BPF_LD_IMM64(R3, 0x0LL),
1785 BPF_LD_IMM64(R4, 0x0LL),
1786 BPF_LD_IMM64(R5, 0x0LL),
1787 BPF_LD_IMM64(R6, 0x0LL),
1788 BPF_LD_IMM64(R7, 0x0LL),
1789 BPF_LD_IMM64(R8, 0x0LL),
1790 BPF_LD_IMM64(R9, 0x0LL),
1791 BPF_ALU64_REG(BPF_ADD, R0, R0),
1792 BPF_ALU64_REG(BPF_ADD, R0, R1),
1793 BPF_ALU64_REG(BPF_ADD, R0, R2),
1794 BPF_ALU64_REG(BPF_ADD, R0, R3),
1795 BPF_ALU64_REG(BPF_ADD, R0, R4),
1796 BPF_ALU64_REG(BPF_ADD, R0, R5),
1797 BPF_ALU64_REG(BPF_ADD, R0, R6),
1798 BPF_ALU64_REG(BPF_ADD, R0, R7),
1799 BPF_ALU64_REG(BPF_ADD, R0, R8),
1800 BPF_ALU64_REG(BPF_ADD, R0, R9),
1801 BPF_ALU64_IMM(BPF_ADD, R0, 0xfefe),
1802 BPF_EXIT_INSN(),
1803 },
1804 INTERNAL,
1805 { },
1806 { { 0, 0xfefe } }
1807 },
1688 { 1808 {
1689 "INT: ALU MIX", 1809 "INT: ALU MIX",
1690 .u.insns_int = { 1810 .u.insns_int = {