diff options
| author | Dan Williams <dan.j.williams@intel.com> | 2019-03-11 15:37:55 -0400 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2019-03-11 15:37:55 -0400 |
| commit | 4083014e32699af04a8e6eaa4855b08dba36a47a (patch) | |
| tree | fa37f9f9691fe64ca8a3c0cdc0315dc12462e6e4 /kernel/cpu.c | |
| parent | 6fd96ff557963de8e62842a0dc360a6e3610d2bb (diff) | |
| parent | 78153dd45e7e0596ba32b15d02bda08e1513111e (diff) | |
Merge branch 'for-5.1/nfit/ars' into libnvdimm-for-next
Merge several updates to the ARS implementation. Highlights include:
* Support retrieval of short-ARS results if the ARS state is "requires
continuation", and even if the "no_init_ars" module parameter is
specified.
* Allow busy-polling of the kernel ARS state by allowing root to reset
the exponential back-off timer.
* Filter potentially stale ARS results by tracking query-ARS relative to
the previous start-ARS.
Diffstat (limited to 'kernel/cpu.c')
| -rw-r--r-- | kernel/cpu.c | 38 |
1 files changed, 5 insertions, 33 deletions
diff --git a/kernel/cpu.c b/kernel/cpu.c index 91d5c38eb7e5..d1c6d152da89 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c | |||
| @@ -376,9 +376,6 @@ void __weak arch_smt_update(void) { } | |||
| 376 | 376 | ||
| 377 | #ifdef CONFIG_HOTPLUG_SMT | 377 | #ifdef CONFIG_HOTPLUG_SMT |
| 378 | enum cpuhp_smt_control cpu_smt_control __read_mostly = CPU_SMT_ENABLED; | 378 | enum cpuhp_smt_control cpu_smt_control __read_mostly = CPU_SMT_ENABLED; |
| 379 | EXPORT_SYMBOL_GPL(cpu_smt_control); | ||
| 380 | |||
| 381 | static bool cpu_smt_available __read_mostly; | ||
| 382 | 379 | ||
| 383 | void __init cpu_smt_disable(bool force) | 380 | void __init cpu_smt_disable(bool force) |
| 384 | { | 381 | { |
| @@ -397,25 +394,11 @@ void __init cpu_smt_disable(bool force) | |||
| 397 | 394 | ||
| 398 | /* | 395 | /* |
| 399 | * The decision whether SMT is supported can only be done after the full | 396 | * The decision whether SMT is supported can only be done after the full |
| 400 | * CPU identification. Called from architecture code before non boot CPUs | 397 | * CPU identification. Called from architecture code. |
| 401 | * are brought up. | ||
| 402 | */ | ||
| 403 | void __init cpu_smt_check_topology_early(void) | ||
| 404 | { | ||
| 405 | if (!topology_smt_supported()) | ||
| 406 | cpu_smt_control = CPU_SMT_NOT_SUPPORTED; | ||
| 407 | } | ||
| 408 | |||
| 409 | /* | ||
| 410 | * If SMT was disabled by BIOS, detect it here, after the CPUs have been | ||
| 411 | * brought online. This ensures the smt/l1tf sysfs entries are consistent | ||
| 412 | * with reality. cpu_smt_available is set to true during the bringup of non | ||
| 413 | * boot CPUs when a SMT sibling is detected. Note, this may overwrite | ||
| 414 | * cpu_smt_control's previous setting. | ||
| 415 | */ | 398 | */ |
| 416 | void __init cpu_smt_check_topology(void) | 399 | void __init cpu_smt_check_topology(void) |
| 417 | { | 400 | { |
| 418 | if (!cpu_smt_available) | 401 | if (!topology_smt_supported()) |
| 419 | cpu_smt_control = CPU_SMT_NOT_SUPPORTED; | 402 | cpu_smt_control = CPU_SMT_NOT_SUPPORTED; |
| 420 | } | 403 | } |
| 421 | 404 | ||
| @@ -428,18 +411,10 @@ early_param("nosmt", smt_cmdline_disable); | |||
| 428 | 411 | ||
| 429 | static inline bool cpu_smt_allowed(unsigned int cpu) | 412 | static inline bool cpu_smt_allowed(unsigned int cpu) |
| 430 | { | 413 | { |
| 431 | if (topology_is_primary_thread(cpu)) | 414 | if (cpu_smt_control == CPU_SMT_ENABLED) |
| 432 | return true; | 415 | return true; |
| 433 | 416 | ||
| 434 | /* | 417 | if (topology_is_primary_thread(cpu)) |
| 435 | * If the CPU is not a 'primary' thread and the booted_once bit is | ||
| 436 | * set then the processor has SMT support. Store this information | ||
| 437 | * for the late check of SMT support in cpu_smt_check_topology(). | ||
| 438 | */ | ||
| 439 | if (per_cpu(cpuhp_state, cpu).booted_once) | ||
| 440 | cpu_smt_available = true; | ||
| 441 | |||
| 442 | if (cpu_smt_control == CPU_SMT_ENABLED) | ||
| 443 | return true; | 418 | return true; |
| 444 | 419 | ||
| 445 | /* | 420 | /* |
| @@ -2090,10 +2065,8 @@ static int cpuhp_smt_disable(enum cpuhp_smt_control ctrlval) | |||
| 2090 | */ | 2065 | */ |
| 2091 | cpuhp_offline_cpu_device(cpu); | 2066 | cpuhp_offline_cpu_device(cpu); |
| 2092 | } | 2067 | } |
| 2093 | if (!ret) { | 2068 | if (!ret) |
| 2094 | cpu_smt_control = ctrlval; | 2069 | cpu_smt_control = ctrlval; |
| 2095 | arch_smt_update(); | ||
| 2096 | } | ||
| 2097 | cpu_maps_update_done(); | 2070 | cpu_maps_update_done(); |
| 2098 | return ret; | 2071 | return ret; |
| 2099 | } | 2072 | } |
| @@ -2104,7 +2077,6 @@ static int cpuhp_smt_enable(void) | |||
| 2104 | 2077 | ||
| 2105 | cpu_maps_update_begin(); | 2078 | cpu_maps_update_begin(); |
| 2106 | cpu_smt_control = CPU_SMT_ENABLED; | 2079 | cpu_smt_control = CPU_SMT_ENABLED; |
| 2107 | arch_smt_update(); | ||
| 2108 | for_each_present_cpu(cpu) { | 2080 | for_each_present_cpu(cpu) { |
| 2109 | /* Skip online CPUs and CPUs on offline nodes */ | 2081 | /* Skip online CPUs and CPUs on offline nodes */ |
| 2110 | if (cpu_online(cpu) || !node_online(cpu_to_node(cpu))) | 2082 | if (cpu_online(cpu) || !node_online(cpu_to_node(cpu))) |
