Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "A number of new drivers get added this time, along with many
  low-priority bugfixes. The most interesting changes by subsystem are:

  bus drivers:
   - Updates to the Broadcom bus interface driver to support newer SoC
     types
   - The TI OMAP sysc driver now supports updated DT bindings

  memory controllers:
   - A new driver for Tegra186 gets added
   - A new driver for the ti-emif sram, to allow relocating
     suspend/resume handlers there

  SoC specific:
   - A new driver for Qualcomm QMI, the interface to the modem on MSM
     SoCs
   - A new driver for power domains on the actions S700 SoC
   - A driver for the Xilinx Zynq VCU logicoreIP

  reset controllers:
   - A new driver for Amlogic Meson-AGX
   - various bug fixes

  tee subsystem:
   - A new user interface got added to enable asynchronous communication
     with the TEE supplicant.
   - A new method of using user space memory for communication with the
     TEE is added"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits)
  of: platform: fix OF node refcount leak
  soc: fsl: guts: Add a NULL check for devm_kasprintf()
  bus: ti-sysc: Fix smartreflex sysc mask
  psci: add CPU_IDLE dependency
  soc: xilinx: Fix Kconfig alignment
  soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv
  soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
  soc: bcm: brcmstb: Be multi-platform compatible
  soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
  Revert "soc: brcmstb: Only register SoC device on STB platforms"
  bus: omap: add MODULE_LICENSE tags
  soc: brcmstb: Only register SoC device on STB platforms
  tee: shm: Potential NULL dereference calling tee_shm_register()
  soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
  dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
  soc: xilinx: Create folder structure for soc specific drivers
  of: platform: populate /firmware/ node from of_platform_default_populate_init()
  soc: samsung: Add SPDX license identifiers
  soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
  tee: shm: don't put_page on null shm->pages
  ...

10 files changed, 808 insertions, 43 deletions

diff --git a/include/dt-bindings/reset/amlogic,meson-axg-reset.h b/include/dt-bindings/reset/amlogic,meson-axg-reset.h
new file mode 100644
index 000000000000..ad6f55dabd6d
--- /dev/null
+++ b/include/dt-bindings/reset/amlogic,meson-axg-reset.h
@@ -0,0 +1,124 @@
+/*
+ *
+ * Copyright (c) 2016 BayLibre, SAS.
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * Copyright (c) 2017 Amlogic, inc.
+ * Author: Yixun Lan <yixun.lan@amlogic.com>
+ *
+ * SPDX-License-Identifier: (GPL-2.0+ OR BSD)
+ */
+
+#ifndef _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
+#define _DT_BINDINGS_AMLOGIC_MESON_AXG_RESET_H
+
+/*      RESET0                                  */
+#define RESET_HIU                       0
+#define RESET_PCIE_A                    1
+#define RESET_PCIE_B                    2
+#define RESET_DDR_TOP                   3
+/*                                      4       */
+#define RESET_VIU                       5
+#define RESET_PCIE_PHY                  6
+#define RESET_PCIE_APB                  7
+/*                                      8       */
+/*                                      9       */
+#define RESET_VENC                      10
+#define RESET_ASSIST                    11
+/*                                      12      */
+#define RESET_VCBUS                     13
+/*                                      14      */
+/*                                      15      */
+#define RESET_GIC                       16
+#define RESET_CAPB3_DECODE              17
+/*                                      18-21   */
+#define RESET_SYS_CPU_CAPB3             22
+#define RESET_CBUS_CAPB3                23
+#define RESET_AHB_CNTL                  24
+#define RESET_AHB_DATA                  25
+#define RESET_VCBUS_CLK81               26
+#define RESET_MMC                       27
+/*                                      28-31   */
+/*      RESET1                                  */
+/*                                      32      */
+/*                                      33      */
+#define RESET_USB_OTG                   34
+#define RESET_DDR                       35
+#define RESET_AO_RESET                  36
+/*                                      37      */
+#define RESET_AHB_SRAM                  38
+/*                                      39      */
+/*                                      40      */
+#define RESET_DMA                       41
+#define RESET_ISA                       42
+#define RESET_ETHERNET                  43
+/*                                      44      */
+#define RESET_SD_EMMC_B                 45
+#define RESET_SD_EMMC_C                 46
+#define RESET_ROM_BOOT                  47
+#define RESET_SYS_CPU_0                 48
+#define RESET_SYS_CPU_1                 49
+#define RESET_SYS_CPU_2                 50
+#define RESET_SYS_CPU_3                 51
+#define RESET_SYS_CPU_CORE_0            52
+#define RESET_SYS_CPU_CORE_1            53
+#define RESET_SYS_CPU_CORE_2            54
+#define RESET_SYS_CPU_CORE_3            55
+#define RESET_SYS_PLL_DIV               56
+#define RESET_SYS_CPU_AXI               57
+#define RESET_SYS_CPU_L2                58
+#define RESET_SYS_CPU_P                 59
+#define RESET_SYS_CPU_MBIST             60
+/*                                      61-63   */
+/*      RESET2                                  */
+/*                                      64      */
+/*                                      65      */
+#define RESET_AUDIO                     66
+/*                                      67      */
+#define RESET_MIPI_HOST                 68
+#define RESET_AUDIO_LOCKER              69
+#define RESET_GE2D                      70
+/*                                      71-76   */
+#define RESET_AO_CPU_RESET              77
+/*                                      78-95   */
+/*      RESET3                                  */
+#define RESET_RING_OSCILLATOR           96
+/*                                      97-127  */
+/*      RESET4                                  */
+/*                                      128     */
+/*                                      129     */
+#define RESET_MIPI_PHY                  130
+/*                                      131-140 */
+#define RESET_VENCL                     141
+#define RESET_I2C_MASTER_2              142
+#define RESET_I2C_MASTER_1              143
+/*                                      144-159 */
+/*      RESET5                                  */
+/*                                      160-191 */
+/*      RESET6                                  */
+#define RESET_PERIPHS_GENERAL           192
+#define RESET_PERIPHS_SPICC             193
+/*                                      194     */
+/*                                      195     */
+#define RESET_PERIPHS_I2C_MASTER_0      196
+/*                                      197-200 */
+#define RESET_PERIPHS_UART_0            201
+#define RESET_PERIPHS_UART_1            202
+/*                                      203-204 */
+#define RESET_PERIPHS_SPI_0             205
+#define RESET_PERIPHS_I2C_MASTER_3      206
+/*                                      207-223 */
+/*      RESET7                                  */
+#define RESET_USB_DDR_0                 224
+#define RESET_USB_DDR_1                 225
+#define RESET_USB_DDR_2                 226
+#define RESET_USB_DDR_3                 227
+/*                                      228     */
+#define RESET_DEVICE_MMC_ARB            229
+/*                                      230     */
+#define RESET_VID_LOCK                  231
+#define RESET_A9_DMC_PIPEL              232
+#define RESET_DMC_VPU_PIPEL             233
+/*                                      234-255 */
+
+#endif
diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h
new file mode 100644
index 000000000000..1be356330b96
--- /dev/null
+++ b/include/linux/platform_data/ti-sysc.h
@@ -0,0 +1,86 @@
+#ifndef __TI_SYSC_DATA_H__
+#define __TI_SYSC_DATA_H__
+
+enum ti_sysc_module_type {
+        TI_SYSC_OMAP2,
+        TI_SYSC_OMAP2_TIMER,
+        TI_SYSC_OMAP3_SHAM,
+        TI_SYSC_OMAP3_AES,
+        TI_SYSC_OMAP4,
+        TI_SYSC_OMAP4_TIMER,
+        TI_SYSC_OMAP4_SIMPLE,
+        TI_SYSC_OMAP34XX_SR,
+        TI_SYSC_OMAP36XX_SR,
+        TI_SYSC_OMAP4_SR,
+        TI_SYSC_OMAP4_MCASP,
+        TI_SYSC_OMAP4_USB_HOST_FS,
+};
+
+/**
+ * struct sysc_regbits - TI OCP_SYSCONFIG register field offsets
+ * @midle_shift: Offset of the midle bit
+ * @clkact_shift: Offset of the clockactivity bit
+ * @sidle_shift: Offset of the sidle bit
+ * @enwkup_shift: Offset of the enawakeup bit
+ * @srst_shift: Offset of the softreset bit
+ * @autoidle_shift: Offset of the autoidle bit
+ * @dmadisable_shift: Offset of the dmadisable bit
+ * @emufree_shift; Offset of the emufree bit
+ *
+ * Note that 0 is a valid shift, and for ti-sysc.c -ENODEV can be used if a
+ * feature is not available.
+ */
+struct sysc_regbits {
+        s8 midle_shift;
+        s8 clkact_shift;
+        s8 sidle_shift;
+        s8 enwkup_shift;
+        s8 srst_shift;
+        s8 autoidle_shift;
+        s8 dmadisable_shift;
+        s8 emufree_shift;
+};
+
+#define SYSC_QUIRK_RESET_STATUS         BIT(7)
+#define SYSC_QUIRK_NO_IDLE_ON_INIT      BIT(6)
+#define SYSC_QUIRK_NO_RESET_ON_INIT     BIT(5)
+#define SYSC_QUIRK_OPT_CLKS_NEEDED      BIT(4)
+#define SYSC_QUIRK_OPT_CLKS_IN_RESET    BIT(3)
+#define SYSC_QUIRK_16BIT                BIT(2)
+#define SYSC_QUIRK_UNCACHED             BIT(1)
+#define SYSC_QUIRK_USE_CLOCKACT         BIT(0)
+
+#define SYSC_NR_IDLEMODES               4
+
+/**
+ * struct sysc_capabilities - capabilities for an interconnect target module
+ *
+ * @sysc_mask: bitmask of supported SYSCONFIG register bits
+ * @regbits: bitmask of SYSCONFIG register bits
+ * @mod_quirks: bitmask of module specific quirks
+ */
+struct sysc_capabilities {
+        const enum ti_sysc_module_type type;
+        const u32 sysc_mask;
+        const struct sysc_regbits *regbits;
+        const u32 mod_quirks;
+};
+
+/**
+ * struct sysc_config - configuration for an interconnect target module
+ * @sysc_val: configured value for sysc register
+ * @midlemodes: bitmask of supported master idle modes
+ * @sidlemodes: bitmask of supported master idle modes
+ * @srst_udelay: optional delay needed after OCP soft reset
+ * @quirks: bitmask of enabled quirks
+ */
+struct sysc_config {
+        u32 sysc_val;
+        u32 syss_mask;
+        u8 midlemodes;
+        u8 sidlemodes;
+        u8 srst_udelay;
+        u32 quirks;
+};
+
+#endif  /* __TI_SYSC_DATA_H__ */
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 1fd27d68926b..b401b962afff 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -13,6 +13,9 @@
 #ifndef __QCOM_SCM_H
 #define __QCOM_SCM_H
 
+#include <linux/types.h>
+#include <linux/cpumask.h>
+
 #define QCOM_SCM_VERSION(major, minor)  (((major) << 16) | ((minor) & 0xFF))
 #define QCOM_SCM_CPU_PWR_DOWN_L2_ON     0x0
 #define QCOM_SCM_CPU_PWR_DOWN_L2_OFF    0x1
diff --git a/include/linux/reset.h b/include/linux/reset.h
index 4c7871ddf3c6..09732c36f351 100644
--- a/include/linux/reset.h
+++ b/include/linux/reset.h
@@ -2,8 +2,10 @@
 #ifndef _LINUX_RESET_H_
 #define _LINUX_RESET_H_
 
-#include <linux/device.h>
+#include <linux/types.h>
 
+struct device;
+struct device_node;
 struct reset_control;
 
 #ifdef CONFIG_RESET_CONTROLLER
@@ -20,22 +22,16 @@ struct reset_control *__reset_control_get(struct device *dev, const char *id,
                                           int index, bool shared,
                                           bool optional);
 void reset_control_put(struct reset_control *rstc);
+int __device_reset(struct device *dev, bool optional);
 struct reset_control *__devm_reset_control_get(struct device *dev,
                                      const char *id, int index, bool shared,
                                      bool optional);
 
-int __must_check device_reset(struct device *dev);
-
 struct reset_control *devm_reset_control_array_get(struct device *dev,
                                                    bool shared, bool optional);
 struct reset_control *of_reset_control_array_get(struct device_node *np,
                                                  bool shared, bool optional);
 
-static inline int device_reset_optional(struct device *dev)
-{
-        return device_reset(dev);
-}
-
 #else
 
 static inline int reset_control_reset(struct reset_control *rstc)
@@ -62,15 +58,9 @@ static inline void reset_control_put(struct reset_control *rstc)
 {
 }
 
-static inline int __must_check device_reset(struct device *dev)
-{
-        WARN_ON(1);
-        return -ENOTSUPP;
-}
-
-static inline int device_reset_optional(struct device *dev)
+static inline int __device_reset(struct device *dev, bool optional)
 {
-        return -ENOTSUPP;
+        return optional ? 0 : -ENOTSUPP;
 }
 
 static inline struct reset_control *__of_reset_control_get(
@@ -109,6 +99,16 @@ of_reset_control_array_get(struct device_node *np, bool shared, bool optional)
 
 #endif /* CONFIG_RESET_CONTROLLER */
 
+static inline int __must_check device_reset(struct device *dev)
+{
+        return __device_reset(dev, false);
+}
+
+static inline int device_reset_optional(struct device *dev)
+{
+        return __device_reset(dev, true);
+}
+
 /**
  * reset_control_get_exclusive - Lookup and obtain an exclusive reference
  *                               to a reset controller.
@@ -127,9 +127,6 @@ of_reset_control_array_get(struct device_node *np, bool shared, bool optional)
 static inline struct reset_control *
 __must_check reset_control_get_exclusive(struct device *dev, const char *id)
 {
-#ifndef CONFIG_RESET_CONTROLLER
-        WARN_ON(1);
-#endif
         return __reset_control_get(dev, id, 0, false, false);
 }
 
@@ -275,9 +272,6 @@ static inline struct reset_control *
 __must_check devm_reset_control_get_exclusive(struct device *dev,
                                               const char *id)
 {
-#ifndef CONFIG_RESET_CONTROLLER
-        WARN_ON(1);
-#endif
         return __devm_reset_control_get(dev, id, 0, false, false);
 }
 
@@ -350,18 +344,6 @@ devm_reset_control_get_shared_by_index(struct device *dev, int index)
  * These inline function calls will be removed once all consumers
  * have been moved over to the new explicit API.
  */
-static inline struct reset_control *reset_control_get(
-                                struct device *dev, const char *id)
-{
-        return reset_control_get_exclusive(dev, id);
-}
-
-static inline struct reset_control *reset_control_get_optional(
-                                        struct device *dev, const char *id)
-{
-        return reset_control_get_optional_exclusive(dev, id);
-}
-
 static inline struct reset_control *of_reset_control_get(
                                 struct device_node *node, const char *id)
 {
diff --git a/include/linux/soc/brcmstb/brcmstb.h b/include/linux/soc/brcmstb/brcmstb.h
index 12e548938bbb..8e884e0dda0a 100644
--- a/include/linux/soc/brcmstb/brcmstb.h
+++ b/include/linux/soc/brcmstb/brcmstb.h
@@ -13,12 +13,6 @@ static inline u32 BRCM_REV(u32 reg)
 }
 
 /*
- * Bus Interface Unit control register setup, must happen early during boot,
- * before SMP is brought up, called by machine entry point.
- */
-void brcmstb_biuctrl_init(void);
-
-/*
  * Helper functions for getting family or product id from the
  * SoC driver.
  */
diff --git a/include/linux/soc/qcom/qmi.h b/include/linux/soc/qcom/qmi.h
new file mode 100644
index 000000000000..f4de33654a60
--- /dev/null
+++ b/include/linux/soc/qcom/qmi.h
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017, Linaro Ltd.
+ */
+#ifndef __QMI_HELPERS_H__
+#define __QMI_HELPERS_H__
+
+#include <linux/completion.h>
+#include <linux/idr.h>
+#include <linux/list.h>
+#include <linux/qrtr.h>
+#include <linux/types.h>
+#include <linux/workqueue.h>
+
+struct socket;
+
+/**
+ * qmi_header - wireformat header of QMI messages
+ * @type:       type of message
+ * @txn_id:     transaction id
+ * @msg_id:     message id
+ * @msg_len:    length of message payload following header
+ */
+struct qmi_header {
+        u8 type;
+        u16 txn_id;
+        u16 msg_id;
+        u16 msg_len;
+} __packed;
+
+#define QMI_REQUEST     0
+#define QMI_RESPONSE    2
+#define QMI_INDICATION  4
+
+#define QMI_COMMON_TLV_TYPE 0
+
+enum qmi_elem_type {
+        QMI_EOTI,
+        QMI_OPT_FLAG,
+        QMI_DATA_LEN,
+        QMI_UNSIGNED_1_BYTE,
+        QMI_UNSIGNED_2_BYTE,
+        QMI_UNSIGNED_4_BYTE,
+        QMI_UNSIGNED_8_BYTE,
+        QMI_SIGNED_2_BYTE_ENUM,
+        QMI_SIGNED_4_BYTE_ENUM,
+        QMI_STRUCT,
+        QMI_STRING,
+};
+
+enum qmi_array_type {
+        NO_ARRAY,
+        STATIC_ARRAY,
+        VAR_LEN_ARRAY,
+};
+
+/**
+ * struct qmi_elem_info - describes how to encode a single QMI element
+ * @data_type:  Data type of this element.
+ * @elem_len:   Array length of this element, if an array.
+ * @elem_size:  Size of a single instance of this data type.
+ * @array_type: Array type of this element.
+ * @tlv_type:   QMI message specific type to identify which element
+ *              is present in an incoming message.
+ * @offset:     Specifies the offset of the first instance of this
+ *              element in the data structure.
+ * @ei_array:   Null-terminated array of @qmi_elem_info to describe nested
+ *              structures.
+ */
+struct qmi_elem_info {
+        enum qmi_elem_type data_type;
+        u32 elem_len;
+        u32 elem_size;
+        enum qmi_array_type array_type;
+        u8 tlv_type;
+        u32 offset;
+        struct qmi_elem_info *ei_array;
+};
+
+#define QMI_RESULT_SUCCESS_V01                  0
+#define QMI_RESULT_FAILURE_V01                  1
+
+#define QMI_ERR_NONE_V01                        0
+#define QMI_ERR_MALFORMED_MSG_V01               1
+#define QMI_ERR_NO_MEMORY_V01                   2
+#define QMI_ERR_INTERNAL_V01                    3
+#define QMI_ERR_CLIENT_IDS_EXHAUSTED_V01        5
+#define QMI_ERR_INVALID_ID_V01                  41
+#define QMI_ERR_ENCODING_V01                    58
+#define QMI_ERR_INCOMPATIBLE_STATE_V01          90
+#define QMI_ERR_NOT_SUPPORTED_V01               94
+
+/**
+ * qmi_response_type_v01 - common response header (decoded)
+ * @result:     result of the transaction
+ * @error:      error value, when @result is QMI_RESULT_FAILURE_V01
+ */
+struct qmi_response_type_v01 {
+        u16 result;
+        u16 error;
+};
+
+extern struct qmi_elem_info qmi_response_type_v01_ei[];
+
+/**
+ * struct qmi_service - context to track lookup-results
+ * @service:    service type
+ * @version:    version of the @service
+ * @instance:   instance id of the @service
+ * @node:       node of the service
+ * @port:       port of the service
+ * @priv:       handle for client's use
+ * @list_node:  list_head for house keeping
+ */
+struct qmi_service {
+        unsigned int service;
+        unsigned int version;
+        unsigned int instance;
+
+        unsigned int node;
+        unsigned int port;
+
+        void *priv;
+        struct list_head list_node;
+};
+
+struct qmi_handle;
+
+/**
+ * struct qmi_ops - callbacks for qmi_handle
+ * @new_server:         inform client of a new_server lookup-result, returning
+ *                      successfully from this call causes the library to call
+ *                      @del_server as the service is removed from the
+ *                      lookup-result. @priv of the qmi_service can be used by
+ *                      the client
+ * @del_server:         inform client of a del_server lookup-result
+ * @net_reset:          inform client that the name service was restarted and
+ *                      that and any state needs to be released
+ * @msg_handler:        invoked for incoming messages, allows a client to
+ *                      override the usual QMI message handler
+ * @bye:                inform a client that all clients from a node are gone
+ * @del_client:         inform a client that a particular client is gone
+ */
+struct qmi_ops {
+        int (*new_server)(struct qmi_handle *qmi, struct qmi_service *svc);
+        void (*del_server)(struct qmi_handle *qmi, struct qmi_service *svc);
+        void (*net_reset)(struct qmi_handle *qmi);
+        void (*msg_handler)(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+                            const void *data, size_t count);
+        void (*bye)(struct qmi_handle *qmi, unsigned int node);
+        void (*del_client)(struct qmi_handle *qmi,
+                           unsigned int node, unsigned int port);
+};
+
+/**
+ * struct qmi_txn - transaction context
+ * @qmi:        QMI handle this transaction is associated with
+ * @id:         transaction id
+ * @lock:       for synchronization between handler and waiter of messages
+ * @completion: completion object as the transaction receives a response
+ * @result:     result code for the completed transaction
+ * @ei:         description of the QMI encoded response (optional)
+ * @dest:       destination buffer to decode message into (optional)
+ */
+struct qmi_txn {
+        struct qmi_handle *qmi;
+
+        int id;
+
+        struct mutex lock;
+        struct completion completion;
+        int result;
+
+        struct qmi_elem_info *ei;
+        void *dest;
+};
+
+/**
+ * struct qmi_msg_handler - description of QMI message handler
+ * @type:       type of message
+ * @msg_id:     message id
+ * @ei:         description of the QMI encoded message
+ * @decoded_size:       size of the decoded object
+ * @fn:         function to invoke as the message is decoded
+ */
+struct qmi_msg_handler {
+        unsigned int type;
+        unsigned int msg_id;
+
+        struct qmi_elem_info *ei;
+
+        size_t decoded_size;
+        void (*fn)(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+                   struct qmi_txn *txn, const void *decoded);
+};
+
+/**
+ * struct qmi_handle - QMI context
+ * @sock:       socket handle
+ * @sock_lock:  synchronization of @sock modifications
+ * @sq:         sockaddr of @sock
+ * @work:       work for handling incoming messages
+ * @wq:         workqueue to post @work on
+ * @recv_buf:   scratch buffer for handling incoming messages
+ * @recv_buf_size:      size of @recv_buf
+ * @lookups:            list of registered lookup requests
+ * @lookup_results:     list of lookup-results advertised to the client
+ * @services:           list of registered services (by this client)
+ * @ops:        reference to callbacks
+ * @txns:       outstanding transactions
+ * @txn_lock:   lock for modifications of @txns
+ * @handlers:   list of handlers for incoming messages
+ */
+struct qmi_handle {
+        struct socket *sock;
+        struct mutex sock_lock;
+
+        struct sockaddr_qrtr sq;
+
+        struct work_struct work;
+        struct workqueue_struct *wq;
+
+        void *recv_buf;
+        size_t recv_buf_size;
+
+        struct list_head lookups;
+        struct list_head lookup_results;
+        struct list_head services;
+
+        struct qmi_ops ops;
+
+        struct idr txns;
+        struct mutex txn_lock;
+
+        const struct qmi_msg_handler *handlers;
+};
+
+int qmi_add_lookup(struct qmi_handle *qmi, unsigned int service,
+                   unsigned int version, unsigned int instance);
+int qmi_add_server(struct qmi_handle *qmi, unsigned int service,
+                   unsigned int version, unsigned int instance);
+
+int qmi_handle_init(struct qmi_handle *qmi, size_t max_msg_len,
+                    const struct qmi_ops *ops,
+                    const struct qmi_msg_handler *handlers);
+void qmi_handle_release(struct qmi_handle *qmi);
+
+ssize_t qmi_send_request(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+                         struct qmi_txn *txn, int msg_id, size_t len,
+                         struct qmi_elem_info *ei, const void *c_struct);
+ssize_t qmi_send_response(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+                          struct qmi_txn *txn, int msg_id, size_t len,
+                          struct qmi_elem_info *ei, const void *c_struct);
+ssize_t qmi_send_indication(struct qmi_handle *qmi, struct sockaddr_qrtr *sq,
+                            int msg_id, size_t len, struct qmi_elem_info *ei,
+                            const void *c_struct);
+
+void *qmi_encode_message(int type, unsigned int msg_id, size_t *len,
+                         unsigned int txn_id, struct qmi_elem_info *ei,
+                         const void *c_struct);
+
+int qmi_decode_message(const void *buf, size_t len,
+                       struct qmi_elem_info *ei, void *c_struct);
+
+int qmi_txn_init(struct qmi_handle *qmi, struct qmi_txn *txn,
+                 struct qmi_elem_info *ei, void *c_struct);
+int qmi_txn_wait(struct qmi_txn *txn, unsigned long timeout);
+void qmi_txn_cancel(struct qmi_txn *txn);
+
+#endif
diff --git a/include/linux/tee_drv.h b/include/linux/tee_drv.h
index cb889afe576b..a2b3dfcee0b5 100644
--- a/include/linux/tee_drv.h
+++ b/include/linux/tee_drv.h
@@ -17,6 +17,7 @@
 
 #include <linux/types.h>
 #include <linux/idr.h>
+#include <linux/kref.h>
 #include <linux/list.h>
 #include <linux/tee.h>
 
@@ -25,8 +26,12 @@
  * specific TEE driver.
  */
 
-#define TEE_SHM_MAPPED          0x1     /* Memory mapped by the kernel */
-#define TEE_SHM_DMA_BUF         0x2     /* Memory with dma-buf handle */
+#define TEE_SHM_MAPPED          BIT(0)  /* Memory mapped by the kernel */
+#define TEE_SHM_DMA_BUF         BIT(1)  /* Memory with dma-buf handle */
+#define TEE_SHM_EXT_DMA_BUF     BIT(2)  /* Memory with dma-buf handle */
+#define TEE_SHM_REGISTER        BIT(3)  /* Memory registered in secure world */
+#define TEE_SHM_USER_MAPPED     BIT(4)  /* Memory mapped in user space */
+#define TEE_SHM_POOL            BIT(5)  /* Memory allocated from pool */
 
 struct device;
 struct tee_device;
@@ -38,11 +43,17 @@ struct tee_shm_pool;
  * @teedev:     pointer to this drivers struct tee_device
  * @list_shm:   List of shared memory object owned by this context
  * @data:       driver specific context data, managed by the driver
+ * @refcount:   reference counter for this structure
+ * @releasing:  flag that indicates if context is being released right now.
+ *              It is needed to break circular dependency on context during
+ *              shared memory release.
  */
 struct tee_context {
         struct tee_device *teedev;
         struct list_head list_shm;
         void *data;
+        struct kref refcount;
+        bool releasing;
 };
 
 struct tee_param_memref {
@@ -76,6 +87,8 @@ struct tee_param {
  * @cancel_req:         request cancel of an ongoing invoke or open
  * @supp_revc:          called for supplicant to get a command
  * @supp_send:          called for supplicant to send a response
+ * @shm_register:       register shared memory buffer in TEE
+ * @shm_unregister:     unregister shared memory buffer in TEE
  */
 struct tee_driver_ops {
         void (*get_version)(struct tee_device *teedev,
@@ -94,6 +107,10 @@ struct tee_driver_ops {
                          struct tee_param *param);
         int (*supp_send)(struct tee_context *ctx, u32 ret, u32 num_params,
                          struct tee_param *param);
+        int (*shm_register)(struct tee_context *ctx, struct tee_shm *shm,
+                            struct page **pages, size_t num_pages,
+                            unsigned long start);
+        int (*shm_unregister)(struct tee_context *ctx, struct tee_shm *shm);
 };
 
 /**
@@ -150,6 +167,97 @@ int tee_device_register(struct tee_device *teedev);
 void tee_device_unregister(struct tee_device *teedev);
 
 /**
+ * struct tee_shm - shared memory object
+ * @teedev:     device used to allocate the object
+ * @ctx:        context using the object, if NULL the context is gone
+ * @link        link element
+ * @paddr:      physical address of the shared memory
+ * @kaddr:      virtual address of the shared memory
+ * @size:       size of shared memory
+ * @offset:     offset of buffer in user space
+ * @pages:      locked pages from userspace
+ * @num_pages:  number of locked pages
+ * @dmabuf:     dmabuf used to for exporting to user space
+ * @flags:      defined by TEE_SHM_* in tee_drv.h
+ * @id:         unique id of a shared memory object on this device
+ *
+ * This pool is only supposed to be accessed directly from the TEE
+ * subsystem and from drivers that implements their own shm pool manager.
+ */
+struct tee_shm {
+        struct tee_device *teedev;
+        struct tee_context *ctx;
+        struct list_head link;
+        phys_addr_t paddr;
+        void *kaddr;
+        size_t size;
+        unsigned int offset;
+        struct page **pages;
+        size_t num_pages;
+        struct dma_buf *dmabuf;
+        u32 flags;
+        int id;
+};
+
+/**
+ * struct tee_shm_pool_mgr - shared memory manager
+ * @ops:                operations
+ * @private_data:       private data for the shared memory manager
+ */
+struct tee_shm_pool_mgr {
+        const struct tee_shm_pool_mgr_ops *ops;
+        void *private_data;
+};
+
+/**
+ * struct tee_shm_pool_mgr_ops - shared memory pool manager operations
+ * @alloc:              called when allocating shared memory
+ * @free:               called when freeing shared memory
+ * @destroy_poolmgr:    called when destroying the pool manager
+ */
+struct tee_shm_pool_mgr_ops {
+        int (*alloc)(struct tee_shm_pool_mgr *poolmgr, struct tee_shm *shm,
+                     size_t size);
+        void (*free)(struct tee_shm_pool_mgr *poolmgr, struct tee_shm *shm);
+        void (*destroy_poolmgr)(struct tee_shm_pool_mgr *poolmgr);
+};
+
+/**
+ * tee_shm_pool_alloc() - Create a shared memory pool from shm managers
+ * @priv_mgr:   manager for driver private shared memory allocations
+ * @dmabuf_mgr: manager for dma-buf shared memory allocations
+ *
+ * Allocation with the flag TEE_SHM_DMA_BUF set will use the range supplied
+ * in @dmabuf, others will use the range provided by @priv.
+ *
+ * @returns pointer to a 'struct tee_shm_pool' or an ERR_PTR on failure.
+ */
+struct tee_shm_pool *tee_shm_pool_alloc(struct tee_shm_pool_mgr *priv_mgr,
+                                        struct tee_shm_pool_mgr *dmabuf_mgr);
+
+/*
+ * tee_shm_pool_mgr_alloc_res_mem() - Create a shm manager for reserved
+ * memory
+ * @vaddr:      Virtual address of start of pool
+ * @paddr:      Physical address of start of pool
+ * @size:       Size in bytes of the pool
+ *
+ * @returns pointer to a 'struct tee_shm_pool_mgr' or an ERR_PTR on failure.
+ */
+struct tee_shm_pool_mgr *tee_shm_pool_mgr_alloc_res_mem(unsigned long vaddr,
+                                                        phys_addr_t paddr,
+                                                        size_t size,
+                                                        int min_alloc_order);
+
+/**
+ * tee_shm_pool_mgr_destroy() - Free a shared memory manager
+ */
+static inline void tee_shm_pool_mgr_destroy(struct tee_shm_pool_mgr *poolm)
+{
+        poolm->ops->destroy_poolmgr(poolm);
+}
+
+/**
  * struct tee_shm_pool_mem_info - holds information needed to create a shared
  * memory pool
  * @vaddr:      Virtual address of start of pool
@@ -211,6 +319,40 @@ void *tee_get_drvdata(struct tee_device *teedev);
 struct tee_shm *tee_shm_alloc(struct tee_context *ctx, size_t size, u32 flags);
 
 /**
+ * tee_shm_priv_alloc() - Allocate shared memory privately
+ * @dev:        Device that allocates the shared memory
+ * @size:       Requested size of shared memory
+ *
+ * Allocates shared memory buffer that is not associated with any client
+ * context. Such buffers are owned by TEE driver and used for internal calls.
+ *
+ * @returns a pointer to 'struct tee_shm'
+ */
+struct tee_shm *tee_shm_priv_alloc(struct tee_device *teedev, size_t size);
+
+/**
+ * tee_shm_register() - Register shared memory buffer
+ * @ctx:        Context that registers the shared memory
+ * @addr:       Address is userspace of the shared buffer
+ * @length:     Length of the shared buffer
+ * @flags:      Flags setting properties for the requested shared memory.
+ *
+ * @returns a pointer to 'struct tee_shm'
+ */
+struct tee_shm *tee_shm_register(struct tee_context *ctx, unsigned long addr,
+                                 size_t length, u32 flags);
+
+/**
+ * tee_shm_is_registered() - Check if shared memory object in registered in TEE
+ * @shm:        Shared memory handle
+ * @returns true if object is registered in TEE
+ */
+static inline bool tee_shm_is_registered(struct tee_shm *shm)
+{
+        return shm && (shm->flags & TEE_SHM_REGISTER);
+}
+
+/**
  * tee_shm_free() - Free shared memory
  * @shm:        Handle to shared memory to free
  */
@@ -260,11 +402,47 @@ void *tee_shm_get_va(struct tee_shm *shm, size_t offs);
 int tee_shm_get_pa(struct tee_shm *shm, size_t offs, phys_addr_t *pa);
 
 /**
+ * tee_shm_get_size() - Get size of shared memory buffer
+ * @shm:        Shared memory handle
+ * @returns size of shared memory
+ */
+static inline size_t tee_shm_get_size(struct tee_shm *shm)
+{
+        return shm->size;
+}
+
+/**
+ * tee_shm_get_pages() - Get list of pages that hold shared buffer
+ * @shm:        Shared memory handle
+ * @num_pages:  Number of pages will be stored there
+ * @returns pointer to pages array
+ */
+static inline struct page **tee_shm_get_pages(struct tee_shm *shm,
+                                              size_t *num_pages)
+{
+        *num_pages = shm->num_pages;
+        return shm->pages;
+}
+
+/**
+ * tee_shm_get_page_offset() - Get shared buffer offset from page start
+ * @shm:        Shared memory handle
+ * @returns page offset of shared buffer
+ */
+static inline size_t tee_shm_get_page_offset(struct tee_shm *shm)
+{
+        return shm->offset;
+}
+
+/**
  * tee_shm_get_id() - Get id of a shared memory object
  * @shm:        Shared memory handle
  * @returns id
  */
-int tee_shm_get_id(struct tee_shm *shm);
+static inline int tee_shm_get_id(struct tee_shm *shm)
+{
+        return shm->id;
+}
 
 /**
  * tee_shm_get_from_id() - Find shared memory object and increase reference
@@ -275,4 +453,16 @@ int tee_shm_get_id(struct tee_shm *shm);
  */
 struct tee_shm *tee_shm_get_from_id(struct tee_context *ctx, int id);
 
+static inline bool tee_param_is_memref(struct tee_param *param)
+{
+        switch (param->attr & TEE_IOCTL_PARAM_ATTR_TYPE_MASK) {
+        case TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INPUT:
+        case TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT:
+        case TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT:
+                return true;
+        default:
+                return false;
+        }
+}
+
 #endif /*__TEE_DRV_H*/
diff --git a/include/linux/ti-emif-sram.h b/include/linux/ti-emif-sram.h
new file mode 100644
index 000000000000..45bc6b376492
--- /dev/null
+++ b/include/linux/ti-emif-sram.h
@@ -0,0 +1,69 @@
+/*
+ * TI AM33XX EMIF Routines
+ *
+ * Copyright (C) 2016-2017 Texas Instruments Inc.
+ *      Dave Gerlach
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __LINUX_TI_EMIF_H
+#define __LINUX_TI_EMIF_H
+
+#include <linux/kbuild.h>
+#include <linux/types.h>
+#ifndef __ASSEMBLY__
+
+struct emif_regs_amx3 {
+        u32 emif_sdcfg_val;
+        u32 emif_timing1_val;
+        u32 emif_timing2_val;
+        u32 emif_timing3_val;
+        u32 emif_ref_ctrl_val;
+        u32 emif_zqcfg_val;
+        u32 emif_pmcr_val;
+        u32 emif_pmcr_shdw_val;
+        u32 emif_rd_wr_level_ramp_ctrl;
+        u32 emif_rd_wr_exec_thresh;
+        u32 emif_cos_config;
+        u32 emif_priority_to_cos_mapping;
+        u32 emif_connect_id_serv_1_map;
+        u32 emif_connect_id_serv_2_map;
+        u32 emif_ocp_config_val;
+        u32 emif_lpddr2_nvm_tim;
+        u32 emif_lpddr2_nvm_tim_shdw;
+        u32 emif_dll_calib_ctrl_val;
+        u32 emif_dll_calib_ctrl_val_shdw;
+        u32 emif_ddr_phy_ctlr_1;
+        u32 emif_ext_phy_ctrl_vals[120];
+};
+
+struct ti_emif_pm_data {
+        void __iomem *ti_emif_base_addr_virt;
+        phys_addr_t ti_emif_base_addr_phys;
+        unsigned long ti_emif_sram_config;
+        struct emif_regs_amx3 *regs_virt;
+        phys_addr_t regs_phys;
+} __packed __aligned(8);
+
+struct ti_emif_pm_functions {
+        u32 save_context;
+        u32 restore_context;
+        u32 enter_sr;
+        u32 exit_sr;
+        u32 abort_sr;
+} __packed __aligned(8);
+
+struct gen_pool;
+
+int ti_emif_copy_pm_function_table(struct gen_pool *sram_pool, void *dst);
+int ti_emif_get_mem_type(void);
+
+#endif
+#endif /* __LINUX_TI_EMIF_H */
diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h
index 44202ff897fd..233bae954970 100644
--- a/include/soc/tegra/mc.h
+++ b/include/soc/tegra/mc.h
@@ -51,6 +51,12 @@ struct tegra_smmu_swgroup {
         unsigned int reg;
 };
 
+struct tegra_smmu_group_soc {
+        const char *name;
+        const unsigned int *swgroups;
+        unsigned int num_swgroups;
+};
+
 struct tegra_smmu_soc {
         const struct tegra_mc_client *clients;
         unsigned int num_clients;
@@ -58,6 +64,9 @@ struct tegra_smmu_soc {
         const struct tegra_smmu_swgroup *swgroups;
         unsigned int num_swgroups;
 
+        const struct tegra_smmu_group_soc *groups;
+        unsigned int num_groups;
+
         bool supports_round_robin_arbitration;
         bool supports_request_limit;
 
diff --git a/include/uapi/linux/tee.h b/include/uapi/linux/tee.h
index 688782e90140..4b9eb064d7e7 100644
--- a/include/uapi/linux/tee.h
+++ b/include/uapi/linux/tee.h
@@ -50,6 +50,7 @@
 
 #define TEE_GEN_CAP_GP          (1 << 0)/* GlobalPlatform compliant TEE */
 #define TEE_GEN_CAP_PRIVILEGED  (1 << 1)/* Privileged device (for supplicant) */
+#define TEE_GEN_CAP_REG_MEM     (1 << 2)/* Supports registering shared memory */
 
 /*
  * TEE Implementation ID
@@ -154,6 +155,13 @@ struct tee_ioctl_buf_data {
  */
 #define TEE_IOCTL_PARAM_ATTR_TYPE_MASK          0xff
 
+/* Meta parameter carrying extra information about the message. */
+#define TEE_IOCTL_PARAM_ATTR_META               0x100
+
+/* Mask of all known attr bits */
+#define TEE_IOCTL_PARAM_ATTR_MASK \
+        (TEE_IOCTL_PARAM_ATTR_TYPE_MASK | TEE_IOCTL_PARAM_ATTR_META)
+
 /*
  * Matches TEEC_LOGIN_* in GP TEE Client API
  * Are only defined for GP compliant TEEs
@@ -332,6 +340,35 @@ struct tee_iocl_supp_send_arg {
 #define TEE_IOC_SUPPL_SEND      _IOR(TEE_IOC_MAGIC, TEE_IOC_BASE + 7, \
                                      struct tee_ioctl_buf_data)
 
+/**
+ * struct tee_ioctl_shm_register_data - Shared memory register argument
+ * @addr:      [in] Start address of shared memory to register
+ * @length:    [in/out] Length of shared memory to register
+ * @flags:     [in/out] Flags to/from registration.
+ * @id:                [out] Identifier of the shared memory
+ *
+ * The flags field should currently be zero as input. Updated by the call
+ * with actual flags as defined by TEE_IOCTL_SHM_* above.
+ * This structure is used as argument for TEE_IOC_SHM_REGISTER below.
+ */
+struct tee_ioctl_shm_register_data {
+        __u64 addr;
+        __u64 length;
+        __u32 flags;
+        __s32 id;
+};
+
+/**
+ * TEE_IOC_SHM_REGISTER - Register shared memory argument
+ *
+ * Registers shared memory between the user space process and secure OS.
+ *
+ * Returns a file descriptor on success or < 0 on failure
+ *
+ * The shared memory is unregisterred when the descriptor is closed.
+ */
+#define TEE_IOC_SHM_REGISTER   _IOWR(TEE_IOC_MAGIC, TEE_IOC_BASE + 9, \
+                                     struct tee_ioctl_shm_register_data)
 /*
  * Five syscalls are used when communicating with the TEE driver.
  * open(): opens the device associated with the driver