Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6

Pull crypto updates from Herbert Xu:
 "Here is the crypto update for 4.12:

  API:
   - Add batch registration for acomp/scomp
   - Change acomp testing to non-unique compressed result
   - Extend algorithm name limit to 128 bytes
   - Require setkey before accept(2) in algif_aead

  Algorithms:
   - Add support for deflate rfc1950 (zlib)

  Drivers:
   - Add accelerated crct10dif for powerpc
   - Add crc32 in stm32
   - Add sha384/sha512 in ccp
   - Add 3des/gcm(aes) for v5 devices in ccp
   - Add Queue Interface (QI) backend support in caam
   - Add new Exynos RNG driver
   - Add ThunderX ZIP driver
   - Add driver for hardware random generator on MT7623 SoC"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (101 commits)
  crypto: stm32 - Fix OF module alias information
  crypto: algif_aead - Require setkey before accept(2)
  crypto: scomp - add support for deflate rfc1950 (zlib)
  crypto: scomp - allow registration of multiple scomps
  crypto: ccp - Change ISR handler method for a v5 CCP
  crypto: ccp - Change ISR handler method for a v3 CCP
  crypto: crypto4xx - rename ce_ring_contol to ce_ring_control
  crypto: testmgr - Allow ecb(cipher_null) in FIPS mode
  Revert "crypto: arm64/sha - Add constant operand modifier to ASM_EXPORT"
  crypto: ccp - Disable interrupts early on unload
  crypto: ccp - Use only the relevant interrupt bits
  hwrng: mtk - Add driver for hardware random generator on MT7623 SoC
  dt-bindings: hwrng: Add Mediatek hardware random generator bindings
  crypto: crct10dif-vpmsum - Fix missing preempt_disable()
  crypto: testmgr - replace compression known answer test
  crypto: acomp - allow registration of multiple acomps
  hwrng: n2 - Use devm_kcalloc() in n2rng_probe()
  crypto: chcr - Fix error handling related to 'chcr_alloc_shash'
  padata: get_next is never NULL
  crypto: exynos - Add new Exynos RNG driver
  ...

13 files changed, 266 insertions, 35 deletions

diff --git a/include/crypto/gf128mul.h b/include/crypto/gf128mul.h
index 592d47e565a8..0977fb18ff68 100644
--- a/include/crypto/gf128mul.h
+++ b/include/crypto/gf128mul.h
@@ -43,12 +43,13 @@
  ---------------------------------------------------------------------------
  Issue Date: 31/01/2006
 
- An implementation of field multiplication in Galois Field GF(128)
+ An implementation of field multiplication in Galois Field GF(2^128)
 */
 
 #ifndef _CRYPTO_GF128MUL_H
 #define _CRYPTO_GF128MUL_H
 
+#include <asm/byteorder.h>
 #include <crypto/b128ops.h>
 #include <linux/slab.h>
 
@@ -65,7 +66,7 @@
  * are left and the lsb's are right. char b[16] is an array and b[0] is
  * the first octet.
  *
- * 80000000 00000000 00000000 00000000 .... 00000000 00000000 00000000
+ * 10000000 00000000 00000000 00000000 .... 00000000 00000000 00000000
  *   b[0]     b[1]     b[2]     b[3]          b[13]    b[14]    b[15]
  *
  * Every bit is a coefficient of some power of X. We can store the bits
@@ -85,15 +86,17 @@
  * Both of the above formats are easy to implement on big-endian
  * machines.
  *
- * EME (which is patent encumbered) uses the ble format (bits are stored
- * in big endian order and the bytes in little endian). The above buffer
- * represents X^7 in this case and the primitive polynomial is b[0] = 0x87.
+ * XTS and EME (the latter of which is patent encumbered) use the ble
+ * format (bits are stored in big endian order and the bytes in little
+ * endian). The above buffer represents X^7 in this case and the
+ * primitive polynomial is b[0] = 0x87.
  *
  * The common machine word-size is smaller than 128 bits, so to make
  * an efficient implementation we must split into machine word sizes.
- * This file uses one 32bit for the moment. Machine endianness comes into
- * play. The lle format in relation to machine endianness is discussed
- * below by the original author of gf128mul Dr Brian Gladman.
+ * This implementation uses 64-bit words for the moment. Machine
+ * endianness comes into play. The lle format in relation to machine
+ * endianness is discussed below by the original author of gf128mul Dr
+ * Brian Gladman.
  *
  * Let's look at the bbe and ble format on a little endian machine.
  *
@@ -127,10 +130,10 @@
  * machines this will automatically aligned to wordsize and on a 64-bit
  * machine also.
  */
-/*      Multiply a GF128 field element by x. Field elements are held in arrays
-    of bytes in which field bits 8n..8n + 7 are held in byte[n], with lower
-    indexed bits placed in the more numerically significant bit positions
-    within bytes.
+/*      Multiply a GF(2^128) field element by x. Field elements are
+    held in arrays of bytes in which field bits 8n..8n + 7 are held in
+    byte[n], with lower indexed bits placed in the more numerically
+    significant bit positions within bytes.
 
     On little endian machines the bit indexes translate into the bit
     positions within four 32-bit words in the following way
@@ -161,8 +164,58 @@ void gf128mul_lle(be128 *a, const be128 *b);
 
 void gf128mul_bbe(be128 *a, const be128 *b);
 
-/* multiply by x in ble format, needed by XTS */
-void gf128mul_x_ble(be128 *a, const be128 *b);
+/*
+ * The following functions multiply a field element by x in
+ * the polynomial field representation.  They use 64-bit word operations
+ * to gain speed but compensate for machine endianness and hence work
+ * correctly on both styles of machine.
+ *
+ * They are defined here for performance.
+ */
+
+static inline u64 gf128mul_mask_from_bit(u64 x, int which)
+{
+        /* a constant-time version of 'x & ((u64)1 << which) ? (u64)-1 : 0' */
+        return ((s64)(x << (63 - which)) >> 63);
+}
+
+static inline void gf128mul_x_lle(be128 *r, const be128 *x)
+{
+        u64 a = be64_to_cpu(x->a);
+        u64 b = be64_to_cpu(x->b);
+
+        /* equivalent to gf128mul_table_le[(b << 7) & 0xff] << 48
+         * (see crypto/gf128mul.c): */
+        u64 _tt = gf128mul_mask_from_bit(b, 0) & ((u64)0xe1 << 56);
+
+        r->b = cpu_to_be64((b >> 1) | (a << 63));
+        r->a = cpu_to_be64((a >> 1) ^ _tt);
+}
+
+static inline void gf128mul_x_bbe(be128 *r, const be128 *x)
+{
+        u64 a = be64_to_cpu(x->a);
+        u64 b = be64_to_cpu(x->b);
+
+        /* equivalent to gf128mul_table_be[a >> 63] (see crypto/gf128mul.c): */
+        u64 _tt = gf128mul_mask_from_bit(a, 63) & 0x87;
+
+        r->a = cpu_to_be64((a << 1) | (b >> 63));
+        r->b = cpu_to_be64((b << 1) ^ _tt);
+}
+
+/* needed by XTS */
+static inline void gf128mul_x_ble(le128 *r, const le128 *x)
+{
+        u64 a = le64_to_cpu(x->a);
+        u64 b = le64_to_cpu(x->b);
+
+        /* equivalent to gf128mul_table_be[b >> 63] (see crypto/gf128mul.c): */
+        u64 _tt = gf128mul_mask_from_bit(a, 63) & 0x87;
+
+        r->a = cpu_to_le64((a << 1) | (b >> 63));
+        r->b = cpu_to_le64((b << 1) ^ _tt);
+}
 
 /* 4k table optimization */
 
@@ -172,8 +225,8 @@ struct gf128mul_4k {
 
 struct gf128mul_4k *gf128mul_init_4k_lle(const be128 *g);
 struct gf128mul_4k *gf128mul_init_4k_bbe(const be128 *g);
-void gf128mul_4k_lle(be128 *a, struct gf128mul_4k *t);
-void gf128mul_4k_bbe(be128 *a, struct gf128mul_4k *t);
+void gf128mul_4k_lle(be128 *a, const struct gf128mul_4k *t);
+void gf128mul_4k_bbe(be128 *a, const struct gf128mul_4k *t);
 
 static inline void gf128mul_free_4k(struct gf128mul_4k *t)
 {
@@ -194,6 +247,6 @@ struct gf128mul_64k {
  */
 struct gf128mul_64k *gf128mul_init_64k_bbe(const be128 *g);
 void gf128mul_free_64k(struct gf128mul_64k *t);
-void gf128mul_64k_bbe(be128 *a, struct gf128mul_64k *t);
+void gf128mul_64k_bbe(be128 *a, const struct gf128mul_64k *t);
 
 #endif /* _CRYPTO_GF128MUL_H */
diff --git a/include/crypto/internal/acompress.h b/include/crypto/internal/acompress.h
index 1de2b5af12d7..51052f65cefc 100644
--- a/include/crypto/internal/acompress.h
+++ b/include/crypto/internal/acompress.h
@@ -78,4 +78,7 @@ int crypto_register_acomp(struct acomp_alg *alg);
  */
 int crypto_unregister_acomp(struct acomp_alg *alg);
 
+int crypto_register_acomps(struct acomp_alg *algs, int count);
+void crypto_unregister_acomps(struct acomp_alg *algs, int count);
+
 #endif
diff --git a/include/crypto/internal/scompress.h b/include/crypto/internal/scompress.h
index 3fda3c5655a0..ccad9b2c9bd6 100644
--- a/include/crypto/internal/scompress.h
+++ b/include/crypto/internal/scompress.h
@@ -133,4 +133,7 @@ int crypto_register_scomp(struct scomp_alg *alg);
  */
 int crypto_unregister_scomp(struct scomp_alg *alg);
 
+int crypto_register_scomps(struct scomp_alg *algs, int count);
+void crypto_unregister_scomps(struct scomp_alg *algs, int count);
+
 #endif
diff --git a/include/crypto/kpp.h b/include/crypto/kpp.h
index 4307a2f2365f..ce8e1f79374b 100644
--- a/include/crypto/kpp.h
+++ b/include/crypto/kpp.h
@@ -74,7 +74,7 @@ struct crypto_kpp {
  * @base:               Common crypto API algorithm data structure
  */
 struct kpp_alg {
-        int (*set_secret)(struct crypto_kpp *tfm, void *buffer,
+        int (*set_secret)(struct crypto_kpp *tfm, const void *buffer,
                           unsigned int len);
         int (*generate_public_key)(struct kpp_request *req);
         int (*compute_shared_secret)(struct kpp_request *req);
@@ -273,8 +273,8 @@ struct kpp_secret {
  *
  * Return: zero on success; error code in case of error
  */
-static inline int crypto_kpp_set_secret(struct crypto_kpp *tfm, void *buffer,
-                                        unsigned int len)
+static inline int crypto_kpp_set_secret(struct crypto_kpp *tfm,
+                                        const void *buffer, unsigned int len)
 {
         struct kpp_alg *alg = crypto_kpp_alg(tfm);
 
diff --git a/include/crypto/xts.h b/include/crypto/xts.h
index 77b630672b2c..c0bde308b28a 100644
--- a/include/crypto/xts.h
+++ b/include/crypto/xts.h
@@ -11,7 +11,7 @@ struct blkcipher_desc;
 #define XTS_BLOCK_SIZE 16
 
 struct xts_crypt_req {
-        be128 *tbuf;
+        le128 *tbuf;
         unsigned int tbuflen;
 
         void *tweak_ctx;
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index 692846c7941b..63f4c2c44a1f 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -12,9 +12,10 @@
 #define CLKID_FCLK_DIV4         6
 #define CLKID_CLK81             12
 #define CLKID_MPLL2             15
-#define CLKID_SPI               34
 #define CLKID_I2C               22
 #define CLKID_SAR_ADC           23
+#define CLKID_RNG0              25
+#define CLKID_SPI               34
 #define CLKID_ETH               36
 #define CLKID_USB0              50
 #define CLKID_USB1              51
diff --git a/include/linux/ccp.h b/include/linux/ccp.h
index c41b8d99dd0e..3285c944194a 100644
--- a/include/linux/ccp.h
+++ b/include/linux/ccp.h
@@ -123,6 +123,10 @@ enum ccp_aes_mode {
         CCP_AES_MODE_CFB,
         CCP_AES_MODE_CTR,
         CCP_AES_MODE_CMAC,
+        CCP_AES_MODE_GHASH,
+        CCP_AES_MODE_GCTR,
+        CCP_AES_MODE_GCM,
+        CCP_AES_MODE_GMAC,
         CCP_AES_MODE__LAST,
 };
 
@@ -137,6 +141,9 @@ enum ccp_aes_action {
         CCP_AES_ACTION_ENCRYPT,
         CCP_AES_ACTION__LAST,
 };
+/* Overloaded field */
+#define CCP_AES_GHASHAAD        CCP_AES_ACTION_DECRYPT
+#define CCP_AES_GHASHFINAL      CCP_AES_ACTION_ENCRYPT
 
 /**
  * struct ccp_aes_engine - CCP AES operation
@@ -181,6 +188,8 @@ struct ccp_aes_engine {
         struct scatterlist *cmac_key;   /* K1/K2 cmac key required for
                                          * final cmac cmd */
         u32 cmac_key_len;       /* In bytes */
+
+        u32 aad_len;            /* In bytes */
 };
 
 /***** XTS-AES engine *****/
@@ -249,6 +258,8 @@ enum ccp_sha_type {
         CCP_SHA_TYPE_1 = 1,
         CCP_SHA_TYPE_224,
         CCP_SHA_TYPE_256,
+        CCP_SHA_TYPE_384,
+        CCP_SHA_TYPE_512,
         CCP_SHA_TYPE__LAST,
 };
 
@@ -290,6 +301,60 @@ struct ccp_sha_engine {
                                  * final sha cmd */
 };
 
+/***** 3DES engine *****/
+enum ccp_des3_mode {
+        CCP_DES3_MODE_ECB = 0,
+        CCP_DES3_MODE_CBC,
+        CCP_DES3_MODE_CFB,
+        CCP_DES3_MODE__LAST,
+};
+
+enum ccp_des3_type {
+        CCP_DES3_TYPE_168 = 1,
+        CCP_DES3_TYPE__LAST,
+        };
+
+enum ccp_des3_action {
+        CCP_DES3_ACTION_DECRYPT = 0,
+        CCP_DES3_ACTION_ENCRYPT,
+        CCP_DES3_ACTION__LAST,
+};
+
+/**
+ * struct ccp_des3_engine - CCP SHA operation
+ * @type: Type of 3DES operation
+ * @mode: cipher mode
+ * @action: 3DES operation (decrypt/encrypt)
+ * @key: key to be used for this 3DES operation
+ * @key_len: length of key (in bytes)
+ * @iv: IV to be used for this AES operation
+ * @iv_len: length in bytes of iv
+ * @src: input data to be used for this operation
+ * @src_len: length of input data used for this operation (in bytes)
+ * @dst: output data produced by this operation
+ *
+ * Variables required to be set when calling ccp_enqueue_cmd():
+ *   - type, mode, action, key, key_len, src, dst, src_len
+ *   - iv, iv_len for any mode other than ECB
+ *
+ * The iv variable is used as both input and output. On completion of the
+ * 3DES operation the new IV overwrites the old IV.
+ */
+struct ccp_des3_engine {
+        enum ccp_des3_type type;
+        enum ccp_des3_mode mode;
+        enum ccp_des3_action action;
+
+        struct scatterlist *key;
+        u32 key_len;        /* In bytes */
+
+        struct scatterlist *iv;
+        u32 iv_len;          /* In bytes */
+
+        struct scatterlist *src, *dst;
+        u64 src_len;        /* In bytes */
+};
+
 /***** RSA engine *****/
 /**
  * struct ccp_rsa_engine - CCP RSA operation
@@ -539,7 +604,7 @@ struct ccp_ecc_engine {
 enum ccp_engine {
         CCP_ENGINE_AES = 0,
         CCP_ENGINE_XTS_AES_128,
-        CCP_ENGINE_RSVD1,
+        CCP_ENGINE_DES3,
         CCP_ENGINE_SHA,
         CCP_ENGINE_RSA,
         CCP_ENGINE_PASSTHRU,
@@ -587,6 +652,7 @@ struct ccp_cmd {
         union {
                 struct ccp_aes_engine aes;
                 struct ccp_xts_aes_engine xts;
+                struct ccp_des3_engine des3;
                 struct ccp_sha_engine sha;
                 struct ccp_rsa_engine rsa;
                 struct ccp_passthru_engine passthru;
diff --git a/include/linux/crypto.h b/include/linux/crypto.h
index c0b0cf3d2d2f..84da9978e951 100644
--- a/include/linux/crypto.h
+++ b/include/linux/crypto.h
@@ -123,7 +123,7 @@
 /*
  * Miscellaneous stuff.
  */
-#define CRYPTO_MAX_ALG_NAME             64
+#define CRYPTO_MAX_ALG_NAME             128
 
 /*
  * The macro CRYPTO_MINALIGN_ATTR (along with the void * type in the actual
diff --git a/include/linux/cryptohash.h b/include/linux/cryptohash.h
index 3252799832cf..df4d3e943d28 100644
--- a/include/linux/cryptohash.h
+++ b/include/linux/cryptohash.h
@@ -10,9 +10,4 @@
 void sha_init(__u32 *buf);
 void sha_transform(__u32 *digest, const char *data, __u32 *W);
 
-#define MD5_DIGEST_WORDS 4
-#define MD5_MESSAGE_BYTES 64
-
-void md5_transform(__u32 *hash, __u32 const *in);
-
 #endif
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 7ae256717a32..13bc08aba704 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -47,6 +47,7 @@
 
 /* @a is a power of 2 value */
 #define ALIGN(x, a)             __ALIGN_KERNEL((x), (a))
+#define ALIGN_DOWN(x, a)        __ALIGN_KERNEL((x) - ((a) - 1), (a))
 #define __ALIGN_MASK(x, mask)   __ALIGN_KERNEL_MASK((x), (mask))
 #define PTR_ALIGN(p, a)         ((typeof(p))ALIGN((unsigned long)(p), (a)))
 #define IS_ALIGNED(x, a)                (((x) & ((typeof(x))(a) - 1)) == 0)
diff --git a/include/soc/fsl/qman.h b/include/soc/fsl/qman.h
index 3d4df74a96de..d4dfefdee6c1 100644
--- a/include/soc/fsl/qman.h
+++ b/include/soc/fsl/qman.h
@@ -36,8 +36,11 @@
 /* Hardware constants */
 #define QM_CHANNEL_SWPORTAL0 0
 #define QMAN_CHANNEL_POOL1 0x21
+#define QMAN_CHANNEL_CAAM 0x80
 #define QMAN_CHANNEL_POOL1_REV3 0x401
+#define QMAN_CHANNEL_CAAM_REV3 0x840
 extern u16 qm_channel_pool1;
+extern u16 qm_channel_caam;
 
 /* Portal processing (interrupt) sources */
 #define QM_PIRQ_CSCI    0x00100000      /* Congestion State Change */
@@ -165,6 +168,7 @@ static inline void qm_fd_set_param(struct qm_fd *fd, enum qm_fd_format fmt,
 #define qm_fd_set_contig_big(fd, len) \
         qm_fd_set_param(fd, qm_fd_contig_big, 0, len)
 #define qm_fd_set_sg_big(fd, len) qm_fd_set_param(fd, qm_fd_sg_big, 0, len)
+#define qm_fd_set_compound(fd, len) qm_fd_set_param(fd, qm_fd_compound, 0, len)
 
 static inline void qm_fd_clear_fd(struct qm_fd *fd)
 {
@@ -639,6 +643,7 @@ struct qm_mcc_initcgr {
 #define QM_CGR_WE_MODE                  0x0001
 
 #define QMAN_CGR_FLAG_USE_INIT       0x00000001
+#define QMAN_CGR_MODE_FRAME          0x00000001
 
         /* Portal and Frame Queues */
 /* Represents a managed portal */
@@ -791,6 +796,84 @@ struct qman_cgr {
 #define QMAN_INITFQ_FLAG_SCHED       0x00000001 /* schedule rather than park */
 #define QMAN_INITFQ_FLAG_LOCAL       0x00000004 /* set dest portal */
 
+/*
+ * For qman_volatile_dequeue(); Choose one PRECEDENCE. EXACT is optional. Use
+ * NUMFRAMES(n) (6-bit) or NUMFRAMES_TILLEMPTY to fill in the frame-count. Use
+ * FQID(n) to fill in the frame queue ID.
+ */
+#define QM_VDQCR_PRECEDENCE_VDQCR       0x0
+#define QM_VDQCR_PRECEDENCE_SDQCR       0x80000000
+#define QM_VDQCR_EXACT                  0x40000000
+#define QM_VDQCR_NUMFRAMES_MASK         0x3f000000
+#define QM_VDQCR_NUMFRAMES_SET(n)       (((n) & 0x3f) << 24)
+#define QM_VDQCR_NUMFRAMES_GET(n)       (((n) >> 24) & 0x3f)
+#define QM_VDQCR_NUMFRAMES_TILLEMPTY    QM_VDQCR_NUMFRAMES_SET(0)
+
+#define QMAN_VOLATILE_FLAG_WAIT      0x00000001 /* wait if VDQCR is in use */
+#define QMAN_VOLATILE_FLAG_WAIT_INT  0x00000002 /* if wait, interruptible? */
+#define QMAN_VOLATILE_FLAG_FINISH    0x00000004 /* wait till VDQCR completes */
+
+/* "Query FQ Non-Programmable Fields" */
+struct qm_mcr_queryfq_np {
+        u8 verb;
+        u8 result;
+        u8 __reserved1;
+        u8 state;               /* QM_MCR_NP_STATE_*** */
+        u32 fqd_link;           /* 24-bit, _res2[24-31] */
+        u16 odp_seq;            /* 14-bit, _res3[14-15] */
+        u16 orp_nesn;           /* 14-bit, _res4[14-15] */
+        u16 orp_ea_hseq;        /* 15-bit, _res5[15] */
+        u16 orp_ea_tseq;        /* 15-bit, _res6[15] */
+        u32 orp_ea_hptr;        /* 24-bit, _res7[24-31] */
+        u32 orp_ea_tptr;        /* 24-bit, _res8[24-31] */
+        u32 pfdr_hptr;          /* 24-bit, _res9[24-31] */
+        u32 pfdr_tptr;          /* 24-bit, _res10[24-31] */
+        u8 __reserved2[5];
+        u8 is;                  /* 1-bit, _res12[1-7] */
+        u16 ics_surp;
+        u32 byte_cnt;
+        u32 frm_cnt;            /* 24-bit, _res13[24-31] */
+        u32 __reserved3;
+        u16 ra1_sfdr;           /* QM_MCR_NP_RA1_*** */
+        u16 ra2_sfdr;           /* QM_MCR_NP_RA2_*** */
+        u16 __reserved4;
+        u16 od1_sfdr;           /* QM_MCR_NP_OD1_*** */
+        u16 od2_sfdr;           /* QM_MCR_NP_OD2_*** */
+        u16 od3_sfdr;           /* QM_MCR_NP_OD3_*** */
+} __packed;
+
+#define QM_MCR_NP_STATE_FE              0x10
+#define QM_MCR_NP_STATE_R               0x08
+#define QM_MCR_NP_STATE_MASK            0x07    /* Reads FQD::STATE; */
+#define QM_MCR_NP_STATE_OOS             0x00
+#define QM_MCR_NP_STATE_RETIRED         0x01
+#define QM_MCR_NP_STATE_TEN_SCHED       0x02
+#define QM_MCR_NP_STATE_TRU_SCHED       0x03
+#define QM_MCR_NP_STATE_PARKED          0x04
+#define QM_MCR_NP_STATE_ACTIVE          0x05
+#define QM_MCR_NP_PTR_MASK              0x07ff  /* for RA[12] & OD[123] */
+#define QM_MCR_NP_RA1_NRA(v)            (((v) >> 14) & 0x3)     /* FQD::NRA */
+#define QM_MCR_NP_RA2_IT(v)             (((v) >> 14) & 0x1)     /* FQD::IT */
+#define QM_MCR_NP_OD1_NOD(v)            (((v) >> 14) & 0x3)     /* FQD::NOD */
+#define QM_MCR_NP_OD3_NPC(v)            (((v) >> 14) & 0x3)     /* FQD::NPC */
+
+enum qm_mcr_queryfq_np_masks {
+        qm_mcr_fqd_link_mask = BIT(24) - 1,
+        qm_mcr_odp_seq_mask = BIT(14) - 1,
+        qm_mcr_orp_nesn_mask = BIT(14) - 1,
+        qm_mcr_orp_ea_hseq_mask = BIT(15) - 1,
+        qm_mcr_orp_ea_tseq_mask = BIT(15) - 1,
+        qm_mcr_orp_ea_hptr_mask = BIT(24) - 1,
+        qm_mcr_orp_ea_tptr_mask = BIT(24) - 1,
+        qm_mcr_pfdr_hptr_mask = BIT(24) - 1,
+        qm_mcr_pfdr_tptr_mask = BIT(24) - 1,
+        qm_mcr_is_mask = BIT(1) - 1,
+        qm_mcr_frm_cnt_mask = BIT(24) - 1,
+};
+
+#define qm_mcr_np_get(np, field) \
+        ((np)->field & (qm_mcr_##field##_mask))
+
         /* Portal Management */
 /**
  * qman_p_irqsource_add - add processing sources to be interrupt-driven
@@ -963,6 +1046,25 @@ int qman_retire_fq(struct qman_fq *fq, u32 *flags);
  */
 int qman_oos_fq(struct qman_fq *fq);
 
+/*
+ * qman_volatile_dequeue - Issue a volatile dequeue command
+ * @fq: the frame queue object to dequeue from
+ * @flags: a bit-mask of QMAN_VOLATILE_FLAG_*** options
+ * @vdqcr: bit mask of QM_VDQCR_*** options, as per qm_dqrr_vdqcr_set()
+ *
+ * Attempts to lock access to the portal's VDQCR volatile dequeue functionality.
+ * The function will block and sleep if QMAN_VOLATILE_FLAG_WAIT is specified and
+ * the VDQCR is already in use, otherwise returns non-zero for failure. If
+ * QMAN_VOLATILE_FLAG_FINISH is specified, the function will only return once
+ * the VDQCR command has finished executing (ie. once the callback for the last
+ * DQRR entry resulting from the VDQCR command has been called). If not using
+ * the FINISH flag, completion can be determined either by detecting the
+ * presence of the QM_DQRR_STAT_UNSCHEDULED and QM_DQRR_STAT_DQCR_EXPIRED bits
+ * in the "stat" parameter passed to the FQ's dequeue callback, or by waiting
+ * for the QMAN_FQ_STATE_VDQCR bit to disappear.
+ */
+int qman_volatile_dequeue(struct qman_fq *fq, u32 flags, u32 vdqcr);
+
 /**
  * qman_enqueue - Enqueue a frame to a frame queue
  * @fq: the frame queue object to enqueue to
@@ -994,6 +1096,13 @@ int qman_alloc_fqid_range(u32 *result, u32 count);
  */
 int qman_release_fqid(u32 fqid);
 
+/**
+ * qman_query_fq_np - Queries non-programmable FQD fields
+ * @fq: the frame queue object to be queried
+ * @np: storage for the queried FQD fields
+ */
+int qman_query_fq_np(struct qman_fq *fq, struct qm_mcr_queryfq_np *np);
+
         /* Pool-channel management */
 /**
  * qman_alloc_pool_range - Allocate a contiguous range of pool-channel IDs
diff --git a/include/uapi/linux/cryptouser.h b/include/uapi/linux/cryptouser.h
index 11d21fce14d6..b4def5c630e7 100644
--- a/include/uapi/linux/cryptouser.h
+++ b/include/uapi/linux/cryptouser.h
@@ -31,7 +31,7 @@ enum {
 #define CRYPTO_MSG_MAX (__CRYPTO_MSG_MAX - 1)
 #define CRYPTO_NR_MSGTYPES (CRYPTO_MSG_MAX + 1 - CRYPTO_MSG_BASE)
 
-#define CRYPTO_MAX_NAME CRYPTO_MAX_ALG_NAME
+#define CRYPTO_MAX_NAME 64
 
 /* Netlink message attributes.  */
 enum crypto_attr_type_t {
@@ -53,9 +53,9 @@ enum crypto_attr_type_t {
 };
 
 struct crypto_user_alg {
-        char cru_name[CRYPTO_MAX_ALG_NAME];
-        char cru_driver_name[CRYPTO_MAX_ALG_NAME];
-        char cru_module_name[CRYPTO_MAX_ALG_NAME];
+        char cru_name[CRYPTO_MAX_NAME];
+        char cru_driver_name[CRYPTO_MAX_NAME];
+        char cru_module_name[CRYPTO_MAX_NAME];
         __u32 cru_type;
         __u32 cru_mask;
         __u32 cru_refcnt;
@@ -73,7 +73,7 @@ struct crypto_report_hash {
 };
 
 struct crypto_report_cipher {
-        char type[CRYPTO_MAX_ALG_NAME];
+        char type[CRYPTO_MAX_NAME];
         unsigned int blocksize;
         unsigned int min_keysize;
         unsigned int max_keysize;
diff --git a/include/video/udlfb.h b/include/video/udlfb.h
index f9466fa54ba4..3ea90aea5617 100644
--- a/include/video/udlfb.h
+++ b/include/video/udlfb.h
@@ -92,6 +92,6 @@ struct dlfb_data {
 
 /* remove these once align.h patch is taken into kernel */
 #define DL_ALIGN_UP(x, a) ALIGN(x, a)
-#define DL_ALIGN_DOWN(x, a) ALIGN(x-(a-1), a)
+#define DL_ALIGN_DOWN(x, a) ALIGN_DOWN(x, a)
 
 #endif