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authorLinus Torvalds <torvalds@linux-foundation.org>2015-09-01 15:18:40 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2015-09-01 15:18:40 -0400
commit50686e8a3aed2f5d295e9d2e79ff43df461c7b76 (patch)
treee5de912d74c6e1d75e6ecf75f2a62c313955baff /include
parentc5fc249862af862df027030188cc083e072ecd19 (diff)
parent1ec6f701707e4e97e451ff8b662360f1262a6c59 (diff)
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson: "New or improved SoC support: - add support for Atmel's SAMA5D2 SoC - add support for Freescale i.MX6UL - improved support for TI's DM814x platform - misc fixes and improvements for RockChip platforms - Marvell MVEBU suspend/resume support A few driver changes that ideally would belong in the drivers branch are also here (acked by appropriate maintainers): - power key input driver for Freescale platforms (svns) - RTC driver updates for Freescale platforms (svns/mxc) - clk fixes for TI DM814/816X + a bunch of other changes for various platforms" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits) ARM: rockchip: pm: Fix PTR_ERR() argument ARM: imx: mach-imx6ul: Fix allmodconfig build clk: ti: fix for definition movement ARM: uniphier: drop v7_invalidate_l1 call at secondary entry memory: kill off set_irq_flags usage rtc: snvs: select option REGMAP_MMIO ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE ARM: BCM: Enable ARM erratum 798181 for BRCMSTB ARM: OMAP2+: Fix power domain operations regression caused by 81xx ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend ARM: rockchip: set correct stabilization thresholds in suspend ARM: rockchip: rename osc_switch_to_32k variable ARM: imx6ul: add fec MAC refrence clock and phy fixup init ARM: imx6ul: add fec bits to GPR syscon definition rtc: mxc: add support of device tree dt-binding: document the binding for mxc rtc rtc: mxc: use a second rtc clock ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback soc: mediatek: Fix SCPSYS compilation ARM: at91/soc: add basic support for new sama5d2 SoC ...
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/power/mt8173-power.h15
-rw-r--r--include/linux/clk/ti.h3
-rw-r--r--include/linux/mfd/syscon/imx6q-iomuxc-gpr.h8
-rw-r--r--include/linux/soc/mediatek/infracfg.h26
4 files changed, 51 insertions, 1 deletions
diff --git a/include/dt-bindings/power/mt8173-power.h b/include/dt-bindings/power/mt8173-power.h
new file mode 100644
index 000000000000..b34cee95aa89
--- /dev/null
+++ b/include/dt-bindings/power/mt8173-power.h
@@ -0,0 +1,15 @@
1#ifndef _DT_BINDINGS_POWER_MT8183_POWER_H
2#define _DT_BINDINGS_POWER_MT8183_POWER_H
3
4#define MT8173_POWER_DOMAIN_VDEC 0
5#define MT8173_POWER_DOMAIN_VENC 1
6#define MT8173_POWER_DOMAIN_ISP 2
7#define MT8173_POWER_DOMAIN_MM 3
8#define MT8173_POWER_DOMAIN_VENC_LT 4
9#define MT8173_POWER_DOMAIN_AUDIO 5
10#define MT8173_POWER_DOMAIN_USB 6
11#define MT8173_POWER_DOMAIN_MFG_ASYNC 7
12#define MT8173_POWER_DOMAIN_MFG_2D 8
13#define MT8173_POWER_DOMAIN_MFG 9
14
15#endif /* _DT_BINDINGS_POWER_MT8183_POWER_H */
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 9299222d680d..223be696df27 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -263,7 +263,8 @@ void omap2_clk_legacy_provider_init(int index, void __iomem *mem);
263int omap3430_dt_clk_init(void); 263int omap3430_dt_clk_init(void);
264int omap3630_dt_clk_init(void); 264int omap3630_dt_clk_init(void);
265int am35xx_dt_clk_init(void); 265int am35xx_dt_clk_init(void);
266int ti81xx_dt_clk_init(void); 266int dm814x_dt_clk_init(void);
267int dm816x_dt_clk_init(void);
267int omap4xxx_dt_clk_init(void); 268int omap4xxx_dt_clk_init(void);
268int omap5xxx_dt_clk_init(void); 269int omap5xxx_dt_clk_init(void);
269int dra7xx_dt_clk_init(void); 270int dra7xx_dt_clk_init(void);
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index d16f4c82c568..558a485d03ab 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -435,4 +435,12 @@
435#define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1) 435#define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1)
436#define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1) 436#define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1)
437 437
438/* For imx6ul iomux gpr register field define */
439#define IMX6UL_GPR1_ENET1_CLK_DIR (0x1 << 17)
440#define IMX6UL_GPR1_ENET2_CLK_DIR (0x1 << 18)
441#define IMX6UL_GPR1_ENET1_CLK_OUTPUT (0x1 << 17)
442#define IMX6UL_GPR1_ENET2_CLK_OUTPUT (0x1 << 18)
443#define IMX6UL_GPR1_ENET_CLK_DIR (0x3 << 17)
444#define IMX6UL_GPR1_ENET_CLK_OUTPUT (0x3 << 17)
445
438#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ 446#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */
diff --git a/include/linux/soc/mediatek/infracfg.h b/include/linux/soc/mediatek/infracfg.h
new file mode 100644
index 000000000000..a5714e93fb34
--- /dev/null
+++ b/include/linux/soc/mediatek/infracfg.h
@@ -0,0 +1,26 @@
1#ifndef __SOC_MEDIATEK_INFRACFG_H
2#define __SOC_MEDIATEK_INFRACFG_H
3
4#define MT8173_TOP_AXI_PROT_EN_MCI_M2 BIT(0)
5#define MT8173_TOP_AXI_PROT_EN_MM_M0 BIT(1)
6#define MT8173_TOP_AXI_PROT_EN_MM_M1 BIT(2)
7#define MT8173_TOP_AXI_PROT_EN_MMAPB_S BIT(6)
8#define MT8173_TOP_AXI_PROT_EN_L2C_M2 BIT(9)
9#define MT8173_TOP_AXI_PROT_EN_L2SS_SMI BIT(11)
10#define MT8173_TOP_AXI_PROT_EN_L2SS_ADD BIT(12)
11#define MT8173_TOP_AXI_PROT_EN_CCI_M2 BIT(13)
12#define MT8173_TOP_AXI_PROT_EN_MFG_S BIT(14)
13#define MT8173_TOP_AXI_PROT_EN_PERI_M0 BIT(15)
14#define MT8173_TOP_AXI_PROT_EN_PERI_M1 BIT(16)
15#define MT8173_TOP_AXI_PROT_EN_DEBUGSYS BIT(17)
16#define MT8173_TOP_AXI_PROT_EN_CQ_DMA BIT(18)
17#define MT8173_TOP_AXI_PROT_EN_GCPU BIT(19)
18#define MT8173_TOP_AXI_PROT_EN_IOMMU BIT(20)
19#define MT8173_TOP_AXI_PROT_EN_MFG_M0 BIT(21)
20#define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22)
21#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23)
22
23int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask);
24int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask);
25
26#endif /* __SOC_MEDIATEK_INFRACFG_H */