diff options
| author | Dave Airlie <airlied@redhat.com> | 2016-09-27 21:09:59 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-09-27 21:09:59 -0400 |
| commit | f8049dd865a1de8b494c16a4cd18ee15fa896810 (patch) | |
| tree | 37b874acba1392e97864dc24692736210543a4e4 /include/uapi | |
| parent | 3f346d5dcb591c2a5a26653d093af710cf2e5a31 (diff) | |
| parent | 7a3bcc0a8e2ad5fa7fe6d627e01c66b3488149b7 (diff) | |
Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into drm-next
A bit smaller pull-req this time around. Some continued DT binding
cleanup to get the corresponding dts bits merged upstream (through
other trees). And explicit fence-fd support for submit ioctl.
* 'msm-next' of git://people.freedesktop.org/~robclark/linux:
drm/msm: bump kernel api version for explicit fencing
drm/msm: submit support for out-fences
drm/msm: move fence allocation out of msm_gpu_submit()
drm/msm: submit support for in-fences
drm/msm: extend the submit ioctl to pass in flags
drm/msm/mdp5: Set rotation property initial value to DRM_ROTATE_0 insted of 0
drm/msm/hdmi: don't print error when adding i2c adapter fails
drm/msm/mdp4: mark symbols static where possible
drm/msm: Remove call to reservation_object_test_signaled_rcu before wait
drm/msm/hdmi: Clean up HDMI gpio DT bindings
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing
Diffstat (limited to 'include/uapi')
| -rw-r--r-- | include/uapi/drm/msm_drm.h | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 49f778de8e06..8c51e8a0df89 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h | |||
| @@ -42,6 +42,15 @@ extern "C" { | |||
| 42 | #define MSM_PIPE_2D1 0x02 | 42 | #define MSM_PIPE_2D1 0x02 |
| 43 | #define MSM_PIPE_3D0 0x10 | 43 | #define MSM_PIPE_3D0 0x10 |
| 44 | 44 | ||
| 45 | /* The pipe-id just uses the lower bits, so can be OR'd with flags in | ||
| 46 | * the upper 16 bits (which could be extended further, if needed, maybe | ||
| 47 | * we extend/overload the pipe-id some day to deal with multiple rings, | ||
| 48 | * but even then I don't think we need the full lower 16 bits). | ||
| 49 | */ | ||
| 50 | #define MSM_PIPE_ID_MASK 0xffff | ||
| 51 | #define MSM_PIPE_ID(x) ((x) & MSM_PIPE_ID_MASK) | ||
| 52 | #define MSM_PIPE_FLAGS(x) ((x) & ~MSM_PIPE_ID_MASK) | ||
| 53 | |||
| 45 | /* timeouts are specified in clock-monotonic absolute times (to simplify | 54 | /* timeouts are specified in clock-monotonic absolute times (to simplify |
| 46 | * restarting interrupted ioctls). The following struct is logically the | 55 | * restarting interrupted ioctls). The following struct is logically the |
| 47 | * same as 'struct timespec' but 32/64b ABI safe. | 56 | * same as 'struct timespec' but 32/64b ABI safe. |
| @@ -175,17 +184,28 @@ struct drm_msm_gem_submit_bo { | |||
| 175 | __u64 presumed; /* in/out, presumed buffer address */ | 184 | __u64 presumed; /* in/out, presumed buffer address */ |
| 176 | }; | 185 | }; |
| 177 | 186 | ||
| 187 | /* Valid submit ioctl flags: */ | ||
| 188 | #define MSM_SUBMIT_NO_IMPLICIT 0x80000000 /* disable implicit sync */ | ||
| 189 | #define MSM_SUBMIT_FENCE_FD_IN 0x40000000 /* enable input fence_fd */ | ||
| 190 | #define MSM_SUBMIT_FENCE_FD_OUT 0x20000000 /* enable output fence_fd */ | ||
| 191 | #define MSM_SUBMIT_FLAGS ( \ | ||
| 192 | MSM_SUBMIT_NO_IMPLICIT | \ | ||
| 193 | MSM_SUBMIT_FENCE_FD_IN | \ | ||
| 194 | MSM_SUBMIT_FENCE_FD_OUT | \ | ||
| 195 | 0) | ||
| 196 | |||
| 178 | /* Each cmdstream submit consists of a table of buffers involved, and | 197 | /* Each cmdstream submit consists of a table of buffers involved, and |
| 179 | * one or more cmdstream buffers. This allows for conditional execution | 198 | * one or more cmdstream buffers. This allows for conditional execution |
| 180 | * (context-restore), and IB buffers needed for per tile/bin draw cmds. | 199 | * (context-restore), and IB buffers needed for per tile/bin draw cmds. |
| 181 | */ | 200 | */ |
| 182 | struct drm_msm_gem_submit { | 201 | struct drm_msm_gem_submit { |
| 183 | __u32 pipe; /* in, MSM_PIPE_x */ | 202 | __u32 flags; /* MSM_PIPE_x | MSM_SUBMIT_x */ |
| 184 | __u32 fence; /* out */ | 203 | __u32 fence; /* out */ |
| 185 | __u32 nr_bos; /* in, number of submit_bo's */ | 204 | __u32 nr_bos; /* in, number of submit_bo's */ |
| 186 | __u32 nr_cmds; /* in, number of submit_cmd's */ | 205 | __u32 nr_cmds; /* in, number of submit_cmd's */ |
| 187 | __u64 __user bos; /* in, ptr to array of submit_bo's */ | 206 | __u64 __user bos; /* in, ptr to array of submit_bo's */ |
| 188 | __u64 __user cmds; /* in, ptr to array of submit_cmd's */ | 207 | __u64 __user cmds; /* in, ptr to array of submit_cmd's */ |
| 208 | __s32 fence_fd; /* in/out fence fd (see MSM_SUBMIT_FENCE_FD_IN/OUT) */ | ||
| 189 | }; | 209 | }; |
| 190 | 210 | ||
| 191 | /* The normal way to synchronize with the GPU is just to CPU_PREP on | 211 | /* The normal way to synchronize with the GPU is just to CPU_PREP on |
