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authorLinus Torvalds <torvalds@linux-foundation.org>2018-08-18 14:04:51 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-08-18 14:04:51 -0400
commitd5acba26bfa097a618be425522b1ec4269d3edaf (patch)
tree7abb08032d4b79b34eb1386aa007a811e1964839 /include/uapi/linux
parent2475c515d4031c494ff452508a8bf8c281ec6e56 (diff)
parent128f38041035001276e964cda1cf951f218d965d (diff)
Merge tag 'char-misc-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH: "Here is the bit set of char/misc drivers for 4.19-rc1 There is a lot here, much more than normal, seems like everyone is writing new driver subsystems these days... Anyway, major things here are: - new FSI driver subsystem, yet-another-powerpc low-level hardware bus - gnss, finally an in-kernel GPS subsystem to try to tame all of the crazy out-of-tree drivers that have been floating around for years, combined with some really hacky userspace implementations. This is only for GNSS receivers, but you have to start somewhere, and this is great to see. Other than that, there are new slimbus drivers, new coresight drivers, new fpga drivers, and loads of DT bindings for all of these and existing drivers. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (255 commits) android: binder: Rate-limit debug and userspace triggered err msgs fsi: sbefifo: Bump max command length fsi: scom: Fix NULL dereference misc: mic: SCIF Fix scif_get_new_port() error handling misc: cxl: changed asterisk position genwqe: card_base: Use true and false for boolean values misc: eeprom: assignment outside the if statement uio: potential double frees if __uio_register_device() fails eeprom: idt_89hpesx: clean up an error pointer vs NULL inconsistency misc: ti-st: Fix memory leak in the error path of probe() android: binder: Show extra_buffers_size in trace firmware: vpd: Fix section enabled flag on vpd_section_destroy platform: goldfish: Retire pdev_bus goldfish: Use dedicated macros instead of manual bit shifting goldfish: Add missing includes to goldfish.h mux: adgs1408: new driver for Analog Devices ADGS1408/1409 mux dt-bindings: mux: add adi,adgs1408 Drivers: hv: vmbus: Cleanup synic memory free path Drivers: hv: vmbus: Remove use of slow_virt_to_phys() Drivers: hv: vmbus: Reset the channel callback in vmbus_onoffer_rescind() ...
Diffstat (limited to 'include/uapi/linux')
-rw-r--r--include/uapi/linux/eventpoll.h8
-rw-r--r--include/uapi/linux/fpga-dfl.h179
-rw-r--r--include/uapi/linux/fsi.h58
3 files changed, 241 insertions, 4 deletions
diff --git a/include/uapi/linux/eventpoll.h b/include/uapi/linux/eventpoll.h
index bf48e71f2634..8a3432d0f0dc 100644
--- a/include/uapi/linux/eventpoll.h
+++ b/include/uapi/linux/eventpoll.h
@@ -42,7 +42,7 @@
42#define EPOLLRDHUP (__force __poll_t)0x00002000 42#define EPOLLRDHUP (__force __poll_t)0x00002000
43 43
44/* Set exclusive wakeup mode for the target file descriptor */ 44/* Set exclusive wakeup mode for the target file descriptor */
45#define EPOLLEXCLUSIVE (__force __poll_t)(1U << 28) 45#define EPOLLEXCLUSIVE ((__force __poll_t)(1U << 28))
46 46
47/* 47/*
48 * Request the handling of system wakeup events so as to prevent system suspends 48 * Request the handling of system wakeup events so as to prevent system suspends
@@ -54,13 +54,13 @@
54 * 54 *
55 * Requires CAP_BLOCK_SUSPEND 55 * Requires CAP_BLOCK_SUSPEND
56 */ 56 */
57#define EPOLLWAKEUP (__force __poll_t)(1U << 29) 57#define EPOLLWAKEUP ((__force __poll_t)(1U << 29))
58 58
59/* Set the One Shot behaviour for the target file descriptor */ 59/* Set the One Shot behaviour for the target file descriptor */
60#define EPOLLONESHOT (__force __poll_t)(1U << 30) 60#define EPOLLONESHOT ((__force __poll_t)(1U << 30))
61 61
62/* Set the Edge Triggered behaviour for the target file descriptor */ 62/* Set the Edge Triggered behaviour for the target file descriptor */
63#define EPOLLET (__force __poll_t)(1U << 31) 63#define EPOLLET ((__force __poll_t)(1U << 31))
64 64
65/* 65/*
66 * On x86-64 make the 64bit structure have the same alignment as the 66 * On x86-64 make the 64bit structure have the same alignment as the
diff --git a/include/uapi/linux/fpga-dfl.h b/include/uapi/linux/fpga-dfl.h
new file mode 100644
index 000000000000..2e324e515c41
--- /dev/null
+++ b/include/uapi/linux/fpga-dfl.h
@@ -0,0 +1,179 @@
1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2/*
3 * Header File for FPGA DFL User API
4 *
5 * Copyright (C) 2017-2018 Intel Corporation, Inc.
6 *
7 * Authors:
8 * Kang Luwei <luwei.kang@intel.com>
9 * Zhang Yi <yi.z.zhang@intel.com>
10 * Wu Hao <hao.wu@intel.com>
11 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
12 */
13
14#ifndef _UAPI_LINUX_FPGA_DFL_H
15#define _UAPI_LINUX_FPGA_DFL_H
16
17#include <linux/types.h>
18#include <linux/ioctl.h>
19
20#define DFL_FPGA_API_VERSION 0
21
22/*
23 * The IOCTL interface for DFL based FPGA is designed for extensibility by
24 * embedding the structure length (argsz) and flags into structures passed
25 * between kernel and userspace. This design referenced the VFIO IOCTL
26 * interface (include/uapi/linux/vfio.h).
27 */
28
29#define DFL_FPGA_MAGIC 0xB6
30
31#define DFL_FPGA_BASE 0
32#define DFL_PORT_BASE 0x40
33#define DFL_FME_BASE 0x80
34
35/* Common IOCTLs for both FME and AFU file descriptor */
36
37/**
38 * DFL_FPGA_GET_API_VERSION - _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 0)
39 *
40 * Report the version of the driver API.
41 * Return: Driver API Version.
42 */
43
44#define DFL_FPGA_GET_API_VERSION _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 0)
45
46/**
47 * DFL_FPGA_CHECK_EXTENSION - _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 1)
48 *
49 * Check whether an extension is supported.
50 * Return: 0 if not supported, otherwise the extension is supported.
51 */
52
53#define DFL_FPGA_CHECK_EXTENSION _IO(DFL_FPGA_MAGIC, DFL_FPGA_BASE + 1)
54
55/* IOCTLs for AFU file descriptor */
56
57/**
58 * DFL_FPGA_PORT_RESET - _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 0)
59 *
60 * Reset the FPGA Port and its AFU. No parameters are supported.
61 * Userspace can do Port reset at any time, e.g. during DMA or PR. But
62 * it should never cause any system level issue, only functional failure
63 * (e.g. DMA or PR operation failure) and be recoverable from the failure.
64 * Return: 0 on success, -errno of failure
65 */
66
67#define DFL_FPGA_PORT_RESET _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 0)
68
69/**
70 * DFL_FPGA_PORT_GET_INFO - _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 1,
71 * struct dfl_fpga_port_info)
72 *
73 * Retrieve information about the fpga port.
74 * Driver fills the info in provided struct dfl_fpga_port_info.
75 * Return: 0 on success, -errno on failure.
76 */
77struct dfl_fpga_port_info {
78 /* Input */
79 __u32 argsz; /* Structure length */
80 /* Output */
81 __u32 flags; /* Zero for now */
82 __u32 num_regions; /* The number of supported regions */
83 __u32 num_umsgs; /* The number of allocated umsgs */
84};
85
86#define DFL_FPGA_PORT_GET_INFO _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 1)
87
88/**
89 * FPGA_PORT_GET_REGION_INFO - _IOWR(FPGA_MAGIC, PORT_BASE + 2,
90 * struct dfl_fpga_port_region_info)
91 *
92 * Retrieve information about a device memory region.
93 * Caller provides struct dfl_fpga_port_region_info with index value set.
94 * Driver returns the region info in other fields.
95 * Return: 0 on success, -errno on failure.
96 */
97struct dfl_fpga_port_region_info {
98 /* input */
99 __u32 argsz; /* Structure length */
100 /* Output */
101 __u32 flags; /* Access permission */
102#define DFL_PORT_REGION_READ (1 << 0) /* Region is readable */
103#define DFL_PORT_REGION_WRITE (1 << 1) /* Region is writable */
104#define DFL_PORT_REGION_MMAP (1 << 2) /* Can be mmaped to userspace */
105 /* Input */
106 __u32 index; /* Region index */
107#define DFL_PORT_REGION_INDEX_AFU 0 /* AFU */
108#define DFL_PORT_REGION_INDEX_STP 1 /* Signal Tap */
109 __u32 padding;
110 /* Output */
111 __u64 size; /* Region size (bytes) */
112 __u64 offset; /* Region offset from start of device fd */
113};
114
115#define DFL_FPGA_PORT_GET_REGION_INFO _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 2)
116
117/**
118 * DFL_FPGA_PORT_DMA_MAP - _IOWR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 3,
119 * struct dfl_fpga_port_dma_map)
120 *
121 * Map the dma memory per user_addr and length which are provided by caller.
122 * Driver fills the iova in provided struct afu_port_dma_map.
123 * This interface only accepts page-size aligned user memory for dma mapping.
124 * Return: 0 on success, -errno on failure.
125 */
126struct dfl_fpga_port_dma_map {
127 /* Input */
128 __u32 argsz; /* Structure length */
129 __u32 flags; /* Zero for now */
130 __u64 user_addr; /* Process virtual address */
131 __u64 length; /* Length of mapping (bytes)*/
132 /* Output */
133 __u64 iova; /* IO virtual address */
134};
135
136#define DFL_FPGA_PORT_DMA_MAP _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 3)
137
138/**
139 * DFL_FPGA_PORT_DMA_UNMAP - _IOW(FPGA_MAGIC, PORT_BASE + 4,
140 * struct dfl_fpga_port_dma_unmap)
141 *
142 * Unmap the dma memory per iova provided by caller.
143 * Return: 0 on success, -errno on failure.
144 */
145struct dfl_fpga_port_dma_unmap {
146 /* Input */
147 __u32 argsz; /* Structure length */
148 __u32 flags; /* Zero for now */
149 __u64 iova; /* IO virtual address */
150};
151
152#define DFL_FPGA_PORT_DMA_UNMAP _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 4)
153
154/* IOCTLs for FME file descriptor */
155
156/**
157 * DFL_FPGA_FME_PORT_PR - _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 0,
158 * struct dfl_fpga_fme_port_pr)
159 *
160 * Driver does Partial Reconfiguration based on Port ID and Buffer (Image)
161 * provided by caller.
162 * Return: 0 on success, -errno on failure.
163 * If DFL_FPGA_FME_PORT_PR returns -EIO, that indicates the HW has detected
164 * some errors during PR, under this case, the user can fetch HW error info
165 * from the status of FME's fpga manager.
166 */
167
168struct dfl_fpga_fme_port_pr {
169 /* Input */
170 __u32 argsz; /* Structure length */
171 __u32 flags; /* Zero for now */
172 __u32 port_id;
173 __u32 buffer_size;
174 __u64 buffer_address; /* Userspace address to the buffer for PR */
175};
176
177#define DFL_FPGA_FME_PORT_PR _IO(DFL_FPGA_MAGIC, DFL_FME_BASE + 0)
178
179#endif /* _UAPI_LINUX_FPGA_DFL_H */
diff --git a/include/uapi/linux/fsi.h b/include/uapi/linux/fsi.h
new file mode 100644
index 000000000000..da577ecd90e7
--- /dev/null
+++ b/include/uapi/linux/fsi.h
@@ -0,0 +1,58 @@
1/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
2#ifndef _UAPI_LINUX_FSI_H
3#define _UAPI_LINUX_FSI_H
4
5#include <linux/types.h>
6#include <linux/ioctl.h>
7
8/*
9 * /dev/scom "raw" ioctl interface
10 *
11 * The driver supports a high level "read/write" interface which
12 * handles retries and converts the status to Linux error codes,
13 * however low level tools an debugger need to access the "raw"
14 * HW status information and interpret it themselves, so this
15 * ioctl interface is also provided for their use case.
16 */
17
18/* Structure for SCOM read/write */
19struct scom_access {
20 __u64 addr; /* SCOM address, supports indirect */
21 __u64 data; /* SCOM data (in for write, out for read) */
22 __u64 mask; /* Data mask for writes */
23 __u32 intf_errors; /* Interface error flags */
24#define SCOM_INTF_ERR_PARITY 0x00000001 /* Parity error */
25#define SCOM_INTF_ERR_PROTECTION 0x00000002 /* Blocked by secure boot */
26#define SCOM_INTF_ERR_ABORT 0x00000004 /* PIB reset during access */
27#define SCOM_INTF_ERR_UNKNOWN 0x80000000 /* Unknown error */
28 /*
29 * Note: Any other bit set in intf_errors need to be considered as an
30 * error. Future implementations may define new error conditions. The
31 * pib_status below is only valid if intf_errors is 0.
32 */
33 __u8 pib_status; /* 3-bit PIB status */
34#define SCOM_PIB_SUCCESS 0 /* Access successful */
35#define SCOM_PIB_BLOCKED 1 /* PIB blocked, pls retry */
36#define SCOM_PIB_OFFLINE 2 /* Chiplet offline */
37#define SCOM_PIB_PARTIAL 3 /* Partial good */
38#define SCOM_PIB_BAD_ADDR 4 /* Invalid address */
39#define SCOM_PIB_CLK_ERR 5 /* Clock error */
40#define SCOM_PIB_PARITY_ERR 6 /* Parity error on the PIB bus */
41#define SCOM_PIB_TIMEOUT 7 /* Bus timeout */
42 __u8 pad;
43};
44
45/* Flags for SCOM check */
46#define SCOM_CHECK_SUPPORTED 0x00000001 /* Interface supported */
47#define SCOM_CHECK_PROTECTED 0x00000002 /* Interface blocked by secure boot */
48
49/* Flags for SCOM reset */
50#define SCOM_RESET_INTF 0x00000001 /* Reset interface */
51#define SCOM_RESET_PIB 0x00000002 /* Reset PIB */
52
53#define FSI_SCOM_CHECK _IOR('s', 0x00, __u32)
54#define FSI_SCOM_READ _IOWR('s', 0x01, struct scom_access)
55#define FSI_SCOM_WRITE _IOWR('s', 0x02, struct scom_access)
56#define FSI_SCOM_RESET _IOW('s', 0x03, __u32)
57
58#endif /* _UAPI_LINUX_FSI_H */