Merge tag 'v4.4-rc2' into drm-intel-next-queued

Linux 4.4-rc2

Backmerge to get at

commit 1b0e3a049efe471c399674fd954500ce97438d30
Author: Imre Deak <imre.deak@intel.com>
Date:   Thu Nov 5 23:04:11 2015 +0200

    drm/i915/skl: disable display side power well support for now

so that we can proplery re-eanble skl power wells in -next.

Conflicts are just adjacent lines changed, except for intel_fbdev.c
where we need to interleave the changs. Nothing nefarious.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>

1 files changed, 18 insertions, 0 deletions

diff --git a/include/uapi/linux/psci.h b/include/uapi/linux/psci.h
index 310d83e0a91b..3d7a0fc021a7 100644
--- a/include/uapi/linux/psci.h
+++ b/include/uapi/linux/psci.h
@@ -46,6 +46,11 @@
 #define PSCI_0_2_FN64_MIGRATE                   PSCI_0_2_FN64(5)
 #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU       PSCI_0_2_FN64(7)
 
+#define PSCI_1_0_FN_PSCI_FEATURES               PSCI_0_2_FN(10)
+#define PSCI_1_0_FN_SYSTEM_SUSPEND              PSCI_0_2_FN(14)
+
+#define PSCI_1_0_FN64_SYSTEM_SUSPEND            PSCI_0_2_FN64(14)
+
 /* PSCI v0.2 power state encoding for CPU_SUSPEND function */
 #define PSCI_0_2_POWER_STATE_ID_MASK            0xffff
 #define PSCI_0_2_POWER_STATE_ID_SHIFT           0
@@ -56,6 +61,13 @@
 #define PSCI_0_2_POWER_STATE_AFFL_MASK          \
                                 (0x3 << PSCI_0_2_POWER_STATE_AFFL_SHIFT)
 
+/* PSCI extended power state encoding for CPU_SUSPEND function */
+#define PSCI_1_0_EXT_POWER_STATE_ID_MASK        0xfffffff
+#define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT       0
+#define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT     30
+#define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK      \
+                                (0x1 << PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT)
+
 /* PSCI v0.2 affinity level state returned by AFFINITY_INFO */
 #define PSCI_0_2_AFFINITY_LEVEL_ON              0
 #define PSCI_0_2_AFFINITY_LEVEL_OFF             1
@@ -76,6 +88,11 @@
 #define PSCI_VERSION_MINOR(ver)                 \
                 ((ver) & PSCI_VERSION_MINOR_MASK)
 
+/* PSCI features decoding (>=1.0) */
+#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT  1
+#define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK   \
+                        (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT)
+
 /* PSCI return values (inclusive of all PSCI versions) */
 #define PSCI_RET_SUCCESS                        0
 #define PSCI_RET_NOT_SUPPORTED                  -1
@@ -86,5 +103,6 @@
 #define PSCI_RET_INTERNAL_FAILURE               -6
 #define PSCI_RET_NOT_PRESENT                    -7
 #define PSCI_RET_DISABLED                       -8
+#define PSCI_RET_INVALID_ADDRESS                -9
 
 #endif /* _UAPI_LINUX_PSCI_H */