Merge tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Support for MMC power sequences.
   - SDIO function devicetree subnode parsing.
   - Refactor the hardware reset routines and enable it for SD cards.
   - Various code quality improvements, especially for slot-gpio.

  MMC host:
   - dw_mmc: Various fixes and cleanups.
   - dw_mmc: Convert to mmc_send_tuning().
   - moxart: Fix probe logic.
   - sdhci: Various fixes and cleanups
   - sdhci: Asynchronous request handling support.
   - sdhci-pxav3: Various fixes and cleanups.
   - sdhci-tegra: Fixes for T114, T124 and T132.
   - rtsx: Various fixes and cleanups.
   - rtsx: Support for SDIO.
   - sdhi/tmio: Refactor and cleanup of header files.
   - omap_hsmmc: Use slot-gpio and common MMC DT parser.
   - Make all hosts to deal with errors from mmc_of_parse().
   - sunxi: Various fixes and cleanups.
   - sdhci: Support for Fujitsu SDHCI controller f_sdh30"

* tag 'mmc-v3.20-1' of git://git.linaro.org/people/ulf.hansson/mmc: (117 commits)
  mmc: sdhci-s3c: solve problem with sleeping in atomic context
  mmc: pwrseq: add driver for emmc hardware reset
  mmc: moxart: fix probe logic
  mmc: core: Invoke mmc_pwrseq_post_power_on() prior MMC_POWER_ON state
  mmc: pwrseq_simple: Add optional reference clock support
  mmc: pwrseq: Document optional clock for the simple power sequence
  mmc: pwrseq_simple: Extend to support more pins
  mmc: pwrseq: Document that simple sequence support more than one GPIO
  mmc: Add hardware dependencies for sdhci-pxav3 and sdhci-pxav2
  mmc: sdhci-pxav3: Modify clock settings for the SDR50 and DDR50 modes
  mmc: sdhci-pxav3: Extend binding with SDIO3 conf reg for the Armada 38x
  mmc: sdhci-pxav3: Fix Armada 38x controller's caps according to erratum ERR-7878951
  mmc: sdhci-pxav3: Fix SDR50 and DDR50 capabilities for the Armada 38x flavor
  mmc: sdhci: switch voltage before sdhci_set_ios in runtime resume
  mmc: tegra: Write xfer_mode, CMD regs in together
  mmc: Resolve BKOPS compatability issue
  mmc: sdhci-pxav3: fix setting of pdata->clk_delay_cycles
  mmc: dw_mmc: rockchip: remove incorrect __exit_p()
  mmc: dw_mmc: exynos: remove incorrect __exit_p()
  mmc: Fix menuconfig alignment of MMC_SDHCI_* options
  ...

10 files changed, 28 insertions, 57 deletions

diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 57388171610d..605812820e48 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -96,11 +96,6 @@
 #define TMIO_MMC_SDIO_STATUS_QUIRK      (1 << 8)
 
 /*
- * Some controllers have DMA enable/disable register
- */
-#define TMIO_MMC_HAVE_CTL_DMA_REG       (1 << 9)
-
-/*
  * Some controllers allows to set SDx actual clock
  */
 #define TMIO_MMC_CLK_ACTUAL             (1 << 10)
@@ -112,18 +107,6 @@ void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state);
 
 struct dma_chan;
 
-struct tmio_mmc_dma {
-        void *chan_priv_tx;
-        void *chan_priv_rx;
-        int slave_id_tx;
-        int slave_id_rx;
-        int alignment_shift;
-        dma_addr_t dma_rx_offset;
-        bool (*filter)(struct dma_chan *chan, void *arg);
-};
-
-struct tmio_mmc_host;
-
 /*
  * data for the MMC controller
  */
@@ -132,19 +115,12 @@ struct tmio_mmc_data {
         unsigned long                   capabilities;
         unsigned long                   capabilities2;
         unsigned long                   flags;
-        unsigned long                   bus_shift;
         u32                             ocr_mask;       /* available voltages */
-        struct tmio_mmc_dma             *dma;
-        struct device                   *dev;
         unsigned int                    cd_gpio;
+        int                             alignment_shift;
+        dma_addr_t                      dma_rx_offset;
         void (*set_pwr)(struct platform_device *host, int state);
         void (*set_clk_div)(struct platform_device *host, int state);
-        int (*write16_hook)(struct tmio_mmc_host *host, int addr);
-        /* clock management callbacks */
-        int (*clk_enable)(struct platform_device *pdev, unsigned int *f);
-        void (*clk_disable)(struct platform_device *pdev);
-        int (*multi_io_quirk)(struct mmc_card *card,
-                              unsigned int direction, int blk_size);
 };
 
 /*
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 4d69c00497bd..a6cf4c063e4e 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -83,7 +83,7 @@ struct mmc_ext_csd {
         bool                    hpi;                    /* HPI support bit */
         unsigned int            hpi_cmd;                /* cmd used as HPI */
         bool                    bkops;          /* background support bit */
-        bool                    bkops_en;       /* background enable bit */
+        bool                    man_bkops_en;   /* manual bkops enable bit */
         unsigned int            data_sector_size;       /* 512 bytes or 4KB */
         unsigned int            data_tag_unit_size;     /* DATA TAG UNIT size */
         unsigned int            boot_ro_lock;           /* ro lock support */
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index cb2b0400d284..160448f920ac 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -182,7 +182,6 @@ extern int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen);
 extern int mmc_set_blockcount(struct mmc_card *card, unsigned int blockcount,
                               bool is_rel_write);
 extern int mmc_hw_reset(struct mmc_host *host);
-extern int mmc_hw_reset_check(struct mmc_host *host);
 extern int mmc_can_reset(struct mmc_card *card);
 
 extern void mmc_set_data_timeout(struct mmc_data *, const struct mmc_card *);
diff --git a/include/linux/mmc/dw_mmc.h b/include/linux/mmc/dw_mmc.h
index 42b724e8d503..471fb3116dbe 100644
--- a/include/linux/mmc/dw_mmc.h
+++ b/include/linux/mmc/dw_mmc.h
@@ -106,6 +106,11 @@ struct mmc_data;
  * @cur_slot, @mrq and @state. These must always be updated
  * at the same time while holding @lock.
  *
+ * @irq_lock is an irq-safe spinlock protecting the INTMASK register
+ * to allow the interrupt handler to modify it directly.  Held for only long
+ * enough to read-modify-write INTMASK and no other locks are grabbed when
+ * holding this one.
+ *
  * The @mrq field of struct dw_mci_slot is also protected by @lock,
  * and must always be written at the same time as the slot is added to
  * @queue.
@@ -125,6 +130,7 @@ struct mmc_data;
  */
 struct dw_mci {
         spinlock_t              lock;
+        spinlock_t              irq_lock;
         void __iomem            *regs;
 
         struct scatterlist      *sg;
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 9f322706f7cb..0c8cbe5d1550 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -166,7 +166,6 @@ struct mmc_async_req {
  * struct mmc_slot - MMC slot functions
  *
  * @cd_irq:             MMC/SD-card slot hotplug detection IRQ or -EINVAL
- * @lock:               protect the @handler_priv pointer
  * @handler_priv:       MMC/SD-card slot context
  *
  * Some MMC/SD host controllers implement slot-functions like card and
@@ -176,7 +175,6 @@ struct mmc_async_req {
  */
 struct mmc_slot {
         int cd_irq;
-        struct mutex lock;
         void *handler_priv;
 };
 
@@ -197,6 +195,7 @@ struct mmc_context_info {
 };
 
 struct regulator;
+struct mmc_pwrseq;
 
 struct mmc_supply {
         struct regulator *vmmc;         /* Card power supply */
@@ -208,6 +207,7 @@ struct mmc_host {
         struct device           class_dev;
         int                     index;
         const struct mmc_host_ops *ops;
+        struct mmc_pwrseq       *pwrseq;
         unsigned int            f_min;
         unsigned int            f_max;
         unsigned int            f_init;
diff --git a/include/linux/mmc/mmc.h b/include/linux/mmc/mmc.h
index 49ad7a943638..124f562118b8 100644
--- a/include/linux/mmc/mmc.h
+++ b/include/linux/mmc/mmc.h
@@ -53,11 +53,6 @@
 #define MMC_SEND_TUNING_BLOCK    19   /* adtc                    R1  */
 #define MMC_SEND_TUNING_BLOCK_HS200     21      /* adtc R1  */
 
-#define MMC_TUNING_BLK_PATTERN_4BIT_SIZE         64
-#define MMC_TUNING_BLK_PATTERN_8BIT_SIZE        128
-extern const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE];
-extern const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE];
-
   /* class 3 */
 #define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
 
@@ -433,6 +428,11 @@ struct _mmc_csd {
 #define EXT_CSD_BKOPS_LEVEL_2           0x2