Merge tag 'mmc-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Continue to refactor the mmc block code to prepare for blkmq
   - Move mmc block debugfs into block module
   - Next step for eMMC CMDQ by adding a new mmc host interface for it
   - Move Kconfig option MMC_DEBUG from core to host
   - Some additional minor improvements

  MMC host:
   - Declare structs as const when applicable
   - Explicitly request exclusive reset control when applicable
   - Improve some error paths and other various cleanups
   - sdhci: Preparations to support SDHCI OMAP
   - sdhci: Improve some PM related code
   - sdhci: Re-factoring and modernizations
   - sdhci-xenon: Add runtime PM and system sleep support
   - sdhci-xenon: Add support for eMMC HS400 Enhanced Strobe
   - sdhci-cadence: Add system sleep support
   - sdhci-of-at91: Improve system sleep support
   - dw_mmc: Add support for Hisilicon hi3660
   - sunxi: Add support for A83T eMMC
   - sunxi: Add support for DDR52 mode
   - meson-gx: Add support for UHS-I SD-cards
   - meson-gx: Cleanups and improvements
   - tmio: Fix CMD12 (STOP) handling
   - tmio: Cleanups and improvements
   - renesas_sdhi: Add r8a7743/5 support
   - renesas-sdhi: Add support for R-Car Gen3 SDHI DMAC
   - renesas_sdhi: Cleanups and improvements"

* tag 'mmc-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (145 commits)
  mmc: renesas_sdhi: Add r8a7743/5 support
  mmc: meson-gx: fix __ffsdi2 undefined on arm32
  mmc: sdhci-xenon: add runtime pm support and reimplement standby
  mmc: core: Move mmc_start_areq() declaration
  mmc: mmci: stop building qcom dml as module
  mmc: sunxi: Reset the device at probe time
  clk: sunxi-ng: Provide a default reset hook
  mmc: meson-gx: rework tuning function
  mmc: meson-gx: change default tx phase
  mmc: meson-gx: implement voltage switch callback
  mmc: meson-gx: use CCF to handle the clock phases
  mmc: meson-gx: implement card_busy callback
  mmc: meson-gx: simplify interrupt handler
  mmc: meson-gx: work around clk-stop issue
  mmc: meson-gx: fix dual data rate mode frequencies
  mmc: meson-gx: rework clock init function
  mmc: meson-gx: rework clk_set function
  mmc: meson-gx: rework set_ios function
  mmc: meson-gx: cfg init overwrite values
  mmc: meson-gx: initialize sane clk default before clock register
  ...

5 files changed, 112 insertions, 15 deletions

diff --git a/include/linux/clk/sunxi-ng.h b/include/linux/clk/sunxi-ng.h
new file mode 100644
index 000000000000..990f760f70e5
--- /dev/null
+++ b/include/linux/clk/sunxi-ng.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _LINUX_CLK_SUNXI_NG_H_
+#define _LINUX_CLK_SUNXI_NG_H_
+
+#include <linux/errno.h>
+
+#ifdef CONFIG_SUNXI_CCU
+int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode);
+int sunxi_ccu_get_mmc_timing_mode(struct clk *clk);
+#else
+static inline int sunxi_ccu_set_mmc_timing_mode(struct clk *clk,
+                                                bool new_mode)
+{
+        return -ENOTSUPP;
+}
+
+static inline int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
+{
+        return -ENOTSUPP;
+}
+#endif
+
+#endif
diff --git a/include/linux/mfd/tmio.h b/include/linux/mfd/tmio.h
index 26e8f8c0a6db..b572955e6de6 100644
--- a/include/linux/mfd/tmio.h
+++ b/include/linux/mfd/tmio.h
@@ -107,6 +107,9 @@
  */
 #define TMIO_MMC_CLK_ACTUAL             BIT(10)
 
+/* Some controllers have a CBSY bit */
+#define TMIO_MMC_HAVE_CBSY              BIT(11)
+
 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
@@ -128,6 +131,8 @@ struct tmio_mmc_data {
         unsigned int                    cd_gpio;
         int                             alignment_shift;
         dma_addr_t                      dma_rx_offset;
+        unsigned int                    max_blk_count;
+        unsigned short                  max_segs;
         void (*set_pwr)(struct platform_device *host, int state);
         void (*set_clk_div)(struct platform_device *host, int state);
 };
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 46c73e97e61f..279b39008a33 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -29,8 +29,8 @@ struct mmc_csd {
         unsigned char           structure;
         unsigned char           mmca_vsn;
         unsigned short          cmdclass;
-        unsigned short          tacc_clks;
-        unsigned int            tacc_ns;
+        unsigned short          taac_clks;
+        unsigned int            taac_ns;
         unsigned int            c_size;
         unsigned int            r2w_factor;
         unsigned int            max_dtr;
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index a0c63ea28796..927519385482 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -122,11 +122,18 @@ struct mmc_data {
         unsigned int            timeout_clks;   /* data timeout (in clocks) */
         unsigned int            blksz;          /* data block size */
         unsigned int            blocks;         /* number of blocks */
+        unsigned int            blk_addr;       /* block address */
         int                     error;          /* data error */
         unsigned int            flags;
 
-#define MMC_DATA_WRITE  (1 << 8)
-#define MMC_DATA_READ   (1 << 9)
+#define MMC_DATA_WRITE          BIT(8)
+#define MMC_DATA_READ           BIT(9)
+/* Extra flags used by CQE */
+#define MMC_DATA_QBR            BIT(10)         /* CQE queue barrier*/
+#define MMC_DATA_PRIO           BIT(11)         /* CQE high priority */
+#define MMC_DATA_REL_WR         BIT(12)         /* Reliable write */
+#define MMC_DATA_DAT_TAG        BIT(13)         /* Tag request */
+#define MMC_DATA_FORCED_PRG     BIT(14)         /* Forced programming */
 
         unsigned int            bytes_xfered;
 
@@ -149,18 +156,22 @@ struct mmc_request {
         struct completion       completion;
         struct completion       cmd_completion;
         void                    (*done)(struct mmc_request *);/* completion function */
+        /*
+         * Notify uppers layers (e.g. mmc block driver) that recovery is needed
+         * due to an error associated with the mmc_request. Currently used only
+         * by CQE.
+         */
+        void                    (*recovery_notifier)(struct mmc_request *);
         struct mmc_host         *host;
 
         /* Allow other commands during this ongoing data transfer or busy wait */
         bool                    cap_cmd_during_tfr;
+
+        int                     tag;
 };
 
 struct mmc_card;
-struct mmc_async_req;
 
-struct mmc_async_req *mmc_start_areq(struct mmc_host *host,
-                                struct mmc_async_req *areq,
-                                enum mmc_blk_status *ret_stat);
 void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq);
 int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd,
                 int retries);
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index ebd1cebbef0c..f3f2d07feb2a 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -162,6 +162,50 @@ struct mmc_host_ops {
                                   unsigned int direction, int blk_size);
 };
 
+struct mmc_cqe_ops {
+        /* Allocate resources, and make the CQE operational */
+        int     (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
+        /* Free resources, and make the CQE non-operational */
+        void    (*cqe_disable)(struct mmc_host *host);
+        /*
+         * Issue a read, write or DCMD request to the CQE. Also deal with the
+         * effect of ->cqe_off().
+         */
+        int     (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
+        /* Free resources (e.g. DMA mapping) associated with the request */
+        void    (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
+        /*
+         * Prepare the CQE and host controller to accept non-CQ commands. There
+         * is no corresponding ->cqe_on(), instead ->cqe_request() is required
+         * to deal with that.
+         */
+        void    (*cqe_off)(struct mmc_host *host);
+        /*
+         * Wait for all CQE tasks to complete. Return an error if recovery
+         * becomes necessary.
+         */
+        int     (*cqe_wait_for_idle)(struct mmc_host *host);
+        /*
+         * Notify CQE that a request has timed out. Return false if the request
+         * completed or true if a timeout happened in which case indicate if
+         * recovery is needed.
+         */
+        bool    (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
+                               bool *recovery_needed);
+        /*
+         * Stop all CQE activity and prepare the CQE and host controller to
+         * accept recovery commands.
+         */
+        void    (*cqe_recovery_start)(struct mmc_host *host);
+        /*
+         * Clear the queue and call mmc_cqe_request_done() on all requests.
+         * Requests that errored will have the error set on the mmc_request
+         * (data->error or cmd->error for DCMD).  Requests that did not error
+         * will have zero data bytes transferred.
+         */
+        void    (*cqe_recovery_finish)(struct mmc_host *host);
+};
+
 struct mmc_async_req {
         /* active mmc request */
         struct mmc_request      *mrq;
@@ -291,10 +335,6 @@ struct mmc_host {
                                  MMC_CAP2_HS200_1_2V_SDR)
 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10)       /* Card-detect signal active high */
 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11)       /* Write-protect signal active high */
-#define MMC_CAP2_PACKED_RD      (1 << 12)       /* Allow packed read */
-#define MMC_CAP2_PACKED_WR      (1 << 13)       /* Allow packed write */
-#define MMC_CAP2_PACKED_CMD     (MMC_CAP2_PACKED_RD | \
-                                 MMC_CAP2_PACKED_WR)
 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14)   /* Don't power up before scan */
 #define MMC_CAP2_HS400_1_8V     (1 << 15)       /* Can support HS400 1.8V */
 #define MMC_CAP2_HS400_1_2V     (1 << 16)       /* Can support HS400 1.2V */
@@ -307,6 +347,8 @@ struct mmc_host {
 #define MMC_CAP2_HS400_ES       (1 << 20)       /* Host supports enhanced strobe */
 #define MMC_CAP2_NO_SD          (1 << 21)       /* Do not send SD commands during initialization */
 #define MMC_CAP2_NO_MMC         (1 << 22)       /* Do not send (e)MMC commands during initialization */
+#define MMC_CAP2_CQE            (1 << 23)       /* Has eMMC command queue engine */
+#define MMC_CAP2_CQE_DCMD       (1 << 24)       /* CQE can issue a direct command */
 
         mmc_pm_flag_t           pm_caps;        /* supported pm features */
 
@@ -328,9 +370,6 @@ struct mmc_host {
         unsigned int            use_spi_crc:1;
         unsigned int            claimed:1;      /* host exclusively claimed */
         unsigned int            bus_dead:1;     /* bus has been released */
-#ifdef CONFIG_MMC_DEBUG
-        unsigned int            removed:1;      /* host is being removed */
-#endif
         unsigned int            can_retune:1;   /* re-tuning can be used */
         unsigned int            doing_retune:1; /* re-tuning in progress */
         unsigned int            retune_now:1;   /* do re-tuning at next req */
@@ -393,6 +432,13 @@ struct mmc_host {
         int                     dsr_req;        /* DSR value is valid */
         u32                     dsr;    /* optional driver stage (DSR) value */
 
+        /* Command Queue Engine (CQE) support */
+        const struct mmc_cqe_ops *cqe_ops;
+        void                    *cqe_private;
+        int                     cqe_qdepth;
+        bool                    cqe_enabled;
+        bool                    cqe_on;
+
         unsigned long           private[0] ____cacheline_aligned;
 };